xref: /openbmc/linux/drivers/spi/spi-mpc52xx.c (revision 0a6d3879) 
1ca632f55SGrant Likely /*
2ca632f55SGrant Likely  * MPC52xx SPI bus driver.
3ca632f55SGrant Likely  *
4ca632f55SGrant Likely  * Copyright (C) 2008 Secret Lab Technologies Ltd.
5ca632f55SGrant Likely  *
6ca632f55SGrant Likely  * This file is released under the GPLv2
7ca632f55SGrant Likely  *
8ca632f55SGrant Likely  * This is the driver for the MPC5200's dedicated SPI controller.
9ca632f55SGrant Likely  *
10ca632f55SGrant Likely  * Note: this driver does not support the MPC5200 PSC in SPI mode.  For
11ca632f55SGrant Likely  * that driver see drivers/spi/mpc52xx_psc_spi.c
12ca632f55SGrant Likely  */
13ca632f55SGrant Likely 
14ca632f55SGrant Likely #include <linux/module.h>
15ca632f55SGrant Likely #include <linux/init.h>
16ca632f55SGrant Likely #include <linux/errno.h>
17ca632f55SGrant Likely #include <linux/of_platform.h>
18ca632f55SGrant Likely #include <linux/interrupt.h>
19ca632f55SGrant Likely #include <linux/delay.h>
20ca632f55SGrant Likely #include <linux/spi/spi.h>
21ca632f55SGrant Likely #include <linux/io.h>
22ca632f55SGrant Likely #include <linux/of_gpio.h>
23ca632f55SGrant Likely #include <linux/slab.h>
24ca632f55SGrant Likely #include <asm/time.h>
25ca632f55SGrant Likely #include <asm/mpc52xx.h>
26ca632f55SGrant Likely 
27ca632f55SGrant Likely MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
28ca632f55SGrant Likely MODULE_DESCRIPTION("MPC52xx SPI (non-PSC) Driver");
29ca632f55SGrant Likely MODULE_LICENSE("GPL");
30ca632f55SGrant Likely 
31ca632f55SGrant Likely /* Register offsets */
32ca632f55SGrant Likely #define SPI_CTRL1	0x00
33ca632f55SGrant Likely #define SPI_CTRL1_SPIE		(1 << 7)
34ca632f55SGrant Likely #define SPI_CTRL1_SPE		(1 << 6)
35ca632f55SGrant Likely #define SPI_CTRL1_MSTR		(1 << 4)
36ca632f55SGrant Likely #define SPI_CTRL1_CPOL		(1 << 3)
37ca632f55SGrant Likely #define SPI_CTRL1_CPHA		(1 << 2)
38ca632f55SGrant Likely #define SPI_CTRL1_SSOE		(1 << 1)
39ca632f55SGrant Likely #define SPI_CTRL1_LSBFE		(1 << 0)
40ca632f55SGrant Likely 
41ca632f55SGrant Likely #define SPI_CTRL2	0x01
42ca632f55SGrant Likely #define SPI_BRR		0x04
43ca632f55SGrant Likely 
44ca632f55SGrant Likely #define SPI_STATUS	0x05
45ca632f55SGrant Likely #define SPI_STATUS_SPIF		(1 << 7)
46ca632f55SGrant Likely #define SPI_STATUS_WCOL		(1 << 6)
47ca632f55SGrant Likely #define SPI_STATUS_MODF		(1 << 4)
48ca632f55SGrant Likely 
49ca632f55SGrant Likely #define SPI_DATA	0x09
50ca632f55SGrant Likely #define SPI_PORTDATA	0x0d
51ca632f55SGrant Likely #define SPI_DATADIR	0x10
52ca632f55SGrant Likely 
53ca632f55SGrant Likely /* FSM state return values */
54ca632f55SGrant Likely #define FSM_STOP	0	/* Nothing more for the state machine to */
55ca632f55SGrant Likely 				/* do.  If something interesting happens */
56ca632f55SGrant Likely 				/* then an IRQ will be received */
57ca632f55SGrant Likely #define FSM_POLL	1	/* need to poll for completion, an IRQ is */
58ca632f55SGrant Likely 				/* not expected */
59ca632f55SGrant Likely #define FSM_CONTINUE	2	/* Keep iterating the state machine */
60ca632f55SGrant Likely 
61ca632f55SGrant Likely /* Driver internal data */
62ca632f55SGrant Likely struct mpc52xx_spi {
63ca632f55SGrant Likely 	struct spi_master *master;
64ca632f55SGrant Likely 	void __iomem *regs;
65ca632f55SGrant Likely 	int irq0;	/* MODF irq */
66ca632f55SGrant Likely 	int irq1;	/* SPIF irq */
67ca632f55SGrant Likely 	unsigned int ipb_freq;
68ca632f55SGrant Likely 
69ca632f55SGrant Likely 	/* Statistics; not used now, but will be reintroduced for debugfs */
70ca632f55SGrant Likely 	int msg_count;
71ca632f55SGrant Likely 	int wcol_count;
72ca632f55SGrant Likely 	int wcol_ticks;
73ca632f55SGrant Likely 	u32 wcol_tx_timestamp;
74ca632f55SGrant Likely 	int modf_count;
75ca632f55SGrant Likely 	int byte_count;
76ca632f55SGrant Likely 
77ca632f55SGrant Likely 	struct list_head queue;		/* queue of pending messages */
78ca632f55SGrant Likely 	spinlock_t lock;
79ca632f55SGrant Likely 	struct work_struct work;
80ca632f55SGrant Likely 
81ca632f55SGrant Likely 	/* Details of current transfer (length, and buffer pointers) */
82ca632f55SGrant Likely 	struct spi_message *message;	/* current message */
83ca632f55SGrant Likely 	struct spi_transfer *transfer;	/* current transfer */
84ca632f55SGrant Likely 	int (*state)(int irq, struct mpc52xx_spi *ms, u8 status, u8 data);
85ca632f55SGrant Likely 	int len;
86ca632f55SGrant Likely 	int timestamp;
87ca632f55SGrant Likely 	u8 *rx_buf;
88ca632f55SGrant Likely 	const u8 *tx_buf;
89ca632f55SGrant Likely 	int cs_change;
90ca632f55SGrant Likely 	int gpio_cs_count;
91ca632f55SGrant Likely 	unsigned int *gpio_cs;
92ca632f55SGrant Likely };
93ca632f55SGrant Likely 
94ca632f55SGrant Likely /*
95ca632f55SGrant Likely  * CS control function
96ca632f55SGrant Likely  */
97ca632f55SGrant Likely static void mpc52xx_spi_chipsel(struct mpc52xx_spi *ms, int value)
98ca632f55SGrant Likely {
99ca632f55SGrant Likely 	int cs;
100ca632f55SGrant Likely 
101ca632f55SGrant Likely 	if (ms->gpio_cs_count > 0) {
102ca632f55SGrant Likely 		cs = ms->message->spi->chip_select;
103ca632f55SGrant Likely 		gpio_set_value(ms->gpio_cs[cs], value ? 0 : 1);
104ca632f55SGrant Likely 	} else
105ca632f55SGrant Likely 		out_8(ms->regs + SPI_PORTDATA, value ? 0 : 0x08);
106ca632f55SGrant Likely }
107ca632f55SGrant Likely 
108ca632f55SGrant Likely /*
109ca632f55SGrant Likely  * Start a new transfer.  This is called both by the idle state
110ca632f55SGrant Likely  * for the first transfer in a message, and by the wait state when the
111ca632f55SGrant Likely  * previous transfer in a message is complete.
112ca632f55SGrant Likely  */
113ca632f55SGrant Likely static void mpc52xx_spi_start_transfer(struct mpc52xx_spi *ms)
114ca632f55SGrant Likely {
115ca632f55SGrant Likely 	ms->rx_buf = ms->transfer->rx_buf;
116ca632f55SGrant Likely 	ms->tx_buf = ms->transfer->tx_buf;
117ca632f55SGrant Likely 	ms->len = ms->transfer->len;
118ca632f55SGrant Likely 
119ca632f55SGrant Likely 	/* Activate the chip select */
120ca632f55SGrant Likely 	if (ms->cs_change)
121ca632f55SGrant Likely 		mpc52xx_spi_chipsel(ms, 1);
122ca632f55SGrant Likely 	ms->cs_change = ms->transfer->cs_change;
123ca632f55SGrant Likely 
124ca632f55SGrant Likely 	/* Write out the first byte */
125ca632f55SGrant Likely 	ms->wcol_tx_timestamp = get_tbl();
126ca632f55SGrant Likely 	if (ms->tx_buf)
127ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
128ca632f55SGrant Likely 	else
129ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, 0);
130ca632f55SGrant Likely }
131ca632f55SGrant Likely 
132ca632f55SGrant Likely /* Forward declaration of state handlers */
133ca632f55SGrant Likely static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
134ca632f55SGrant Likely 					 u8 status, u8 data);
135ca632f55SGrant Likely static int mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms,
136ca632f55SGrant Likely 				     u8 status, u8 data);
137ca632f55SGrant Likely 
138ca632f55SGrant Likely /*
139ca632f55SGrant Likely  * IDLE state
140ca632f55SGrant Likely  *
141ca632f55SGrant Likely  * No transfers are in progress; if another transfer is pending then retrieve
142ca632f55SGrant Likely  * it and kick it off.  Otherwise, stop processing the state machine
143ca632f55SGrant Likely  */
144ca632f55SGrant Likely static int
145ca632f55SGrant Likely mpc52xx_spi_fsmstate_idle(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
146ca632f55SGrant Likely {
147ca632f55SGrant Likely 	struct spi_device *spi;
148ca632f55SGrant Likely 	int spr, sppr;
149ca632f55SGrant Likely 	u8 ctrl1;
150ca632f55SGrant Likely 
151ca632f55SGrant Likely 	if (status && (irq != NO_IRQ))
152ca632f55SGrant Likely 		dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
153ca632f55SGrant Likely 			status);
154ca632f55SGrant Likely 
155ca632f55SGrant Likely 	/* Check if there is another transfer waiting. */
156ca632f55SGrant Likely 	if (list_empty(&ms->queue))
157ca632f55SGrant Likely 		return FSM_STOP;
158ca632f55SGrant Likely 
159ca632f55SGrant Likely 	/* get the head of the queue */
160ca632f55SGrant Likely 	ms->message = list_first_entry(&ms->queue, struct spi_message, queue);
161ca632f55SGrant Likely 	list_del_init(&ms->message->queue);
162ca632f55SGrant Likely 
163ca632f55SGrant Likely 	/* Setup the controller parameters */
164ca632f55SGrant Likely 	ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
165ca632f55SGrant Likely 	spi = ms->message->spi;
166ca632f55SGrant Likely 	if (spi->mode & SPI_CPHA)
167ca632f55SGrant Likely 		ctrl1 |= SPI_CTRL1_CPHA;
168ca632f55SGrant Likely 	if (spi->mode & SPI_CPOL)
169ca632f55SGrant Likely 		ctrl1 |= SPI_CTRL1_CPOL;
170ca632f55SGrant Likely 	if (spi->mode & SPI_LSB_FIRST)
171ca632f55SGrant Likely 		ctrl1 |= SPI_CTRL1_LSBFE;
172ca632f55SGrant Likely 	out_8(ms->regs + SPI_CTRL1, ctrl1);
173ca632f55SGrant Likely 
174ca632f55SGrant Likely 	/* Setup the controller speed */
175ca632f55SGrant Likely 	/* minimum divider is '2'.  Also, add '1' to force rounding the
176ca632f55SGrant Likely 	 * divider up. */
177ca632f55SGrant Likely 	sppr = ((ms->ipb_freq / ms->message->spi->max_speed_hz) + 1) >> 1;
178ca632f55SGrant Likely 	spr = 0;
179ca632f55SGrant Likely 	if (sppr < 1)
180ca632f55SGrant Likely 		sppr = 1;
181ca632f55SGrant Likely 	while (((sppr - 1) & ~0x7) != 0) {
182ca632f55SGrant Likely 		sppr = (sppr + 1) >> 1; /* add '1' to force rounding up */
183ca632f55SGrant Likely 		spr++;
184ca632f55SGrant Likely 	}
185ca632f55SGrant Likely 	sppr--;		/* sppr quantity in register is offset by 1 */
186ca632f55SGrant Likely 	if (spr > 7) {
187ca632f55SGrant Likely 		/* Don't overrun limits of SPI baudrate register */
188ca632f55SGrant Likely 		spr = 7;
189ca632f55SGrant Likely 		sppr = 7;
190ca632f55SGrant Likely 	}
191ca632f55SGrant Likely 	out_8(ms->regs + SPI_BRR, sppr << 4 | spr); /* Set speed */
192ca632f55SGrant Likely 
193ca632f55SGrant Likely 	ms->cs_change = 1;
194ca632f55SGrant Likely 	ms->transfer = container_of(ms->message->transfers.next,
195ca632f55SGrant Likely 				    struct spi_transfer, transfer_list);
196ca632f55SGrant Likely 
197ca632f55SGrant Likely 	mpc52xx_spi_start_transfer(ms);
198ca632f55SGrant Likely 	ms->state = mpc52xx_spi_fsmstate_transfer;
199ca632f55SGrant Likely 
200ca632f55SGrant Likely 	return FSM_CONTINUE;
201ca632f55SGrant Likely }
202ca632f55SGrant Likely 
203ca632f55SGrant Likely /*
204ca632f55SGrant Likely  * TRANSFER state
205ca632f55SGrant Likely  *
206ca632f55SGrant Likely  * In the middle of a transfer.  If the SPI core has completed processing
207ca632f55SGrant Likely  * a byte, then read out the received data and write out the next byte
208ca632f55SGrant Likely  * (unless this transfer is finished; in which case go on to the wait
209ca632f55SGrant Likely  * state)
210ca632f55SGrant Likely  */
211ca632f55SGrant Likely static int mpc52xx_spi_fsmstate_transfer(int irq, struct mpc52xx_spi *ms,
212ca632f55SGrant Likely 					 u8 status, u8 data)
213ca632f55SGrant Likely {
214ca632f55SGrant Likely 	if (!status)
215ca632f55SGrant Likely 		return ms->irq0 ? FSM_STOP : FSM_POLL;
216ca632f55SGrant Likely 
217ca632f55SGrant Likely 	if (status & SPI_STATUS_WCOL) {
218ca632f55SGrant Likely 		/* The SPI controller is stoopid.  At slower speeds, it may
219ca632f55SGrant Likely 		 * raise the SPIF flag before the state machine is actually
220ca632f55SGrant Likely 		 * finished, which causes a collision (internal to the state
221ca632f55SGrant Likely 		 * machine only).  The manual recommends inserting a delay
222ca632f55SGrant Likely 		 * between receiving the interrupt and sending the next byte,
223ca632f55SGrant Likely 		 * but it can also be worked around simply by retrying the
224ca632f55SGrant Likely 		 * transfer which is what we do here. */
225ca632f55SGrant Likely 		ms->wcol_count++;
226ca632f55SGrant Likely 		ms->wcol_ticks += get_tbl() - ms->wcol_tx_timestamp;
227ca632f55SGrant Likely 		ms->wcol_tx_timestamp = get_tbl();
228ca632f55SGrant Likely 		data = 0;
229ca632f55SGrant Likely 		if (ms->tx_buf)
230ca632f55SGrant Likely 			data = *(ms->tx_buf - 1);
231ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, data); /* try again */
232ca632f55SGrant Likely 		return FSM_CONTINUE;
233ca632f55SGrant Likely 	} else if (status & SPI_STATUS_MODF) {
234ca632f55SGrant Likely 		ms->modf_count++;
235ca632f55SGrant Likely 		dev_err(&ms->master->dev, "mode fault\n");
236ca632f55SGrant Likely 		mpc52xx_spi_chipsel(ms, 0);
237ca632f55SGrant Likely 		ms->message->status = -EIO;
2380a6d3879SAxel Lin 		if (ms->message->complete)
239ca632f55SGrant Likely 			ms->message->complete(ms->message->context);
240ca632f55SGrant Likely 		ms->state = mpc52xx_spi_fsmstate_idle;
241ca632f55SGrant Likely 		return FSM_CONTINUE;
242ca632f55SGrant Likely 	}
243ca632f55SGrant Likely 
244ca632f55SGrant Likely 	/* Read data out of the spi device */
245ca632f55SGrant Likely 	ms->byte_count++;
246ca632f55SGrant Likely 	if (ms->rx_buf)
247ca632f55SGrant Likely 		*ms->rx_buf++ = data;
248ca632f55SGrant Likely 
249ca632f55SGrant Likely 	/* Is the transfer complete? */
250ca632f55SGrant Likely 	ms->len--;
251ca632f55SGrant Likely 	if (ms->len == 0) {
252ca632f55SGrant Likely 		ms->timestamp = get_tbl();
253ca632f55SGrant Likely 		ms->timestamp += ms->transfer->delay_usecs * tb_ticks_per_usec;
254ca632f55SGrant Likely 		ms->state = mpc52xx_spi_fsmstate_wait;
255ca632f55SGrant Likely 		return FSM_CONTINUE;
256ca632f55SGrant Likely 	}
257ca632f55SGrant Likely 
258ca632f55SGrant Likely 	/* Write out the next byte */
259ca632f55SGrant Likely 	ms->wcol_tx_timestamp = get_tbl();
260ca632f55SGrant Likely 	if (ms->tx_buf)
261ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, *ms->tx_buf++);
262ca632f55SGrant Likely 	else
263ca632f55SGrant Likely 		out_8(ms->regs + SPI_DATA, 0);
264ca632f55SGrant Likely 
265ca632f55SGrant Likely 	return FSM_CONTINUE;
266ca632f55SGrant Likely }
267ca632f55SGrant Likely 
268ca632f55SGrant Likely /*
269ca632f55SGrant Likely  * WAIT state
270ca632f55SGrant Likely  *
271ca632f55SGrant Likely  * A transfer has completed; need to wait for the delay period to complete
272ca632f55SGrant Likely  * before starting the next transfer
273ca632f55SGrant Likely  */
274ca632f55SGrant Likely static int
275ca632f55SGrant Likely mpc52xx_spi_fsmstate_wait(int irq, struct mpc52xx_spi *ms, u8 status, u8 data)
276ca632f55SGrant Likely {
277ca632f55SGrant Likely 	if (status && irq)
278ca632f55SGrant Likely 		dev_err(&ms->master->dev, "spurious irq, status=0x%.2x\n",
279ca632f55SGrant Likely 			status);
280ca632f55SGrant Likely 
281ca632f55SGrant Likely 	if (((int)get_tbl()) - ms->timestamp < 0)
282ca632f55SGrant Likely 		return FSM_POLL;
283ca632f55SGrant Likely 
284ca632f55SGrant Likely 	ms->message->actual_length += ms->transfer->len;
285ca632f55SGrant Likely 
286ca632f55SGrant Likely 	/* Check if there is another transfer in this message.  If there
287ca632f55SGrant Likely 	 * aren't then deactivate CS, notify sender, and drop back to idle
288ca632f55SGrant Likely 	 * to start the next message. */
289ca632f55SGrant Likely 	if (ms->transfer->transfer_list.next == &ms->message->transfers) {
290ca632f55SGrant Likely 		ms->msg_count++;
291ca632f55SGrant Likely 		mpc52xx_spi_chipsel(ms, 0);
292ca632f55SGrant Likely 		ms->message->status = 0;
2930a6d3879SAxel Lin 		if (ms->message->complete)
294ca632f55SGrant Likely 			ms->message->complete(ms->message->context);
295ca632f55SGrant Likely 		ms->state = mpc52xx_spi_fsmstate_idle;
296ca632f55SGrant Likely 		return FSM_CONTINUE;
297ca632f55SGrant Likely 	}
298ca632f55SGrant Likely 
299ca632f55SGrant Likely 	/* There is another transfer; kick it off */
300ca632f55SGrant Likely 
301ca632f55SGrant Likely 	if (ms->cs_change)
302ca632f55SGrant Likely 		mpc52xx_spi_chipsel(ms, 0);
303ca632f55SGrant Likely 
304ca632f55SGrant Likely 	ms->transfer = container_of(ms->transfer->transfer_list.next,
305ca632f55SGrant Likely 				    struct spi_transfer, transfer_list);
306ca632f55SGrant Likely 	mpc52xx_spi_start_transfer(ms);
307ca632f55SGrant Likely 	ms->state = mpc52xx_spi_fsmstate_transfer;
308ca632f55SGrant Likely 	return FSM_CONTINUE;
309ca632f55SGrant Likely }
310ca632f55SGrant Likely 
311ca632f55SGrant Likely /**
312ca632f55SGrant Likely  * mpc52xx_spi_fsm_process - Finite State Machine iteration function
313ca632f55SGrant Likely  * @irq: irq number that triggered the FSM or 0 for polling
314ca632f55SGrant Likely  * @ms: pointer to mpc52xx_spi driver data
315ca632f55SGrant Likely  */
316ca632f55SGrant Likely static void mpc52xx_spi_fsm_process(int irq, struct mpc52xx_spi *ms)
317ca632f55SGrant Likely {
318ca632f55SGrant Likely 	int rc = FSM_CONTINUE;
319ca632f55SGrant Likely 	u8 status, data;
320ca632f55SGrant Likely 
321ca632f55SGrant Likely 	while (rc == FSM_CONTINUE) {
322ca632f55SGrant Likely 		/* Interrupt cleared by read of STATUS followed by
323ca632f55SGrant Likely 		 * read of DATA registers */
324ca632f55SGrant Likely 		status = in_8(ms->regs + SPI_STATUS);
325ca632f55SGrant Likely 		data = in_8(ms->regs + SPI_DATA);
326ca632f55SGrant Likely 		rc = ms->state(irq, ms, status, data);
327ca632f55SGrant Likely 	}
328ca632f55SGrant Likely 
329ca632f55SGrant Likely 	if (rc == FSM_POLL)
330ca632f55SGrant Likely 		schedule_work(&ms->work);
331ca632f55SGrant Likely }
332ca632f55SGrant Likely 
333ca632f55SGrant Likely /**
334ca632f55SGrant Likely  * mpc52xx_spi_irq - IRQ handler
335ca632f55SGrant Likely  */
336ca632f55SGrant Likely static irqreturn_t mpc52xx_spi_irq(int irq, void *_ms)
337ca632f55SGrant Likely {
338ca632f55SGrant Likely 	struct mpc52xx_spi *ms = _ms;
339ca632f55SGrant Likely 	spin_lock(&ms->lock);
340ca632f55SGrant Likely 	mpc52xx_spi_fsm_process(irq, ms);
341ca632f55SGrant Likely 	spin_unlock(&ms->lock);
342ca632f55SGrant Likely 	return IRQ_HANDLED;
343ca632f55SGrant Likely }
344ca632f55SGrant Likely 
345ca632f55SGrant Likely /**
346ca632f55SGrant Likely  * mpc52xx_spi_wq - Workqueue function for polling the state machine
347ca632f55SGrant Likely  */
348ca632f55SGrant Likely static void mpc52xx_spi_wq(struct work_struct *work)
349ca632f55SGrant Likely {
350ca632f55SGrant Likely 	struct mpc52xx_spi *ms = container_of(work, struct mpc52xx_spi, work);
351ca632f55SGrant Likely 	unsigned long flags;
352ca632f55SGrant Likely 
353ca632f55SGrant Likely 	spin_lock_irqsave(&ms->lock, flags);
354ca632f55SGrant Likely 	mpc52xx_spi_fsm_process(0, ms);
355ca632f55SGrant Likely 	spin_unlock_irqrestore(&ms->lock, flags);
356ca632f55SGrant Likely }
357ca632f55SGrant Likely 
358ca632f55SGrant Likely /*
359ca632f55SGrant Likely  * spi_master ops
360ca632f55SGrant Likely  */
361ca632f55SGrant Likely 
362ca632f55SGrant Likely static int mpc52xx_spi_setup(struct spi_device *spi)
363ca632f55SGrant Likely {
364ca632f55SGrant Likely 	if (spi->bits_per_word % 8)
365ca632f55SGrant Likely 		return -EINVAL;
366ca632f55SGrant Likely 
367ca632f55SGrant Likely 	if (spi->mode & ~(SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST))
368ca632f55SGrant Likely 		return -EINVAL;
369ca632f55SGrant Likely 
370ca632f55SGrant Likely 	if (spi->chip_select >= spi->master->num_chipselect)
371ca632f55SGrant Likely 		return -EINVAL;
372ca632f55SGrant Likely 
373ca632f55SGrant Likely 	return 0;
374ca632f55SGrant Likely }
375ca632f55SGrant Likely 
376ca632f55SGrant Likely static int mpc52xx_spi_transfer(struct spi_device *spi, struct spi_message *m)
377ca632f55SGrant Likely {
378ca632f55SGrant Likely 	struct mpc52xx_spi *ms = spi_master_get_devdata(spi->master);
379ca632f55SGrant Likely 	unsigned long flags;
380ca632f55SGrant Likely 
381ca632f55SGrant Likely 	m->actual_length = 0;
382ca632f55SGrant Likely 	m->status = -EINPROGRESS;
383ca632f55SGrant Likely 
384ca632f55SGrant Likely 	spin_lock_irqsave(&ms->lock, flags);
385ca632f55SGrant Likely 	list_add_tail(&m->queue, &ms->queue);
386ca632f55SGrant Likely 	spin_unlock_irqrestore(&ms->lock, flags);
387ca632f55SGrant Likely 	schedule_work(&ms->work);
388ca632f55SGrant Likely 
389ca632f55SGrant Likely 	return 0;
390ca632f55SGrant Likely }
391ca632f55SGrant Likely 
392ca632f55SGrant Likely /*
393ca632f55SGrant Likely  * OF Platform Bus Binding
394ca632f55SGrant Likely  */
395fd4a319bSGrant Likely static int mpc52xx_spi_probe(struct platform_device *op)
396ca632f55SGrant Likely {
397ca632f55SGrant Likely 	struct spi_master *master;
398ca632f55SGrant Likely 	struct mpc52xx_spi *ms;
399ca632f55SGrant Likely 	void __iomem *regs;
400ca632f55SGrant Likely 	u8 ctrl1;
401ca632f55SGrant Likely 	int rc, i = 0;
402ca632f55SGrant Likely 	int gpio_cs;
403ca632f55SGrant Likely 
404ca632f55SGrant Likely 	/* MMIO registers */
405ca632f55SGrant Likely 	dev_dbg(&op->dev, "probing mpc5200 SPI device\n");
406ca632f55SGrant Likely 	regs = of_iomap(op->dev.of_node, 0);
407ca632f55SGrant Likely 	if (!regs)
408ca632f55SGrant Likely 		return -ENODEV;
409ca632f55SGrant Likely 
410ca632f55SGrant Likely 	/* initialize the device */
411ca632f55SGrant Likely 	ctrl1 = SPI_CTRL1_SPIE | SPI_CTRL1_SPE | SPI_CTRL1_MSTR;
412ca632f55SGrant Likely 	out_8(regs + SPI_CTRL1, ctrl1);
413ca632f55SGrant Likely 	out_8(regs + SPI_CTRL2, 0x0);
414ca632f55SGrant Likely 	out_8(regs + SPI_DATADIR, 0xe);	/* Set output pins */
415ca632f55SGrant Likely 	out_8(regs + SPI_PORTDATA, 0x8);	/* Deassert /SS signal */
416ca632f55SGrant Likely 
417ca632f55SGrant Likely 	/* Clear the status register and re-read it to check for a MODF
418ca632f55SGrant Likely 	 * failure.  This driver cannot currently handle multiple masters
419ca632f55SGrant Likely 	 * on the SPI bus.  This fault will also occur if the SPI signals
420ca632f55SGrant Likely 	 * are not connected to any pins (port_config setting) */
421ca632f55SGrant Likely 	in_8(regs + SPI_STATUS);
422ca632f55SGrant Likely 	out_8(regs + SPI_CTRL1, ctrl1);
423ca632f55SGrant Likely 
424ca632f55SGrant Likely 	in_8(regs + SPI_DATA);
425ca632f55SGrant Likely 	if (in_8(regs + SPI_STATUS) & SPI_STATUS_MODF) {
426ca632f55SGrant Likely 		dev_err(&op->dev, "mode fault; is port_config correct?\n");
427ca632f55SGrant Likely 		rc = -EIO;
428ca632f55SGrant Likely 		goto err_init;
429ca632f55SGrant Likely 	}
430ca632f55SGrant Likely 
431ca632f55SGrant Likely 	dev_dbg(&op->dev, "allocating spi_master struct\n");
432ca632f55SGrant Likely 	master = spi_alloc_master(&op->dev, sizeof *ms);
433ca632f55SGrant Likely 	if (!master) {
434ca632f55SGrant Likely 		rc = -ENOMEM;
435ca632f55SGrant Likely 		goto err_alloc;
436ca632f55SGrant Likely 	}
437ca632f55SGrant Likely 
438ca632f55SGrant Likely 	master->setup = mpc52xx_spi_setup;
439ca632f55SGrant Likely 	master->transfer = mpc52xx_spi_transfer;
440ca632f55SGrant Likely 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST;
441ca632f55SGrant Likely 	master->dev.of_node = op->dev.of_node;
442ca632f55SGrant Likely 
44324b5a82cSJingoo Han 	platform_set_drvdata(op, master);
444ca632f55SGrant Likely 
445ca632f55SGrant Likely 	ms = spi_master_get_devdata(master);
446ca632f55SGrant Likely 	ms->master = master;
447ca632f55SGrant Likely 	ms->regs = regs;
448ca632f55SGrant Likely 	ms->irq0 = irq_of_parse_and_map(op->dev.of_node, 0);
449ca632f55SGrant Likely 	ms->irq1 = irq_of_parse_and_map(op->dev.of_node, 1);
450ca632f55SGrant Likely 	ms->state = mpc52xx_spi_fsmstate_idle;
451ca632f55SGrant Likely 	ms->ipb_freq = mpc5xxx_get_bus_frequency(op->dev.of_node);
452ca632f55SGrant Likely 	ms->gpio_cs_count = of_gpio_count(op->dev.of_node);
453ca632f55SGrant Likely 	if (ms->gpio_cs_count > 0) {
454ca632f55SGrant Likely 		master->num_chipselect = ms->gpio_cs_count;
455ca632f55SGrant Likely 		ms->gpio_cs = kmalloc(ms->gpio_cs_count * sizeof(unsigned int),
456ca632f55SGrant Likely 				GFP_KERNEL);
457ca632f55SGrant Likely 		if (!ms->gpio_cs) {
458ca632f55SGrant Likely 			rc = -ENOMEM;
459866c0f25SGuenter Roeck 			goto err_alloc_gpio;
460ca632f55SGrant Likely 		}
461ca632f55SGrant Likely 
462ca632f55SGrant Likely 		for (i = 0; i < ms->gpio_cs_count; i++) {
463ca632f55SGrant Likely 			gpio_cs = of_get_gpio(op->dev.of_node, i);
464ca632f55SGrant Likely 			if (gpio_cs < 0) {
465ca632f55SGrant Likely 				dev_err(&op->dev,
466ca632f55SGrant Likely 					"could not parse the gpio field "
467ca632f55SGrant Likely 					"in oftree\n");
468ca632f55SGrant Likely 				rc = -ENODEV;
469ca632f55SGrant Likely 				goto err_gpio;
470ca632f55SGrant Likely 			}
471ca632f55SGrant Likely 
472ca632f55SGrant Likely 			rc = gpio_request(gpio_cs, dev_name(&op->dev));
473ca632f55SGrant Likely 			if (rc) {
474ca632f55SGrant Likely 				dev_err(&op->dev,
475ca632f55SGrant Likely 					"can't request spi cs gpio #%d "
476ca632f55SGrant Likely 					"on gpio line %d\n", i, gpio_cs);
477ca632f55SGrant Likely 				goto err_gpio;
478ca632f55SGrant Likely 			}
479ca632f55SGrant Likely 
480ca632f55SGrant Likely 			gpio_direction_output(gpio_cs, 1);
481ca632f55SGrant Likely 			ms->gpio_cs[i] = gpio_cs;
482ca632f55SGrant Likely 		}
483ca632f55SGrant Likely 	}
484ca632f55SGrant Likely 
485ca632f55SGrant Likely 	spin_lock_init(&ms->lock);
486ca632f55SGrant Likely 	INIT_LIST_HEAD(&ms->queue);
487ca632f55SGrant Likely 	INIT_WORK(&ms->work, mpc52xx_spi_wq);
488ca632f55SGrant Likely 
489ca632f55SGrant Likely 	/* Decide if interrupts can be used */
490ca632f55SGrant Likely 	if (ms->irq0 && ms->irq1) {
491ca632f55SGrant Likely 		rc = request_irq(ms->irq0, mpc52xx_spi_irq, 0,
492ca632f55SGrant Likely 				  "mpc5200-spi-modf", ms);
493ca632f55SGrant Likely 		rc |= request_irq(ms->irq1, mpc52xx_spi_irq, 0,
494ca632f55SGrant Likely 				  "mpc5200-spi-spif", ms);
495ca632f55SGrant Likely 		if (rc) {
496ca632f55SGrant Likely 			free_irq(ms->irq0, ms);
497ca632f55SGrant Likely 			free_irq(ms->irq1, ms);
498ca632f55SGrant Likely 			ms->irq0 = ms->irq1 = 0;
499ca632f55SGrant Likely 		}
500ca632f55SGrant Likely 	} else {
501ca632f55SGrant Likely 		/* operate in polled mode */
502ca632f55SGrant Likely 		ms->irq0 = ms->irq1 = 0;
503ca632f55SGrant Likely 	}
504ca632f55SGrant Likely 
505ca632f55SGrant Likely 	if (!ms->irq0)
506ca632f55SGrant Likely 		dev_info(&op->dev, "using polled mode\n");
507ca632f55SGrant Likely 
508ca632f55SGrant Likely 	dev_dbg(&op->dev, "registering spi_master struct\n");
509ca632f55SGrant Likely 	rc = spi_register_master(master);
510ca632f55SGrant Likely 	if (rc)
511ca632f55SGrant Likely 		goto err_register;
512ca632f55SGrant Likely 
513ca632f55SGrant Likely 	dev_info(&ms->master->dev, "registered MPC5200 SPI bus\n");
514ca632f55SGrant Likely 
515ca632f55SGrant Likely 	return rc;
516ca632f55SGrant Likely 
517ca632f55SGrant Likely  err_register:
518ca632f55SGrant Likely 	dev_err(&ms->master->dev, "initialization failed\n");
519ca632f55SGrant Likely  err_gpio:
520ca632f55SGrant Likely 	while (i-- > 0)
521ca632f55SGrant Likely 		gpio_free(ms->gpio_cs[i]);
522ca632f55SGrant Likely 
523ca632f55SGrant Likely 	kfree(ms->gpio_cs);
524866c0f25SGuenter Roeck  err_alloc_gpio:
525866c0f25SGuenter Roeck 	spi_master_put(master);
526ca632f55SGrant Likely  err_alloc:
527ca632f55SGrant Likely  err_init:
528ca632f55SGrant Likely 	iounmap(regs);
529ca632f55SGrant Likely 	return rc;
530ca632f55SGrant Likely }
531ca632f55SGrant Likely 
532fd4a319bSGrant Likely static int mpc52xx_spi_remove(struct platform_device *op)
533ca632f55SGrant Likely {
53424b5a82cSJingoo Han 	struct spi_master *master = spi_master_get(platform_get_drvdata(op));
535ca632f55SGrant Likely 	struct mpc52xx_spi *ms = spi_master_get_devdata(master);
536ca632f55SGrant Likely 	int i;
537ca632f55SGrant Likely 
538ca632f55SGrant Likely 	free_irq(ms->irq0, ms);
539ca632f55SGrant Likely 	free_irq(ms->irq1, ms);
540ca632f55SGrant Likely 
541ca632f55SGrant Likely 	for (i = 0; i < ms->gpio_cs_count; i++)
542ca632f55SGrant Likely 		gpio_free(ms->gpio_cs[i]);
543ca632f55SGrant Likely 
544ca632f55SGrant Likely 	kfree(ms->gpio_cs);
545ca632f55SGrant Likely 	spi_unregister_master(master);
546ca632f55SGrant Likely 	iounmap(ms->regs);
547f95e1028SGuenter Roeck 	spi_master_put(master);
548ca632f55SGrant Likely 
549ca632f55SGrant Likely 	return 0;
550ca632f55SGrant Likely }
551ca632f55SGrant Likely 
552fd4a319bSGrant Likely static const struct of_device_id mpc52xx_spi_match[] = {
553ca632f55SGrant Likely 	{ .compatible = "fsl,mpc5200-spi", },
554ca632f55SGrant Likely 	{}
555ca632f55SGrant Likely };
556ca632f55SGrant Likely MODULE_DEVICE_TABLE(of, mpc52xx_spi_match);
557ca632f55SGrant Likely 
558ca632f55SGrant Likely static struct platform_driver mpc52xx_spi_of_driver = {
559ca632f55SGrant Likely 	.driver = {
560ca632f55SGrant Likely 		.name = "mpc52xx-spi",
561ca632f55SGrant Likely 		.owner = THIS_MODULE,
562ca632f55SGrant Likely 		.of_match_table = mpc52xx_spi_match,
563ca632f55SGrant Likely 	},
564ca632f55SGrant Likely 	.probe = mpc52xx_spi_probe,
565fd4a319bSGrant Likely 	.remove = mpc52xx_spi_remove,
566ca632f55SGrant Likely };
567940ab889SGrant Likely module_platform_driver(mpc52xx_spi_of_driver);
568