xref: /openbmc/linux/drivers/spi/spi-fsl-lib.c (revision a3108360)
1ca632f55SGrant Likely /*
2ca632f55SGrant Likely  * Freescale SPI/eSPI controller driver library.
3ca632f55SGrant Likely  *
4ca632f55SGrant Likely  * Maintainer: Kumar Gala
5ca632f55SGrant Likely  *
6ca632f55SGrant Likely  * Copyright (C) 2006 Polycom, Inc.
7ca632f55SGrant Likely  *
8ca632f55SGrant Likely  * CPM SPI and QE buffer descriptors mode support:
9ca632f55SGrant Likely  * Copyright (c) 2009  MontaVista Software, Inc.
10ca632f55SGrant Likely  * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
11ca632f55SGrant Likely  *
12ca632f55SGrant Likely  * Copyright 2010 Freescale Semiconductor, Inc.
13ca632f55SGrant Likely  *
14ca632f55SGrant Likely  * This program is free software; you can redistribute  it and/or modify it
15ca632f55SGrant Likely  * under  the terms of  the GNU General  Public License as published by the
16ca632f55SGrant Likely  * Free Software Foundation;  either version 2 of the  License, or (at your
17ca632f55SGrant Likely  * option) any later version.
18ca632f55SGrant Likely  */
19ca632f55SGrant Likely #include <linux/dma-mapping.h>
20a3108360SXiubo Li #include <linux/fsl_devices.h>
21a3108360SXiubo Li #include <linux/interrupt.h>
22a3108360SXiubo Li #include <linux/kernel.h>
23ca632f55SGrant Likely #include <linux/mm.h>
24ca632f55SGrant Likely #include <linux/of_platform.h>
25d57a4282SGrant Likely #include <linux/spi/spi.h>
26e8beacbbSAndreas Larsson #ifdef CONFIG_FSL_SOC
27ca632f55SGrant Likely #include <sysdev/fsl_soc.h>
28e8beacbbSAndreas Larsson #endif
29ca632f55SGrant Likely 
30ca632f55SGrant Likely #include "spi-fsl-lib.h"
31ca632f55SGrant Likely 
32ca632f55SGrant Likely #define MPC8XXX_SPI_RX_BUF(type) 					  \
33ca632f55SGrant Likely void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
34ca632f55SGrant Likely {									  \
35ca632f55SGrant Likely 	type *rx = mpc8xxx_spi->rx;					  \
36ca632f55SGrant Likely 	*rx++ = (type)(data >> mpc8xxx_spi->rx_shift);			  \
37ca632f55SGrant Likely 	mpc8xxx_spi->rx = rx;						  \
38ca632f55SGrant Likely }
39ca632f55SGrant Likely 
40ca632f55SGrant Likely #define MPC8XXX_SPI_TX_BUF(type)				\
41ca632f55SGrant Likely u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi)	\
42ca632f55SGrant Likely {								\
43ca632f55SGrant Likely 	u32 data;						\
44ca632f55SGrant Likely 	const type *tx = mpc8xxx_spi->tx;			\
45ca632f55SGrant Likely 	if (!tx)						\
46ca632f55SGrant Likely 		return 0;					\
47ca632f55SGrant Likely 	data = *tx++ << mpc8xxx_spi->tx_shift;			\
48ca632f55SGrant Likely 	mpc8xxx_spi->tx = tx;					\
49ca632f55SGrant Likely 	return data;						\
50ca632f55SGrant Likely }
51ca632f55SGrant Likely 
52ca632f55SGrant Likely MPC8XXX_SPI_RX_BUF(u8)
53ca632f55SGrant Likely MPC8XXX_SPI_RX_BUF(u16)
54ca632f55SGrant Likely MPC8XXX_SPI_RX_BUF(u32)
55ca632f55SGrant Likely MPC8XXX_SPI_TX_BUF(u8)
56ca632f55SGrant Likely MPC8XXX_SPI_TX_BUF(u16)
57ca632f55SGrant Likely MPC8XXX_SPI_TX_BUF(u32)
58ca632f55SGrant Likely 
59ca632f55SGrant Likely struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata)
60ca632f55SGrant Likely {
61ca632f55SGrant Likely 	return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
62ca632f55SGrant Likely }
63ca632f55SGrant Likely 
64d0864323SSachin Kamat static void mpc8xxx_spi_work(struct work_struct *work)
65ca632f55SGrant Likely {
66ca632f55SGrant Likely 	struct mpc8xxx_spi *mpc8xxx_spi = container_of(work, struct mpc8xxx_spi,
67ca632f55SGrant Likely 						       work);
68ca632f55SGrant Likely 
69ca632f55SGrant Likely 	spin_lock_irq(&mpc8xxx_spi->lock);
70ca632f55SGrant Likely 	while (!list_empty(&mpc8xxx_spi->queue)) {
71ca632f55SGrant Likely 		struct spi_message *m = container_of(mpc8xxx_spi->queue.next,
72ca632f55SGrant Likely 						   struct spi_message, queue);
73ca632f55SGrant Likely 
74ca632f55SGrant Likely 		list_del_init(&m->queue);
75ca632f55SGrant Likely 		spin_unlock_irq(&mpc8xxx_spi->lock);
76ca632f55SGrant Likely 
77ca632f55SGrant Likely 		if (mpc8xxx_spi->spi_do_one_msg)
78ca632f55SGrant Likely 			mpc8xxx_spi->spi_do_one_msg(m);
79ca632f55SGrant Likely 
80ca632f55SGrant Likely 		spin_lock_irq(&mpc8xxx_spi->lock);
81ca632f55SGrant Likely 	}
82ca632f55SGrant Likely 	spin_unlock_irq(&mpc8xxx_spi->lock);
83ca632f55SGrant Likely }
84ca632f55SGrant Likely 
85ca632f55SGrant Likely int mpc8xxx_spi_transfer(struct spi_device *spi,
86ca632f55SGrant Likely 				struct spi_message *m)
87ca632f55SGrant Likely {
88ca632f55SGrant Likely 	struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(spi->master);
89ca632f55SGrant Likely 	unsigned long flags;
90ca632f55SGrant Likely 
91ca632f55SGrant Likely 	m->actual_length = 0;
92ca632f55SGrant Likely 	m->status = -EINPROGRESS;
93ca632f55SGrant Likely 
94ca632f55SGrant Likely 	spin_lock_irqsave(&mpc8xxx_spi->lock, flags);
95ca632f55SGrant Likely 	list_add_tail(&m->queue, &mpc8xxx_spi->queue);
96ca632f55SGrant Likely 	queue_work(mpc8xxx_spi->workqueue, &mpc8xxx_spi->work);
97ca632f55SGrant Likely 	spin_unlock_irqrestore(&mpc8xxx_spi->lock, flags);
98ca632f55SGrant Likely 
99ca632f55SGrant Likely 	return 0;
100ca632f55SGrant Likely }
101ca632f55SGrant Likely 
102ca632f55SGrant Likely const char *mpc8xxx_spi_strmode(unsigned int flags)
103ca632f55SGrant Likely {
104ca632f55SGrant Likely 	if (flags & SPI_QE_CPU_MODE) {
105ca632f55SGrant Likely 		return "QE CPU";
106ca632f55SGrant Likely 	} else if (flags & SPI_CPM_MODE) {
107ca632f55SGrant Likely 		if (flags & SPI_QE)
108ca632f55SGrant Likely 			return "QE";
109ca632f55SGrant Likely 		else if (flags & SPI_CPM2)
110ca632f55SGrant Likely 			return "CPM2";
111ca632f55SGrant Likely 		else
112ca632f55SGrant Likely 			return "CPM1";
113ca632f55SGrant Likely 	}
114ca632f55SGrant Likely 	return "CPU";
115ca632f55SGrant Likely }
116ca632f55SGrant Likely 
117ca632f55SGrant Likely int mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
118ca632f55SGrant Likely 			unsigned int irq)
119ca632f55SGrant Likely {
1208074cf06SJingoo Han 	struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
121ca632f55SGrant Likely 	struct spi_master *master;
122ca632f55SGrant Likely 	struct mpc8xxx_spi *mpc8xxx_spi;
123ca632f55SGrant Likely 	int ret = 0;
124ca632f55SGrant Likely 
125ca632f55SGrant Likely 	master = dev_get_drvdata(dev);
126ca632f55SGrant Likely 
127ca632f55SGrant Likely 	/* the spi->mode bits understood by this driver: */
128ca632f55SGrant Likely 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
129ca632f55SGrant Likely 			| SPI_LSB_FIRST | SPI_LOOP;
130ca632f55SGrant Likely 
131ca632f55SGrant Likely 	master->transfer = mpc8xxx_spi_transfer;
132ca632f55SGrant Likely 	master->dev.of_node = dev->of_node;
133ca632f55SGrant Likely 
134ca632f55SGrant Likely 	mpc8xxx_spi = spi_master_get_devdata(master);
135ca632f55SGrant Likely 	mpc8xxx_spi->dev = dev;
136ca632f55SGrant Likely 	mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
137ca632f55SGrant Likely 	mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
138ca632f55SGrant Likely 	mpc8xxx_spi->flags = pdata->flags;
139ca632f55SGrant Likely 	mpc8xxx_spi->spibrg = pdata->sysclk;
140ca632f55SGrant Likely 	mpc8xxx_spi->irq = irq;
141ca632f55SGrant Likely 
142ca632f55SGrant Likely 	mpc8xxx_spi->rx_shift = 0;
143ca632f55SGrant Likely 	mpc8xxx_spi->tx_shift = 0;
144ca632f55SGrant Likely 
145ca632f55SGrant Likely 	init_completion(&mpc8xxx_spi->done);
146ca632f55SGrant Likely 
147ca632f55SGrant Likely 	master->bus_num = pdata->bus_num;
148ca632f55SGrant Likely 	master->num_chipselect = pdata->max_chipselect;
149ca632f55SGrant Likely 
150ca632f55SGrant Likely 	spin_lock_init(&mpc8xxx_spi->lock);
151ca632f55SGrant Likely 	init_completion(&mpc8xxx_spi->done);
152ca632f55SGrant Likely 	INIT_WORK(&mpc8xxx_spi->work, mpc8xxx_spi_work);
153ca632f55SGrant Likely 	INIT_LIST_HEAD(&mpc8xxx_spi->queue);
154ca632f55SGrant Likely 
155ca632f55SGrant Likely 	mpc8xxx_spi->workqueue = create_singlethread_workqueue(
156ca632f55SGrant Likely 		dev_name(master->dev.parent));
157ca632f55SGrant Likely 	if (mpc8xxx_spi->workqueue == NULL) {
158ca632f55SGrant Likely 		ret = -EBUSY;
159ca632f55SGrant Likely 		goto err;
160ca632f55SGrant Likely 	}
161ca632f55SGrant Likely 
162ca632f55SGrant Likely 	return 0;
163ca632f55SGrant Likely 
164ca632f55SGrant Likely err:
165ca632f55SGrant Likely 	return ret;
166ca632f55SGrant Likely }
167ca632f55SGrant Likely 
168fd4a319bSGrant Likely int mpc8xxx_spi_remove(struct device *dev)
169ca632f55SGrant Likely {
170ca632f55SGrant Likely 	struct mpc8xxx_spi *mpc8xxx_spi;
171ca632f55SGrant Likely 	struct spi_master *master;
172ca632f55SGrant Likely 
173ca632f55SGrant Likely 	master = dev_get_drvdata(dev);
174ca632f55SGrant Likely 	mpc8xxx_spi = spi_master_get_devdata(master);
175ca632f55SGrant Likely 
176ca632f55SGrant Likely 	flush_workqueue(mpc8xxx_spi->workqueue);
177ca632f55SGrant Likely 	destroy_workqueue(mpc8xxx_spi->workqueue);
178ca632f55SGrant Likely 	spi_unregister_master(master);
179ca632f55SGrant Likely 
180ca632f55SGrant Likely 	free_irq(mpc8xxx_spi->irq, mpc8xxx_spi);
181ca632f55SGrant Likely 
182ca632f55SGrant Likely 	if (mpc8xxx_spi->spi_remove)
183ca632f55SGrant Likely 		mpc8xxx_spi->spi_remove(mpc8xxx_spi);
184ca632f55SGrant Likely 
185ca632f55SGrant Likely 	return 0;
186ca632f55SGrant Likely }
187ca632f55SGrant Likely 
188fd4a319bSGrant Likely int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
189ca632f55SGrant Likely {
190ca632f55SGrant Likely 	struct device *dev = &ofdev->dev;
191ca632f55SGrant Likely 	struct device_node *np = ofdev->dev.of_node;
192ca632f55SGrant Likely 	struct mpc8xxx_spi_probe_info *pinfo;
193ca632f55SGrant Likely 	struct fsl_spi_platform_data *pdata;
194ca632f55SGrant Likely 	const void *prop;
195ca632f55SGrant Likely 	int ret = -ENOMEM;
196ca632f55SGrant Likely 
1977282326bSAxel Lin 	pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
198ca632f55SGrant Likely 	if (!pinfo)
199ef4bbdecSZhao Qiang 		return ret;
200ca632f55SGrant Likely 
201ca632f55SGrant Likely 	pdata = &pinfo->pdata;
202ca632f55SGrant Likely 	dev->platform_data = pdata;
203ca632f55SGrant Likely 
204ca632f55SGrant Likely 	/* Allocate bus num dynamically. */
205ca632f55SGrant Likely 	pdata->bus_num = -1;
206ca632f55SGrant Likely 
207e8beacbbSAndreas Larsson #ifdef CONFIG_FSL_SOC
208ca632f55SGrant Likely 	/* SPI controller is either clocked from QE or SoC clock. */
209ca632f55SGrant Likely 	pdata->sysclk = get_brgfreq();
210ca632f55SGrant Likely 	if (pdata->sysclk == -1) {
211ca632f55SGrant Likely 		pdata->sysclk = fsl_get_sys_freq();
2127282326bSAxel Lin 		if (pdata->sysclk == -1)
2137282326bSAxel Lin 			return -ENODEV;
214ca632f55SGrant Likely 	}
215e8beacbbSAndreas Larsson #else
216e8beacbbSAndreas Larsson 	ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk);
217e8beacbbSAndreas Larsson 	if (ret)
2187282326bSAxel Lin 		return ret;
219e8beacbbSAndreas Larsson #endif
220ca632f55SGrant Likely 
221ca632f55SGrant Likely 	prop = of_get_property(np, "mode", NULL);
222ca632f55SGrant Likely 	if (prop && !strcmp(prop, "cpu-qe"))
223ca632f55SGrant Likely 		pdata->flags = SPI_QE_CPU_MODE;
224ca632f55SGrant Likely 	else if (prop && !strcmp(prop, "qe"))
225ca632f55SGrant Likely 		pdata->flags = SPI_CPM_MODE | SPI_QE;
226ca632f55SGrant Likely 	else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
227ca632f55SGrant Likely 		pdata->flags = SPI_CPM_MODE | SPI_CPM2;
228ca632f55SGrant Likely 	else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
229ca632f55SGrant Likely 		pdata->flags = SPI_CPM_MODE | SPI_CPM1;
230ca632f55SGrant Likely 
231ca632f55SGrant Likely 	return 0;
232ca632f55SGrant Likely }
233