12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2ca632f55SGrant Likely /* 3ca632f55SGrant Likely * Freescale SPI/eSPI controller driver library. 4ca632f55SGrant Likely * 5ca632f55SGrant Likely * Maintainer: Kumar Gala 6ca632f55SGrant Likely * 7ca632f55SGrant Likely * Copyright (C) 2006 Polycom, Inc. 8ca632f55SGrant Likely * 9ca632f55SGrant Likely * CPM SPI and QE buffer descriptors mode support: 10ca632f55SGrant Likely * Copyright (c) 2009 MontaVista Software, Inc. 11ca632f55SGrant Likely * Author: Anton Vorontsov <avorontsov@ru.mvista.com> 12ca632f55SGrant Likely * 13ca632f55SGrant Likely * Copyright 2010 Freescale Semiconductor, Inc. 14ca632f55SGrant Likely */ 15ca632f55SGrant Likely #include <linux/dma-mapping.h> 16a3108360SXiubo Li #include <linux/fsl_devices.h> 17a3108360SXiubo Li #include <linux/interrupt.h> 18a3108360SXiubo Li #include <linux/kernel.h> 19ca632f55SGrant Likely #include <linux/mm.h> 2038455d7aSEsben Haabendal #include <linux/module.h> 21ca632f55SGrant Likely #include <linux/of_platform.h> 22d57a4282SGrant Likely #include <linux/spi/spi.h> 23e8beacbbSAndreas Larsson #ifdef CONFIG_FSL_SOC 24ca632f55SGrant Likely #include <sysdev/fsl_soc.h> 25e8beacbbSAndreas Larsson #endif 26ca632f55SGrant Likely 27ca632f55SGrant Likely #include "spi-fsl-lib.h" 28ca632f55SGrant Likely 29ca632f55SGrant Likely #define MPC8XXX_SPI_RX_BUF(type) \ 30ca632f55SGrant Likely void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \ 31ca632f55SGrant Likely { \ 32ca632f55SGrant Likely type *rx = mpc8xxx_spi->rx; \ 33ca632f55SGrant Likely *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \ 34ca632f55SGrant Likely mpc8xxx_spi->rx = rx; \ 3538455d7aSEsben Haabendal } \ 3638455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(mpc8xxx_spi_rx_buf_##type); 37ca632f55SGrant Likely 38ca632f55SGrant Likely #define MPC8XXX_SPI_TX_BUF(type) \ 39ca632f55SGrant Likely u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \ 40ca632f55SGrant Likely { \ 41ca632f55SGrant Likely u32 data; \ 42ca632f55SGrant Likely const type *tx = mpc8xxx_spi->tx; \ 43ca632f55SGrant Likely if (!tx) \ 44ca632f55SGrant Likely return 0; \ 45ca632f55SGrant Likely data = *tx++ << mpc8xxx_spi->tx_shift; \ 46ca632f55SGrant Likely mpc8xxx_spi->tx = tx; \ 47ca632f55SGrant Likely return data; \ 4838455d7aSEsben Haabendal } \ 4938455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(mpc8xxx_spi_tx_buf_##type); 50ca632f55SGrant Likely 51ca632f55SGrant Likely MPC8XXX_SPI_RX_BUF(u8) 52ca632f55SGrant Likely MPC8XXX_SPI_RX_BUF(u16) 53ca632f55SGrant Likely MPC8XXX_SPI_RX_BUF(u32) 54ca632f55SGrant Likely MPC8XXX_SPI_TX_BUF(u8) 55ca632f55SGrant Likely MPC8XXX_SPI_TX_BUF(u16) 56ca632f55SGrant Likely MPC8XXX_SPI_TX_BUF(u32) 57ca632f55SGrant Likely 58ca632f55SGrant Likely struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata) 59ca632f55SGrant Likely { 60ca632f55SGrant Likely return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata); 61ca632f55SGrant Likely } 6238455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(to_of_pinfo); 63ca632f55SGrant Likely 64ca632f55SGrant Likely const char *mpc8xxx_spi_strmode(unsigned int flags) 65ca632f55SGrant Likely { 66ca632f55SGrant Likely if (flags & SPI_QE_CPU_MODE) { 67ca632f55SGrant Likely return "QE CPU"; 68ca632f55SGrant Likely } else if (flags & SPI_CPM_MODE) { 69ca632f55SGrant Likely if (flags & SPI_QE) 70ca632f55SGrant Likely return "QE"; 71ca632f55SGrant Likely else if (flags & SPI_CPM2) 72ca632f55SGrant Likely return "CPM2"; 73ca632f55SGrant Likely else 74ca632f55SGrant Likely return "CPM1"; 75ca632f55SGrant Likely } 76ca632f55SGrant Likely return "CPU"; 77ca632f55SGrant Likely } 7838455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(mpc8xxx_spi_strmode); 79ca632f55SGrant Likely 80c592becbSHeiner Kallweit void mpc8xxx_spi_probe(struct device *dev, struct resource *mem, 81ca632f55SGrant Likely unsigned int irq) 82ca632f55SGrant Likely { 838074cf06SJingoo Han struct fsl_spi_platform_data *pdata = dev_get_platdata(dev); 84ca632f55SGrant Likely struct spi_master *master; 85ca632f55SGrant Likely struct mpc8xxx_spi *mpc8xxx_spi; 86ca632f55SGrant Likely 87ca632f55SGrant Likely master = dev_get_drvdata(dev); 88ca632f55SGrant Likely 89ca632f55SGrant Likely /* the spi->mode bits understood by this driver: */ 90ca632f55SGrant Likely master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH 91ca632f55SGrant Likely | SPI_LSB_FIRST | SPI_LOOP; 92ca632f55SGrant Likely 93ca632f55SGrant Likely master->dev.of_node = dev->of_node; 94ca632f55SGrant Likely 95ca632f55SGrant Likely mpc8xxx_spi = spi_master_get_devdata(master); 96ca632f55SGrant Likely mpc8xxx_spi->dev = dev; 97ca632f55SGrant Likely mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8; 98ca632f55SGrant Likely mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8; 99ca632f55SGrant Likely mpc8xxx_spi->flags = pdata->flags; 100ca632f55SGrant Likely mpc8xxx_spi->spibrg = pdata->sysclk; 101ca632f55SGrant Likely mpc8xxx_spi->irq = irq; 102ca632f55SGrant Likely 103ca632f55SGrant Likely mpc8xxx_spi->rx_shift = 0; 104ca632f55SGrant Likely mpc8xxx_spi->tx_shift = 0; 105ca632f55SGrant Likely 106ca632f55SGrant Likely master->bus_num = pdata->bus_num; 107ca632f55SGrant Likely master->num_chipselect = pdata->max_chipselect; 108ca632f55SGrant Likely 109ca632f55SGrant Likely init_completion(&mpc8xxx_spi->done); 110ca632f55SGrant Likely } 11138455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(mpc8xxx_spi_probe); 112ca632f55SGrant Likely 113fd4a319bSGrant Likely int of_mpc8xxx_spi_probe(struct platform_device *ofdev) 114ca632f55SGrant Likely { 115ca632f55SGrant Likely struct device *dev = &ofdev->dev; 116ca632f55SGrant Likely struct device_node *np = ofdev->dev.of_node; 117ca632f55SGrant Likely struct mpc8xxx_spi_probe_info *pinfo; 118ca632f55SGrant Likely struct fsl_spi_platform_data *pdata; 119ca632f55SGrant Likely const void *prop; 120ca632f55SGrant Likely int ret = -ENOMEM; 121ca632f55SGrant Likely 1227282326bSAxel Lin pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL); 123ca632f55SGrant Likely if (!pinfo) 124ef4bbdecSZhao Qiang return ret; 125ca632f55SGrant Likely 126ca632f55SGrant Likely pdata = &pinfo->pdata; 127ca632f55SGrant Likely dev->platform_data = pdata; 128ca632f55SGrant Likely 129ca632f55SGrant Likely /* Allocate bus num dynamically. */ 130ca632f55SGrant Likely pdata->bus_num = -1; 131ca632f55SGrant Likely 132e8beacbbSAndreas Larsson #ifdef CONFIG_FSL_SOC 133ca632f55SGrant Likely /* SPI controller is either clocked from QE or SoC clock. */ 134ca632f55SGrant Likely pdata->sysclk = get_brgfreq(); 135ca632f55SGrant Likely if (pdata->sysclk == -1) { 136ca632f55SGrant Likely pdata->sysclk = fsl_get_sys_freq(); 1377282326bSAxel Lin if (pdata->sysclk == -1) 1387282326bSAxel Lin return -ENODEV; 139ca632f55SGrant Likely } 140e8beacbbSAndreas Larsson #else 141e8beacbbSAndreas Larsson ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk); 142e8beacbbSAndreas Larsson if (ret) 1437282326bSAxel Lin return ret; 144e8beacbbSAndreas Larsson #endif 145ca632f55SGrant Likely 146ca632f55SGrant Likely prop = of_get_property(np, "mode", NULL); 147ca632f55SGrant Likely if (prop && !strcmp(prop, "cpu-qe")) 148ca632f55SGrant Likely pdata->flags = SPI_QE_CPU_MODE; 149ca632f55SGrant Likely else if (prop && !strcmp(prop, "qe")) 150ca632f55SGrant Likely pdata->flags = SPI_CPM_MODE | SPI_QE; 151ca632f55SGrant Likely else if (of_device_is_compatible(np, "fsl,cpm2-spi")) 152ca632f55SGrant Likely pdata->flags = SPI_CPM_MODE | SPI_CPM2; 153ca632f55SGrant Likely else if (of_device_is_compatible(np, "fsl,cpm1-spi")) 154ca632f55SGrant Likely pdata->flags = SPI_CPM_MODE | SPI_CPM1; 155ca632f55SGrant Likely 156ca632f55SGrant Likely return 0; 157ca632f55SGrant Likely } 15838455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(of_mpc8xxx_spi_probe); 15938455d7aSEsben Haabendal 16038455d7aSEsben Haabendal MODULE_LICENSE("GPL"); 161