12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2ca632f55SGrant Likely /*
3ca632f55SGrant Likely * Freescale SPI/eSPI controller driver library.
4ca632f55SGrant Likely *
5ca632f55SGrant Likely * Maintainer: Kumar Gala
6ca632f55SGrant Likely *
7ca632f55SGrant Likely * Copyright (C) 2006 Polycom, Inc.
8ca632f55SGrant Likely *
9ca632f55SGrant Likely * CPM SPI and QE buffer descriptors mode support:
10ca632f55SGrant Likely * Copyright (c) 2009 MontaVista Software, Inc.
11ca632f55SGrant Likely * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
12ca632f55SGrant Likely *
13ca632f55SGrant Likely * Copyright 2010 Freescale Semiconductor, Inc.
14ca632f55SGrant Likely */
15ca632f55SGrant Likely #include <linux/dma-mapping.h>
16a3108360SXiubo Li #include <linux/fsl_devices.h>
17a3108360SXiubo Li #include <linux/interrupt.h>
18a3108360SXiubo Li #include <linux/kernel.h>
19ca632f55SGrant Likely #include <linux/mm.h>
2038455d7aSEsben Haabendal #include <linux/module.h>
21*749396cbSRob Herring #include <linux/of.h>
22*749396cbSRob Herring #include <linux/platform_device.h>
23d57a4282SGrant Likely #include <linux/spi/spi.h>
24e8beacbbSAndreas Larsson #ifdef CONFIG_FSL_SOC
25ca632f55SGrant Likely #include <sysdev/fsl_soc.h>
26e8beacbbSAndreas Larsson #endif
27ca632f55SGrant Likely
28ca632f55SGrant Likely #include "spi-fsl-lib.h"
29ca632f55SGrant Likely
30ca632f55SGrant Likely #define MPC8XXX_SPI_RX_BUF(type) \
31ca632f55SGrant Likely void mpc8xxx_spi_rx_buf_##type(u32 data, struct mpc8xxx_spi *mpc8xxx_spi) \
32ca632f55SGrant Likely { \
33ca632f55SGrant Likely type *rx = mpc8xxx_spi->rx; \
34ca632f55SGrant Likely *rx++ = (type)(data >> mpc8xxx_spi->rx_shift); \
35ca632f55SGrant Likely mpc8xxx_spi->rx = rx; \
3638455d7aSEsben Haabendal } \
3738455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(mpc8xxx_spi_rx_buf_##type);
38ca632f55SGrant Likely
39ca632f55SGrant Likely #define MPC8XXX_SPI_TX_BUF(type) \
40ca632f55SGrant Likely u32 mpc8xxx_spi_tx_buf_##type(struct mpc8xxx_spi *mpc8xxx_spi) \
41ca632f55SGrant Likely { \
42ca632f55SGrant Likely u32 data; \
43ca632f55SGrant Likely const type *tx = mpc8xxx_spi->tx; \
44ca632f55SGrant Likely if (!tx) \
45ca632f55SGrant Likely return 0; \
46ca632f55SGrant Likely data = *tx++ << mpc8xxx_spi->tx_shift; \
47ca632f55SGrant Likely mpc8xxx_spi->tx = tx; \
48ca632f55SGrant Likely return data; \
4938455d7aSEsben Haabendal } \
5038455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(mpc8xxx_spi_tx_buf_##type);
51ca632f55SGrant Likely
52ca632f55SGrant Likely MPC8XXX_SPI_RX_BUF(u8)
MPC8XXX_SPI_RX_BUF(u16)53ca632f55SGrant Likely MPC8XXX_SPI_RX_BUF(u16)
54ca632f55SGrant Likely MPC8XXX_SPI_RX_BUF(u32)
55ca632f55SGrant Likely MPC8XXX_SPI_TX_BUF(u8)
56ca632f55SGrant Likely MPC8XXX_SPI_TX_BUF(u16)
57ca632f55SGrant Likely MPC8XXX_SPI_TX_BUF(u32)
58ca632f55SGrant Likely
59ca632f55SGrant Likely struct mpc8xxx_spi_probe_info *to_of_pinfo(struct fsl_spi_platform_data *pdata)
60ca632f55SGrant Likely {
61ca632f55SGrant Likely return container_of(pdata, struct mpc8xxx_spi_probe_info, pdata);
62ca632f55SGrant Likely }
6338455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(to_of_pinfo);
64ca632f55SGrant Likely
mpc8xxx_spi_strmode(unsigned int flags)65ca632f55SGrant Likely const char *mpc8xxx_spi_strmode(unsigned int flags)
66ca632f55SGrant Likely {
67ca632f55SGrant Likely if (flags & SPI_QE_CPU_MODE) {
68ca632f55SGrant Likely return "QE CPU";
69ca632f55SGrant Likely } else if (flags & SPI_CPM_MODE) {
70ca632f55SGrant Likely if (flags & SPI_QE)
71ca632f55SGrant Likely return "QE";
72ca632f55SGrant Likely else if (flags & SPI_CPM2)
73ca632f55SGrant Likely return "CPM2";
74ca632f55SGrant Likely else
75ca632f55SGrant Likely return "CPM1";
76ca632f55SGrant Likely }
77ca632f55SGrant Likely return "CPU";
78ca632f55SGrant Likely }
7938455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(mpc8xxx_spi_strmode);
80ca632f55SGrant Likely
mpc8xxx_spi_probe(struct device * dev,struct resource * mem,unsigned int irq)81c592becbSHeiner Kallweit void mpc8xxx_spi_probe(struct device *dev, struct resource *mem,
82ca632f55SGrant Likely unsigned int irq)
83ca632f55SGrant Likely {
848074cf06SJingoo Han struct fsl_spi_platform_data *pdata = dev_get_platdata(dev);
85ca632f55SGrant Likely struct spi_master *master;
86ca632f55SGrant Likely struct mpc8xxx_spi *mpc8xxx_spi;
87ca632f55SGrant Likely
88ca632f55SGrant Likely master = dev_get_drvdata(dev);
89ca632f55SGrant Likely
90ca632f55SGrant Likely /* the spi->mode bits understood by this driver: */
91ca632f55SGrant Likely master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH
92ca632f55SGrant Likely | SPI_LSB_FIRST | SPI_LOOP;
93ca632f55SGrant Likely
94ca632f55SGrant Likely master->dev.of_node = dev->of_node;
95ca632f55SGrant Likely
96ca632f55SGrant Likely mpc8xxx_spi = spi_master_get_devdata(master);
97ca632f55SGrant Likely mpc8xxx_spi->dev = dev;
98ca632f55SGrant Likely mpc8xxx_spi->get_rx = mpc8xxx_spi_rx_buf_u8;
99ca632f55SGrant Likely mpc8xxx_spi->get_tx = mpc8xxx_spi_tx_buf_u8;
100ca632f55SGrant Likely mpc8xxx_spi->flags = pdata->flags;
101ca632f55SGrant Likely mpc8xxx_spi->spibrg = pdata->sysclk;
102ca632f55SGrant Likely mpc8xxx_spi->irq = irq;
103ca632f55SGrant Likely
104ca632f55SGrant Likely mpc8xxx_spi->rx_shift = 0;
105ca632f55SGrant Likely mpc8xxx_spi->tx_shift = 0;
106ca632f55SGrant Likely
107ca632f55SGrant Likely master->bus_num = pdata->bus_num;
108ca632f55SGrant Likely master->num_chipselect = pdata->max_chipselect;
109ca632f55SGrant Likely
110ca632f55SGrant Likely init_completion(&mpc8xxx_spi->done);
111ca632f55SGrant Likely }
11238455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(mpc8xxx_spi_probe);
113ca632f55SGrant Likely
of_mpc8xxx_spi_probe(struct platform_device * ofdev)114fd4a319bSGrant Likely int of_mpc8xxx_spi_probe(struct platform_device *ofdev)
115ca632f55SGrant Likely {
116ca632f55SGrant Likely struct device *dev = &ofdev->dev;
117ca632f55SGrant Likely struct device_node *np = ofdev->dev.of_node;
118ca632f55SGrant Likely struct mpc8xxx_spi_probe_info *pinfo;
119ca632f55SGrant Likely struct fsl_spi_platform_data *pdata;
120ca632f55SGrant Likely const void *prop;
121ca632f55SGrant Likely int ret = -ENOMEM;
122ca632f55SGrant Likely
1237282326bSAxel Lin pinfo = devm_kzalloc(&ofdev->dev, sizeof(*pinfo), GFP_KERNEL);
124ca632f55SGrant Likely if (!pinfo)
125ef4bbdecSZhao Qiang return ret;
126ca632f55SGrant Likely
127ca632f55SGrant Likely pdata = &pinfo->pdata;
128ca632f55SGrant Likely dev->platform_data = pdata;
129ca632f55SGrant Likely
130ca632f55SGrant Likely /* Allocate bus num dynamically. */
131ca632f55SGrant Likely pdata->bus_num = -1;
132ca632f55SGrant Likely
133e8beacbbSAndreas Larsson #ifdef CONFIG_FSL_SOC
134ca632f55SGrant Likely /* SPI controller is either clocked from QE or SoC clock. */
135ca632f55SGrant Likely pdata->sysclk = get_brgfreq();
136ca632f55SGrant Likely if (pdata->sysclk == -1) {
137ca632f55SGrant Likely pdata->sysclk = fsl_get_sys_freq();
1387282326bSAxel Lin if (pdata->sysclk == -1)
1397282326bSAxel Lin return -ENODEV;
140ca632f55SGrant Likely }
141e8beacbbSAndreas Larsson #else
142e8beacbbSAndreas Larsson ret = of_property_read_u32(np, "clock-frequency", &pdata->sysclk);
143e8beacbbSAndreas Larsson if (ret)
1447282326bSAxel Lin return ret;
145e8beacbbSAndreas Larsson #endif
146ca632f55SGrant Likely
147ca632f55SGrant Likely prop = of_get_property(np, "mode", NULL);
148ca632f55SGrant Likely if (prop && !strcmp(prop, "cpu-qe"))
149ca632f55SGrant Likely pdata->flags = SPI_QE_CPU_MODE;
150ca632f55SGrant Likely else if (prop && !strcmp(prop, "qe"))
151ca632f55SGrant Likely pdata->flags = SPI_CPM_MODE | SPI_QE;
152ca632f55SGrant Likely else if (of_device_is_compatible(np, "fsl,cpm2-spi"))
153ca632f55SGrant Likely pdata->flags = SPI_CPM_MODE | SPI_CPM2;
154ca632f55SGrant Likely else if (of_device_is_compatible(np, "fsl,cpm1-spi"))
155ca632f55SGrant Likely pdata->flags = SPI_CPM_MODE | SPI_CPM1;
156ca632f55SGrant Likely
157ca632f55SGrant Likely return 0;
158ca632f55SGrant Likely }
15938455d7aSEsben Haabendal EXPORT_SYMBOL_GPL(of_mpc8xxx_spi_probe);
16038455d7aSEsben Haabendal
16138455d7aSEsben Haabendal MODULE_LICENSE("GPL");
162