1 /* 2 * This file is subject to the terms and conditions of the GNU General Public 3 * License. See the file "COPYING" in the main directory of this archive 4 * for more details. 5 * 6 * Copyright (C) 2011, 2012 Cavium, Inc. 7 */ 8 9 #include <linux/platform_device.h> 10 #include <linux/spi/spi.h> 11 #include <linux/module.h> 12 #include <linux/io.h> 13 #include <linux/of.h> 14 15 #include <asm/octeon/octeon.h> 16 17 #include "spi-cavium.h" 18 19 static int octeon_spi_probe(struct platform_device *pdev) 20 { 21 struct resource *res_mem; 22 void __iomem *reg_base; 23 struct spi_master *master; 24 struct octeon_spi *p; 25 int err = -ENOENT; 26 27 master = spi_alloc_master(&pdev->dev, sizeof(struct octeon_spi)); 28 if (!master) 29 return -ENOMEM; 30 p = spi_master_get_devdata(master); 31 platform_set_drvdata(pdev, master); 32 33 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 34 reg_base = devm_ioremap_resource(&pdev->dev, res_mem); 35 if (IS_ERR(reg_base)) { 36 err = PTR_ERR(reg_base); 37 goto fail; 38 } 39 40 p->register_base = reg_base; 41 p->sys_freq = octeon_get_io_clock_rate(); 42 43 p->regs.config = 0; 44 p->regs.status = 0x08; 45 p->regs.tx = 0x10; 46 p->regs.data = 0x80; 47 48 master->num_chipselect = 4; 49 master->mode_bits = SPI_CPHA | 50 SPI_CPOL | 51 SPI_CS_HIGH | 52 SPI_LSB_FIRST | 53 SPI_3WIRE; 54 55 master->transfer_one_message = octeon_spi_transfer_one_message; 56 master->bits_per_word_mask = SPI_BPW_MASK(8); 57 master->max_speed_hz = OCTEON_SPI_MAX_CLOCK_HZ; 58 59 master->dev.of_node = pdev->dev.of_node; 60 err = devm_spi_register_master(&pdev->dev, master); 61 if (err) { 62 dev_err(&pdev->dev, "register master failed: %d\n", err); 63 goto fail; 64 } 65 66 dev_info(&pdev->dev, "OCTEON SPI bus driver\n"); 67 68 return 0; 69 fail: 70 spi_master_put(master); 71 return err; 72 } 73 74 static int octeon_spi_remove(struct platform_device *pdev) 75 { 76 struct spi_master *master = platform_get_drvdata(pdev); 77 struct octeon_spi *p = spi_master_get_devdata(master); 78 79 /* Clear the CSENA* and put everything in a known state. */ 80 writeq(0, p->register_base + OCTEON_SPI_CFG(p)); 81 82 return 0; 83 } 84 85 static const struct of_device_id octeon_spi_match[] = { 86 { .compatible = "cavium,octeon-3010-spi", }, 87 {}, 88 }; 89 MODULE_DEVICE_TABLE(of, octeon_spi_match); 90 91 static struct platform_driver octeon_spi_driver = { 92 .driver = { 93 .name = "spi-octeon", 94 .of_match_table = octeon_spi_match, 95 }, 96 .probe = octeon_spi_probe, 97 .remove = octeon_spi_remove, 98 }; 99 100 module_platform_driver(octeon_spi_driver); 101 102 MODULE_DESCRIPTION("Cavium, Inc. OCTEON SPI bus driver"); 103 MODULE_AUTHOR("David Daney"); 104 MODULE_LICENSE("GPL"); 105