1 /* 2 * polling/bitbanging SPI master controller driver utilities 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 17 */ 18 19 #include <linux/init.h> 20 #include <linux/spinlock.h> 21 #include <linux/workqueue.h> 22 #include <linux/interrupt.h> 23 #include <linux/module.h> 24 #include <linux/delay.h> 25 #include <linux/errno.h> 26 #include <linux/platform_device.h> 27 #include <linux/slab.h> 28 29 #include <linux/spi/spi.h> 30 #include <linux/spi/spi_bitbang.h> 31 32 33 /*----------------------------------------------------------------------*/ 34 35 /* 36 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support. 37 * Use this for GPIO or shift-register level hardware APIs. 38 * 39 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable 40 * to glue code. These bitbang setup() and cleanup() routines are always 41 * used, though maybe they're called from controller-aware code. 42 * 43 * chipselect() and friends may use use spi_device->controller_data and 44 * controller registers as appropriate. 45 * 46 * 47 * NOTE: SPI controller pins can often be used as GPIO pins instead, 48 * which means you could use a bitbang driver either to get hardware 49 * working quickly, or testing for differences that aren't speed related. 50 */ 51 52 struct spi_bitbang_cs { 53 unsigned nsecs; /* (clock cycle time)/2 */ 54 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs, 55 u32 word, u8 bits); 56 unsigned (*txrx_bufs)(struct spi_device *, 57 u32 (*txrx_word)( 58 struct spi_device *spi, 59 unsigned nsecs, 60 u32 word, u8 bits), 61 unsigned, struct spi_transfer *); 62 }; 63 64 static unsigned bitbang_txrx_8( 65 struct spi_device *spi, 66 u32 (*txrx_word)(struct spi_device *spi, 67 unsigned nsecs, 68 u32 word, u8 bits), 69 unsigned ns, 70 struct spi_transfer *t 71 ) { 72 unsigned bits = t->bits_per_word ? : spi->bits_per_word; 73 unsigned count = t->len; 74 const u8 *tx = t->tx_buf; 75 u8 *rx = t->rx_buf; 76 77 while (likely(count > 0)) { 78 u8 word = 0; 79 80 if (tx) 81 word = *tx++; 82 word = txrx_word(spi, ns, word, bits); 83 if (rx) 84 *rx++ = word; 85 count -= 1; 86 } 87 return t->len - count; 88 } 89 90 static unsigned bitbang_txrx_16( 91 struct spi_device *spi, 92 u32 (*txrx_word)(struct spi_device *spi, 93 unsigned nsecs, 94 u32 word, u8 bits), 95 unsigned ns, 96 struct spi_transfer *t 97 ) { 98 unsigned bits = t->bits_per_word ? : spi->bits_per_word; 99 unsigned count = t->len; 100 const u16 *tx = t->tx_buf; 101 u16 *rx = t->rx_buf; 102 103 while (likely(count > 1)) { 104 u16 word = 0; 105 106 if (tx) 107 word = *tx++; 108 word = txrx_word(spi, ns, word, bits); 109 if (rx) 110 *rx++ = word; 111 count -= 2; 112 } 113 return t->len - count; 114 } 115 116 static unsigned bitbang_txrx_32( 117 struct spi_device *spi, 118 u32 (*txrx_word)(struct spi_device *spi, 119 unsigned nsecs, 120 u32 word, u8 bits), 121 unsigned ns, 122 struct spi_transfer *t 123 ) { 124 unsigned bits = t->bits_per_word ? : spi->bits_per_word; 125 unsigned count = t->len; 126 const u32 *tx = t->tx_buf; 127 u32 *rx = t->rx_buf; 128 129 while (likely(count > 3)) { 130 u32 word = 0; 131 132 if (tx) 133 word = *tx++; 134 word = txrx_word(spi, ns, word, bits); 135 if (rx) 136 *rx++ = word; 137 count -= 4; 138 } 139 return t->len - count; 140 } 141 142 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t) 143 { 144 struct spi_bitbang_cs *cs = spi->controller_state; 145 u8 bits_per_word; 146 u32 hz; 147 148 if (t) { 149 bits_per_word = t->bits_per_word; 150 hz = t->speed_hz; 151 } else { 152 bits_per_word = 0; 153 hz = 0; 154 } 155 156 /* spi_transfer level calls that work per-word */ 157 if (!bits_per_word) 158 bits_per_word = spi->bits_per_word; 159 if (bits_per_word <= 8) 160 cs->txrx_bufs = bitbang_txrx_8; 161 else if (bits_per_word <= 16) 162 cs->txrx_bufs = bitbang_txrx_16; 163 else if (bits_per_word <= 32) 164 cs->txrx_bufs = bitbang_txrx_32; 165 else 166 return -EINVAL; 167 168 /* nsecs = (clock period)/2 */ 169 if (!hz) 170 hz = spi->max_speed_hz; 171 if (hz) { 172 cs->nsecs = (1000000000/2) / hz; 173 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000)) 174 return -EINVAL; 175 } 176 177 return 0; 178 } 179 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer); 180 181 /** 182 * spi_bitbang_setup - default setup for per-word I/O loops 183 */ 184 int spi_bitbang_setup(struct spi_device *spi) 185 { 186 struct spi_bitbang_cs *cs = spi->controller_state; 187 struct spi_bitbang *bitbang; 188 int retval; 189 unsigned long flags; 190 191 bitbang = spi_master_get_devdata(spi->master); 192 193 if (!cs) { 194 cs = kzalloc(sizeof *cs, GFP_KERNEL); 195 if (!cs) 196 return -ENOMEM; 197 spi->controller_state = cs; 198 } 199 200 /* per-word shift register access, in hardware or bitbanging */ 201 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)]; 202 if (!cs->txrx_word) 203 return -EINVAL; 204 205 retval = bitbang->setup_transfer(spi, NULL); 206 if (retval < 0) 207 return retval; 208 209 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs); 210 211 /* NOTE we _need_ to call chipselect() early, ideally with adapter 212 * setup, unless the hardware defaults cooperate to avoid confusion 213 * between normal (active low) and inverted chipselects. 214 */ 215 216 /* deselect chip (low or high) */ 217 spin_lock_irqsave(&bitbang->lock, flags); 218 if (!bitbang->busy) { 219 bitbang->chipselect(spi, BITBANG_CS_INACTIVE); 220 ndelay(cs->nsecs); 221 } 222 spin_unlock_irqrestore(&bitbang->lock, flags); 223 224 return 0; 225 } 226 EXPORT_SYMBOL_GPL(spi_bitbang_setup); 227 228 /** 229 * spi_bitbang_cleanup - default cleanup for per-word I/O loops 230 */ 231 void spi_bitbang_cleanup(struct spi_device *spi) 232 { 233 kfree(spi->controller_state); 234 } 235 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup); 236 237 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) 238 { 239 struct spi_bitbang_cs *cs = spi->controller_state; 240 unsigned nsecs = cs->nsecs; 241 242 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t); 243 } 244 245 /*----------------------------------------------------------------------*/ 246 247 /* 248 * SECOND PART ... simple transfer queue runner. 249 * 250 * This costs a task context per controller, running the queue by 251 * performing each transfer in sequence. Smarter hardware can queue 252 * several DMA transfers at once, and process several controller queues 253 * in parallel; this driver doesn't match such hardware very well. 254 * 255 * Drivers can provide word-at-a-time i/o primitives, or provide 256 * transfer-at-a-time ones to leverage dma or fifo hardware. 257 */ 258 static void bitbang_work(struct work_struct *work) 259 { 260 struct spi_bitbang *bitbang = 261 container_of(work, struct spi_bitbang, work); 262 unsigned long flags; 263 struct spi_message *m, *_m; 264 265 spin_lock_irqsave(&bitbang->lock, flags); 266 bitbang->busy = 1; 267 list_for_each_entry_safe(m, _m, &bitbang->queue, queue) { 268 struct spi_device *spi; 269 unsigned nsecs; 270 struct spi_transfer *t = NULL; 271 unsigned tmp; 272 unsigned cs_change; 273 int status; 274 int do_setup = -1; 275 276 list_del(&m->queue); 277 spin_unlock_irqrestore(&bitbang->lock, flags); 278 279 /* FIXME this is made-up ... the correct value is known to 280 * word-at-a-time bitbang code, and presumably chipselect() 281 * should enforce these requirements too? 282 */ 283 nsecs = 100; 284 285 spi = m->spi; 286 tmp = 0; 287 cs_change = 1; 288 status = 0; 289 290 list_for_each_entry (t, &m->transfers, transfer_list) { 291 292 /* override speed or wordsize? */ 293 if (t->speed_hz || t->bits_per_word) 294 do_setup = 1; 295 296 /* init (-1) or override (1) transfer params */ 297 if (do_setup != 0) { 298 status = bitbang->setup_transfer(spi, t); 299 if (status < 0) 300 break; 301 if (do_setup == -1) 302 do_setup = 0; 303 } 304 305 /* set up default clock polarity, and activate chip; 306 * this implicitly updates clock and spi modes as 307 * previously recorded for this device via setup(). 308 * (and also deselects any other chip that might be 309 * selected ...) 310 */ 311 if (cs_change) { 312 bitbang->chipselect(spi, BITBANG_CS_ACTIVE); 313 ndelay(nsecs); 314 } 315 cs_change = t->cs_change; 316 if (!t->tx_buf && !t->rx_buf && t->len) { 317 status = -EINVAL; 318 break; 319 } 320 321 /* transfer data. the lower level code handles any 322 * new dma mappings it needs. our caller always gave 323 * us dma-safe buffers. 324 */ 325 if (t->len) { 326 /* REVISIT dma API still needs a designated 327 * DMA_ADDR_INVALID; ~0 might be better. 328 */ 329 if (!m->is_dma_mapped) 330 t->rx_dma = t->tx_dma = 0; 331 status = bitbang->txrx_bufs(spi, t); 332 } 333 if (status > 0) 334 m->actual_length += status; 335 if (status != t->len) { 336 /* always report some kind of error */ 337 if (status >= 0) 338 status = -EREMOTEIO; 339 break; 340 } 341 status = 0; 342 343 /* protocol tweaks before next transfer */ 344 if (t->delay_usecs) 345 udelay(t->delay_usecs); 346 347 if (cs_change && !list_is_last(&t->transfer_list, &m->transfers)) { 348 /* sometimes a short mid-message deselect of the chip 349 * may be needed to terminate a mode or command 350 */ 351 ndelay(nsecs); 352 bitbang->chipselect(spi, BITBANG_CS_INACTIVE); 353 ndelay(nsecs); 354 } 355 } 356 357 m->status = status; 358 m->complete(m->context); 359 360 /* normally deactivate chipselect ... unless no error and 361 * cs_change has hinted that the next message will probably 362 * be for this chip too. 363 */ 364 if (!(status == 0 && cs_change)) { 365 ndelay(nsecs); 366 bitbang->chipselect(spi, BITBANG_CS_INACTIVE); 367 ndelay(nsecs); 368 } 369 370 spin_lock_irqsave(&bitbang->lock, flags); 371 } 372 bitbang->busy = 0; 373 spin_unlock_irqrestore(&bitbang->lock, flags); 374 } 375 376 /** 377 * spi_bitbang_transfer - default submit to transfer queue 378 */ 379 int spi_bitbang_transfer(struct spi_device *spi, struct spi_message *m) 380 { 381 struct spi_bitbang *bitbang; 382 unsigned long flags; 383 int status = 0; 384 385 m->actual_length = 0; 386 m->status = -EINPROGRESS; 387 388 bitbang = spi_master_get_devdata(spi->master); 389 390 spin_lock_irqsave(&bitbang->lock, flags); 391 if (!spi->max_speed_hz) 392 status = -ENETDOWN; 393 else { 394 list_add_tail(&m->queue, &bitbang->queue); 395 queue_work(bitbang->workqueue, &bitbang->work); 396 } 397 spin_unlock_irqrestore(&bitbang->lock, flags); 398 399 return status; 400 } 401 EXPORT_SYMBOL_GPL(spi_bitbang_transfer); 402 403 /*----------------------------------------------------------------------*/ 404 405 /** 406 * spi_bitbang_start - start up a polled/bitbanging SPI master driver 407 * @bitbang: driver handle 408 * 409 * Caller should have zero-initialized all parts of the structure, and then 410 * provided callbacks for chip selection and I/O loops. If the master has 411 * a transfer method, its final step should call spi_bitbang_transfer; or, 412 * that's the default if the transfer routine is not initialized. It should 413 * also set up the bus number and number of chipselects. 414 * 415 * For i/o loops, provide callbacks either per-word (for bitbanging, or for 416 * hardware that basically exposes a shift register) or per-spi_transfer 417 * (which takes better advantage of hardware like fifos or DMA engines). 418 * 419 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup, 420 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi 421 * master methods. Those methods are the defaults if the bitbang->txrx_bufs 422 * routine isn't initialized. 423 * 424 * This routine registers the spi_master, which will process requests in a 425 * dedicated task, keeping IRQs unblocked most of the time. To stop 426 * processing those requests, call spi_bitbang_stop(). 427 */ 428 int spi_bitbang_start(struct spi_bitbang *bitbang) 429 { 430 int status; 431 432 if (!bitbang->master || !bitbang->chipselect) 433 return -EINVAL; 434 435 INIT_WORK(&bitbang->work, bitbang_work); 436 spin_lock_init(&bitbang->lock); 437 INIT_LIST_HEAD(&bitbang->queue); 438 439 if (!bitbang->master->mode_bits) 440 bitbang->master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags; 441 442 if (!bitbang->master->transfer) 443 bitbang->master->transfer = spi_bitbang_transfer; 444 if (!bitbang->txrx_bufs) { 445 bitbang->use_dma = 0; 446 bitbang->txrx_bufs = spi_bitbang_bufs; 447 if (!bitbang->master->setup) { 448 if (!bitbang->setup_transfer) 449 bitbang->setup_transfer = 450 spi_bitbang_setup_transfer; 451 bitbang->master->setup = spi_bitbang_setup; 452 bitbang->master->cleanup = spi_bitbang_cleanup; 453 } 454 } else if (!bitbang->master->setup) 455 return -EINVAL; 456 if (bitbang->master->transfer == spi_bitbang_transfer && 457 !bitbang->setup_transfer) 458 return -EINVAL; 459 460 /* this task is the only thing to touch the SPI bits */ 461 bitbang->busy = 0; 462 bitbang->workqueue = create_singlethread_workqueue( 463 dev_name(bitbang->master->dev.parent)); 464 if (bitbang->workqueue == NULL) { 465 status = -EBUSY; 466 goto err1; 467 } 468 469 /* driver may get busy before register() returns, especially 470 * if someone registered boardinfo for devices 471 */ 472 status = spi_register_master(bitbang->master); 473 if (status < 0) 474 goto err2; 475 476 return status; 477 478 err2: 479 destroy_workqueue(bitbang->workqueue); 480 err1: 481 return status; 482 } 483 EXPORT_SYMBOL_GPL(spi_bitbang_start); 484 485 /** 486 * spi_bitbang_stop - stops the task providing spi communication 487 */ 488 int spi_bitbang_stop(struct spi_bitbang *bitbang) 489 { 490 spi_unregister_master(bitbang->master); 491 492 WARN_ON(!list_empty(&bitbang->queue)); 493 494 destroy_workqueue(bitbang->workqueue); 495 496 return 0; 497 } 498 EXPORT_SYMBOL_GPL(spi_bitbang_stop); 499 500 MODULE_LICENSE("GPL"); 501 502