1 /* 2 * polling/bitbanging SPI master controller driver utilities 3 * 4 * This program is free software; you can redistribute it and/or modify 5 * it under the terms of the GNU General Public License as published by 6 * the Free Software Foundation; either version 2 of the License, or 7 * (at your option) any later version. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * GNU General Public License for more details. 13 */ 14 15 #include <linux/spinlock.h> 16 #include <linux/workqueue.h> 17 #include <linux/interrupt.h> 18 #include <linux/module.h> 19 #include <linux/delay.h> 20 #include <linux/errno.h> 21 #include <linux/platform_device.h> 22 #include <linux/slab.h> 23 24 #include <linux/spi/spi.h> 25 #include <linux/spi/spi_bitbang.h> 26 27 #define SPI_BITBANG_CS_DELAY 100 28 29 30 /*----------------------------------------------------------------------*/ 31 32 /* 33 * FIRST PART (OPTIONAL): word-at-a-time spi_transfer support. 34 * Use this for GPIO or shift-register level hardware APIs. 35 * 36 * spi_bitbang_cs is in spi_device->controller_state, which is unavailable 37 * to glue code. These bitbang setup() and cleanup() routines are always 38 * used, though maybe they're called from controller-aware code. 39 * 40 * chipselect() and friends may use spi_device->controller_data and 41 * controller registers as appropriate. 42 * 43 * 44 * NOTE: SPI controller pins can often be used as GPIO pins instead, 45 * which means you could use a bitbang driver either to get hardware 46 * working quickly, or testing for differences that aren't speed related. 47 */ 48 49 struct spi_bitbang_cs { 50 unsigned nsecs; /* (clock cycle time)/2 */ 51 u32 (*txrx_word)(struct spi_device *spi, unsigned nsecs, 52 u32 word, u8 bits, unsigned flags); 53 unsigned (*txrx_bufs)(struct spi_device *, 54 u32 (*txrx_word)( 55 struct spi_device *spi, 56 unsigned nsecs, 57 u32 word, u8 bits, 58 unsigned flags), 59 unsigned, struct spi_transfer *, 60 unsigned); 61 }; 62 63 static unsigned bitbang_txrx_8( 64 struct spi_device *spi, 65 u32 (*txrx_word)(struct spi_device *spi, 66 unsigned nsecs, 67 u32 word, u8 bits, 68 unsigned flags), 69 unsigned ns, 70 struct spi_transfer *t, 71 unsigned flags 72 ) { 73 unsigned bits = t->bits_per_word; 74 unsigned count = t->len; 75 const u8 *tx = t->tx_buf; 76 u8 *rx = t->rx_buf; 77 78 while (likely(count > 0)) { 79 u8 word = 0; 80 81 if (tx) 82 word = *tx++; 83 word = txrx_word(spi, ns, word, bits, flags); 84 if (rx) 85 *rx++ = word; 86 count -= 1; 87 } 88 return t->len - count; 89 } 90 91 static unsigned bitbang_txrx_16( 92 struct spi_device *spi, 93 u32 (*txrx_word)(struct spi_device *spi, 94 unsigned nsecs, 95 u32 word, u8 bits, 96 unsigned flags), 97 unsigned ns, 98 struct spi_transfer *t, 99 unsigned flags 100 ) { 101 unsigned bits = t->bits_per_word; 102 unsigned count = t->len; 103 const u16 *tx = t->tx_buf; 104 u16 *rx = t->rx_buf; 105 106 while (likely(count > 1)) { 107 u16 word = 0; 108 109 if (tx) 110 word = *tx++; 111 word = txrx_word(spi, ns, word, bits, flags); 112 if (rx) 113 *rx++ = word; 114 count -= 2; 115 } 116 return t->len - count; 117 } 118 119 static unsigned bitbang_txrx_32( 120 struct spi_device *spi, 121 u32 (*txrx_word)(struct spi_device *spi, 122 unsigned nsecs, 123 u32 word, u8 bits, 124 unsigned flags), 125 unsigned ns, 126 struct spi_transfer *t, 127 unsigned flags 128 ) { 129 unsigned bits = t->bits_per_word; 130 unsigned count = t->len; 131 const u32 *tx = t->tx_buf; 132 u32 *rx = t->rx_buf; 133 134 while (likely(count > 3)) { 135 u32 word = 0; 136 137 if (tx) 138 word = *tx++; 139 word = txrx_word(spi, ns, word, bits, flags); 140 if (rx) 141 *rx++ = word; 142 count -= 4; 143 } 144 return t->len - count; 145 } 146 147 int spi_bitbang_setup_transfer(struct spi_device *spi, struct spi_transfer *t) 148 { 149 struct spi_bitbang_cs *cs = spi->controller_state; 150 u8 bits_per_word; 151 u32 hz; 152 153 if (t) { 154 bits_per_word = t->bits_per_word; 155 hz = t->speed_hz; 156 } else { 157 bits_per_word = 0; 158 hz = 0; 159 } 160 161 /* spi_transfer level calls that work per-word */ 162 if (!bits_per_word) 163 bits_per_word = spi->bits_per_word; 164 if (bits_per_word <= 8) 165 cs->txrx_bufs = bitbang_txrx_8; 166 else if (bits_per_word <= 16) 167 cs->txrx_bufs = bitbang_txrx_16; 168 else if (bits_per_word <= 32) 169 cs->txrx_bufs = bitbang_txrx_32; 170 else 171 return -EINVAL; 172 173 /* nsecs = (clock period)/2 */ 174 if (!hz) 175 hz = spi->max_speed_hz; 176 if (hz) { 177 cs->nsecs = (1000000000/2) / hz; 178 if (cs->nsecs > (MAX_UDELAY_MS * 1000 * 1000)) 179 return -EINVAL; 180 } 181 182 return 0; 183 } 184 EXPORT_SYMBOL_GPL(spi_bitbang_setup_transfer); 185 186 /** 187 * spi_bitbang_setup - default setup for per-word I/O loops 188 */ 189 int spi_bitbang_setup(struct spi_device *spi) 190 { 191 struct spi_bitbang_cs *cs = spi->controller_state; 192 struct spi_bitbang *bitbang; 193 194 bitbang = spi_master_get_devdata(spi->master); 195 196 if (!cs) { 197 cs = kzalloc(sizeof(*cs), GFP_KERNEL); 198 if (!cs) 199 return -ENOMEM; 200 spi->controller_state = cs; 201 } 202 203 /* per-word shift register access, in hardware or bitbanging */ 204 cs->txrx_word = bitbang->txrx_word[spi->mode & (SPI_CPOL|SPI_CPHA)]; 205 if (!cs->txrx_word) 206 return -EINVAL; 207 208 if (bitbang->setup_transfer) { 209 int retval = bitbang->setup_transfer(spi, NULL); 210 if (retval < 0) 211 return retval; 212 } 213 214 dev_dbg(&spi->dev, "%s, %u nsec/bit\n", __func__, 2 * cs->nsecs); 215 216 return 0; 217 } 218 EXPORT_SYMBOL_GPL(spi_bitbang_setup); 219 220 /** 221 * spi_bitbang_cleanup - default cleanup for per-word I/O loops 222 */ 223 void spi_bitbang_cleanup(struct spi_device *spi) 224 { 225 kfree(spi->controller_state); 226 } 227 EXPORT_SYMBOL_GPL(spi_bitbang_cleanup); 228 229 static int spi_bitbang_bufs(struct spi_device *spi, struct spi_transfer *t) 230 { 231 struct spi_bitbang_cs *cs = spi->controller_state; 232 unsigned nsecs = cs->nsecs; 233 struct spi_bitbang *bitbang; 234 235 bitbang = spi_master_get_devdata(spi->master); 236 if (bitbang->set_line_direction) { 237 int err; 238 239 err = bitbang->set_line_direction(spi, !!(t->tx_buf)); 240 if (err < 0) 241 return err; 242 } 243 244 if (spi->mode & SPI_3WIRE) { 245 unsigned flags; 246 247 flags = t->tx_buf ? SPI_MASTER_NO_RX : SPI_MASTER_NO_TX; 248 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, flags); 249 } 250 return cs->txrx_bufs(spi, cs->txrx_word, nsecs, t, 0); 251 } 252 253 /*----------------------------------------------------------------------*/ 254 255 /* 256 * SECOND PART ... simple transfer queue runner. 257 * 258 * This costs a task context per controller, running the queue by 259 * performing each transfer in sequence. Smarter hardware can queue 260 * several DMA transfers at once, and process several controller queues 261 * in parallel; this driver doesn't match such hardware very well. 262 * 263 * Drivers can provide word-at-a-time i/o primitives, or provide 264 * transfer-at-a-time ones to leverage dma or fifo hardware. 265 */ 266 267 static int spi_bitbang_prepare_hardware(struct spi_master *spi) 268 { 269 struct spi_bitbang *bitbang; 270 271 bitbang = spi_master_get_devdata(spi); 272 273 mutex_lock(&bitbang->lock); 274 bitbang->busy = 1; 275 mutex_unlock(&bitbang->lock); 276 277 return 0; 278 } 279 280 static int spi_bitbang_transfer_one(struct spi_master *master, 281 struct spi_device *spi, 282 struct spi_transfer *transfer) 283 { 284 struct spi_bitbang *bitbang = spi_master_get_devdata(master); 285 int status = 0; 286 287 if (bitbang->setup_transfer) { 288 status = bitbang->setup_transfer(spi, transfer); 289 if (status < 0) 290 goto out; 291 } 292 293 if (transfer->len) 294 status = bitbang->txrx_bufs(spi, transfer); 295 296 if (status == transfer->len) 297 status = 0; 298 else if (status >= 0) 299 status = -EREMOTEIO; 300 301 out: 302 spi_finalize_current_transfer(master); 303 304 return status; 305 } 306 307 static int spi_bitbang_unprepare_hardware(struct spi_master *spi) 308 { 309 struct spi_bitbang *bitbang; 310 311 bitbang = spi_master_get_devdata(spi); 312 313 mutex_lock(&bitbang->lock); 314 bitbang->busy = 0; 315 mutex_unlock(&bitbang->lock); 316 317 return 0; 318 } 319 320 static void spi_bitbang_set_cs(struct spi_device *spi, bool enable) 321 { 322 struct spi_bitbang *bitbang = spi_master_get_devdata(spi->master); 323 324 /* SPI core provides CS high / low, but bitbang driver 325 * expects CS active 326 * spi device driver takes care of handling SPI_CS_HIGH 327 */ 328 enable = (!!(spi->mode & SPI_CS_HIGH) == enable); 329 330 ndelay(SPI_BITBANG_CS_DELAY); 331 bitbang->chipselect(spi, enable ? BITBANG_CS_ACTIVE : 332 BITBANG_CS_INACTIVE); 333 ndelay(SPI_BITBANG_CS_DELAY); 334 } 335 336 /*----------------------------------------------------------------------*/ 337 338 int spi_bitbang_init(struct spi_bitbang *bitbang) 339 { 340 struct spi_master *master = bitbang->master; 341 342 if (!master || !bitbang->chipselect) 343 return -EINVAL; 344 345 mutex_init(&bitbang->lock); 346 347 if (!master->mode_bits) 348 master->mode_bits = SPI_CPOL | SPI_CPHA | bitbang->flags; 349 350 if (master->transfer || master->transfer_one_message) 351 return -EINVAL; 352 353 master->prepare_transfer_hardware = spi_bitbang_prepare_hardware; 354 master->unprepare_transfer_hardware = spi_bitbang_unprepare_hardware; 355 master->transfer_one = spi_bitbang_transfer_one; 356 master->set_cs = spi_bitbang_set_cs; 357 358 if (!bitbang->txrx_bufs) { 359 bitbang->use_dma = 0; 360 bitbang->txrx_bufs = spi_bitbang_bufs; 361 if (!master->setup) { 362 if (!bitbang->setup_transfer) 363 bitbang->setup_transfer = 364 spi_bitbang_setup_transfer; 365 master->setup = spi_bitbang_setup; 366 master->cleanup = spi_bitbang_cleanup; 367 } 368 } 369 370 return 0; 371 } 372 EXPORT_SYMBOL_GPL(spi_bitbang_init); 373 374 /** 375 * spi_bitbang_start - start up a polled/bitbanging SPI master driver 376 * @bitbang: driver handle 377 * 378 * Caller should have zero-initialized all parts of the structure, and then 379 * provided callbacks for chip selection and I/O loops. If the master has 380 * a transfer method, its final step should call spi_bitbang_transfer; or, 381 * that's the default if the transfer routine is not initialized. It should 382 * also set up the bus number and number of chipselects. 383 * 384 * For i/o loops, provide callbacks either per-word (for bitbanging, or for 385 * hardware that basically exposes a shift register) or per-spi_transfer 386 * (which takes better advantage of hardware like fifos or DMA engines). 387 * 388 * Drivers using per-word I/O loops should use (or call) spi_bitbang_setup, 389 * spi_bitbang_cleanup and spi_bitbang_setup_transfer to handle those spi 390 * master methods. Those methods are the defaults if the bitbang->txrx_bufs 391 * routine isn't initialized. 392 * 393 * This routine registers the spi_master, which will process requests in a 394 * dedicated task, keeping IRQs unblocked most of the time. To stop 395 * processing those requests, call spi_bitbang_stop(). 396 * 397 * On success, this routine will take a reference to master. The caller is 398 * responsible for calling spi_bitbang_stop() to decrement the reference and 399 * spi_master_put() as counterpart of spi_alloc_master() to prevent a memory 400 * leak. 401 */ 402 int spi_bitbang_start(struct spi_bitbang *bitbang) 403 { 404 struct spi_master *master = bitbang->master; 405 int ret; 406 407 ret = spi_bitbang_init(bitbang); 408 if (ret) 409 return ret; 410 411 /* driver may get busy before register() returns, especially 412 * if someone registered boardinfo for devices 413 */ 414 ret = spi_register_master(spi_master_get(master)); 415 if (ret) 416 spi_master_put(master); 417 418 return 0; 419 } 420 EXPORT_SYMBOL_GPL(spi_bitbang_start); 421 422 /** 423 * spi_bitbang_stop - stops the task providing spi communication 424 */ 425 void spi_bitbang_stop(struct spi_bitbang *bitbang) 426 { 427 spi_unregister_master(bitbang->master); 428 } 429 EXPORT_SYMBOL_GPL(spi_bitbang_stop); 430 431 MODULE_LICENSE("GPL"); 432 433