xref: /openbmc/linux/drivers/soundwire/stream.c (revision 24f08b3a)
189e59053SSanyog Kale // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
289e59053SSanyog Kale // Copyright(c) 2015-18 Intel Corporation.
389e59053SSanyog Kale 
489e59053SSanyog Kale /*
589e59053SSanyog Kale  *  stream.c - SoundWire Bus stream operations.
689e59053SSanyog Kale  */
789e59053SSanyog Kale 
889e59053SSanyog Kale #include <linux/delay.h>
989e59053SSanyog Kale #include <linux/device.h>
1089e59053SSanyog Kale #include <linux/init.h>
1189e59053SSanyog Kale #include <linux/module.h>
1289e59053SSanyog Kale #include <linux/mod_devicetable.h>
1389e59053SSanyog Kale #include <linux/slab.h>
14f8101c74SSanyog Kale #include <linux/soundwire/sdw_registers.h>
1589e59053SSanyog Kale #include <linux/soundwire/sdw.h>
164550569bSPierre-Louis Bossart #include <sound/soc.h>
1789e59053SSanyog Kale #include "bus.h"
1889e59053SSanyog Kale 
1999b8a5d6SSanyog Kale /*
2099b8a5d6SSanyog Kale  * Array of supported rows and columns as per MIPI SoundWire Specification 1.1
2199b8a5d6SSanyog Kale  *
2299b8a5d6SSanyog Kale  * The rows are arranged as per the array index value programmed
2399b8a5d6SSanyog Kale  * in register. The index 15 has dummy value 0 in order to fill hole.
2499b8a5d6SSanyog Kale  */
25fe4b70f2SPierre-Louis Bossart int sdw_rows[SDW_FRAME_ROWS] = {48, 50, 60, 64, 75, 80, 125, 147,
2699b8a5d6SSanyog Kale 			96, 100, 120, 128, 150, 160, 250, 0,
2799b8a5d6SSanyog Kale 			192, 200, 240, 256, 72, 144, 90, 180};
289026118fSBard Liao EXPORT_SYMBOL(sdw_rows);
2999b8a5d6SSanyog Kale 
30fe4b70f2SPierre-Louis Bossart int sdw_cols[SDW_FRAME_COLS] = {2, 4, 6, 8, 10, 12, 14, 16};
319026118fSBard Liao EXPORT_SYMBOL(sdw_cols);
3299b8a5d6SSanyog Kale 
33fe4b70f2SPierre-Louis Bossart int sdw_find_col_index(int col)
3499b8a5d6SSanyog Kale {
3599b8a5d6SSanyog Kale 	int i;
3699b8a5d6SSanyog Kale 
3799b8a5d6SSanyog Kale 	for (i = 0; i < SDW_FRAME_COLS; i++) {
38fe4b70f2SPierre-Louis Bossart 		if (sdw_cols[i] == col)
3999b8a5d6SSanyog Kale 			return i;
4099b8a5d6SSanyog Kale 	}
4199b8a5d6SSanyog Kale 
4299b8a5d6SSanyog Kale 	pr_warn("Requested column not found, selecting lowest column no: 2\n");
4399b8a5d6SSanyog Kale 	return 0;
4499b8a5d6SSanyog Kale }
45fe4b70f2SPierre-Louis Bossart EXPORT_SYMBOL(sdw_find_col_index);
4699b8a5d6SSanyog Kale 
47fe4b70f2SPierre-Louis Bossart int sdw_find_row_index(int row)
4899b8a5d6SSanyog Kale {
4999b8a5d6SSanyog Kale 	int i;
5099b8a5d6SSanyog Kale 
5199b8a5d6SSanyog Kale 	for (i = 0; i < SDW_FRAME_ROWS; i++) {
52fe4b70f2SPierre-Louis Bossart 		if (sdw_rows[i] == row)
5399b8a5d6SSanyog Kale 			return i;
5499b8a5d6SSanyog Kale 	}
5599b8a5d6SSanyog Kale 
5699b8a5d6SSanyog Kale 	pr_warn("Requested row not found, selecting lowest row no: 48\n");
5799b8a5d6SSanyog Kale 	return 0;
5899b8a5d6SSanyog Kale }
59fe4b70f2SPierre-Louis Bossart EXPORT_SYMBOL(sdw_find_row_index);
60897fe40eSVinod Koul 
61f8101c74SSanyog Kale static int _sdw_program_slave_port_params(struct sdw_bus *bus,
62f8101c74SSanyog Kale 					  struct sdw_slave *slave,
63f8101c74SSanyog Kale 					  struct sdw_transport_params *t_params,
64f8101c74SSanyog Kale 					  enum sdw_dpn_type type)
65f8101c74SSanyog Kale {
66f8101c74SSanyog Kale 	u32 addr1, addr2, addr3, addr4;
67f8101c74SSanyog Kale 	int ret;
68f8101c74SSanyog Kale 	u16 wbuf;
69f8101c74SSanyog Kale 
70f8101c74SSanyog Kale 	if (bus->params.next_bank) {
71f8101c74SSanyog Kale 		addr1 = SDW_DPN_OFFSETCTRL2_B1(t_params->port_num);
72f8101c74SSanyog Kale 		addr2 = SDW_DPN_BLOCKCTRL3_B1(t_params->port_num);
73f8101c74SSanyog Kale 		addr3 = SDW_DPN_SAMPLECTRL2_B1(t_params->port_num);
74f8101c74SSanyog Kale 		addr4 = SDW_DPN_HCTRL_B1(t_params->port_num);
75f8101c74SSanyog Kale 	} else {
76f8101c74SSanyog Kale 		addr1 = SDW_DPN_OFFSETCTRL2_B0(t_params->port_num);
77f8101c74SSanyog Kale 		addr2 = SDW_DPN_BLOCKCTRL3_B0(t_params->port_num);
78f8101c74SSanyog Kale 		addr3 = SDW_DPN_SAMPLECTRL2_B0(t_params->port_num);
79f8101c74SSanyog Kale 		addr4 = SDW_DPN_HCTRL_B0(t_params->port_num);
80f8101c74SSanyog Kale 	}
81f8101c74SSanyog Kale 
82f8101c74SSanyog Kale 	/* Program DPN_OffsetCtrl2 registers */
83f8101c74SSanyog Kale 	ret = sdw_write(slave, addr1, t_params->offset2);
84f8101c74SSanyog Kale 	if (ret < 0) {
8517ed5befSPierre-Louis Bossart 		dev_err(bus->dev, "DPN_OffsetCtrl2 register write failed\n");
86f8101c74SSanyog Kale 		return ret;
87f8101c74SSanyog Kale 	}
88f8101c74SSanyog Kale 
89f8101c74SSanyog Kale 	/* Program DPN_BlockCtrl3 register */
90f8101c74SSanyog Kale 	ret = sdw_write(slave, addr2, t_params->blk_pkg_mode);
91f8101c74SSanyog Kale 	if (ret < 0) {
9217ed5befSPierre-Louis Bossart 		dev_err(bus->dev, "DPN_BlockCtrl3 register write failed\n");
93f8101c74SSanyog Kale 		return ret;
94f8101c74SSanyog Kale 	}
95f8101c74SSanyog Kale 
96f8101c74SSanyog Kale 	/*
97f8101c74SSanyog Kale 	 * Data ports are FULL, SIMPLE and REDUCED. This function handles
987d3b3cdfSVinod Koul 	 * FULL and REDUCED only and beyond this point only FULL is
99f8101c74SSanyog Kale 	 * handled, so bail out if we are not FULL data port type
100f8101c74SSanyog Kale 	 */
101f8101c74SSanyog Kale 	if (type != SDW_DPN_FULL)
102f8101c74SSanyog Kale 		return ret;
103f8101c74SSanyog Kale 
104f8101c74SSanyog Kale 	/* Program DPN_SampleCtrl2 register */
10541ff9174SVinod Koul 	wbuf = FIELD_GET(SDW_DPN_SAMPLECTRL_HIGH, t_params->sample_interval - 1);
106f8101c74SSanyog Kale 
107f8101c74SSanyog Kale 	ret = sdw_write(slave, addr3, wbuf);
108f8101c74SSanyog Kale 	if (ret < 0) {
10917ed5befSPierre-Louis Bossart 		dev_err(bus->dev, "DPN_SampleCtrl2 register write failed\n");
110f8101c74SSanyog Kale 		return ret;
111f8101c74SSanyog Kale 	}
112f8101c74SSanyog Kale 
113f8101c74SSanyog Kale 	/* Program DPN_HCtrl register */
11441ff9174SVinod Koul 	wbuf = FIELD_PREP(SDW_DPN_HCTRL_HSTART, t_params->hstart);
11541ff9174SVinod Koul 	wbuf |= FIELD_PREP(SDW_DPN_HCTRL_HSTOP, t_params->hstop);
116f8101c74SSanyog Kale 
117f8101c74SSanyog Kale 	ret = sdw_write(slave, addr4, wbuf);
118f8101c74SSanyog Kale 	if (ret < 0)
11917ed5befSPierre-Louis Bossart 		dev_err(bus->dev, "DPN_HCtrl register write failed\n");
120f8101c74SSanyog Kale 
121f8101c74SSanyog Kale 	return ret;
122f8101c74SSanyog Kale }
123f8101c74SSanyog Kale 
124f8101c74SSanyog Kale static int sdw_program_slave_port_params(struct sdw_bus *bus,
125f8101c74SSanyog Kale 					 struct sdw_slave_runtime *s_rt,
126f8101c74SSanyog Kale 					 struct sdw_port_runtime *p_rt)
127f8101c74SSanyog Kale {
128f8101c74SSanyog Kale 	struct sdw_transport_params *t_params = &p_rt->transport_params;
129f8101c74SSanyog Kale 	struct sdw_port_params *p_params = &p_rt->port_params;
130f8101c74SSanyog Kale 	struct sdw_slave_prop *slave_prop = &s_rt->slave->prop;
131f8101c74SSanyog Kale 	u32 addr1, addr2, addr3, addr4, addr5, addr6;
132f8101c74SSanyog Kale 	struct sdw_dpn_prop *dpn_prop;
133f8101c74SSanyog Kale 	int ret;
134f8101c74SSanyog Kale 	u8 wbuf;
135f8101c74SSanyog Kale 
136*24f08b3aSBard Liao 	if (s_rt->slave->is_mockup_device)
137*24f08b3aSBard Liao 		return 0;
138*24f08b3aSBard Liao 
139f8101c74SSanyog Kale 	dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
140f8101c74SSanyog Kale 					  s_rt->direction,
141f8101c74SSanyog Kale 					  t_params->port_num);
142f8101c74SSanyog Kale 	if (!dpn_prop)
143f8101c74SSanyog Kale 		return -EINVAL;
144f8101c74SSanyog Kale 
145f8101c74SSanyog Kale 	addr1 = SDW_DPN_PORTCTRL(t_params->port_num);
146f8101c74SSanyog Kale 	addr2 = SDW_DPN_BLOCKCTRL1(t_params->port_num);
147f8101c74SSanyog Kale 
148f8101c74SSanyog Kale 	if (bus->params.next_bank) {
149f8101c74SSanyog Kale 		addr3 = SDW_DPN_SAMPLECTRL1_B1(t_params->port_num);
150f8101c74SSanyog Kale 		addr4 = SDW_DPN_OFFSETCTRL1_B1(t_params->port_num);
151f8101c74SSanyog Kale 		addr5 = SDW_DPN_BLOCKCTRL2_B1(t_params->port_num);
152f8101c74SSanyog Kale 		addr6 = SDW_DPN_LANECTRL_B1(t_params->port_num);
153f8101c74SSanyog Kale 
154f8101c74SSanyog Kale 	} else {
155f8101c74SSanyog Kale 		addr3 = SDW_DPN_SAMPLECTRL1_B0(t_params->port_num);
156f8101c74SSanyog Kale 		addr4 = SDW_DPN_OFFSETCTRL1_B0(t_params->port_num);
157f8101c74SSanyog Kale 		addr5 = SDW_DPN_BLOCKCTRL2_B0(t_params->port_num);
158f8101c74SSanyog Kale 		addr6 = SDW_DPN_LANECTRL_B0(t_params->port_num);
159f8101c74SSanyog Kale 	}
160f8101c74SSanyog Kale 
161f8101c74SSanyog Kale 	/* Program DPN_PortCtrl register */
16241ff9174SVinod Koul 	wbuf = FIELD_PREP(SDW_DPN_PORTCTRL_DATAMODE, p_params->data_mode);
16341ff9174SVinod Koul 	wbuf |= FIELD_PREP(SDW_DPN_PORTCTRL_FLOWMODE, p_params->flow_mode);
164f8101c74SSanyog Kale 
165f8101c74SSanyog Kale 	ret = sdw_update(s_rt->slave, addr1, 0xF, wbuf);
166f8101c74SSanyog Kale 	if (ret < 0) {
167f8101c74SSanyog Kale 		dev_err(&s_rt->slave->dev,
16817ed5befSPierre-Louis Bossart 			"DPN_PortCtrl register write failed for port %d\n",
169f8101c74SSanyog Kale 			t_params->port_num);
170f8101c74SSanyog Kale 		return ret;
171f8101c74SSanyog Kale 	}
172f8101c74SSanyog Kale 
173a9107de4SSrinivas Kandagatla 	if (!dpn_prop->read_only_wordlength) {
174f8101c74SSanyog Kale 		/* Program DPN_BlockCtrl1 register */
175f8101c74SSanyog Kale 		ret = sdw_write(s_rt->slave, addr2, (p_params->bps - 1));
176f8101c74SSanyog Kale 		if (ret < 0) {
177f8101c74SSanyog Kale 			dev_err(&s_rt->slave->dev,
17817ed5befSPierre-Louis Bossart 				"DPN_BlockCtrl1 register write failed for port %d\n",
179f8101c74SSanyog Kale 				t_params->port_num);
180f8101c74SSanyog Kale 			return ret;
181f8101c74SSanyog Kale 		}
182a9107de4SSrinivas Kandagatla 	}
183f8101c74SSanyog Kale 
184f8101c74SSanyog Kale 	/* Program DPN_SampleCtrl1 register */
185f8101c74SSanyog Kale 	wbuf = (t_params->sample_interval - 1) & SDW_DPN_SAMPLECTRL_LOW;
186f8101c74SSanyog Kale 	ret = sdw_write(s_rt->slave, addr3, wbuf);
187f8101c74SSanyog Kale 	if (ret < 0) {
188f8101c74SSanyog Kale 		dev_err(&s_rt->slave->dev,
18917ed5befSPierre-Louis Bossart 			"DPN_SampleCtrl1 register write failed for port %d\n",
190f8101c74SSanyog Kale 			t_params->port_num);
191f8101c74SSanyog Kale 		return ret;
192f8101c74SSanyog Kale 	}
193f8101c74SSanyog Kale 
194f8101c74SSanyog Kale 	/* Program DPN_OffsetCtrl1 registers */
195f8101c74SSanyog Kale 	ret = sdw_write(s_rt->slave, addr4, t_params->offset1);
196f8101c74SSanyog Kale 	if (ret < 0) {
197f8101c74SSanyog Kale 		dev_err(&s_rt->slave->dev,
19817ed5befSPierre-Louis Bossart 			"DPN_OffsetCtrl1 register write failed for port %d\n",
199f8101c74SSanyog Kale 			t_params->port_num);
200f8101c74SSanyog Kale 		return ret;
201f8101c74SSanyog Kale 	}
202f8101c74SSanyog Kale 
203f8101c74SSanyog Kale 	/* Program DPN_BlockCtrl2 register*/
204f8101c74SSanyog Kale 	if (t_params->blk_grp_ctrl_valid) {
205f8101c74SSanyog Kale 		ret = sdw_write(s_rt->slave, addr5, t_params->blk_grp_ctrl);
206f8101c74SSanyog Kale 		if (ret < 0) {
207f8101c74SSanyog Kale 			dev_err(&s_rt->slave->dev,
20817ed5befSPierre-Louis Bossart 				"DPN_BlockCtrl2 reg write failed for port %d\n",
209f8101c74SSanyog Kale 				t_params->port_num);
210f8101c74SSanyog Kale 			return ret;
211f8101c74SSanyog Kale 		}
212f8101c74SSanyog Kale 	}
213f8101c74SSanyog Kale 
214f8101c74SSanyog Kale 	/* program DPN_LaneCtrl register */
215f8101c74SSanyog Kale 	if (slave_prop->lane_control_support) {
216f8101c74SSanyog Kale 		ret = sdw_write(s_rt->slave, addr6, t_params->lane_ctrl);
217f8101c74SSanyog Kale 		if (ret < 0) {
218f8101c74SSanyog Kale 			dev_err(&s_rt->slave->dev,
21917ed5befSPierre-Louis Bossart 				"DPN_LaneCtrl register write failed for port %d\n",
220f8101c74SSanyog Kale 				t_params->port_num);
221f8101c74SSanyog Kale 			return ret;
222f8101c74SSanyog Kale 		}
223f8101c74SSanyog Kale 	}
224f8101c74SSanyog Kale 
225f8101c74SSanyog Kale 	if (dpn_prop->type != SDW_DPN_SIMPLE) {
226f8101c74SSanyog Kale 		ret = _sdw_program_slave_port_params(bus, s_rt->slave,
227f8101c74SSanyog Kale 						     t_params, dpn_prop->type);
228f8101c74SSanyog Kale 		if (ret < 0)
229f8101c74SSanyog Kale 			dev_err(&s_rt->slave->dev,
23017ed5befSPierre-Louis Bossart 				"Transport reg write failed for port: %d\n",
231f8101c74SSanyog Kale 				t_params->port_num);
232f8101c74SSanyog Kale 	}
233f8101c74SSanyog Kale 
234f8101c74SSanyog Kale 	return ret;
235f8101c74SSanyog Kale }
236f8101c74SSanyog Kale 
237f8101c74SSanyog Kale static int sdw_program_master_port_params(struct sdw_bus *bus,
238f8101c74SSanyog Kale 					  struct sdw_port_runtime *p_rt)
239f8101c74SSanyog Kale {
240f8101c74SSanyog Kale 	int ret;
241f8101c74SSanyog Kale 
242f8101c74SSanyog Kale 	/*
243f8101c74SSanyog Kale 	 * we need to set transport and port parameters for the port.
2447d3b3cdfSVinod Koul 	 * Transport parameters refers to the sample interval, offsets and
245f8101c74SSanyog Kale 	 * hstart/stop etc of the data. Port parameters refers to word
246f8101c74SSanyog Kale 	 * length, flow mode etc of the port
247f8101c74SSanyog Kale 	 */
248f8101c74SSanyog Kale 	ret = bus->port_ops->dpn_set_port_transport_params(bus,
249f8101c74SSanyog Kale 					&p_rt->transport_params,
250f8101c74SSanyog Kale 					bus->params.next_bank);
251f8101c74SSanyog Kale 	if (ret < 0)
252f8101c74SSanyog Kale 		return ret;
253f8101c74SSanyog Kale 
254f8101c74SSanyog Kale 	return bus->port_ops->dpn_set_port_params(bus,
255f8101c74SSanyog Kale 						  &p_rt->port_params,
256f8101c74SSanyog Kale 						  bus->params.next_bank);
257f8101c74SSanyog Kale }
258f8101c74SSanyog Kale 
259f8101c74SSanyog Kale /**
260f8101c74SSanyog Kale  * sdw_program_port_params() - Programs transport parameters of Master(s)
261f8101c74SSanyog Kale  * and Slave(s)
262f8101c74SSanyog Kale  *
263f8101c74SSanyog Kale  * @m_rt: Master stream runtime
264f8101c74SSanyog Kale  */
265f8101c74SSanyog Kale static int sdw_program_port_params(struct sdw_master_runtime *m_rt)
266f8101c74SSanyog Kale {
2675920a29dSPierre-Louis Bossart 	struct sdw_slave_runtime *s_rt;
268f8101c74SSanyog Kale 	struct sdw_bus *bus = m_rt->bus;
269f8101c74SSanyog Kale 	struct sdw_port_runtime *p_rt;
270f8101c74SSanyog Kale 	int ret = 0;
271f8101c74SSanyog Kale 
272f8101c74SSanyog Kale 	/* Program transport & port parameters for Slave(s) */
273f8101c74SSanyog Kale 	list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
274f8101c74SSanyog Kale 		list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
275f8101c74SSanyog Kale 			ret = sdw_program_slave_port_params(bus, s_rt, p_rt);
276f8101c74SSanyog Kale 			if (ret < 0)
277f8101c74SSanyog Kale 				return ret;
278f8101c74SSanyog Kale 		}
279f8101c74SSanyog Kale 	}
280f8101c74SSanyog Kale 
281f8101c74SSanyog Kale 	/* Program transport & port parameters for Master(s) */
282f8101c74SSanyog Kale 	list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
283f8101c74SSanyog Kale 		ret = sdw_program_master_port_params(bus, p_rt);
284f8101c74SSanyog Kale 		if (ret < 0)
285f8101c74SSanyog Kale 			return ret;
286f8101c74SSanyog Kale 	}
287f8101c74SSanyog Kale 
288f8101c74SSanyog Kale 	return 0;
289f8101c74SSanyog Kale }
290f8101c74SSanyog Kale 
29189e59053SSanyog Kale /**
29279df15b7SSanyog Kale  * sdw_enable_disable_slave_ports: Enable/disable slave data port
29379df15b7SSanyog Kale  *
29479df15b7SSanyog Kale  * @bus: bus instance
29579df15b7SSanyog Kale  * @s_rt: slave runtime
29679df15b7SSanyog Kale  * @p_rt: port runtime
29779df15b7SSanyog Kale  * @en: enable or disable operation
29879df15b7SSanyog Kale  *
29979df15b7SSanyog Kale  * This function only sets the enable/disable bits in the relevant bank, the
30079df15b7SSanyog Kale  * actual enable/disable is done with a bank switch
30179df15b7SSanyog Kale  */
30279df15b7SSanyog Kale static int sdw_enable_disable_slave_ports(struct sdw_bus *bus,
30379df15b7SSanyog Kale 					  struct sdw_slave_runtime *s_rt,
3041fe74a5eSPierre-Louis Bossart 					  struct sdw_port_runtime *p_rt,
3051fe74a5eSPierre-Louis Bossart 					  bool en)
30679df15b7SSanyog Kale {
30779df15b7SSanyog Kale 	struct sdw_transport_params *t_params = &p_rt->transport_params;
30879df15b7SSanyog Kale 	u32 addr;
30979df15b7SSanyog Kale 	int ret;
31079df15b7SSanyog Kale 
31179df15b7SSanyog Kale 	if (bus->params.next_bank)
31279df15b7SSanyog Kale 		addr = SDW_DPN_CHANNELEN_B1(p_rt->num);
31379df15b7SSanyog Kale 	else
31479df15b7SSanyog Kale 		addr = SDW_DPN_CHANNELEN_B0(p_rt->num);
31579df15b7SSanyog Kale 
31679df15b7SSanyog Kale 	/*
31779df15b7SSanyog Kale 	 * Since bus doesn't support sharing a port across two streams,
31879df15b7SSanyog Kale 	 * it is safe to reset this register
31979df15b7SSanyog Kale 	 */
32079df15b7SSanyog Kale 	if (en)
3210b43fef9SSrinivas Kandagatla 		ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
32279df15b7SSanyog Kale 	else
3230b43fef9SSrinivas Kandagatla 		ret = sdw_write(s_rt->slave, addr, 0x0);
32479df15b7SSanyog Kale 
32579df15b7SSanyog Kale 	if (ret < 0)
32679df15b7SSanyog Kale 		dev_err(&s_rt->slave->dev,
32717ed5befSPierre-Louis Bossart 			"Slave chn_en reg write failed:%d port:%d\n",
32879df15b7SSanyog Kale 			ret, t_params->port_num);
32979df15b7SSanyog Kale 
33079df15b7SSanyog Kale 	return ret;
33179df15b7SSanyog Kale }
33279df15b7SSanyog Kale 
33379df15b7SSanyog Kale static int sdw_enable_disable_master_ports(struct sdw_master_runtime *m_rt,
3341fe74a5eSPierre-Louis Bossart 					   struct sdw_port_runtime *p_rt,
3351fe74a5eSPierre-Louis Bossart 					   bool en)
33679df15b7SSanyog Kale {
33779df15b7SSanyog Kale 	struct sdw_transport_params *t_params = &p_rt->transport_params;
33879df15b7SSanyog Kale 	struct sdw_bus *bus = m_rt->bus;
33979df15b7SSanyog Kale 	struct sdw_enable_ch enable_ch;
340a25eab29SPierre-Louis Bossart 	int ret;
34179df15b7SSanyog Kale 
34279df15b7SSanyog Kale 	enable_ch.port_num = p_rt->num;
34379df15b7SSanyog Kale 	enable_ch.ch_mask = p_rt->ch_mask;
34479df15b7SSanyog Kale 	enable_ch.enable = en;
34579df15b7SSanyog Kale 
34679df15b7SSanyog Kale 	/* Perform Master port channel(s) enable/disable */
34779df15b7SSanyog Kale 	if (bus->port_ops->dpn_port_enable_ch) {
34879df15b7SSanyog Kale 		ret = bus->port_ops->dpn_port_enable_ch(bus,
3491fe74a5eSPierre-Louis Bossart 							&enable_ch,
3501fe74a5eSPierre-Louis Bossart 							bus->params.next_bank);
35179df15b7SSanyog Kale 		if (ret < 0) {
35279df15b7SSanyog Kale 			dev_err(bus->dev,
35317ed5befSPierre-Louis Bossart 				"Master chn_en write failed:%d port:%d\n",
35479df15b7SSanyog Kale 				ret, t_params->port_num);
35579df15b7SSanyog Kale 			return ret;
35679df15b7SSanyog Kale 		}
35779df15b7SSanyog Kale 	} else {
35879df15b7SSanyog Kale 		dev_err(bus->dev,
35979df15b7SSanyog Kale 			"dpn_port_enable_ch not supported, %s failed\n",
36079df15b7SSanyog Kale 			en ? "enable" : "disable");
36179df15b7SSanyog Kale 		return -EINVAL;
36279df15b7SSanyog Kale 	}
36379df15b7SSanyog Kale 
36479df15b7SSanyog Kale 	return 0;
36579df15b7SSanyog Kale }
36679df15b7SSanyog Kale 
36779df15b7SSanyog Kale /**
36879df15b7SSanyog Kale  * sdw_enable_disable_ports() - Enable/disable port(s) for Master and
36979df15b7SSanyog Kale  * Slave(s)
37079df15b7SSanyog Kale  *
37179df15b7SSanyog Kale  * @m_rt: Master stream runtime
37279df15b7SSanyog Kale  * @en: mode (enable/disable)
37379df15b7SSanyog Kale  */
37479df15b7SSanyog Kale static int sdw_enable_disable_ports(struct sdw_master_runtime *m_rt, bool en)
37579df15b7SSanyog Kale {
37679df15b7SSanyog Kale 	struct sdw_port_runtime *s_port, *m_port;
3773a0be1a6SPierre-Louis Bossart 	struct sdw_slave_runtime *s_rt;
37879df15b7SSanyog Kale 	int ret = 0;
37979df15b7SSanyog Kale 
38079df15b7SSanyog Kale 	/* Enable/Disable Slave port(s) */
38179df15b7SSanyog Kale 	list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
38279df15b7SSanyog Kale 		list_for_each_entry(s_port, &s_rt->port_list, port_node) {
38379df15b7SSanyog Kale 			ret = sdw_enable_disable_slave_ports(m_rt->bus, s_rt,
38479df15b7SSanyog Kale 							     s_port, en);
38579df15b7SSanyog Kale 			if (ret < 0)
38679df15b7SSanyog Kale 				return ret;
38779df15b7SSanyog Kale 		}
38879df15b7SSanyog Kale 	}
38979df15b7SSanyog Kale 
39079df15b7SSanyog Kale 	/* Enable/Disable Master port(s) */
39179df15b7SSanyog Kale 	list_for_each_entry(m_port, &m_rt->port_list, port_node) {
39279df15b7SSanyog Kale 		ret = sdw_enable_disable_master_ports(m_rt, m_port, en);
39379df15b7SSanyog Kale 		if (ret < 0)
39479df15b7SSanyog Kale 			return ret;
39579df15b7SSanyog Kale 	}
39679df15b7SSanyog Kale 
39779df15b7SSanyog Kale 	return 0;
39879df15b7SSanyog Kale }
39979df15b7SSanyog Kale 
40079df15b7SSanyog Kale static int sdw_do_port_prep(struct sdw_slave_runtime *s_rt,
4011fe74a5eSPierre-Louis Bossart 			    struct sdw_prepare_ch prep_ch,
4021fe74a5eSPierre-Louis Bossart 			    enum sdw_port_prep_ops cmd)
40379df15b7SSanyog Kale {
40479df15b7SSanyog Kale 	const struct sdw_slave_ops *ops = s_rt->slave->ops;
40579df15b7SSanyog Kale 	int ret;
40679df15b7SSanyog Kale 
40779df15b7SSanyog Kale 	if (ops->port_prep) {
40879df15b7SSanyog Kale 		ret = ops->port_prep(s_rt->slave, &prep_ch, cmd);
40979df15b7SSanyog Kale 		if (ret < 0) {
41079df15b7SSanyog Kale 			dev_err(&s_rt->slave->dev,
41162f0cec3SVinod Koul 				"Slave Port Prep cmd %d failed: %d\n",
41262f0cec3SVinod Koul 				cmd, ret);
41379df15b7SSanyog Kale 			return ret;
41479df15b7SSanyog Kale 		}
41579df15b7SSanyog Kale 	}
41679df15b7SSanyog Kale 
41779df15b7SSanyog Kale 	return 0;
41879df15b7SSanyog Kale }
41979df15b7SSanyog Kale 
42079df15b7SSanyog Kale static int sdw_prep_deprep_slave_ports(struct sdw_bus *bus,
42179df15b7SSanyog Kale 				       struct sdw_slave_runtime *s_rt,
4221fe74a5eSPierre-Louis Bossart 				       struct sdw_port_runtime *p_rt,
4231fe74a5eSPierre-Louis Bossart 				       bool prep)
42479df15b7SSanyog Kale {
4253a0be1a6SPierre-Louis Bossart 	struct completion *port_ready;
42679df15b7SSanyog Kale 	struct sdw_dpn_prop *dpn_prop;
42779df15b7SSanyog Kale 	struct sdw_prepare_ch prep_ch;
42879df15b7SSanyog Kale 	bool intr = false;
42979df15b7SSanyog Kale 	int ret = 0, val;
43079df15b7SSanyog Kale 	u32 addr;
43179df15b7SSanyog Kale 
43279df15b7SSanyog Kale 	prep_ch.num = p_rt->num;
43379df15b7SSanyog Kale 	prep_ch.ch_mask = p_rt->ch_mask;
43479df15b7SSanyog Kale 
43579df15b7SSanyog Kale 	dpn_prop = sdw_get_slave_dpn_prop(s_rt->slave,
43679df15b7SSanyog Kale 					  s_rt->direction,
43779df15b7SSanyog Kale 					  prep_ch.num);
43879df15b7SSanyog Kale 	if (!dpn_prop) {
43979df15b7SSanyog Kale 		dev_err(bus->dev,
44017ed5befSPierre-Louis Bossart 			"Slave Port:%d properties not found\n", prep_ch.num);
44179df15b7SSanyog Kale 		return -EINVAL;
44279df15b7SSanyog Kale 	}
44379df15b7SSanyog Kale 
44479df15b7SSanyog Kale 	prep_ch.prepare = prep;
44579df15b7SSanyog Kale 
44679df15b7SSanyog Kale 	prep_ch.bank = bus->params.next_bank;
44779df15b7SSanyog Kale 
448dd87a72aSPierre-Louis Bossart 	if (dpn_prop->imp_def_interrupts || !dpn_prop->simple_ch_prep_sm ||
449dd87a72aSPierre-Louis Bossart 	    bus->params.s_data_mode != SDW_PORT_DATA_MODE_NORMAL)
45079df15b7SSanyog Kale 		intr = true;
45179df15b7SSanyog Kale 
45279df15b7SSanyog Kale 	/*
45379df15b7SSanyog Kale 	 * Enable interrupt before Port prepare.
45479df15b7SSanyog Kale 	 * For Port de-prepare, it is assumed that port
45579df15b7SSanyog Kale 	 * was prepared earlier
45679df15b7SSanyog Kale 	 */
45779df15b7SSanyog Kale 	if (prep && intr) {
45879df15b7SSanyog Kale 		ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
4598acbbfecSPierre-Louis Bossart 					     dpn_prop->imp_def_interrupts);
46079df15b7SSanyog Kale 		if (ret < 0)
46179df15b7SSanyog Kale 			return ret;
46279df15b7SSanyog Kale 	}
46379df15b7SSanyog Kale 
46479df15b7SSanyog Kale 	/* Inform slave about the impending port prepare */
46579df15b7SSanyog Kale 	sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_PRE_PREP);
46679df15b7SSanyog Kale 
46779df15b7SSanyog Kale 	/* Prepare Slave port implementing CP_SM */
46879df15b7SSanyog Kale 	if (!dpn_prop->simple_ch_prep_sm) {
46979df15b7SSanyog Kale 		addr = SDW_DPN_PREPARECTRL(p_rt->num);
47079df15b7SSanyog Kale 
47179df15b7SSanyog Kale 		if (prep)
4720b43fef9SSrinivas Kandagatla 			ret = sdw_write(s_rt->slave, addr, p_rt->ch_mask);
47379df15b7SSanyog Kale 		else
4740b43fef9SSrinivas Kandagatla 			ret = sdw_write(s_rt->slave, addr, 0x0);
47579df15b7SSanyog Kale 
47679df15b7SSanyog Kale 		if (ret < 0) {
47779df15b7SSanyog Kale 			dev_err(&s_rt->slave->dev,
47817ed5befSPierre-Louis Bossart 				"Slave prep_ctrl reg write failed\n");
47979df15b7SSanyog Kale 			return ret;
48079df15b7SSanyog Kale 		}
48179df15b7SSanyog Kale 
48279df15b7SSanyog Kale 		/* Wait for completion on port ready */
48379df15b7SSanyog Kale 		port_ready = &s_rt->slave->port_ready[prep_ch.num];
4843d3e88e3SRichard Fitzgerald 		wait_for_completion_timeout(port_ready,
48579df15b7SSanyog Kale 			msecs_to_jiffies(dpn_prop->ch_prep_timeout));
48679df15b7SSanyog Kale 
48779df15b7SSanyog Kale 		val = sdw_read(s_rt->slave, SDW_DPN_PREPARESTATUS(p_rt->num));
4883d3e88e3SRichard Fitzgerald 		if ((val < 0) || (val & p_rt->ch_mask)) {
4893d3e88e3SRichard Fitzgerald 			ret = (val < 0) ? val : -ETIMEDOUT;
49079df15b7SSanyog Kale 			dev_err(&s_rt->slave->dev,
4913d3e88e3SRichard Fitzgerald 				"Chn prep failed for port %d: %d\n", prep_ch.num, ret);
4923d3e88e3SRichard Fitzgerald 			return ret;
49379df15b7SSanyog Kale 		}
49479df15b7SSanyog Kale 	}
49579df15b7SSanyog Kale 
49679df15b7SSanyog Kale 	/* Inform slaves about ports prepared */
49779df15b7SSanyog Kale 	sdw_do_port_prep(s_rt, prep_ch, SDW_OPS_PORT_POST_PREP);
49879df15b7SSanyog Kale 
49979df15b7SSanyog Kale 	/* Disable interrupt after Port de-prepare */
50079df15b7SSanyog Kale 	if (!prep && intr)
50179df15b7SSanyog Kale 		ret = sdw_configure_dpn_intr(s_rt->slave, p_rt->num, prep,
5028acbbfecSPierre-Louis Bossart 					     dpn_prop->imp_def_interrupts);
50379df15b7SSanyog Kale 
50479df15b7SSanyog Kale 	return ret;
50579df15b7SSanyog Kale }
50679df15b7SSanyog Kale 
50779df15b7SSanyog Kale static int sdw_prep_deprep_master_ports(struct sdw_master_runtime *m_rt,
5081fe74a5eSPierre-Louis Bossart 					struct sdw_port_runtime *p_rt,
5091fe74a5eSPierre-Louis Bossart 					bool prep)
51079df15b7SSanyog Kale {
51179df15b7SSanyog Kale 	struct sdw_transport_params *t_params = &p_rt->transport_params;
51279df15b7SSanyog Kale 	struct sdw_bus *bus = m_rt->bus;
51379df15b7SSanyog Kale 	const struct sdw_master_port_ops *ops = bus->port_ops;
51479df15b7SSanyog Kale 	struct sdw_prepare_ch prep_ch;
51579df15b7SSanyog Kale 	int ret = 0;
51679df15b7SSanyog Kale 
51779df15b7SSanyog Kale 	prep_ch.num = p_rt->num;
51879df15b7SSanyog Kale 	prep_ch.ch_mask = p_rt->ch_mask;
51979df15b7SSanyog Kale 	prep_ch.prepare = prep; /* Prepare/De-prepare */
52079df15b7SSanyog Kale 	prep_ch.bank = bus->params.next_bank;
52179df15b7SSanyog Kale 
52279df15b7SSanyog Kale 	/* Pre-prepare/Pre-deprepare port(s) */
52379df15b7SSanyog Kale 	if (ops->dpn_port_prep) {
52479df15b7SSanyog Kale 		ret = ops->dpn_port_prep(bus, &prep_ch);
52579df15b7SSanyog Kale 		if (ret < 0) {
52617ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Port prepare failed for port:%d\n",
52779df15b7SSanyog Kale 				t_params->port_num);
52879df15b7SSanyog Kale 			return ret;
52979df15b7SSanyog Kale 		}
53079df15b7SSanyog Kale 	}
53179df15b7SSanyog Kale 
53279df15b7SSanyog Kale 	return ret;
53379df15b7SSanyog Kale }
53479df15b7SSanyog Kale 
53579df15b7SSanyog Kale /**
53679df15b7SSanyog Kale  * sdw_prep_deprep_ports() - Prepare/De-prepare port(s) for Master(s) and
53779df15b7SSanyog Kale  * Slave(s)
53879df15b7SSanyog Kale  *
53979df15b7SSanyog Kale  * @m_rt: Master runtime handle
54079df15b7SSanyog Kale  * @prep: Prepare or De-prepare
54179df15b7SSanyog Kale  */
54279df15b7SSanyog Kale static int sdw_prep_deprep_ports(struct sdw_master_runtime *m_rt, bool prep)
54379df15b7SSanyog Kale {
5443a0be1a6SPierre-Louis Bossart 	struct sdw_slave_runtime *s_rt;
54579df15b7SSanyog Kale 	struct sdw_port_runtime *p_rt;
54679df15b7SSanyog Kale 	int ret = 0;
54779df15b7SSanyog Kale 
54879df15b7SSanyog Kale 	/* Prepare/De-prepare Slave port(s) */
54979df15b7SSanyog Kale 	list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
55079df15b7SSanyog Kale 		list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
55179df15b7SSanyog Kale 			ret = sdw_prep_deprep_slave_ports(m_rt->bus, s_rt,
55279df15b7SSanyog Kale 							  p_rt, prep);
55379df15b7SSanyog Kale 			if (ret < 0)
55479df15b7SSanyog Kale 				return ret;
55579df15b7SSanyog Kale 		}
55679df15b7SSanyog Kale 	}
55779df15b7SSanyog Kale 
55879df15b7SSanyog Kale 	/* Prepare/De-prepare Master port(s) */
55979df15b7SSanyog Kale 	list_for_each_entry(p_rt, &m_rt->port_list, port_node) {
56079df15b7SSanyog Kale 		ret = sdw_prep_deprep_master_ports(m_rt, p_rt, prep);
56179df15b7SSanyog Kale 		if (ret < 0)
56279df15b7SSanyog Kale 			return ret;
56379df15b7SSanyog Kale 	}
56479df15b7SSanyog Kale 
56579df15b7SSanyog Kale 	return ret;
56679df15b7SSanyog Kale }
56779df15b7SSanyog Kale 
56879df15b7SSanyog Kale /**
56999b8a5d6SSanyog Kale  * sdw_notify_config() - Notify bus configuration
57099b8a5d6SSanyog Kale  *
57199b8a5d6SSanyog Kale  * @m_rt: Master runtime handle
57299b8a5d6SSanyog Kale  *
57399b8a5d6SSanyog Kale  * This function notifies the Master(s) and Slave(s) of the
57499b8a5d6SSanyog Kale  * new bus configuration.
57599b8a5d6SSanyog Kale  */
57699b8a5d6SSanyog Kale static int sdw_notify_config(struct sdw_master_runtime *m_rt)
57799b8a5d6SSanyog Kale {
57899b8a5d6SSanyog Kale 	struct sdw_slave_runtime *s_rt;
57999b8a5d6SSanyog Kale 	struct sdw_bus *bus = m_rt->bus;
58099b8a5d6SSanyog Kale 	struct sdw_slave *slave;
58199b8a5d6SSanyog Kale 	int ret = 0;
58299b8a5d6SSanyog Kale 
58399b8a5d6SSanyog Kale 	if (bus->ops->set_bus_conf) {
58499b8a5d6SSanyog Kale 		ret = bus->ops->set_bus_conf(bus, &bus->params);
58599b8a5d6SSanyog Kale 		if (ret < 0)
58699b8a5d6SSanyog Kale 			return ret;
58799b8a5d6SSanyog Kale 	}
58899b8a5d6SSanyog Kale 
58999b8a5d6SSanyog Kale 	list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
59099b8a5d6SSanyog Kale 		slave = s_rt->slave;
59199b8a5d6SSanyog Kale 
59299b8a5d6SSanyog Kale 		if (slave->ops->bus_config) {
59399b8a5d6SSanyog Kale 			ret = slave->ops->bus_config(slave, &bus->params);
59460835022SRander Wang 			if (ret < 0) {
59517ed5befSPierre-Louis Bossart 				dev_err(bus->dev, "Notify Slave: %d failed\n",
59699b8a5d6SSanyog Kale 					slave->dev_num);
59799b8a5d6SSanyog Kale 				return ret;
59899b8a5d6SSanyog Kale 			}
59999b8a5d6SSanyog Kale 		}
60060835022SRander Wang 	}
60199b8a5d6SSanyog Kale 
60299b8a5d6SSanyog Kale 	return ret;
60399b8a5d6SSanyog Kale }
60499b8a5d6SSanyog Kale 
60599b8a5d6SSanyog Kale /**
60699b8a5d6SSanyog Kale  * sdw_program_params() - Program transport and port parameters for Master(s)
60799b8a5d6SSanyog Kale  * and Slave(s)
60899b8a5d6SSanyog Kale  *
60999b8a5d6SSanyog Kale  * @bus: SDW bus instance
610bfaa3549SRander Wang  * @prepare: true if sdw_program_params() is called by _prepare.
61199b8a5d6SSanyog Kale  */
612bfaa3549SRander Wang static int sdw_program_params(struct sdw_bus *bus, bool prepare)
61399b8a5d6SSanyog Kale {
6143a0be1a6SPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
61599b8a5d6SSanyog Kale 	int ret = 0;
61699b8a5d6SSanyog Kale 
61799b8a5d6SSanyog Kale 	list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
618bfaa3549SRander Wang 
619bfaa3549SRander Wang 		/*
620bfaa3549SRander Wang 		 * this loop walks through all master runtimes for a
621bfaa3549SRander Wang 		 * bus, but the ports can only be configured while
622bfaa3549SRander Wang 		 * explicitly preparing a stream or handling an
623bfaa3549SRander Wang 		 * already-prepared stream otherwise.
624bfaa3549SRander Wang 		 */
625bfaa3549SRander Wang 		if (!prepare &&
626bfaa3549SRander Wang 		    m_rt->stream->state == SDW_STREAM_CONFIGURED)
627bfaa3549SRander Wang 			continue;
628bfaa3549SRander Wang 
62999b8a5d6SSanyog Kale 		ret = sdw_program_port_params(m_rt);
63099b8a5d6SSanyog Kale 		if (ret < 0) {
63199b8a5d6SSanyog Kale 			dev_err(bus->dev,
63217ed5befSPierre-Louis Bossart 				"Program transport params failed: %d\n", ret);
63399b8a5d6SSanyog Kale 			return ret;
63499b8a5d6SSanyog Kale 		}
63599b8a5d6SSanyog Kale 
63699b8a5d6SSanyog Kale 		ret = sdw_notify_config(m_rt);
63799b8a5d6SSanyog Kale 		if (ret < 0) {
63862f0cec3SVinod Koul 			dev_err(bus->dev,
63962f0cec3SVinod Koul 				"Notify bus config failed: %d\n", ret);
64099b8a5d6SSanyog Kale 			return ret;
64199b8a5d6SSanyog Kale 		}
64299b8a5d6SSanyog Kale 
64399b8a5d6SSanyog Kale 		/* Enable port(s) on alternate bank for all active streams */
64499b8a5d6SSanyog Kale 		if (m_rt->stream->state != SDW_STREAM_ENABLED)
64599b8a5d6SSanyog Kale 			continue;
64699b8a5d6SSanyog Kale 
64799b8a5d6SSanyog Kale 		ret = sdw_enable_disable_ports(m_rt, true);
64899b8a5d6SSanyog Kale 		if (ret < 0) {
64917ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Enable channel failed: %d\n", ret);
65099b8a5d6SSanyog Kale 			return ret;
65199b8a5d6SSanyog Kale 		}
65299b8a5d6SSanyog Kale 	}
65399b8a5d6SSanyog Kale 
65499b8a5d6SSanyog Kale 	return ret;
65599b8a5d6SSanyog Kale }
65699b8a5d6SSanyog Kale 
657ce6e74d0SShreyas NC static int sdw_bank_switch(struct sdw_bus *bus, int m_rt_count)
65899b8a5d6SSanyog Kale {
65999b8a5d6SSanyog Kale 	int col_index, row_index;
660ce6e74d0SShreyas NC 	bool multi_link;
66199b8a5d6SSanyog Kale 	struct sdw_msg *wr_msg;
6623a0be1a6SPierre-Louis Bossart 	u8 *wbuf;
6633a0be1a6SPierre-Louis Bossart 	int ret;
66499b8a5d6SSanyog Kale 	u16 addr;
66599b8a5d6SSanyog Kale 
66699b8a5d6SSanyog Kale 	wr_msg = kzalloc(sizeof(*wr_msg), GFP_KERNEL);
66799b8a5d6SSanyog Kale 	if (!wr_msg)
66899b8a5d6SSanyog Kale 		return -ENOMEM;
66999b8a5d6SSanyog Kale 
670ce6e74d0SShreyas NC 	bus->defer_msg.msg = wr_msg;
671ce6e74d0SShreyas NC 
67299b8a5d6SSanyog Kale 	wbuf = kzalloc(sizeof(*wbuf), GFP_KERNEL);
67399b8a5d6SSanyog Kale 	if (!wbuf) {
67499b8a5d6SSanyog Kale 		ret = -ENOMEM;
67599b8a5d6SSanyog Kale 		goto error_1;
67699b8a5d6SSanyog Kale 	}
67799b8a5d6SSanyog Kale 
67899b8a5d6SSanyog Kale 	/* Get row and column index to program register */
67999b8a5d6SSanyog Kale 	col_index = sdw_find_col_index(bus->params.col);
68099b8a5d6SSanyog Kale 	row_index = sdw_find_row_index(bus->params.row);
68199b8a5d6SSanyog Kale 	wbuf[0] = col_index | (row_index << 3);
68299b8a5d6SSanyog Kale 
68399b8a5d6SSanyog Kale 	if (bus->params.next_bank)
68499b8a5d6SSanyog Kale 		addr = SDW_SCP_FRAMECTRL_B1;
68599b8a5d6SSanyog Kale 	else
68699b8a5d6SSanyog Kale 		addr = SDW_SCP_FRAMECTRL_B0;
68799b8a5d6SSanyog Kale 
68899b8a5d6SSanyog Kale 	sdw_fill_msg(wr_msg, NULL, addr, 1, SDW_BROADCAST_DEV_NUM,
68999b8a5d6SSanyog Kale 		     SDW_MSG_FLAG_WRITE, wbuf);
69099b8a5d6SSanyog Kale 	wr_msg->ssp_sync = true;
69199b8a5d6SSanyog Kale 
692ce6e74d0SShreyas NC 	/*
693ce6e74d0SShreyas NC 	 * Set the multi_link flag only when both the hardware supports
694063ff4e5SPierre-Louis Bossart 	 * and hardware-based sync is required
695ce6e74d0SShreyas NC 	 */
696063ff4e5SPierre-Louis Bossart 	multi_link = bus->multi_link && (m_rt_count >= bus->hw_sync_min_links);
697ce6e74d0SShreyas NC 
698ce6e74d0SShreyas NC 	if (multi_link)
699ce6e74d0SShreyas NC 		ret = sdw_transfer_defer(bus, wr_msg, &bus->defer_msg);
700ce6e74d0SShreyas NC 	else
70199b8a5d6SSanyog Kale 		ret = sdw_transfer(bus, wr_msg);
702ce6e74d0SShreyas NC 
703e6645314SBard Liao 	if (ret < 0 && ret != -ENODATA) {
70417ed5befSPierre-Louis Bossart 		dev_err(bus->dev, "Slave frame_ctrl reg write failed\n");
70599b8a5d6SSanyog Kale 		goto error;
70699b8a5d6SSanyog Kale 	}
70799b8a5d6SSanyog Kale 
708ce6e74d0SShreyas NC 	if (!multi_link) {
70999b8a5d6SSanyog Kale 		kfree(wr_msg);
71099b8a5d6SSanyog Kale 		kfree(wbuf);
71199b8a5d6SSanyog Kale 		bus->defer_msg.msg = NULL;
71299b8a5d6SSanyog Kale 		bus->params.curr_bank = !bus->params.curr_bank;
71399b8a5d6SSanyog Kale 		bus->params.next_bank = !bus->params.next_bank;
714ce6e74d0SShreyas NC 	}
71599b8a5d6SSanyog Kale 
71699b8a5d6SSanyog Kale 	return 0;
71799b8a5d6SSanyog Kale 
71899b8a5d6SSanyog Kale error:
71999b8a5d6SSanyog Kale 	kfree(wbuf);
72099b8a5d6SSanyog Kale error_1:
72199b8a5d6SSanyog Kale 	kfree(wr_msg);
7223fbbf214STom Rix 	bus->defer_msg.msg = NULL;
72399b8a5d6SSanyog Kale 	return ret;
72499b8a5d6SSanyog Kale }
72599b8a5d6SSanyog Kale 
726ce6e74d0SShreyas NC /**
727ce6e74d0SShreyas NC  * sdw_ml_sync_bank_switch: Multilink register bank switch
728ce6e74d0SShreyas NC  *
729ce6e74d0SShreyas NC  * @bus: SDW bus instance
730ce6e74d0SShreyas NC  *
731ce6e74d0SShreyas NC  * Caller function should free the buffers on error
732ce6e74d0SShreyas NC  */
733ce6e74d0SShreyas NC static int sdw_ml_sync_bank_switch(struct sdw_bus *bus)
734ce6e74d0SShreyas NC {
735ce6e74d0SShreyas NC 	unsigned long time_left;
736ce6e74d0SShreyas NC 
737ce6e74d0SShreyas NC 	if (!bus->multi_link)
738ce6e74d0SShreyas NC 		return 0;
739ce6e74d0SShreyas NC 
740ce6e74d0SShreyas NC 	/* Wait for completion of transfer */
741ce6e74d0SShreyas NC 	time_left = wait_for_completion_timeout(&bus->defer_msg.complete,
742ce6e74d0SShreyas NC 						bus->bank_switch_timeout);
743ce6e74d0SShreyas NC 
744ce6e74d0SShreyas NC 	if (!time_left) {
74517ed5befSPierre-Louis Bossart 		dev_err(bus->dev, "Controller Timed out on bank switch\n");
746ce6e74d0SShreyas NC 		return -ETIMEDOUT;
747ce6e74d0SShreyas NC 	}
748ce6e74d0SShreyas NC 
749ce6e74d0SShreyas NC 	bus->params.curr_bank = !bus->params.curr_bank;
750ce6e74d0SShreyas NC 	bus->params.next_bank = !bus->params.next_bank;
751ce6e74d0SShreyas NC 
752ce6e74d0SShreyas NC 	if (bus->defer_msg.msg) {
753ce6e74d0SShreyas NC 		kfree(bus->defer_msg.msg->buf);
754ce6e74d0SShreyas NC 		kfree(bus->defer_msg.msg);
755ce6e74d0SShreyas NC 	}
756ce6e74d0SShreyas NC 
757ce6e74d0SShreyas NC 	return 0;
758ce6e74d0SShreyas NC }
759ce6e74d0SShreyas NC 
76099b8a5d6SSanyog Kale static int do_bank_switch(struct sdw_stream_runtime *stream)
76199b8a5d6SSanyog Kale {
7623a0be1a6SPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
76399b8a5d6SSanyog Kale 	const struct sdw_master_ops *ops;
7643a0be1a6SPierre-Louis Bossart 	struct sdw_bus *bus;
765ce6e74d0SShreyas NC 	bool multi_link = false;
766063ff4e5SPierre-Louis Bossart 	int m_rt_count;
76799b8a5d6SSanyog Kale 	int ret = 0;
76899b8a5d6SSanyog Kale 
769063ff4e5SPierre-Louis Bossart 	m_rt_count = stream->m_rt_count;
770063ff4e5SPierre-Louis Bossart 
77148949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
77248949722SVinod Koul 		bus = m_rt->bus;
77399b8a5d6SSanyog Kale 		ops = bus->ops;
77499b8a5d6SSanyog Kale 
775063ff4e5SPierre-Louis Bossart 		if (bus->multi_link && m_rt_count >= bus->hw_sync_min_links) {
776ce6e74d0SShreyas NC 			multi_link = true;
777ce6e74d0SShreyas NC 			mutex_lock(&bus->msg_lock);
778ce6e74d0SShreyas NC 		}
779ce6e74d0SShreyas NC 
78099b8a5d6SSanyog Kale 		/* Pre-bank switch */
78199b8a5d6SSanyog Kale 		if (ops->pre_bank_switch) {
78299b8a5d6SSanyog Kale 			ret = ops->pre_bank_switch(bus);
78399b8a5d6SSanyog Kale 			if (ret < 0) {
78448949722SVinod Koul 				dev_err(bus->dev,
78517ed5befSPierre-Louis Bossart 					"Pre bank switch op failed: %d\n", ret);
786ce6e74d0SShreyas NC 				goto msg_unlock;
78799b8a5d6SSanyog Kale 			}
78899b8a5d6SSanyog Kale 		}
78999b8a5d6SSanyog Kale 
790ce6e74d0SShreyas NC 		/*
791ce6e74d0SShreyas NC 		 * Perform Bank switch operation.
792ce6e74d0SShreyas NC 		 * For multi link cases, the actual bank switch is
793ce6e74d0SShreyas NC 		 * synchronized across all Masters and happens later as a
794ce6e74d0SShreyas NC 		 * part of post_bank_switch ops.
795ce6e74d0SShreyas NC 		 */
796063ff4e5SPierre-Louis Bossart 		ret = sdw_bank_switch(bus, m_rt_count);
79799b8a5d6SSanyog Kale 		if (ret < 0) {
79817ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Bank switch failed: %d\n", ret);
799ce6e74d0SShreyas NC 			goto error;
80099b8a5d6SSanyog Kale 		}
80148949722SVinod Koul 	}
80248949722SVinod Koul 
803ce6e74d0SShreyas NC 	/*
804ce6e74d0SShreyas NC 	 * For multi link cases, it is expected that the bank switch is
805ce6e74d0SShreyas NC 	 * triggered by the post_bank_switch for the first Master in the list
806ce6e74d0SShreyas NC 	 * and for the other Masters the post_bank_switch() should return doing
807ce6e74d0SShreyas NC 	 * nothing.
808ce6e74d0SShreyas NC 	 */
80948949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
81048949722SVinod Koul 		bus = m_rt->bus;
81148949722SVinod Koul 		ops = bus->ops;
81299b8a5d6SSanyog Kale 
81399b8a5d6SSanyog Kale 		/* Post-bank switch */
81499b8a5d6SSanyog Kale 		if (ops->post_bank_switch) {
81599b8a5d6SSanyog Kale 			ret = ops->post_bank_switch(bus);
81699b8a5d6SSanyog Kale 			if (ret < 0) {
81799b8a5d6SSanyog Kale 				dev_err(bus->dev,
81862f0cec3SVinod Koul 					"Post bank switch op failed: %d\n",
81962f0cec3SVinod Koul 					ret);
820ce6e74d0SShreyas NC 				goto error;
82199b8a5d6SSanyog Kale 			}
822063ff4e5SPierre-Louis Bossart 		} else if (multi_link) {
823ce6e74d0SShreyas NC 			dev_err(bus->dev,
82417ed5befSPierre-Louis Bossart 				"Post bank switch ops not implemented\n");
825ce6e74d0SShreyas NC 			goto error;
826ce6e74d0SShreyas NC 		}
827ce6e74d0SShreyas NC 
828ce6e74d0SShreyas NC 		/* Set the bank switch timeout to default, if not set */
829ce6e74d0SShreyas NC 		if (!bus->bank_switch_timeout)
830ce6e74d0SShreyas NC 			bus->bank_switch_timeout = DEFAULT_BANK_SWITCH_TIMEOUT;
831ce6e74d0SShreyas NC 
832ce6e74d0SShreyas NC 		/* Check if bank switch was successful */
833ce6e74d0SShreyas NC 		ret = sdw_ml_sync_bank_switch(bus);
834ce6e74d0SShreyas NC 		if (ret < 0) {
835ce6e74d0SShreyas NC 			dev_err(bus->dev,
83617ed5befSPierre-Louis Bossart 				"multi link bank switch failed: %d\n", ret);
837ce6e74d0SShreyas NC 			goto error;
838ce6e74d0SShreyas NC 		}
839ce6e74d0SShreyas NC 
840063ff4e5SPierre-Louis Bossart 		if (multi_link)
841ce6e74d0SShreyas NC 			mutex_unlock(&bus->msg_lock);
842ce6e74d0SShreyas NC 	}
843ce6e74d0SShreyas NC 
844ce6e74d0SShreyas NC 	return ret;
845ce6e74d0SShreyas NC 
846ce6e74d0SShreyas NC error:
847ce6e74d0SShreyas NC 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
848ce6e74d0SShreyas NC 		bus = m_rt->bus;
8493fbbf214STom Rix 		if (bus->defer_msg.msg) {
850ce6e74d0SShreyas NC 			kfree(bus->defer_msg.msg->buf);
851ce6e74d0SShreyas NC 			kfree(bus->defer_msg.msg);
852ce6e74d0SShreyas NC 		}
8533fbbf214STom Rix 	}
854ce6e74d0SShreyas NC 
855ce6e74d0SShreyas NC msg_unlock:
856ce6e74d0SShreyas NC 
857ce6e74d0SShreyas NC 	if (multi_link) {
858ce6e74d0SShreyas NC 		list_for_each_entry(m_rt, &stream->master_list, stream_node) {
859ce6e74d0SShreyas NC 			bus = m_rt->bus;
860ce6e74d0SShreyas NC 			if (mutex_is_locked(&bus->msg_lock))
861ce6e74d0SShreyas NC 				mutex_unlock(&bus->msg_lock);
86299b8a5d6SSanyog Kale 		}
86348949722SVinod Koul 	}
86499b8a5d6SSanyog Kale 
86599b8a5d6SSanyog Kale 	return ret;
86699b8a5d6SSanyog Kale }
86799b8a5d6SSanyog Kale 
86899b8a5d6SSanyog Kale /**
86989e59053SSanyog Kale  * sdw_release_stream() - Free the assigned stream runtime
87089e59053SSanyog Kale  *
87189e59053SSanyog Kale  * @stream: SoundWire stream runtime
87289e59053SSanyog Kale  *
87389e59053SSanyog Kale  * sdw_release_stream should be called only once per stream
87489e59053SSanyog Kale  */
87589e59053SSanyog Kale void sdw_release_stream(struct sdw_stream_runtime *stream)
87689e59053SSanyog Kale {
87789e59053SSanyog Kale 	kfree(stream);
87889e59053SSanyog Kale }
87989e59053SSanyog Kale EXPORT_SYMBOL(sdw_release_stream);
88089e59053SSanyog Kale 
88189e59053SSanyog Kale /**
88289e59053SSanyog Kale  * sdw_alloc_stream() - Allocate and return stream runtime
88389e59053SSanyog Kale  *
88489e59053SSanyog Kale  * @stream_name: SoundWire stream name
88589e59053SSanyog Kale  *
88689e59053SSanyog Kale  * Allocates a SoundWire stream runtime instance.
88789e59053SSanyog Kale  * sdw_alloc_stream should be called only once per stream. Typically
88889e59053SSanyog Kale  * invoked from ALSA/ASoC machine/platform driver.
88989e59053SSanyog Kale  */
890dfcff3f8SSrinivas Kandagatla struct sdw_stream_runtime *sdw_alloc_stream(const char *stream_name)
89189e59053SSanyog Kale {
89289e59053SSanyog Kale 	struct sdw_stream_runtime *stream;
89389e59053SSanyog Kale 
89489e59053SSanyog Kale 	stream = kzalloc(sizeof(*stream), GFP_KERNEL);
89589e59053SSanyog Kale 	if (!stream)
89689e59053SSanyog Kale 		return NULL;
89789e59053SSanyog Kale 
89889e59053SSanyog Kale 	stream->name = stream_name;
8990c4a1049SSanyog Kale 	INIT_LIST_HEAD(&stream->master_list);
90089e59053SSanyog Kale 	stream->state = SDW_STREAM_ALLOCATED;
9019b5c132aSShreyas NC 	stream->m_rt_count = 0;
90289e59053SSanyog Kale 
90389e59053SSanyog Kale 	return stream;
90489e59053SSanyog Kale }
90589e59053SSanyog Kale EXPORT_SYMBOL(sdw_alloc_stream);
90689e59053SSanyog Kale 
90748949722SVinod Koul static struct sdw_master_runtime
90848949722SVinod Koul *sdw_find_master_rt(struct sdw_bus *bus,
90948949722SVinod Koul 		    struct sdw_stream_runtime *stream)
91048949722SVinod Koul {
9113a0be1a6SPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
91248949722SVinod Koul 
91348949722SVinod Koul 	/* Retrieve Bus handle if already available */
91448949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
91548949722SVinod Koul 		if (m_rt->bus == bus)
91648949722SVinod Koul 			return m_rt;
91748949722SVinod Koul 	}
91848949722SVinod Koul 
91948949722SVinod Koul 	return NULL;
92048949722SVinod Koul }
92148949722SVinod Koul 
92289e59053SSanyog Kale /**
92389e59053SSanyog Kale  * sdw_alloc_master_rt() - Allocates and initialize Master runtime handle
92489e59053SSanyog Kale  *
92589e59053SSanyog Kale  * @bus: SDW bus instance
92689e59053SSanyog Kale  * @stream_config: Stream configuration
92789e59053SSanyog Kale  * @stream: Stream runtime handle.
92889e59053SSanyog Kale  *
92989e59053SSanyog Kale  * This function is to be called with bus_lock held.
93089e59053SSanyog Kale  */
93189e59053SSanyog Kale static struct sdw_master_runtime
93289e59053SSanyog Kale *sdw_alloc_master_rt(struct sdw_bus *bus,
93389e59053SSanyog Kale 		     struct sdw_stream_config *stream_config,
93489e59053SSanyog Kale 		     struct sdw_stream_runtime *stream)
93589e59053SSanyog Kale {
93689e59053SSanyog Kale 	struct sdw_master_runtime *m_rt;
93789e59053SSanyog Kale 
93889e59053SSanyog Kale 	/*
93989e59053SSanyog Kale 	 * check if Master is already allocated (as a result of Slave adding
94089e59053SSanyog Kale 	 * it first), if so skip allocation and go to configure
94189e59053SSanyog Kale 	 */
94248949722SVinod Koul 	m_rt = sdw_find_master_rt(bus, stream);
94389e59053SSanyog Kale 	if (m_rt)
94489e59053SSanyog Kale 		goto stream_config;
94589e59053SSanyog Kale 
94689e59053SSanyog Kale 	m_rt = kzalloc(sizeof(*m_rt), GFP_KERNEL);
94789e59053SSanyog Kale 	if (!m_rt)
94889e59053SSanyog Kale 		return NULL;
94989e59053SSanyog Kale 
95089e59053SSanyog Kale 	/* Initialization of Master runtime handle */
951bbe7379dSSanyog Kale 	INIT_LIST_HEAD(&m_rt->port_list);
95289e59053SSanyog Kale 	INIT_LIST_HEAD(&m_rt->slave_rt_list);
95348949722SVinod Koul 	list_add_tail(&m_rt->stream_node, &stream->master_list);
95489e59053SSanyog Kale 
95589e59053SSanyog Kale 	list_add_tail(&m_rt->bus_node, &bus->m_rt_list);
95689e59053SSanyog Kale 
95789e59053SSanyog Kale stream_config:
95889e59053SSanyog Kale 	m_rt->ch_count = stream_config->ch_count;
95989e59053SSanyog Kale 	m_rt->bus = bus;
96089e59053SSanyog Kale 	m_rt->stream = stream;
96189e59053SSanyog Kale 	m_rt->direction = stream_config->direction;
96289e59053SSanyog Kale 
96389e59053SSanyog Kale 	return m_rt;
96489e59053SSanyog Kale }
96589e59053SSanyog Kale 
96689e59053SSanyog Kale /**
96789e59053SSanyog Kale  * sdw_alloc_slave_rt() - Allocate and initialize Slave runtime handle.
96889e59053SSanyog Kale  *
96989e59053SSanyog Kale  * @slave: Slave handle
97089e59053SSanyog Kale  * @stream_config: Stream configuration
97189e59053SSanyog Kale  * @stream: Stream runtime handle
97289e59053SSanyog Kale  *
97389e59053SSanyog Kale  * This function is to be called with bus_lock held.
97489e59053SSanyog Kale  */
97589e59053SSanyog Kale static struct sdw_slave_runtime
97689e59053SSanyog Kale *sdw_alloc_slave_rt(struct sdw_slave *slave,
97789e59053SSanyog Kale 		    struct sdw_stream_config *stream_config,
97889e59053SSanyog Kale 		    struct sdw_stream_runtime *stream)
97989e59053SSanyog Kale {
9803a0be1a6SPierre-Louis Bossart 	struct sdw_slave_runtime *s_rt;
98189e59053SSanyog Kale 
98289e59053SSanyog Kale 	s_rt = kzalloc(sizeof(*s_rt), GFP_KERNEL);
98389e59053SSanyog Kale 	if (!s_rt)
98489e59053SSanyog Kale 		return NULL;
98589e59053SSanyog Kale 
986bbe7379dSSanyog Kale 	INIT_LIST_HEAD(&s_rt->port_list);
98789e59053SSanyog Kale 	s_rt->ch_count = stream_config->ch_count;
98889e59053SSanyog Kale 	s_rt->direction = stream_config->direction;
98989e59053SSanyog Kale 	s_rt->slave = slave;
99089e59053SSanyog Kale 
99189e59053SSanyog Kale 	return s_rt;
99289e59053SSanyog Kale }
99389e59053SSanyog Kale 
994bbe7379dSSanyog Kale static void sdw_master_port_release(struct sdw_bus *bus,
995bbe7379dSSanyog Kale 				    struct sdw_master_runtime *m_rt)
996bbe7379dSSanyog Kale {
997bbe7379dSSanyog Kale 	struct sdw_port_runtime *p_rt, *_p_rt;
998bbe7379dSSanyog Kale 
9991fe74a5eSPierre-Louis Bossart 	list_for_each_entry_safe(p_rt, _p_rt, &m_rt->port_list, port_node) {
1000bbe7379dSSanyog Kale 		list_del(&p_rt->port_node);
1001bbe7379dSSanyog Kale 		kfree(p_rt);
1002bbe7379dSSanyog Kale 	}
1003bbe7379dSSanyog Kale }
1004bbe7379dSSanyog Kale 
1005bbe7379dSSanyog Kale static void sdw_slave_port_release(struct sdw_bus *bus,
1006bbe7379dSSanyog Kale 				   struct sdw_slave *slave,
1007bbe7379dSSanyog Kale 				   struct sdw_stream_runtime *stream)
1008bbe7379dSSanyog Kale {
1009bbe7379dSSanyog Kale 	struct sdw_port_runtime *p_rt, *_p_rt;
101048949722SVinod Koul 	struct sdw_master_runtime *m_rt;
1011bbe7379dSSanyog Kale 	struct sdw_slave_runtime *s_rt;
1012bbe7379dSSanyog Kale 
101348949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
1014bbe7379dSSanyog Kale 		list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
1015bbe7379dSSanyog Kale 			if (s_rt->slave != slave)
1016bbe7379dSSanyog Kale 				continue;
1017bbe7379dSSanyog Kale 
1018bbe7379dSSanyog Kale 			list_for_each_entry_safe(p_rt, _p_rt,
1019bbe7379dSSanyog Kale 						 &s_rt->port_list, port_node) {
1020bbe7379dSSanyog Kale 				list_del(&p_rt->port_node);
1021bbe7379dSSanyog Kale 				kfree(p_rt);
1022bbe7379dSSanyog Kale 			}
1023bbe7379dSSanyog Kale 		}
1024bbe7379dSSanyog Kale 	}
102548949722SVinod Koul }
1026bbe7379dSSanyog Kale 
102789e59053SSanyog Kale /**
102889e59053SSanyog Kale  * sdw_release_slave_stream() - Free Slave(s) runtime handle
102989e59053SSanyog Kale  *
103089e59053SSanyog Kale  * @slave: Slave handle.
103189e59053SSanyog Kale  * @stream: Stream runtime handle.
103289e59053SSanyog Kale  *
103389e59053SSanyog Kale  * This function is to be called with bus_lock held.
103489e59053SSanyog Kale  */
103589e59053SSanyog Kale static void sdw_release_slave_stream(struct sdw_slave *slave,
103689e59053SSanyog Kale 				     struct sdw_stream_runtime *stream)
103789e59053SSanyog Kale {
103889e59053SSanyog Kale 	struct sdw_slave_runtime *s_rt, *_s_rt;
103948949722SVinod Koul 	struct sdw_master_runtime *m_rt;
104089e59053SSanyog Kale 
104148949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
104289e59053SSanyog Kale 		/* Retrieve Slave runtime handle */
104389e59053SSanyog Kale 		list_for_each_entry_safe(s_rt, _s_rt,
104489e59053SSanyog Kale 					 &m_rt->slave_rt_list, m_rt_node) {
104589e59053SSanyog Kale 			if (s_rt->slave == slave) {
104689e59053SSanyog Kale 				list_del(&s_rt->m_rt_node);
104789e59053SSanyog Kale 				kfree(s_rt);
104889e59053SSanyog Kale 				return;
104989e59053SSanyog Kale 			}
105089e59053SSanyog Kale 		}
105189e59053SSanyog Kale 	}
105248949722SVinod Koul }
105389e59053SSanyog Kale 
105489e59053SSanyog Kale /**
105589e59053SSanyog Kale  * sdw_release_master_stream() - Free Master runtime handle
105689e59053SSanyog Kale  *
105748949722SVinod Koul  * @m_rt: Master runtime node
105889e59053SSanyog Kale  * @stream: Stream runtime handle.
105989e59053SSanyog Kale  *
106089e59053SSanyog Kale  * This function is to be called with bus_lock held
106189e59053SSanyog Kale  * It frees the Master runtime handle and associated Slave(s) runtime
106289e59053SSanyog Kale  * handle. If this is called first then sdw_release_slave_stream() will have
106389e59053SSanyog Kale  * no effect as Slave(s) runtime handle would already be freed up.
106489e59053SSanyog Kale  */
106548949722SVinod Koul static void sdw_release_master_stream(struct sdw_master_runtime *m_rt,
106648949722SVinod Koul 				      struct sdw_stream_runtime *stream)
106789e59053SSanyog Kale {
106889e59053SSanyog Kale 	struct sdw_slave_runtime *s_rt, *_s_rt;
106989e59053SSanyog Kale 
10708d6ccf5cSSanyog Kale 	list_for_each_entry_safe(s_rt, _s_rt, &m_rt->slave_rt_list, m_rt_node) {
10718d6ccf5cSSanyog Kale 		sdw_slave_port_release(s_rt->slave->bus, s_rt->slave, stream);
10728d6ccf5cSSanyog Kale 		sdw_release_slave_stream(s_rt->slave, stream);
10738d6ccf5cSSanyog Kale 	}
107489e59053SSanyog Kale 
107548949722SVinod Koul 	list_del(&m_rt->stream_node);
107689e59053SSanyog Kale 	list_del(&m_rt->bus_node);
107748949722SVinod Koul 	kfree(m_rt);
107889e59053SSanyog Kale }
107989e59053SSanyog Kale 
108089e59053SSanyog Kale /**
108189e59053SSanyog Kale  * sdw_stream_remove_master() - Remove master from sdw_stream
108289e59053SSanyog Kale  *
108389e59053SSanyog Kale  * @bus: SDW Bus instance
108489e59053SSanyog Kale  * @stream: SoundWire stream
108589e59053SSanyog Kale  *
1086bbe7379dSSanyog Kale  * This removes and frees port_rt and master_rt from a stream
108789e59053SSanyog Kale  */
108889e59053SSanyog Kale int sdw_stream_remove_master(struct sdw_bus *bus,
108989e59053SSanyog Kale 			     struct sdw_stream_runtime *stream)
109089e59053SSanyog Kale {
109148949722SVinod Koul 	struct sdw_master_runtime *m_rt, *_m_rt;
109248949722SVinod Koul 
109389e59053SSanyog Kale 	mutex_lock(&bus->bus_lock);
109489e59053SSanyog Kale 
109548949722SVinod Koul 	list_for_each_entry_safe(m_rt, _m_rt,
109648949722SVinod Koul 				 &stream->master_list, stream_node) {
109748949722SVinod Koul 		if (m_rt->bus != bus)
109848949722SVinod Koul 			continue;
109948949722SVinod Koul 
110048949722SVinod Koul 		sdw_master_port_release(bus, m_rt);
110148949722SVinod Koul 		sdw_release_master_stream(m_rt, stream);
1102ce6e74d0SShreyas NC 		stream->m_rt_count--;
110348949722SVinod Koul 	}
110448949722SVinod Koul 
110548949722SVinod Koul 	if (list_empty(&stream->master_list))
110689e59053SSanyog Kale 		stream->state = SDW_STREAM_RELEASED;
110789e59053SSanyog Kale 
110889e59053SSanyog Kale 	mutex_unlock(&bus->bus_lock);
110989e59053SSanyog Kale 
111089e59053SSanyog Kale 	return 0;
111189e59053SSanyog Kale }
111289e59053SSanyog Kale EXPORT_SYMBOL(sdw_stream_remove_master);
111389e59053SSanyog Kale 
111489e59053SSanyog Kale /**
111589e59053SSanyog Kale  * sdw_stream_remove_slave() - Remove slave from sdw_stream
111689e59053SSanyog Kale  *
111789e59053SSanyog Kale  * @slave: SDW Slave instance
111889e59053SSanyog Kale  * @stream: SoundWire stream
111989e59053SSanyog Kale  *
1120bbe7379dSSanyog Kale  * This removes and frees port_rt and slave_rt from a stream
112189e59053SSanyog Kale  */
112289e59053SSanyog Kale int sdw_stream_remove_slave(struct sdw_slave *slave,
112389e59053SSanyog Kale 			    struct sdw_stream_runtime *stream)
112489e59053SSanyog Kale {
112589e59053SSanyog Kale 	mutex_lock(&slave->bus->bus_lock);
112689e59053SSanyog Kale 
1127bbe7379dSSanyog Kale 	sdw_slave_port_release(slave->bus, slave, stream);
112889e59053SSanyog Kale 	sdw_release_slave_stream(slave, stream);
112989e59053SSanyog Kale 
113089e59053SSanyog Kale 	mutex_unlock(&slave->bus->bus_lock);
113189e59053SSanyog Kale 
113289e59053SSanyog Kale 	return 0;
113389e59053SSanyog Kale }
113489e59053SSanyog Kale EXPORT_SYMBOL(sdw_stream_remove_slave);
113589e59053SSanyog Kale 
113689e59053SSanyog Kale /**
113789e59053SSanyog Kale  * sdw_config_stream() - Configure the allocated stream
113889e59053SSanyog Kale  *
113989e59053SSanyog Kale  * @dev: SDW device
114089e59053SSanyog Kale  * @stream: SoundWire stream
114189e59053SSanyog Kale  * @stream_config: Stream configuration for audio stream
114289e59053SSanyog Kale  * @is_slave: is API called from Slave or Master
114389e59053SSanyog Kale  *
114489e59053SSanyog Kale  * This function is to be called with bus_lock held.
114589e59053SSanyog Kale  */
114689e59053SSanyog Kale static int sdw_config_stream(struct device *dev,
114789e59053SSanyog Kale 			     struct sdw_stream_runtime *stream,
11481fe74a5eSPierre-Louis Bossart 			     struct sdw_stream_config *stream_config,
11491fe74a5eSPierre-Louis Bossart 			     bool is_slave)
115089e59053SSanyog Kale {
115189e59053SSanyog Kale 	/*
115289e59053SSanyog Kale 	 * Update the stream rate, channel and bps based on data
115389e59053SSanyog Kale 	 * source. For more than one data source (multilink),
115489e59053SSanyog Kale 	 * match the rate, bps, stream type and increment number of channels.
115589e59053SSanyog Kale 	 *
115689e59053SSanyog Kale 	 * If rate/bps is zero, it means the values are not set, so skip
115789e59053SSanyog Kale 	 * comparison and allow the value to be set and stored in stream
115889e59053SSanyog Kale 	 */
115989e59053SSanyog Kale 	if (stream->params.rate &&
116089e59053SSanyog Kale 	    stream->params.rate != stream_config->frame_rate) {
116117ed5befSPierre-Louis Bossart 		dev_err(dev, "rate not matching, stream:%s\n", stream->name);
116289e59053SSanyog Kale 		return -EINVAL;
116389e59053SSanyog Kale 	}
116489e59053SSanyog Kale 
116589e59053SSanyog Kale 	if (stream->params.bps &&
116689e59053SSanyog Kale 	    stream->params.bps != stream_config->bps) {
116717ed5befSPierre-Louis Bossart 		dev_err(dev, "bps not matching, stream:%s\n", stream->name);
116889e59053SSanyog Kale 		return -EINVAL;
116989e59053SSanyog Kale 	}
117089e59053SSanyog Kale 
117189e59053SSanyog Kale 	stream->type = stream_config->type;
117289e59053SSanyog Kale 	stream->params.rate = stream_config->frame_rate;
117389e59053SSanyog Kale 	stream->params.bps = stream_config->bps;
117489e59053SSanyog Kale 
117589e59053SSanyog Kale 	/* TODO: Update this check during Device-device support */
117689e59053SSanyog Kale 	if (is_slave)
117789e59053SSanyog Kale 		stream->params.ch_count += stream_config->ch_count;
117889e59053SSanyog Kale 
117989e59053SSanyog Kale 	return 0;
118089e59053SSanyog Kale }
118189e59053SSanyog Kale 
1182bbe7379dSSanyog Kale static int sdw_is_valid_port_range(struct device *dev,
1183bbe7379dSSanyog Kale 				   struct sdw_port_runtime *p_rt)
1184bbe7379dSSanyog Kale {
1185bbe7379dSSanyog Kale 	if (!SDW_VALID_PORT_RANGE(p_rt->num)) {
1186bbe7379dSSanyog Kale 		dev_err(dev,
118717ed5befSPierre-Louis Bossart 			"SoundWire: Invalid port number :%d\n", p_rt->num);
1188bbe7379dSSanyog Kale 		return -EINVAL;
1189bbe7379dSSanyog Kale 	}
1190bbe7379dSSanyog Kale 
1191bbe7379dSSanyog Kale 	return 0;
1192bbe7379dSSanyog Kale }
1193bbe7379dSSanyog Kale 
11941fe74a5eSPierre-Louis Bossart static struct sdw_port_runtime
11951fe74a5eSPierre-Louis Bossart *sdw_port_alloc(struct device *dev,
1196bbe7379dSSanyog Kale 		struct sdw_port_config *port_config,
1197bbe7379dSSanyog Kale 		int port_index)
1198bbe7379dSSanyog Kale {
1199bbe7379dSSanyog Kale 	struct sdw_port_runtime *p_rt;
1200bbe7379dSSanyog Kale 
1201bbe7379dSSanyog Kale 	p_rt = kzalloc(sizeof(*p_rt), GFP_KERNEL);
1202bbe7379dSSanyog Kale 	if (!p_rt)
1203bbe7379dSSanyog Kale 		return NULL;
1204bbe7379dSSanyog Kale 
1205bbe7379dSSanyog Kale 	p_rt->ch_mask = port_config[port_index].ch_mask;
1206bbe7379dSSanyog Kale 	p_rt->num = port_config[port_index].num;
1207bbe7379dSSanyog Kale 
1208bbe7379dSSanyog Kale 	return p_rt;
1209bbe7379dSSanyog Kale }
1210bbe7379dSSanyog Kale 
1211bbe7379dSSanyog Kale static int sdw_master_port_config(struct sdw_bus *bus,
1212bbe7379dSSanyog Kale 				  struct sdw_master_runtime *m_rt,
1213bbe7379dSSanyog Kale 				  struct sdw_port_config *port_config,
1214bbe7379dSSanyog Kale 				  unsigned int num_ports)
1215bbe7379dSSanyog Kale {
1216bbe7379dSSanyog Kale 	struct sdw_port_runtime *p_rt;
1217bbe7379dSSanyog Kale 	int i;
1218bbe7379dSSanyog Kale 
1219bbe7379dSSanyog Kale 	/* Iterate for number of ports to perform initialization */
1220bbe7379dSSanyog Kale 	for (i = 0; i < num_ports; i++) {
1221bbe7379dSSanyog Kale 		p_rt = sdw_port_alloc(bus->dev, port_config, i);
1222bbe7379dSSanyog Kale 		if (!p_rt)
1223bbe7379dSSanyog Kale 			return -ENOMEM;
1224bbe7379dSSanyog Kale 
1225bbe7379dSSanyog Kale 		/*
1226bbe7379dSSanyog Kale 		 * TODO: Check port capabilities for requested
1227bbe7379dSSanyog Kale 		 * configuration (audio mode support)
1228bbe7379dSSanyog Kale 		 */
1229bbe7379dSSanyog Kale 
1230bbe7379dSSanyog Kale 		list_add_tail(&p_rt->port_node, &m_rt->port_list);
1231bbe7379dSSanyog Kale 	}
1232bbe7379dSSanyog Kale 
1233bbe7379dSSanyog Kale 	return 0;
1234bbe7379dSSanyog Kale }
1235bbe7379dSSanyog Kale 
1236bbe7379dSSanyog Kale static int sdw_slave_port_config(struct sdw_slave *slave,
1237bbe7379dSSanyog Kale 				 struct sdw_slave_runtime *s_rt,
1238bbe7379dSSanyog Kale 				 struct sdw_port_config *port_config,
1239bbe7379dSSanyog Kale 				 unsigned int num_config)
1240bbe7379dSSanyog Kale {
1241bbe7379dSSanyog Kale 	struct sdw_port_runtime *p_rt;
1242bbe7379dSSanyog Kale 	int i, ret;
1243bbe7379dSSanyog Kale 
1244bbe7379dSSanyog Kale 	/* Iterate for number of ports to perform initialization */
1245bbe7379dSSanyog Kale 	for (i = 0; i < num_config; i++) {
1246bbe7379dSSanyog Kale 		p_rt = sdw_port_alloc(&slave->dev, port_config, i);
1247bbe7379dSSanyog Kale 		if (!p_rt)
1248bbe7379dSSanyog Kale 			return -ENOMEM;
1249bbe7379dSSanyog Kale 
1250bbe7379dSSanyog Kale 		/*
1251bbe7379dSSanyog Kale 		 * TODO: Check valid port range as defined by DisCo/
1252bbe7379dSSanyog Kale 		 * slave
1253bbe7379dSSanyog Kale 		 */
1254bbe7379dSSanyog Kale 		ret = sdw_is_valid_port_range(&slave->dev, p_rt);
1255bbe7379dSSanyog Kale 		if (ret < 0) {
1256bbe7379dSSanyog Kale 			kfree(p_rt);
1257bbe7379dSSanyog Kale 			return ret;
1258bbe7379dSSanyog Kale 		}
1259bbe7379dSSanyog Kale 
1260bbe7379dSSanyog Kale 		/*
1261bbe7379dSSanyog Kale 		 * TODO: Check port capabilities for requested
1262bbe7379dSSanyog Kale 		 * configuration (audio mode support)
1263bbe7379dSSanyog Kale 		 */
1264bbe7379dSSanyog Kale 
1265bbe7379dSSanyog Kale 		list_add_tail(&p_rt->port_node, &s_rt->port_list);
1266bbe7379dSSanyog Kale 	}
1267bbe7379dSSanyog Kale 
1268bbe7379dSSanyog Kale 	return 0;
1269bbe7379dSSanyog Kale }
1270bbe7379dSSanyog Kale 
127189e59053SSanyog Kale /**
127289e59053SSanyog Kale  * sdw_stream_add_master() - Allocate and add master runtime to a stream
127389e59053SSanyog Kale  *
127489e59053SSanyog Kale  * @bus: SDW Bus instance
127589e59053SSanyog Kale  * @stream_config: Stream configuration for audio stream
1276bbe7379dSSanyog Kale  * @port_config: Port configuration for audio stream
1277bbe7379dSSanyog Kale  * @num_ports: Number of ports
127889e59053SSanyog Kale  * @stream: SoundWire stream
127989e59053SSanyog Kale  */
128089e59053SSanyog Kale int sdw_stream_add_master(struct sdw_bus *bus,
128189e59053SSanyog Kale 			  struct sdw_stream_config *stream_config,
1282bbe7379dSSanyog Kale 			  struct sdw_port_config *port_config,
1283bbe7379dSSanyog Kale 			  unsigned int num_ports,
128489e59053SSanyog Kale 			  struct sdw_stream_runtime *stream)
128589e59053SSanyog Kale {
12863a0be1a6SPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
128789e59053SSanyog Kale 	int ret;
128889e59053SSanyog Kale 
128989e59053SSanyog Kale 	mutex_lock(&bus->bus_lock);
129089e59053SSanyog Kale 
1291ce6e74d0SShreyas NC 	/*
1292ce6e74d0SShreyas NC 	 * For multi link streams, add the second master only if
1293ce6e74d0SShreyas NC 	 * the bus supports it.
1294ce6e74d0SShreyas NC 	 * Check if bus->multi_link is set
1295ce6e74d0SShreyas NC 	 */
1296ce6e74d0SShreyas NC 	if (!bus->multi_link && stream->m_rt_count > 0) {
1297ce6e74d0SShreyas NC 		dev_err(bus->dev,
129817ed5befSPierre-Louis Bossart 			"Multilink not supported, link %d\n", bus->link_id);
1299ce6e74d0SShreyas NC 		ret = -EINVAL;
1300ce6e74d0SShreyas NC 		goto unlock;
1301ce6e74d0SShreyas NC 	}
1302ce6e74d0SShreyas NC 
130389e59053SSanyog Kale 	m_rt = sdw_alloc_master_rt(bus, stream_config, stream);
130489e59053SSanyog Kale 	if (!m_rt) {
130589e59053SSanyog Kale 		dev_err(bus->dev,
130617ed5befSPierre-Louis Bossart 			"Master runtime config failed for stream:%s\n",
130789e59053SSanyog Kale 			stream->name);
130889e59053SSanyog Kale 		ret = -ENOMEM;
13093fef1a22SShreyas NC 		goto unlock;
131089e59053SSanyog Kale 	}
131189e59053SSanyog Kale 
131289e59053SSanyog Kale 	ret = sdw_config_stream(bus->dev, stream, stream_config, false);
131389e59053SSanyog Kale 	if (ret)
131489e59053SSanyog Kale 		goto stream_error;
131589e59053SSanyog Kale 
1316bbe7379dSSanyog Kale 	ret = sdw_master_port_config(bus, m_rt, port_config, num_ports);
1317bbe7379dSSanyog Kale 	if (ret)
1318bbe7379dSSanyog Kale 		goto stream_error;
1319bbe7379dSSanyog Kale 
1320ce6e74d0SShreyas NC 	stream->m_rt_count++;
1321ce6e74d0SShreyas NC 
13223fef1a22SShreyas NC 	goto unlock;
13233fef1a22SShreyas NC 
132489e59053SSanyog Kale stream_error:
132548949722SVinod Koul 	sdw_release_master_stream(m_rt, stream);
13263fef1a22SShreyas NC unlock:
132789e59053SSanyog Kale 	mutex_unlock(&bus->bus_lock);
132889e59053SSanyog Kale 	return ret;
132989e59053SSanyog Kale }
133089e59053SSanyog Kale EXPORT_SYMBOL(sdw_stream_add_master);
133189e59053SSanyog Kale 
133289e59053SSanyog Kale /**
133389e59053SSanyog Kale  * sdw_stream_add_slave() - Allocate and add master/slave runtime to a stream
133489e59053SSanyog Kale  *
133589e59053SSanyog Kale  * @slave: SDW Slave instance
133689e59053SSanyog Kale  * @stream_config: Stream configuration for audio stream
133789e59053SSanyog Kale  * @stream: SoundWire stream
1338bbe7379dSSanyog Kale  * @port_config: Port configuration for audio stream
1339bbe7379dSSanyog Kale  * @num_ports: Number of ports
13400aebe40bSShreyas NC  *
13410aebe40bSShreyas NC  * It is expected that Slave is added before adding Master
13420aebe40bSShreyas NC  * to the Stream.
13430aebe40bSShreyas NC  *
134489e59053SSanyog Kale  */
134589e59053SSanyog Kale int sdw_stream_add_slave(struct sdw_slave *slave,
134689e59053SSanyog Kale 			 struct sdw_stream_config *stream_config,
1347bbe7379dSSanyog Kale 			 struct sdw_port_config *port_config,
1348bbe7379dSSanyog Kale 			 unsigned int num_ports,
134989e59053SSanyog Kale 			 struct sdw_stream_runtime *stream)
135089e59053SSanyog Kale {
135189e59053SSanyog Kale 	struct sdw_slave_runtime *s_rt;
135289e59053SSanyog Kale 	struct sdw_master_runtime *m_rt;
135389e59053SSanyog Kale 	int ret;
135489e59053SSanyog Kale 
135589e59053SSanyog Kale 	mutex_lock(&slave->bus->bus_lock);
135689e59053SSanyog Kale 
135789e59053SSanyog Kale 	/*
135889e59053SSanyog Kale 	 * If this API is invoked by Slave first then m_rt is not valid.
135989e59053SSanyog Kale 	 * So, allocate m_rt and add Slave to it.
136089e59053SSanyog Kale 	 */
136189e59053SSanyog Kale 	m_rt = sdw_alloc_master_rt(slave->bus, stream_config, stream);
136289e59053SSanyog Kale 	if (!m_rt) {
136389e59053SSanyog Kale 		dev_err(&slave->dev,
136417ed5befSPierre-Louis Bossart 			"alloc master runtime failed for stream:%s\n",
136589e59053SSanyog Kale 			stream->name);
136689e59053SSanyog Kale 		ret = -ENOMEM;
136789e59053SSanyog Kale 		goto error;
136889e59053SSanyog Kale 	}
136989e59053SSanyog Kale 
137089e59053SSanyog Kale 	s_rt = sdw_alloc_slave_rt(slave, stream_config, stream);
137189e59053SSanyog Kale 	if (!s_rt) {
137289e59053SSanyog Kale 		dev_err(&slave->dev,
137317ed5befSPierre-Louis Bossart 			"Slave runtime config failed for stream:%s\n",
137489e59053SSanyog Kale 			stream->name);
137589e59053SSanyog Kale 		ret = -ENOMEM;
137689e59053SSanyog Kale 		goto stream_error;
137789e59053SSanyog Kale 	}
137889e59053SSanyog Kale 
137989e59053SSanyog Kale 	ret = sdw_config_stream(&slave->dev, stream, stream_config, true);
138048f17f96SRander Wang 	if (ret) {
138148f17f96SRander Wang 		/*
138248f17f96SRander Wang 		 * sdw_release_master_stream will release s_rt in slave_rt_list in
138348f17f96SRander Wang 		 * stream_error case, but s_rt is only added to slave_rt_list
138448f17f96SRander Wang 		 * when sdw_config_stream is successful, so free s_rt explicitly
138548f17f96SRander Wang 		 * when sdw_config_stream is failed.
138648f17f96SRander Wang 		 */
138748f17f96SRander Wang 		kfree(s_rt);
138889e59053SSanyog Kale 		goto stream_error;
138948f17f96SRander Wang 	}
139089e59053SSanyog Kale 
139189e59053SSanyog Kale 	list_add_tail(&s_rt->m_rt_node, &m_rt->slave_rt_list);
139289e59053SSanyog Kale 
1393bbe7379dSSanyog Kale 	ret = sdw_slave_port_config(slave, s_rt, port_config, num_ports);
1394bbe7379dSSanyog Kale 	if (ret)
1395bbe7379dSSanyog Kale 		goto stream_error;
1396bbe7379dSSanyog Kale 
13970aebe40bSShreyas NC 	/*
13980aebe40bSShreyas NC 	 * Change stream state to CONFIGURED on first Slave add.
13990aebe40bSShreyas NC 	 * Bus is not aware of number of Slave(s) in a stream at this
14000aebe40bSShreyas NC 	 * point so cannot depend on all Slave(s) to be added in order to
14010aebe40bSShreyas NC 	 * change stream state to CONFIGURED.
14020aebe40bSShreyas NC 	 */
140389e59053SSanyog Kale 	stream->state = SDW_STREAM_CONFIGURED;
140489e59053SSanyog Kale 	goto error;
140589e59053SSanyog Kale 
140689e59053SSanyog Kale stream_error:
140789e59053SSanyog Kale 	/*
140889e59053SSanyog Kale 	 * we hit error so cleanup the stream, release all Slave(s) and
140989e59053SSanyog Kale 	 * Master runtime
141089e59053SSanyog Kale 	 */
141148949722SVinod Koul 	sdw_release_master_stream(m_rt, stream);
141289e59053SSanyog Kale error:
141389e59053SSanyog Kale 	mutex_unlock(&slave->bus->bus_lock);
141489e59053SSanyog Kale 	return ret;
141589e59053SSanyog Kale }
141689e59053SSanyog Kale EXPORT_SYMBOL(sdw_stream_add_slave);
1417f8101c74SSanyog Kale 
1418f8101c74SSanyog Kale /**
1419f8101c74SSanyog Kale  * sdw_get_slave_dpn_prop() - Get Slave port capabilities
1420f8101c74SSanyog Kale  *
1421f8101c74SSanyog Kale  * @slave: Slave handle
1422f8101c74SSanyog Kale  * @direction: Data direction.
1423f8101c74SSanyog Kale  * @port_num: Port number
1424f8101c74SSanyog Kale  */
1425f8101c74SSanyog Kale struct sdw_dpn_prop *sdw_get_slave_dpn_prop(struct sdw_slave *slave,
1426f8101c74SSanyog Kale 					    enum sdw_data_direction direction,
1427f8101c74SSanyog Kale 					    unsigned int port_num)
1428f8101c74SSanyog Kale {
1429f8101c74SSanyog Kale 	struct sdw_dpn_prop *dpn_prop;
1430f8101c74SSanyog Kale 	u8 num_ports;
1431f8101c74SSanyog Kale 	int i;
1432f8101c74SSanyog Kale 
1433f8101c74SSanyog Kale 	if (direction == SDW_DATA_DIR_TX) {
1434f8101c74SSanyog Kale 		num_ports = hweight32(slave->prop.source_ports);
1435f8101c74SSanyog Kale 		dpn_prop = slave->prop.src_dpn_prop;
1436f8101c74SSanyog Kale 	} else {
1437f8101c74SSanyog Kale 		num_ports = hweight32(slave->prop.sink_ports);
1438f8101c74SSanyog Kale 		dpn_prop = slave->prop.sink_dpn_prop;
1439f8101c74SSanyog Kale 	}
1440f8101c74SSanyog Kale 
1441f8101c74SSanyog Kale 	for (i = 0; i < num_ports; i++) {
144203ecad90SSrinivas Kandagatla 		if (dpn_prop[i].num == port_num)
1443f8101c74SSanyog Kale 			return &dpn_prop[i];
1444f8101c74SSanyog Kale 	}
1445f8101c74SSanyog Kale 
1446f8101c74SSanyog Kale 	return NULL;
1447f8101c74SSanyog Kale }
14485c3eb9f7SSanyog Kale 
14490c4a1049SSanyog Kale /**
14500c4a1049SSanyog Kale  * sdw_acquire_bus_lock: Acquire bus lock for all Master runtime(s)
14510c4a1049SSanyog Kale  *
14520c4a1049SSanyog Kale  * @stream: SoundWire stream
14530c4a1049SSanyog Kale  *
14540c4a1049SSanyog Kale  * Acquire bus_lock for each of the master runtime(m_rt) part of this
14550c4a1049SSanyog Kale  * stream to reconfigure the bus.
14560c4a1049SSanyog Kale  * NOTE: This function is called from SoundWire stream ops and is
14570c4a1049SSanyog Kale  * expected that a global lock is held before acquiring bus_lock.
14580c4a1049SSanyog Kale  */
14590c4a1049SSanyog Kale static void sdw_acquire_bus_lock(struct sdw_stream_runtime *stream)
14600c4a1049SSanyog Kale {
14613a0be1a6SPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
146253e0a304SPierre-Louis Bossart 	struct sdw_bus *bus;
14630c4a1049SSanyog Kale 
14640c4a1049SSanyog Kale 	/* Iterate for all Master(s) in Master list */
14650c4a1049SSanyog Kale 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
14660c4a1049SSanyog Kale 		bus = m_rt->bus;
14670c4a1049SSanyog Kale 
14680c4a1049SSanyog Kale 		mutex_lock(&bus->bus_lock);
14690c4a1049SSanyog Kale 	}
14700c4a1049SSanyog Kale }
14710c4a1049SSanyog Kale 
14720c4a1049SSanyog Kale /**
14730c4a1049SSanyog Kale  * sdw_release_bus_lock: Release bus lock for all Master runtime(s)
14740c4a1049SSanyog Kale  *
14750c4a1049SSanyog Kale  * @stream: SoundWire stream
14760c4a1049SSanyog Kale  *
14770c4a1049SSanyog Kale  * Release the previously held bus_lock after reconfiguring the bus.
147848949722SVinod Koul  * NOTE: This function is called from SoundWire stream ops and is
147948949722SVinod Koul  * expected that a global lock is held before releasing bus_lock.
14800c4a1049SSanyog Kale  */
14810c4a1049SSanyog Kale static void sdw_release_bus_lock(struct sdw_stream_runtime *stream)
14820c4a1049SSanyog Kale {
14835920a29dSPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
148453e0a304SPierre-Louis Bossart 	struct sdw_bus *bus;
14850c4a1049SSanyog Kale 
14860c4a1049SSanyog Kale 	/* Iterate for all Master(s) in Master list */
14870c4a1049SSanyog Kale 	list_for_each_entry_reverse(m_rt, &stream->master_list, stream_node) {
14880c4a1049SSanyog Kale 		bus = m_rt->bus;
14890c4a1049SSanyog Kale 		mutex_unlock(&bus->bus_lock);
14900c4a1049SSanyog Kale 	}
14910c4a1049SSanyog Kale }
14920c4a1049SSanyog Kale 
1493c7a8f049SPierre-Louis Bossart static int _sdw_prepare_stream(struct sdw_stream_runtime *stream,
1494c7a8f049SPierre-Louis Bossart 			       bool update_params)
14955c3eb9f7SSanyog Kale {
14963a0be1a6SPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
149748949722SVinod Koul 	struct sdw_bus *bus = NULL;
14983a0be1a6SPierre-Louis Bossart 	struct sdw_master_prop *prop;
14995c3eb9f7SSanyog Kale 	struct sdw_bus_params params;
15005c3eb9f7SSanyog Kale 	int ret;
15015c3eb9f7SSanyog Kale 
150248949722SVinod Koul 	/* Prepare  Master(s) and Slave(s) port(s) associated with stream */
150348949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
150448949722SVinod Koul 		bus = m_rt->bus;
15055c3eb9f7SSanyog Kale 		prop = &bus->prop;
15065c3eb9f7SSanyog Kale 		memcpy(&params, &bus->params, sizeof(params));
15075c3eb9f7SSanyog Kale 
15085c3eb9f7SSanyog Kale 		/* TODO: Support Asynchronous mode */
15093424305bSPierre-Louis Bossart 		if ((prop->max_clk_freq % stream->params.rate) != 0) {
151017ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Async mode not supported\n");
15115c3eb9f7SSanyog Kale 			return -EINVAL;
15125c3eb9f7SSanyog Kale 		}
15135c3eb9f7SSanyog Kale 
1514c7a8f049SPierre-Louis Bossart 		if (!update_params)
1515c7a8f049SPierre-Louis Bossart 			goto program_params;
1516c7a8f049SPierre-Louis Bossart 
15175c3eb9f7SSanyog Kale 		/* Increment cumulative bus bandwidth */
15185c3eb9f7SSanyog Kale 		/* TODO: Update this during Device-Device support */
15195c3eb9f7SSanyog Kale 		bus->params.bandwidth += m_rt->stream->params.rate *
15205c3eb9f7SSanyog Kale 			m_rt->ch_count * m_rt->stream->params.bps;
15215c3eb9f7SSanyog Kale 
1522c7578c1dSVinod Koul 		/* Compute params */
1523c7578c1dSVinod Koul 		if (bus->compute_params) {
1524c7578c1dSVinod Koul 			ret = bus->compute_params(bus);
1525c7578c1dSVinod Koul 			if (ret < 0) {
15266122d3beSPierre-Louis Bossart 				dev_err(bus->dev, "Compute params failed: %d\n",
1527c7578c1dSVinod Koul 					ret);
1528c7578c1dSVinod Koul 				return ret;
1529c7578c1dSVinod Koul 			}
1530c7578c1dSVinod Koul 		}
1531c7578c1dSVinod Koul 
1532c7a8f049SPierre-Louis Bossart program_params:
15335c3eb9f7SSanyog Kale 		/* Program params */
1534bfaa3549SRander Wang 		ret = sdw_program_params(bus, true);
15355c3eb9f7SSanyog Kale 		if (ret < 0) {
153617ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Program params failed: %d\n", ret);
15375c3eb9f7SSanyog Kale 			goto restore_params;
15385c3eb9f7SSanyog Kale 		}
153948949722SVinod Koul 	}
154048949722SVinod Koul 
15413a0be1a6SPierre-Louis Bossart 	if (!bus) {
15423a0be1a6SPierre-Louis Bossart 		pr_err("Configuration error in %s\n", __func__);
15433a0be1a6SPierre-Louis Bossart 		return -EINVAL;
15443a0be1a6SPierre-Louis Bossart 	}
15453a0be1a6SPierre-Louis Bossart 
15465c3eb9f7SSanyog Kale 	ret = do_bank_switch(stream);
15475c3eb9f7SSanyog Kale 	if (ret < 0) {
154817ed5befSPierre-Louis Bossart 		dev_err(bus->dev, "Bank switch failed: %d\n", ret);
15495c3eb9f7SSanyog Kale 		goto restore_params;
15505c3eb9f7SSanyog Kale 	}
15515c3eb9f7SSanyog Kale 
155248949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
155348949722SVinod Koul 		bus = m_rt->bus;
155448949722SVinod Koul 
15555c3eb9f7SSanyog Kale 		/* Prepare port(s) on the new clock configuration */
15565c3eb9f7SSanyog Kale 		ret = sdw_prep_deprep_ports(m_rt, true);
15575c3eb9f7SSanyog Kale 		if (ret < 0) {
155817ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Prepare port(s) failed ret = %d\n",
15595c3eb9f7SSanyog Kale 				ret);
15605c3eb9f7SSanyog Kale 			return ret;
15615c3eb9f7SSanyog Kale 		}
156248949722SVinod Koul 	}
15635c3eb9f7SSanyog Kale 
15645c3eb9f7SSanyog Kale 	stream->state = SDW_STREAM_PREPARED;
15655c3eb9f7SSanyog Kale 
15665c3eb9f7SSanyog Kale 	return ret;
15675c3eb9f7SSanyog Kale 
15685c3eb9f7SSanyog Kale restore_params:
15695c3eb9f7SSanyog Kale 	memcpy(&bus->params, &params, sizeof(params));
15705c3eb9f7SSanyog Kale 	return ret;
15715c3eb9f7SSanyog Kale }
15725c3eb9f7SSanyog Kale 
15735c3eb9f7SSanyog Kale /**
15745c3eb9f7SSanyog Kale  * sdw_prepare_stream() - Prepare SoundWire stream
15755c3eb9f7SSanyog Kale  *
15765c3eb9f7SSanyog Kale  * @stream: Soundwire stream
15775c3eb9f7SSanyog Kale  *
157834962fb8SMauro Carvalho Chehab  * Documentation/driver-api/soundwire/stream.rst explains this API in detail
15795c3eb9f7SSanyog Kale  */
15805c3eb9f7SSanyog Kale int sdw_prepare_stream(struct sdw_stream_runtime *stream)
15815c3eb9f7SSanyog Kale {
1582c7a8f049SPierre-Louis Bossart 	bool update_params = true;
1583c32464c9SBard Liao 	int ret;
15845c3eb9f7SSanyog Kale 
15855c3eb9f7SSanyog Kale 	if (!stream) {
158617ed5befSPierre-Louis Bossart 		pr_err("SoundWire: Handle not found for stream\n");
15875c3eb9f7SSanyog Kale 		return -EINVAL;
15885c3eb9f7SSanyog Kale 	}
15895c3eb9f7SSanyog Kale 
159048949722SVinod Koul 	sdw_acquire_bus_lock(stream);
15915c3eb9f7SSanyog Kale 
1592c32464c9SBard Liao 	if (stream->state == SDW_STREAM_PREPARED) {
1593c32464c9SBard Liao 		ret = 0;
1594c32464c9SBard Liao 		goto state_err;
1595c32464c9SBard Liao 	}
1596c32464c9SBard Liao 
159759528807SPierre-Louis Bossart 	if (stream->state != SDW_STREAM_CONFIGURED &&
159859528807SPierre-Louis Bossart 	    stream->state != SDW_STREAM_DEPREPARED &&
159959528807SPierre-Louis Bossart 	    stream->state != SDW_STREAM_DISABLED) {
160059528807SPierre-Louis Bossart 		pr_err("%s: %s: inconsistent state state %d\n",
160159528807SPierre-Louis Bossart 		       __func__, stream->name, stream->state);
160259528807SPierre-Louis Bossart 		ret = -EINVAL;
160359528807SPierre-Louis Bossart 		goto state_err;
160459528807SPierre-Louis Bossart 	}
160559528807SPierre-Louis Bossart 
1606c7a8f049SPierre-Louis Bossart 	/*
1607c7a8f049SPierre-Louis Bossart 	 * when the stream is DISABLED, this means sdw_prepare_stream()
1608c7a8f049SPierre-Louis Bossart 	 * is called as a result of an underflow or a resume operation.
1609c7a8f049SPierre-Louis Bossart 	 * In this case, the bus parameters shall not be recomputed, but
1610c7a8f049SPierre-Louis Bossart 	 * still need to be re-applied
1611c7a8f049SPierre-Louis Bossart 	 */
1612c7a8f049SPierre-Louis Bossart 	if (stream->state == SDW_STREAM_DISABLED)
1613c7a8f049SPierre-Louis Bossart 		update_params = false;
1614c7a8f049SPierre-Louis Bossart 
1615c7a8f049SPierre-Louis Bossart 	ret = _sdw_prepare_stream(stream, update_params);
16165c3eb9f7SSanyog Kale 
161759528807SPierre-Louis Bossart state_err:
161848949722SVinod Koul 	sdw_release_bus_lock(stream);
16195c3eb9f7SSanyog Kale 	return ret;
16205c3eb9f7SSanyog Kale }
16215c3eb9f7SSanyog Kale EXPORT_SYMBOL(sdw_prepare_stream);
16225c3eb9f7SSanyog Kale 
16235c3eb9f7SSanyog Kale static int _sdw_enable_stream(struct sdw_stream_runtime *stream)
16245c3eb9f7SSanyog Kale {
16253a0be1a6SPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
162648949722SVinod Koul 	struct sdw_bus *bus = NULL;
16275c3eb9f7SSanyog Kale 	int ret;
16285c3eb9f7SSanyog Kale 
162948949722SVinod Koul 	/* Enable Master(s) and Slave(s) port(s) associated with stream */
163048949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
163148949722SVinod Koul 		bus = m_rt->bus;
163248949722SVinod Koul 
16335c3eb9f7SSanyog Kale 		/* Program params */
1634bfaa3549SRander Wang 		ret = sdw_program_params(bus, false);
16355c3eb9f7SSanyog Kale 		if (ret < 0) {
163617ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Program params failed: %d\n", ret);
16375c3eb9f7SSanyog Kale 			return ret;
16385c3eb9f7SSanyog Kale 		}
16395c3eb9f7SSanyog Kale 
16405c3eb9f7SSanyog Kale 		/* Enable port(s) */
16415c3eb9f7SSanyog Kale 		ret = sdw_enable_disable_ports(m_rt, true);
16425c3eb9f7SSanyog Kale 		if (ret < 0) {
164362f0cec3SVinod Koul 			dev_err(bus->dev,
164462f0cec3SVinod Koul 				"Enable port(s) failed ret: %d\n", ret);
16455c3eb9f7SSanyog Kale 			return ret;
16465c3eb9f7SSanyog Kale 		}
164748949722SVinod Koul 	}
16485c3eb9f7SSanyog Kale 
16493a0be1a6SPierre-Louis Bossart 	if (!bus) {
16503a0be1a6SPierre-Louis Bossart 		pr_err("Configuration error in %s\n", __func__);
16513a0be1a6SPierre-Louis Bossart 		return -EINVAL;
16523a0be1a6SPierre-Louis Bossart 	}
16533a0be1a6SPierre-Louis Bossart 
16545c3eb9f7SSanyog Kale 	ret = do_bank_switch(stream);
16555c3eb9f7SSanyog Kale 	if (ret < 0) {
165617ed5befSPierre-Louis Bossart 		dev_err(bus->dev, "Bank switch failed: %d\n", ret);
16575c3eb9f7SSanyog Kale 		return ret;
16585c3eb9f7SSanyog Kale 	}
16595c3eb9f7SSanyog Kale 
16605c3eb9f7SSanyog Kale 	stream->state = SDW_STREAM_ENABLED;
16615c3eb9f7SSanyog Kale 	return 0;
16625c3eb9f7SSanyog Kale }
16635c3eb9f7SSanyog Kale 
16645c3eb9f7SSanyog Kale /**
16655c3eb9f7SSanyog Kale  * sdw_enable_stream() - Enable SoundWire stream
16665c3eb9f7SSanyog Kale  *
16675c3eb9f7SSanyog Kale  * @stream: Soundwire stream
16685c3eb9f7SSanyog Kale  *
166934962fb8SMauro Carvalho Chehab  * Documentation/driver-api/soundwire/stream.rst explains this API in detail
16705c3eb9f7SSanyog Kale  */
16715c3eb9f7SSanyog Kale int sdw_enable_stream(struct sdw_stream_runtime *stream)
16725c3eb9f7SSanyog Kale {
16733a0be1a6SPierre-Louis Bossart 	int ret;
16745c3eb9f7SSanyog Kale 
16755c3eb9f7SSanyog Kale 	if (!stream) {
167617ed5befSPierre-Louis Bossart 		pr_err("SoundWire: Handle not found for stream\n");
16775c3eb9f7SSanyog Kale 		return -EINVAL;
16785c3eb9f7SSanyog Kale 	}
16795c3eb9f7SSanyog Kale 
168048949722SVinod Koul 	sdw_acquire_bus_lock(stream);
16815c3eb9f7SSanyog Kale 
168259528807SPierre-Louis Bossart 	if (stream->state != SDW_STREAM_PREPARED &&
168359528807SPierre-Louis Bossart 	    stream->state != SDW_STREAM_DISABLED) {
168459528807SPierre-Louis Bossart 		pr_err("%s: %s: inconsistent state state %d\n",
168559528807SPierre-Louis Bossart 		       __func__, stream->name, stream->state);
168659528807SPierre-Louis Bossart 		ret = -EINVAL;
168759528807SPierre-Louis Bossart 		goto state_err;
168859528807SPierre-Louis Bossart 	}
168959528807SPierre-Louis Bossart 
16905c3eb9f7SSanyog Kale 	ret = _sdw_enable_stream(stream);
16915c3eb9f7SSanyog Kale 
169259528807SPierre-Louis Bossart state_err:
169348949722SVinod Koul 	sdw_release_bus_lock(stream);
16945c3eb9f7SSanyog Kale 	return ret;
16955c3eb9f7SSanyog Kale }
16965c3eb9f7SSanyog Kale EXPORT_SYMBOL(sdw_enable_stream);
16975c3eb9f7SSanyog Kale 
16985c3eb9f7SSanyog Kale static int _sdw_disable_stream(struct sdw_stream_runtime *stream)
16995c3eb9f7SSanyog Kale {
17003a0be1a6SPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
17015c3eb9f7SSanyog Kale 	int ret;
17025c3eb9f7SSanyog Kale 
170348949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
17043a0be1a6SPierre-Louis Bossart 		struct sdw_bus *bus = m_rt->bus;
17053a0be1a6SPierre-Louis Bossart 
17065c3eb9f7SSanyog Kale 		/* Disable port(s) */
17075c3eb9f7SSanyog Kale 		ret = sdw_enable_disable_ports(m_rt, false);
17085c3eb9f7SSanyog Kale 		if (ret < 0) {
170917ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
17105c3eb9f7SSanyog Kale 			return ret;
17115c3eb9f7SSanyog Kale 		}
171248949722SVinod Koul 	}
17135c3eb9f7SSanyog Kale 	stream->state = SDW_STREAM_DISABLED;
17145c3eb9f7SSanyog Kale 
171548949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
17163a0be1a6SPierre-Louis Bossart 		struct sdw_bus *bus = m_rt->bus;
17173a0be1a6SPierre-Louis Bossart 
17185c3eb9f7SSanyog Kale 		/* Program params */
1719bfaa3549SRander Wang 		ret = sdw_program_params(bus, false);
17205c3eb9f7SSanyog Kale 		if (ret < 0) {
172117ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Program params failed: %d\n", ret);
17225c3eb9f7SSanyog Kale 			return ret;
17235c3eb9f7SSanyog Kale 		}
172448949722SVinod Koul 	}
17255c3eb9f7SSanyog Kale 
1726e0279b6bSPierre-Louis Bossart 	ret = do_bank_switch(stream);
1727e0279b6bSPierre-Louis Bossart 	if (ret < 0) {
17283a0be1a6SPierre-Louis Bossart 		pr_err("Bank switch failed: %d\n", ret);
1729e0279b6bSPierre-Louis Bossart 		return ret;
1730e0279b6bSPierre-Louis Bossart 	}
1731e0279b6bSPierre-Louis Bossart 
1732e0279b6bSPierre-Louis Bossart 	/* make sure alternate bank (previous current) is also disabled */
1733e0279b6bSPierre-Louis Bossart 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
17343a0be1a6SPierre-Louis Bossart 		struct sdw_bus *bus = m_rt->bus;
17353a0be1a6SPierre-Louis Bossart 
1736e0279b6bSPierre-Louis Bossart 		/* Disable port(s) */
1737e0279b6bSPierre-Louis Bossart 		ret = sdw_enable_disable_ports(m_rt, false);
1738e0279b6bSPierre-Louis Bossart 		if (ret < 0) {
1739e0279b6bSPierre-Louis Bossart 			dev_err(bus->dev, "Disable port(s) failed: %d\n", ret);
1740e0279b6bSPierre-Louis Bossart 			return ret;
1741e0279b6bSPierre-Louis Bossart 		}
1742e0279b6bSPierre-Louis Bossart 	}
1743e0279b6bSPierre-Louis Bossart 
1744e0279b6bSPierre-Louis Bossart 	return 0;
17455c3eb9f7SSanyog Kale }
17465c3eb9f7SSanyog Kale 
17475c3eb9f7SSanyog Kale /**
17485c3eb9f7SSanyog Kale  * sdw_disable_stream() - Disable SoundWire stream
17495c3eb9f7SSanyog Kale  *
17505c3eb9f7SSanyog Kale  * @stream: Soundwire stream
17515c3eb9f7SSanyog Kale  *
175234962fb8SMauro Carvalho Chehab  * Documentation/driver-api/soundwire/stream.rst explains this API in detail
17535c3eb9f7SSanyog Kale  */
17545c3eb9f7SSanyog Kale int sdw_disable_stream(struct sdw_stream_runtime *stream)
17555c3eb9f7SSanyog Kale {
17563a0be1a6SPierre-Louis Bossart 	int ret;
17575c3eb9f7SSanyog Kale 
17585c3eb9f7SSanyog Kale 	if (!stream) {
175917ed5befSPierre-Louis Bossart 		pr_err("SoundWire: Handle not found for stream\n");
17605c3eb9f7SSanyog Kale 		return -EINVAL;
17615c3eb9f7SSanyog Kale 	}
17625c3eb9f7SSanyog Kale 
176348949722SVinod Koul 	sdw_acquire_bus_lock(stream);
17645c3eb9f7SSanyog Kale 
176559528807SPierre-Louis Bossart 	if (stream->state != SDW_STREAM_ENABLED) {
176659528807SPierre-Louis Bossart 		pr_err("%s: %s: inconsistent state state %d\n",
176759528807SPierre-Louis Bossart 		       __func__, stream->name, stream->state);
176859528807SPierre-Louis Bossart 		ret = -EINVAL;
176959528807SPierre-Louis Bossart 		goto state_err;
177059528807SPierre-Louis Bossart 	}
177159528807SPierre-Louis Bossart 
17725c3eb9f7SSanyog Kale 	ret = _sdw_disable_stream(stream);
17735c3eb9f7SSanyog Kale 
177459528807SPierre-Louis Bossart state_err:
177548949722SVinod Koul 	sdw_release_bus_lock(stream);
17765c3eb9f7SSanyog Kale 	return ret;
17775c3eb9f7SSanyog Kale }
17785c3eb9f7SSanyog Kale EXPORT_SYMBOL(sdw_disable_stream);
17795c3eb9f7SSanyog Kale 
17805c3eb9f7SSanyog Kale static int _sdw_deprepare_stream(struct sdw_stream_runtime *stream)
17815c3eb9f7SSanyog Kale {
17823a0be1a6SPierre-Louis Bossart 	struct sdw_master_runtime *m_rt;
17833a0be1a6SPierre-Louis Bossart 	struct sdw_bus *bus;
17845c3eb9f7SSanyog Kale 	int ret = 0;
17855c3eb9f7SSanyog Kale 
178648949722SVinod Koul 	list_for_each_entry(m_rt, &stream->master_list, stream_node) {
178748949722SVinod Koul 		bus = m_rt->bus;
17885c3eb9f7SSanyog Kale 		/* De-prepare port(s) */
17895c3eb9f7SSanyog Kale 		ret = sdw_prep_deprep_ports(m_rt, false);
17905c3eb9f7SSanyog Kale 		if (ret < 0) {
179162f0cec3SVinod Koul 			dev_err(bus->dev,
179262f0cec3SVinod Koul 				"De-prepare port(s) failed: %d\n", ret);
17935c3eb9f7SSanyog Kale 			return ret;
17945c3eb9f7SSanyog Kale 		}
17955c3eb9f7SSanyog Kale 
17965c3eb9f7SSanyog Kale 		/* TODO: Update this during Device-Device support */
17975c3eb9f7SSanyog Kale 		bus->params.bandwidth -= m_rt->stream->params.rate *
17985c3eb9f7SSanyog Kale 			m_rt->ch_count * m_rt->stream->params.bps;
17995c3eb9f7SSanyog Kale 
18009026118fSBard Liao 		/* Compute params */
18019026118fSBard Liao 		if (bus->compute_params) {
18029026118fSBard Liao 			ret = bus->compute_params(bus);
18039026118fSBard Liao 			if (ret < 0) {
18046122d3beSPierre-Louis Bossart 				dev_err(bus->dev, "Compute params failed: %d\n",
18059026118fSBard Liao 					ret);
18069026118fSBard Liao 				return ret;
18079026118fSBard Liao 			}
18089026118fSBard Liao 		}
18099026118fSBard Liao 
18105c3eb9f7SSanyog Kale 		/* Program params */
1811bfaa3549SRander Wang 		ret = sdw_program_params(bus, false);
18125c3eb9f7SSanyog Kale 		if (ret < 0) {
181317ed5befSPierre-Louis Bossart 			dev_err(bus->dev, "Program params failed: %d\n", ret);
18145c3eb9f7SSanyog Kale 			return ret;
18155c3eb9f7SSanyog Kale 		}
181648949722SVinod Koul 	}
181748949722SVinod Koul 
181848949722SVinod Koul 	stream->state = SDW_STREAM_DEPREPARED;
18195c3eb9f7SSanyog Kale 	return do_bank_switch(stream);
18205c3eb9f7SSanyog Kale }
18215c3eb9f7SSanyog Kale 
18225c3eb9f7SSanyog Kale /**
18235c3eb9f7SSanyog Kale  * sdw_deprepare_stream() - Deprepare SoundWire stream
18245c3eb9f7SSanyog Kale  *
18255c3eb9f7SSanyog Kale  * @stream: Soundwire stream
18265c3eb9f7SSanyog Kale  *
182734962fb8SMauro Carvalho Chehab  * Documentation/driver-api/soundwire/stream.rst explains this API in detail
18285c3eb9f7SSanyog Kale  */
18295c3eb9f7SSanyog Kale int sdw_deprepare_stream(struct sdw_stream_runtime *stream)
18305c3eb9f7SSanyog Kale {
18313a0be1a6SPierre-Louis Bossart 	int ret;
18325c3eb9f7SSanyog Kale 
18335c3eb9f7SSanyog Kale 	if (!stream) {
183417ed5befSPierre-Louis Bossart 		pr_err("SoundWire: Handle not found for stream\n");
18355c3eb9f7SSanyog Kale 		return -EINVAL;
18365c3eb9f7SSanyog Kale 	}
18375c3eb9f7SSanyog Kale 
183848949722SVinod Koul 	sdw_acquire_bus_lock(stream);
183959528807SPierre-Louis Bossart 
184059528807SPierre-Louis Bossart 	if (stream->state != SDW_STREAM_PREPARED &&
184159528807SPierre-Louis Bossart 	    stream->state != SDW_STREAM_DISABLED) {
184259528807SPierre-Louis Bossart 		pr_err("%s: %s: inconsistent state state %d\n",
184359528807SPierre-Louis Bossart 		       __func__, stream->name, stream->state);
184459528807SPierre-Louis Bossart 		ret = -EINVAL;
184559528807SPierre-Louis Bossart 		goto state_err;
184659528807SPierre-Louis Bossart 	}
184759528807SPierre-Louis Bossart 
18485c3eb9f7SSanyog Kale 	ret = _sdw_deprepare_stream(stream);
18495c3eb9f7SSanyog Kale 
185059528807SPierre-Louis Bossart state_err:
185148949722SVinod Koul 	sdw_release_bus_lock(stream);
18525c3eb9f7SSanyog Kale 	return ret;
18535c3eb9f7SSanyog Kale }
18545c3eb9f7SSanyog Kale EXPORT_SYMBOL(sdw_deprepare_stream);
18554550569bSPierre-Louis Bossart 
18564550569bSPierre-Louis Bossart static int set_stream(struct snd_pcm_substream *substream,
18574550569bSPierre-Louis Bossart 		      struct sdw_stream_runtime *sdw_stream)
18584550569bSPierre-Louis Bossart {
18594550569bSPierre-Louis Bossart 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
18604550569bSPierre-Louis Bossart 	struct snd_soc_dai *dai;
18614550569bSPierre-Louis Bossart 	int ret = 0;
18624550569bSPierre-Louis Bossart 	int i;
18634550569bSPierre-Louis Bossart 
18644550569bSPierre-Louis Bossart 	/* Set stream pointer on all DAIs */
18654550569bSPierre-Louis Bossart 	for_each_rtd_dais(rtd, i, dai) {
18664550569bSPierre-Louis Bossart 		ret = snd_soc_dai_set_sdw_stream(dai, sdw_stream, substream->stream);
18674550569bSPierre-Louis Bossart 		if (ret < 0) {
18686122d3beSPierre-Louis Bossart 			dev_err(rtd->dev, "failed to set stream pointer on dai %s\n", dai->name);
18694550569bSPierre-Louis Bossart 			break;
18704550569bSPierre-Louis Bossart 		}
18714550569bSPierre-Louis Bossart 	}
18724550569bSPierre-Louis Bossart 
18734550569bSPierre-Louis Bossart 	return ret;
18744550569bSPierre-Louis Bossart }
18754550569bSPierre-Louis Bossart 
18764550569bSPierre-Louis Bossart /**
18774550569bSPierre-Louis Bossart  * sdw_startup_stream() - Startup SoundWire stream
18784550569bSPierre-Louis Bossart  *
18793b71c690SVinod Koul  * @sdw_substream: Soundwire stream
18804550569bSPierre-Louis Bossart  *
18814550569bSPierre-Louis Bossart  * Documentation/driver-api/soundwire/stream.rst explains this API in detail
18824550569bSPierre-Louis Bossart  */
18834550569bSPierre-Louis Bossart int sdw_startup_stream(void *sdw_substream)
18844550569bSPierre-Louis Bossart {
18854550569bSPierre-Louis Bossart 	struct snd_pcm_substream *substream = sdw_substream;
18864550569bSPierre-Louis Bossart 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
18874550569bSPierre-Louis Bossart 	struct sdw_stream_runtime *sdw_stream;
18884550569bSPierre-Louis Bossart 	char *name;
18894550569bSPierre-Louis Bossart 	int ret;
18904550569bSPierre-Louis Bossart 
18914550569bSPierre-Louis Bossart 	if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
18924550569bSPierre-Louis Bossart 		name = kasprintf(GFP_KERNEL, "%s-Playback", substream->name);
18934550569bSPierre-Louis Bossart 	else
18944550569bSPierre-Louis Bossart 		name = kasprintf(GFP_KERNEL, "%s-Capture", substream->name);
18954550569bSPierre-Louis Bossart 
18964550569bSPierre-Louis Bossart 	if (!name)
18974550569bSPierre-Louis Bossart 		return -ENOMEM;
18984550569bSPierre-Louis Bossart 
18994550569bSPierre-Louis Bossart 	sdw_stream = sdw_alloc_stream(name);
19004550569bSPierre-Louis Bossart 	if (!sdw_stream) {
19016122d3beSPierre-Louis Bossart 		dev_err(rtd->dev, "alloc stream failed for substream DAI %s\n", substream->name);
19024550569bSPierre-Louis Bossart 		ret = -ENOMEM;
19034550569bSPierre-Louis Bossart 		goto error;
19044550569bSPierre-Louis Bossart 	}
19054550569bSPierre-Louis Bossart 
19064550569bSPierre-Louis Bossart 	ret = set_stream(substream, sdw_stream);
19074550569bSPierre-Louis Bossart 	if (ret < 0)
19084550569bSPierre-Louis Bossart 		goto release_stream;
19094550569bSPierre-Louis Bossart 	return 0;
19104550569bSPierre-Louis Bossart 
19114550569bSPierre-Louis Bossart release_stream:
19124550569bSPierre-Louis Bossart 	sdw_release_stream(sdw_stream);
19134550569bSPierre-Louis Bossart 	set_stream(substream, NULL);
19144550569bSPierre-Louis Bossart error:
19154550569bSPierre-Louis Bossart 	kfree(name);
19164550569bSPierre-Louis Bossart 	return ret;
19174550569bSPierre-Louis Bossart }
19184550569bSPierre-Louis Bossart EXPORT_SYMBOL(sdw_startup_stream);
19194550569bSPierre-Louis Bossart 
19204550569bSPierre-Louis Bossart /**
19214550569bSPierre-Louis Bossart  * sdw_shutdown_stream() - Shutdown SoundWire stream
19224550569bSPierre-Louis Bossart  *
19233b71c690SVinod Koul  * @sdw_substream: Soundwire stream
19244550569bSPierre-Louis Bossart  *
19254550569bSPierre-Louis Bossart  * Documentation/driver-api/soundwire/stream.rst explains this API in detail
19264550569bSPierre-Louis Bossart  */
19274550569bSPierre-Louis Bossart void sdw_shutdown_stream(void *sdw_substream)
19284550569bSPierre-Louis Bossart {
19294550569bSPierre-Louis Bossart 	struct snd_pcm_substream *substream = sdw_substream;
19304550569bSPierre-Louis Bossart 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
19314550569bSPierre-Louis Bossart 	struct sdw_stream_runtime *sdw_stream;
19324550569bSPierre-Louis Bossart 	struct snd_soc_dai *dai;
19334550569bSPierre-Louis Bossart 
19344550569bSPierre-Louis Bossart 	/* Find stream from first CPU DAI */
19354550569bSPierre-Louis Bossart 	dai = asoc_rtd_to_cpu(rtd, 0);
19364550569bSPierre-Louis Bossart 
19374550569bSPierre-Louis Bossart 	sdw_stream = snd_soc_dai_get_sdw_stream(dai, substream->stream);
19384550569bSPierre-Louis Bossart 
19393471d2a1SPierre-Louis Bossart 	if (IS_ERR(sdw_stream)) {
19406122d3beSPierre-Louis Bossart 		dev_err(rtd->dev, "no stream found for DAI %s\n", dai->name);
19414550569bSPierre-Louis Bossart 		return;
19424550569bSPierre-Louis Bossart 	}
19434550569bSPierre-Louis Bossart 
19444550569bSPierre-Louis Bossart 	/* release memory */
19454550569bSPierre-Louis Bossart 	kfree(sdw_stream->name);
19464550569bSPierre-Louis Bossart 	sdw_release_stream(sdw_stream);
19474550569bSPierre-Louis Bossart 
19484550569bSPierre-Louis Bossart 	/* clear DAI data */
19494550569bSPierre-Louis Bossart 	set_stream(substream, NULL);
19504550569bSPierre-Louis Bossart }
19514550569bSPierre-Louis Bossart EXPORT_SYMBOL(sdw_shutdown_stream);
1952