1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
3 
4 /*
5  * SDW Intel Init Routines
6  *
7  * Initializes and creates SDW devices based on ACPI and Hardware values
8  */
9 
10 #include <linux/acpi.h>
11 #include <linux/export.h>
12 #include <linux/interrupt.h>
13 #include <linux/io.h>
14 #include <linux/module.h>
15 #include <linux/platform_device.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/soundwire/sdw_intel.h>
18 #include "cadence_master.h"
19 #include "intel.h"
20 
21 #define SDW_SHIM_LCAP		0x0
22 #define SDW_SHIM_BASE		0x2C000
23 #define SDW_ALH_BASE		0x2C800
24 #define SDW_LINK_BASE		0x30000
25 #define SDW_LINK_SIZE		0x10000
26 
27 static int sdw_intel_cleanup(struct sdw_intel_ctx *ctx)
28 {
29 	struct sdw_intel_link_res *link = ctx->links;
30 	u32 link_mask;
31 	int i;
32 
33 	if (!link)
34 		return 0;
35 
36 	link_mask = ctx->link_mask;
37 
38 	for (i = 0; i < ctx->count; i++, link++) {
39 		if (!(link_mask & BIT(i)))
40 			continue;
41 
42 		if (link->pdev) {
43 			pm_runtime_disable(&link->pdev->dev);
44 			platform_device_unregister(link->pdev);
45 		}
46 
47 		if (!link->clock_stop_quirks)
48 			pm_runtime_put_noidle(link->dev);
49 	}
50 
51 	return 0;
52 }
53 
54 #define HDA_DSP_REG_ADSPIC2             (0x10)
55 #define HDA_DSP_REG_ADSPIS2             (0x14)
56 #define HDA_DSP_REG_ADSPIC2_SNDW        BIT(5)
57 
58 /**
59  * sdw_intel_enable_irq() - enable/disable Intel SoundWire IRQ
60  * @mmio_base: The mmio base of the control register
61  * @enable: true if enable
62  */
63 void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable)
64 {
65 	u32 val;
66 
67 	val = readl(mmio_base + HDA_DSP_REG_ADSPIC2);
68 
69 	if (enable)
70 		val |= HDA_DSP_REG_ADSPIC2_SNDW;
71 	else
72 		val &= ~HDA_DSP_REG_ADSPIC2_SNDW;
73 
74 	writel(val, mmio_base + HDA_DSP_REG_ADSPIC2);
75 }
76 EXPORT_SYMBOL_NS(sdw_intel_enable_irq, SOUNDWIRE_INTEL_INIT);
77 
78 irqreturn_t sdw_intel_thread(int irq, void *dev_id)
79 {
80 	struct sdw_intel_ctx *ctx = dev_id;
81 	struct sdw_intel_link_res *link;
82 
83 	list_for_each_entry(link, &ctx->link_list, list)
84 		sdw_cdns_irq(irq, link->cdns);
85 
86 	sdw_intel_enable_irq(ctx->mmio_base, true);
87 	return IRQ_HANDLED;
88 }
89 EXPORT_SYMBOL_NS(sdw_intel_thread, SOUNDWIRE_INTEL_INIT);
90 
91 static struct sdw_intel_ctx
92 *sdw_intel_probe_controller(struct sdw_intel_res *res)
93 {
94 	struct platform_device_info pdevinfo;
95 	struct platform_device *pdev;
96 	struct sdw_intel_link_res *link;
97 	struct sdw_intel_ctx *ctx;
98 	struct acpi_device *adev;
99 	struct sdw_slave *slave;
100 	struct list_head *node;
101 	struct sdw_bus *bus;
102 	u32 link_mask;
103 	int num_slaves = 0;
104 	int count;
105 	int i;
106 
107 	if (!res)
108 		return NULL;
109 
110 	if (acpi_bus_get_device(res->handle, &adev))
111 		return NULL;
112 
113 	if (!res->count)
114 		return NULL;
115 
116 	count = res->count;
117 	dev_dbg(&adev->dev, "Creating %d SDW Link devices\n", count);
118 
119 	ctx = devm_kzalloc(&adev->dev, sizeof(*ctx), GFP_KERNEL);
120 	if (!ctx)
121 		return NULL;
122 
123 	ctx->count = count;
124 	ctx->links = devm_kcalloc(&adev->dev, ctx->count,
125 				  sizeof(*ctx->links), GFP_KERNEL);
126 	if (!ctx->links)
127 		return NULL;
128 
129 	ctx->count = count;
130 	ctx->mmio_base = res->mmio_base;
131 	ctx->link_mask = res->link_mask;
132 	ctx->handle = res->handle;
133 	mutex_init(&ctx->shim_lock);
134 
135 	link = ctx->links;
136 	link_mask = ctx->link_mask;
137 
138 	INIT_LIST_HEAD(&ctx->link_list);
139 
140 	/* Create SDW Master devices */
141 	for (i = 0; i < count; i++, link++) {
142 		if (!(link_mask & BIT(i))) {
143 			dev_dbg(&adev->dev,
144 				"Link %d masked, will not be enabled\n", i);
145 			continue;
146 		}
147 
148 		link->mmio_base = res->mmio_base;
149 		link->registers = res->mmio_base + SDW_LINK_BASE
150 			+ (SDW_LINK_SIZE * i);
151 		link->shim = res->mmio_base + SDW_SHIM_BASE;
152 		link->alh = res->mmio_base + SDW_ALH_BASE;
153 
154 		link->ops = res->ops;
155 		link->dev = res->dev;
156 
157 		link->clock_stop_quirks = res->clock_stop_quirks;
158 		link->shim_lock = &ctx->shim_lock;
159 		link->shim_mask = &ctx->shim_mask;
160 		link->link_mask = link_mask;
161 
162 		memset(&pdevinfo, 0, sizeof(pdevinfo));
163 
164 		pdevinfo.parent = res->parent;
165 		pdevinfo.name = "intel-sdw";
166 		pdevinfo.id = i;
167 		pdevinfo.fwnode = acpi_fwnode_handle(adev);
168 		pdevinfo.data = link;
169 		pdevinfo.size_data = sizeof(*link);
170 
171 		pdev = platform_device_register_full(&pdevinfo);
172 		if (IS_ERR(pdev)) {
173 			dev_err(&adev->dev,
174 				"platform device creation failed: %ld\n",
175 				PTR_ERR(pdev));
176 			goto err;
177 		}
178 		link->pdev = pdev;
179 		link->cdns = platform_get_drvdata(pdev);
180 
181 		list_add_tail(&link->list, &ctx->link_list);
182 		bus = &link->cdns->bus;
183 		/* Calculate number of slaves */
184 		list_for_each(node, &bus->slaves)
185 			num_slaves++;
186 	}
187 
188 	ctx->ids = devm_kcalloc(&adev->dev, num_slaves,
189 				sizeof(*ctx->ids), GFP_KERNEL);
190 	if (!ctx->ids)
191 		goto err;
192 
193 	ctx->num_slaves = num_slaves;
194 	i = 0;
195 	list_for_each_entry(link, &ctx->link_list, list) {
196 		bus = &link->cdns->bus;
197 		list_for_each_entry(slave, &bus->slaves, node) {
198 			ctx->ids[i].id = slave->id;
199 			ctx->ids[i].link_id = bus->link_id;
200 			i++;
201 		}
202 	}
203 
204 	return ctx;
205 
206 err:
207 	ctx->count = i;
208 	sdw_intel_cleanup(ctx);
209 	return NULL;
210 }
211 
212 static int
213 sdw_intel_startup_controller(struct sdw_intel_ctx *ctx)
214 {
215 	struct acpi_device *adev;
216 	struct sdw_intel_link_res *link;
217 	u32 caps;
218 	u32 link_mask;
219 	int i;
220 
221 	if (acpi_bus_get_device(ctx->handle, &adev))
222 		return -EINVAL;
223 
224 	/* Check SNDWLCAP.LCOUNT */
225 	caps = ioread32(ctx->mmio_base + SDW_SHIM_BASE + SDW_SHIM_LCAP);
226 	caps &= GENMASK(2, 0);
227 
228 	/* Check HW supported vs property value */
229 	if (caps < ctx->count) {
230 		dev_err(&adev->dev,
231 			"BIOS master count is larger than hardware capabilities\n");
232 		return -EINVAL;
233 	}
234 
235 	if (!ctx->links)
236 		return -EINVAL;
237 
238 	link = ctx->links;
239 	link_mask = ctx->link_mask;
240 
241 	/* Startup SDW Master devices */
242 	for (i = 0; i < ctx->count; i++, link++) {
243 		if (!(link_mask & BIT(i)))
244 			continue;
245 
246 		intel_master_startup(link->pdev);
247 
248 		if (!link->clock_stop_quirks) {
249 			/*
250 			 * we need to prevent the parent PCI device
251 			 * from entering pm_runtime suspend, so that
252 			 * power rails to the SoundWire IP are not
253 			 * turned off.
254 			 */
255 			pm_runtime_get_noresume(link->dev);
256 		}
257 	}
258 
259 	return 0;
260 }
261 
262 /**
263  * sdw_intel_probe() - SoundWire Intel probe routine
264  * @res: resource data
265  *
266  * This registers a platform device for each Master handled by the controller,
267  * and SoundWire Master and Slave devices will be created by the platform
268  * device probe. All the information necessary is stored in the context, and
269  * the res argument pointer can be freed after this step.
270  * This function will be called after sdw_intel_acpi_scan() by SOF probe.
271  */
272 struct sdw_intel_ctx
273 *sdw_intel_probe(struct sdw_intel_res *res)
274 {
275 	return sdw_intel_probe_controller(res);
276 }
277 EXPORT_SYMBOL_NS(sdw_intel_probe, SOUNDWIRE_INTEL_INIT);
278 
279 /**
280  * sdw_intel_startup() - SoundWire Intel startup
281  * @ctx: SoundWire context allocated in the probe
282  *
283  * Startup Intel SoundWire controller. This function will be called after
284  * Intel Audio DSP is powered up.
285  */
286 int sdw_intel_startup(struct sdw_intel_ctx *ctx)
287 {
288 	return sdw_intel_startup_controller(ctx);
289 }
290 EXPORT_SYMBOL_NS(sdw_intel_startup, SOUNDWIRE_INTEL_INIT);
291 /**
292  * sdw_intel_exit() - SoundWire Intel exit
293  * @ctx: SoundWire context allocated in the probe
294  *
295  * Delete the controller instances created and cleanup
296  */
297 void sdw_intel_exit(struct sdw_intel_ctx *ctx)
298 {
299 	sdw_intel_cleanup(ctx);
300 }
301 EXPORT_SYMBOL_NS(sdw_intel_exit, SOUNDWIRE_INTEL_INIT);
302 
303 void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx)
304 {
305 	struct sdw_intel_link_res *link;
306 	u32 link_mask;
307 	int i;
308 
309 	if (!ctx->links)
310 		return;
311 
312 	link = ctx->links;
313 	link_mask = ctx->link_mask;
314 
315 	/* Startup SDW Master devices */
316 	for (i = 0; i < ctx->count; i++, link++) {
317 		if (!(link_mask & BIT(i)))
318 			continue;
319 
320 		intel_master_process_wakeen_event(link->pdev);
321 	}
322 }
323 EXPORT_SYMBOL_NS(sdw_intel_process_wakeen_event, SOUNDWIRE_INTEL_INIT);
324 
325 MODULE_LICENSE("Dual BSD/GPL");
326 MODULE_DESCRIPTION("Intel Soundwire Init Library");
327