1 /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */ 2 /* Copyright(c) 2015-17 Intel Corporation. */ 3 4 #ifndef __SDW_INTEL_LOCAL_H 5 #define __SDW_INTEL_LOCAL_H 6 7 /** 8 * struct sdw_intel_link_res - Soundwire Intel link resource structure, 9 * typically populated by the controller driver. 10 * @hw_ops: platform-specific ops 11 * @mmio_base: mmio base of SoundWire registers 12 * @registers: Link IO registers base 13 * @shim: Audio shim pointer 14 * @alh: ALH (Audio Link Hub) pointer 15 * @irq: Interrupt line 16 * @ops: Shim callback ops 17 * @dev: device implementing hw_params and free callbacks 18 * @shim_lock: mutex to handle access to shared SHIM registers 19 * @shim_mask: global pointer to check SHIM register initialization 20 * @clock_stop_quirks: mask defining requested behavior on pm_suspend 21 * @link_mask: global mask needed for power-up/down sequences 22 * @cdns: Cadence master descriptor 23 * @list: used to walk-through all masters exposed by the same controller 24 */ 25 struct sdw_intel_link_res { 26 const struct sdw_intel_hw_ops *hw_ops; 27 28 void __iomem *mmio_base; /* not strictly needed, useful for debug */ 29 void __iomem *registers; 30 void __iomem *shim; 31 void __iomem *alh; 32 int irq; 33 const struct sdw_intel_ops *ops; 34 struct device *dev; 35 struct mutex *shim_lock; /* protect shared registers */ 36 u32 *shim_mask; 37 u32 clock_stop_quirks; 38 u32 link_mask; 39 struct sdw_cdns *cdns; 40 struct list_head list; 41 }; 42 43 struct sdw_intel { 44 struct sdw_cdns cdns; 45 int instance; 46 struct sdw_intel_link_res *link_res; 47 bool startup_done; 48 #ifdef CONFIG_DEBUG_FS 49 struct dentry *debugfs; 50 #endif 51 }; 52 53 enum intel_pdi_type { 54 INTEL_PDI_IN = 0, 55 INTEL_PDI_OUT = 1, 56 INTEL_PDI_BD = 2, 57 }; 58 59 /* 60 * Read, write helpers for HW registers 61 */ 62 static inline int intel_readl(void __iomem *base, int offset) 63 { 64 return readl(base + offset); 65 } 66 67 static inline void intel_writel(void __iomem *base, int offset, int value) 68 { 69 writel(value, base + offset); 70 } 71 72 static inline u16 intel_readw(void __iomem *base, int offset) 73 { 74 return readw(base + offset); 75 } 76 77 static inline void intel_writew(void __iomem *base, int offset, u16 value) 78 { 79 writew(value, base + offset); 80 } 81 82 #define cdns_to_intel(_cdns) container_of(_cdns, struct sdw_intel, cdns) 83 84 #define INTEL_MASTER_RESET_ITERATIONS 10 85 86 #define SDW_INTEL_CHECK_OPS(sdw, cb) ((sdw) && (sdw)->link_res && (sdw)->link_res->hw_ops && \ 87 (sdw)->link_res->hw_ops->cb) 88 #define SDW_INTEL_OPS(sdw, cb) ((sdw)->link_res->hw_ops->cb) 89 90 static inline void sdw_intel_debugfs_init(struct sdw_intel *sdw) 91 { 92 if (SDW_INTEL_CHECK_OPS(sdw, debugfs_init)) 93 SDW_INTEL_OPS(sdw, debugfs_init)(sdw); 94 } 95 96 static inline void sdw_intel_debugfs_exit(struct sdw_intel *sdw) 97 { 98 if (SDW_INTEL_CHECK_OPS(sdw, debugfs_exit)) 99 SDW_INTEL_OPS(sdw, debugfs_exit)(sdw); 100 } 101 102 static inline int sdw_intel_register_dai(struct sdw_intel *sdw) 103 { 104 if (SDW_INTEL_CHECK_OPS(sdw, register_dai)) 105 return SDW_INTEL_OPS(sdw, register_dai)(sdw); 106 return -ENOTSUPP; 107 } 108 109 static inline void sdw_intel_check_clock_stop(struct sdw_intel *sdw) 110 { 111 if (SDW_INTEL_CHECK_OPS(sdw, check_clock_stop)) 112 SDW_INTEL_OPS(sdw, check_clock_stop)(sdw); 113 } 114 115 static inline int sdw_intel_start_bus(struct sdw_intel *sdw) 116 { 117 if (SDW_INTEL_CHECK_OPS(sdw, start_bus)) 118 return SDW_INTEL_OPS(sdw, start_bus)(sdw); 119 return -ENOTSUPP; 120 } 121 122 static inline int sdw_intel_start_bus_after_reset(struct sdw_intel *sdw) 123 { 124 if (SDW_INTEL_CHECK_OPS(sdw, start_bus_after_reset)) 125 return SDW_INTEL_OPS(sdw, start_bus_after_reset)(sdw); 126 return -ENOTSUPP; 127 } 128 129 static inline int sdw_intel_start_bus_after_clock_stop(struct sdw_intel *sdw) 130 { 131 if (SDW_INTEL_CHECK_OPS(sdw, start_bus_after_clock_stop)) 132 return SDW_INTEL_OPS(sdw, start_bus_after_clock_stop)(sdw); 133 return -ENOTSUPP; 134 } 135 136 static inline int sdw_intel_stop_bus(struct sdw_intel *sdw, bool clock_stop) 137 { 138 if (SDW_INTEL_CHECK_OPS(sdw, stop_bus)) 139 return SDW_INTEL_OPS(sdw, stop_bus)(sdw, clock_stop); 140 return -ENOTSUPP; 141 } 142 143 static inline int sdw_intel_link_power_up(struct sdw_intel *sdw) 144 { 145 if (SDW_INTEL_CHECK_OPS(sdw, link_power_up)) 146 return SDW_INTEL_OPS(sdw, link_power_up)(sdw); 147 return -ENOTSUPP; 148 } 149 150 static inline int sdw_intel_link_power_down(struct sdw_intel *sdw) 151 { 152 if (SDW_INTEL_CHECK_OPS(sdw, link_power_down)) 153 return SDW_INTEL_OPS(sdw, link_power_down)(sdw); 154 return -ENOTSUPP; 155 } 156 157 static inline int sdw_intel_shim_check_wake(struct sdw_intel *sdw) 158 { 159 if (SDW_INTEL_CHECK_OPS(sdw, shim_check_wake)) 160 return SDW_INTEL_OPS(sdw, shim_check_wake)(sdw); 161 return -ENOTSUPP; 162 } 163 164 static inline void sdw_intel_shim_wake(struct sdw_intel *sdw, bool wake_enable) 165 { 166 if (SDW_INTEL_CHECK_OPS(sdw, shim_wake)) 167 SDW_INTEL_OPS(sdw, shim_wake)(sdw, wake_enable); 168 } 169 170 static inline void sdw_intel_sync_arm(struct sdw_intel *sdw) 171 { 172 if (SDW_INTEL_CHECK_OPS(sdw, sync_arm)) 173 SDW_INTEL_OPS(sdw, sync_arm)(sdw); 174 } 175 176 static inline int sdw_intel_sync_go_unlocked(struct sdw_intel *sdw) 177 { 178 if (SDW_INTEL_CHECK_OPS(sdw, sync_go_unlocked)) 179 return SDW_INTEL_OPS(sdw, sync_go_unlocked)(sdw); 180 return -ENOTSUPP; 181 } 182 183 static inline int sdw_intel_sync_go(struct sdw_intel *sdw) 184 { 185 if (SDW_INTEL_CHECK_OPS(sdw, sync_go)) 186 return SDW_INTEL_OPS(sdw, sync_go)(sdw); 187 return -ENOTSUPP; 188 } 189 190 static inline bool sdw_intel_sync_check_cmdsync_unlocked(struct sdw_intel *sdw) 191 { 192 if (SDW_INTEL_CHECK_OPS(sdw, sync_check_cmdsync_unlocked)) 193 return SDW_INTEL_OPS(sdw, sync_check_cmdsync_unlocked)(sdw); 194 return false; 195 } 196 197 /* common bus management */ 198 int intel_start_bus(struct sdw_intel *sdw); 199 int intel_start_bus_after_reset(struct sdw_intel *sdw); 200 void intel_check_clock_stop(struct sdw_intel *sdw); 201 int intel_start_bus_after_clock_stop(struct sdw_intel *sdw); 202 int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop); 203 204 /* common bank switch routines */ 205 int intel_pre_bank_switch(struct sdw_intel *sdw); 206 int intel_post_bank_switch(struct sdw_intel *sdw); 207 208 #endif /* __SDW_INTEL_LOCAL_H */ 209