xref: /openbmc/linux/drivers/soundwire/intel.h (revision 312316d5)
123859465SPierre-Louis Bossart /* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
223859465SPierre-Louis Bossart /* Copyright(c) 2015-17 Intel Corporation. */
371bb8a1bSVinod Koul 
471bb8a1bSVinod Koul #ifndef __SDW_INTEL_LOCAL_H
571bb8a1bSVinod Koul #define __SDW_INTEL_LOCAL_H
671bb8a1bSVinod Koul 
7881cf1e9SPierre-Louis Bossart struct hdac_bus;
8881cf1e9SPierre-Louis Bossart 
971bb8a1bSVinod Koul /**
10f98f690fSPierre-Louis Bossart  * struct sdw_intel_link_res - Soundwire Intel link resource structure,
11f98f690fSPierre-Louis Bossart  * typically populated by the controller driver.
12b3ad31f3SPierre-Louis Bossart  * @hw_ops: platform-specific ops
13f98f690fSPierre-Louis Bossart  * @mmio_base: mmio base of SoundWire registers
1471bb8a1bSVinod Koul  * @registers: Link IO registers base
15e40e0e11SPierre-Louis Bossart  * @ip_offset: offset for MCP_IP registers
1671bb8a1bSVinod Koul  * @shim: Audio shim pointer
176ab915b9SPierre-Louis Bossart  * @shim_vs: Audio vendor-specific shim pointer
1871bb8a1bSVinod Koul  * @alh: ALH (Audio Link Hub) pointer
1971bb8a1bSVinod Koul  * @irq: Interrupt line
20c46302ecSVinod Koul  * @ops: Shim callback ops
214b206d34SRander Wang  * @dev: device implementing hw_params and free callbacks
224a17c441SPierre-Louis Bossart  * @shim_lock: mutex to handle access to shared SHIM registers
234a17c441SPierre-Louis Bossart  * @shim_mask: global pointer to check SHIM register initialization
24a320f41eSPierre-Louis Bossart  * @clock_stop_quirks: mask defining requested behavior on pm_suspend
25de763fa8SPierre-Louis Bossart  * @link_mask: global mask needed for power-up/down sequences
264a98a6b2SBard Liao  * @cdns: Cadence master descriptor
274a98a6b2SBard Liao  * @list: used to walk-through all masters exposed by the same controller
28881cf1e9SPierre-Louis Bossart  * @hbus: hdac_bus pointer, needed for power management
2971bb8a1bSVinod Koul  */
3071bb8a1bSVinod Koul struct sdw_intel_link_res {
31b3ad31f3SPierre-Louis Bossart 	const struct sdw_intel_hw_ops *hw_ops;
32b3ad31f3SPierre-Louis Bossart 
33f98f690fSPierre-Louis Bossart 	void __iomem *mmio_base; /* not strictly needed, useful for debug */
3471bb8a1bSVinod Koul 	void __iomem *registers;
35e40e0e11SPierre-Louis Bossart 	u32 ip_offset;
3671bb8a1bSVinod Koul 	void __iomem *shim;
376ab915b9SPierre-Louis Bossart 	void __iomem *shim_vs;
3871bb8a1bSVinod Koul 	void __iomem *alh;
3971bb8a1bSVinod Koul 	int irq;
40c46302ecSVinod Koul 	const struct sdw_intel_ops *ops;
414b206d34SRander Wang 	struct device *dev;
424a17c441SPierre-Louis Bossart 	struct mutex *shim_lock; /* protect shared registers */
434a17c441SPierre-Louis Bossart 	u32 *shim_mask;
44a320f41eSPierre-Louis Bossart 	u32 clock_stop_quirks;
45de763fa8SPierre-Louis Bossart 	u32 link_mask;
464a98a6b2SBard Liao 	struct sdw_cdns *cdns;
474a98a6b2SBard Liao 	struct list_head list;
48881cf1e9SPierre-Louis Bossart 	struct hdac_bus *hbus;
4971bb8a1bSVinod Koul };
5071bb8a1bSVinod Koul 
51b6109dd6SPierre-Louis Bossart struct sdw_intel {
52b6109dd6SPierre-Louis Bossart 	struct sdw_cdns cdns;
53b6109dd6SPierre-Louis Bossart 	int instance;
54b6109dd6SPierre-Louis Bossart 	struct sdw_intel_link_res *link_res;
55e4401abbSPierre-Louis Bossart 	bool startup_done;
56b6109dd6SPierre-Louis Bossart #ifdef CONFIG_DEBUG_FS
57b6109dd6SPierre-Louis Bossart 	struct dentry *debugfs;
58b6109dd6SPierre-Louis Bossart #endif
59b6109dd6SPierre-Louis Bossart };
60b6109dd6SPierre-Louis Bossart 
614dd50affSPierre-Louis Bossart enum intel_pdi_type {
624dd50affSPierre-Louis Bossart 	INTEL_PDI_IN = 0,
634dd50affSPierre-Louis Bossart 	INTEL_PDI_OUT = 1,
644dd50affSPierre-Louis Bossart 	INTEL_PDI_BD = 2,
654dd50affSPierre-Louis Bossart };
664dd50affSPierre-Louis Bossart 
674dd50affSPierre-Louis Bossart /*
684dd50affSPierre-Louis Bossart  * Read, write helpers for HW registers
694dd50affSPierre-Louis Bossart  */
intel_readl(void __iomem * base,int offset)704dd50affSPierre-Louis Bossart static inline int intel_readl(void __iomem *base, int offset)
714dd50affSPierre-Louis Bossart {
724dd50affSPierre-Louis Bossart 	return readl(base + offset);
734dd50affSPierre-Louis Bossart }
744dd50affSPierre-Louis Bossart 
intel_writel(void __iomem * base,int offset,int value)754dd50affSPierre-Louis Bossart static inline void intel_writel(void __iomem *base, int offset, int value)
764dd50affSPierre-Louis Bossart {
774dd50affSPierre-Louis Bossart 	writel(value, base + offset);
784dd50affSPierre-Louis Bossart }
794dd50affSPierre-Louis Bossart 
intel_readw(void __iomem * base,int offset)804dd50affSPierre-Louis Bossart static inline u16 intel_readw(void __iomem *base, int offset)
814dd50affSPierre-Louis Bossart {
824dd50affSPierre-Louis Bossart 	return readw(base + offset);
834dd50affSPierre-Louis Bossart }
844dd50affSPierre-Louis Bossart 
intel_writew(void __iomem * base,int offset,u16 value)854dd50affSPierre-Louis Bossart static inline void intel_writew(void __iomem *base, int offset, u16 value)
864dd50affSPierre-Louis Bossart {
874dd50affSPierre-Louis Bossart 	writew(value, base + offset);
884dd50affSPierre-Louis Bossart }
894dd50affSPierre-Louis Bossart 
907cbf00bdSPierre-Louis Bossart #define cdns_to_intel(_cdns) container_of(_cdns, struct sdw_intel, cdns)
9129a269c6SPierre-Louis Bossart 
927cbf00bdSPierre-Louis Bossart #define INTEL_MASTER_RESET_ITERATIONS	10
936d2c6669SPierre-Louis Bossart 
94fb2dc6a0SPierre-Louis Bossart #define SDW_INTEL_CHECK_OPS(sdw, cb)	((sdw) && (sdw)->link_res && (sdw)->link_res->hw_ops && \
95fb2dc6a0SPierre-Louis Bossart 					 (sdw)->link_res->hw_ops->cb)
96fb2dc6a0SPierre-Louis Bossart #define SDW_INTEL_OPS(sdw, cb)		((sdw)->link_res->hw_ops->cb)
97fb2dc6a0SPierre-Louis Bossart 
98*312316d5SPierre-Louis Bossart #ifdef CONFIG_DEBUG_FS
99*312316d5SPierre-Louis Bossart void intel_ace2x_debugfs_init(struct sdw_intel *sdw);
100*312316d5SPierre-Louis Bossart void intel_ace2x_debugfs_exit(struct sdw_intel *sdw);
101*312316d5SPierre-Louis Bossart #else
intel_ace2x_debugfs_init(struct sdw_intel * sdw)102*312316d5SPierre-Louis Bossart static inline void intel_ace2x_debugfs_init(struct sdw_intel *sdw) {}
intel_ace2x_debugfs_exit(struct sdw_intel * sdw)103*312316d5SPierre-Louis Bossart static inline void intel_ace2x_debugfs_exit(struct sdw_intel *sdw) {}
104*312316d5SPierre-Louis Bossart #endif
105*312316d5SPierre-Louis Bossart 
sdw_intel_debugfs_init(struct sdw_intel * sdw)106fb2dc6a0SPierre-Louis Bossart static inline void sdw_intel_debugfs_init(struct sdw_intel *sdw)
107fb2dc6a0SPierre-Louis Bossart {
108fb2dc6a0SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, debugfs_init))
109fb2dc6a0SPierre-Louis Bossart 		SDW_INTEL_OPS(sdw, debugfs_init)(sdw);
110fb2dc6a0SPierre-Louis Bossart }
111fb2dc6a0SPierre-Louis Bossart 
sdw_intel_debugfs_exit(struct sdw_intel * sdw)112fb2dc6a0SPierre-Louis Bossart static inline void sdw_intel_debugfs_exit(struct sdw_intel *sdw)
113fb2dc6a0SPierre-Louis Bossart {
114fb2dc6a0SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, debugfs_exit))
115fb2dc6a0SPierre-Louis Bossart 		SDW_INTEL_OPS(sdw, debugfs_exit)(sdw);
116fb2dc6a0SPierre-Louis Bossart }
117fb2dc6a0SPierre-Louis Bossart 
sdw_intel_register_dai(struct sdw_intel * sdw)118b6234bccSPierre-Louis Bossart static inline int sdw_intel_register_dai(struct sdw_intel *sdw)
119b6234bccSPierre-Louis Bossart {
120b6234bccSPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, register_dai))
121b6234bccSPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, register_dai)(sdw);
122b6234bccSPierre-Louis Bossart 	return -ENOTSUPP;
123b6234bccSPierre-Louis Bossart }
124b6234bccSPierre-Louis Bossart 
sdw_intel_check_clock_stop(struct sdw_intel * sdw)1253db0c5a6SPierre-Louis Bossart static inline void sdw_intel_check_clock_stop(struct sdw_intel *sdw)
1263db0c5a6SPierre-Louis Bossart {
1273db0c5a6SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, check_clock_stop))
1283db0c5a6SPierre-Louis Bossart 		SDW_INTEL_OPS(sdw, check_clock_stop)(sdw);
1293db0c5a6SPierre-Louis Bossart }
1303db0c5a6SPierre-Louis Bossart 
sdw_intel_start_bus(struct sdw_intel * sdw)1313db0c5a6SPierre-Louis Bossart static inline int sdw_intel_start_bus(struct sdw_intel *sdw)
1323db0c5a6SPierre-Louis Bossart {
1333db0c5a6SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, start_bus))
1343db0c5a6SPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, start_bus)(sdw);
1353db0c5a6SPierre-Louis Bossart 	return -ENOTSUPP;
1363db0c5a6SPierre-Louis Bossart }
1373db0c5a6SPierre-Louis Bossart 
sdw_intel_start_bus_after_reset(struct sdw_intel * sdw)1383db0c5a6SPierre-Louis Bossart static inline int sdw_intel_start_bus_after_reset(struct sdw_intel *sdw)
1393db0c5a6SPierre-Louis Bossart {
1403db0c5a6SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, start_bus_after_reset))
1413db0c5a6SPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, start_bus_after_reset)(sdw);
1423db0c5a6SPierre-Louis Bossart 	return -ENOTSUPP;
1433db0c5a6SPierre-Louis Bossart }
1443db0c5a6SPierre-Louis Bossart 
sdw_intel_start_bus_after_clock_stop(struct sdw_intel * sdw)1453db0c5a6SPierre-Louis Bossart static inline int sdw_intel_start_bus_after_clock_stop(struct sdw_intel *sdw)
1463db0c5a6SPierre-Louis Bossart {
1473db0c5a6SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, start_bus_after_clock_stop))
1483db0c5a6SPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, start_bus_after_clock_stop)(sdw);
1493db0c5a6SPierre-Louis Bossart 	return -ENOTSUPP;
1503db0c5a6SPierre-Louis Bossart }
1513db0c5a6SPierre-Louis Bossart 
sdw_intel_stop_bus(struct sdw_intel * sdw,bool clock_stop)1523db0c5a6SPierre-Louis Bossart static inline int sdw_intel_stop_bus(struct sdw_intel *sdw, bool clock_stop)
1533db0c5a6SPierre-Louis Bossart {
1543db0c5a6SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, stop_bus))
1553db0c5a6SPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, stop_bus)(sdw, clock_stop);
1563db0c5a6SPierre-Louis Bossart 	return -ENOTSUPP;
1573db0c5a6SPierre-Louis Bossart }
1583db0c5a6SPierre-Louis Bossart 
sdw_intel_link_power_up(struct sdw_intel * sdw)15949c9ff45SPierre-Louis Bossart static inline int sdw_intel_link_power_up(struct sdw_intel *sdw)
16049c9ff45SPierre-Louis Bossart {
16149c9ff45SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, link_power_up))
16249c9ff45SPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, link_power_up)(sdw);
16349c9ff45SPierre-Louis Bossart 	return -ENOTSUPP;
16449c9ff45SPierre-Louis Bossart }
16549c9ff45SPierre-Louis Bossart 
sdw_intel_link_power_down(struct sdw_intel * sdw)16649c9ff45SPierre-Louis Bossart static inline int sdw_intel_link_power_down(struct sdw_intel *sdw)
16749c9ff45SPierre-Louis Bossart {
16849c9ff45SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, link_power_down))
16949c9ff45SPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, link_power_down)(sdw);
17049c9ff45SPierre-Louis Bossart 	return -ENOTSUPP;
17149c9ff45SPierre-Louis Bossart }
17249c9ff45SPierre-Louis Bossart 
sdw_intel_shim_check_wake(struct sdw_intel * sdw)17336e3b385SPierre-Louis Bossart static inline int sdw_intel_shim_check_wake(struct sdw_intel *sdw)
17436e3b385SPierre-Louis Bossart {
17536e3b385SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, shim_check_wake))
17636e3b385SPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, shim_check_wake)(sdw);
17736e3b385SPierre-Louis Bossart 	return -ENOTSUPP;
17836e3b385SPierre-Louis Bossart }
17936e3b385SPierre-Louis Bossart 
sdw_intel_shim_wake(struct sdw_intel * sdw,bool wake_enable)18036e3b385SPierre-Louis Bossart static inline void sdw_intel_shim_wake(struct sdw_intel *sdw, bool wake_enable)
18136e3b385SPierre-Louis Bossart {
18236e3b385SPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, shim_wake))
18336e3b385SPierre-Louis Bossart 		SDW_INTEL_OPS(sdw, shim_wake)(sdw, wake_enable);
18436e3b385SPierre-Louis Bossart }
18536e3b385SPierre-Louis Bossart 
sdw_intel_sync_arm(struct sdw_intel * sdw)18684706e9aSPierre-Louis Bossart static inline void sdw_intel_sync_arm(struct sdw_intel *sdw)
18784706e9aSPierre-Louis Bossart {
18884706e9aSPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, sync_arm))
18984706e9aSPierre-Louis Bossart 		SDW_INTEL_OPS(sdw, sync_arm)(sdw);
19084706e9aSPierre-Louis Bossart }
19184706e9aSPierre-Louis Bossart 
sdw_intel_sync_go_unlocked(struct sdw_intel * sdw)19284706e9aSPierre-Louis Bossart static inline int sdw_intel_sync_go_unlocked(struct sdw_intel *sdw)
19384706e9aSPierre-Louis Bossart {
19484706e9aSPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, sync_go_unlocked))
19584706e9aSPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, sync_go_unlocked)(sdw);
19684706e9aSPierre-Louis Bossart 	return -ENOTSUPP;
19784706e9aSPierre-Louis Bossart }
19884706e9aSPierre-Louis Bossart 
sdw_intel_sync_go(struct sdw_intel * sdw)19984706e9aSPierre-Louis Bossart static inline int sdw_intel_sync_go(struct sdw_intel *sdw)
20084706e9aSPierre-Louis Bossart {
20184706e9aSPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, sync_go))
20284706e9aSPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, sync_go)(sdw);
20384706e9aSPierre-Louis Bossart 	return -ENOTSUPP;
20484706e9aSPierre-Louis Bossart }
20584706e9aSPierre-Louis Bossart 
sdw_intel_sync_check_cmdsync_unlocked(struct sdw_intel * sdw)2061e76de2eSPierre-Louis Bossart static inline bool sdw_intel_sync_check_cmdsync_unlocked(struct sdw_intel *sdw)
2071e76de2eSPierre-Louis Bossart {
2081e76de2eSPierre-Louis Bossart 	if (SDW_INTEL_CHECK_OPS(sdw, sync_check_cmdsync_unlocked))
2091e76de2eSPierre-Louis Bossart 		return SDW_INTEL_OPS(sdw, sync_check_cmdsync_unlocked)(sdw);
2101e76de2eSPierre-Louis Bossart 	return false;
2111e76de2eSPierre-Louis Bossart }
2121e76de2eSPierre-Louis Bossart 
2131a1a6a69SPierre-Louis Bossart /* common bus management */
2141a1a6a69SPierre-Louis Bossart int intel_start_bus(struct sdw_intel *sdw);
2151a1a6a69SPierre-Louis Bossart int intel_start_bus_after_reset(struct sdw_intel *sdw);
2161a1a6a69SPierre-Louis Bossart void intel_check_clock_stop(struct sdw_intel *sdw);
2171a1a6a69SPierre-Louis Bossart int intel_start_bus_after_clock_stop(struct sdw_intel *sdw);
2181a1a6a69SPierre-Louis Bossart int intel_stop_bus(struct sdw_intel *sdw, bool clock_stop);
2191a1a6a69SPierre-Louis Bossart 
220fb43d62eSPierre-Louis Bossart /* common bank switch routines */
221fb43d62eSPierre-Louis Bossart int intel_pre_bank_switch(struct sdw_intel *sdw);
222fb43d62eSPierre-Louis Bossart int intel_post_bank_switch(struct sdw_intel *sdw);
223fb43d62eSPierre-Louis Bossart 
22471bb8a1bSVinod Koul #endif /* __SDW_INTEL_LOCAL_H */
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