1f956a785SLinus Walleij /* 2f956a785SLinus Walleij * Copyright (C) 2014 Linaro Ltd. 3f956a785SLinus Walleij * 4f956a785SLinus Walleij * Author: Linus Walleij <linus.walleij@linaro.org> 5f956a785SLinus Walleij * 6f956a785SLinus Walleij * This program is free software; you can redistribute it and/or modify 7f956a785SLinus Walleij * it under the terms of the GNU General Public License version 2, as 8f956a785SLinus Walleij * published by the Free Software Foundation. 9f956a785SLinus Walleij * 10f956a785SLinus Walleij */ 11f956a785SLinus Walleij #include <linux/init.h> 12f956a785SLinus Walleij #include <linux/io.h> 13f956a785SLinus Walleij #include <linux/slab.h> 14f956a785SLinus Walleij #include <linux/sys_soc.h> 15f956a785SLinus Walleij #include <linux/platform_device.h> 16f956a785SLinus Walleij #include <linux/mfd/syscon.h> 17f956a785SLinus Walleij #include <linux/regmap.h> 18f956a785SLinus Walleij #include <linux/of.h> 19f956a785SLinus Walleij 20f956a785SLinus Walleij #define INTEGRATOR_HDR_ID_OFFSET 0x00 21f956a785SLinus Walleij 22f956a785SLinus Walleij static u32 integrator_coreid; 23f956a785SLinus Walleij 24f956a785SLinus Walleij static const struct of_device_id integrator_cm_match[] = { 25f956a785SLinus Walleij { .compatible = "arm,core-module-integrator", }, 26f956a785SLinus Walleij }; 27f956a785SLinus Walleij 28f956a785SLinus Walleij static const char *integrator_arch_str(u32 id) 29f956a785SLinus Walleij { 30f956a785SLinus Walleij switch ((id >> 16) & 0xff) { 31f956a785SLinus Walleij case 0x00: 32f956a785SLinus Walleij return "ASB little-endian"; 33f956a785SLinus Walleij case 0x01: 34f956a785SLinus Walleij return "AHB little-endian"; 35f956a785SLinus Walleij case 0x03: 36f956a785SLinus Walleij return "AHB-Lite system bus, bi-endian"; 37f956a785SLinus Walleij case 0x04: 38f956a785SLinus Walleij return "AHB"; 39f956a785SLinus Walleij case 0x08: 40f956a785SLinus Walleij return "AHB system bus, ASB processor bus"; 41f956a785SLinus Walleij default: 42f956a785SLinus Walleij return "Unknown"; 43f956a785SLinus Walleij } 44f956a785SLinus Walleij } 45f956a785SLinus Walleij 46f956a785SLinus Walleij static const char *integrator_fpga_str(u32 id) 47f956a785SLinus Walleij { 48f956a785SLinus Walleij switch ((id >> 12) & 0xf) { 49f956a785SLinus Walleij case 0x01: 50f956a785SLinus Walleij return "XC4062"; 51f956a785SLinus Walleij case 0x02: 52f956a785SLinus Walleij return "XC4085"; 53f956a785SLinus Walleij case 0x03: 54f956a785SLinus Walleij return "XVC600"; 55f956a785SLinus Walleij case 0x04: 56f956a785SLinus Walleij return "EPM7256AE (Altera PLD)"; 57f956a785SLinus Walleij default: 58f956a785SLinus Walleij return "Unknown"; 59f956a785SLinus Walleij } 60f956a785SLinus Walleij } 61f956a785SLinus Walleij 62f956a785SLinus Walleij static ssize_t integrator_get_manf(struct device *dev, 63f956a785SLinus Walleij struct device_attribute *attr, 64f956a785SLinus Walleij char *buf) 65f956a785SLinus Walleij { 66f956a785SLinus Walleij return sprintf(buf, "%02x\n", integrator_coreid >> 24); 67f956a785SLinus Walleij } 68f956a785SLinus Walleij 69f956a785SLinus Walleij static struct device_attribute integrator_manf_attr = 70f956a785SLinus Walleij __ATTR(manufacturer, S_IRUGO, integrator_get_manf, NULL); 71f956a785SLinus Walleij 72f956a785SLinus Walleij static ssize_t integrator_get_arch(struct device *dev, 73f956a785SLinus Walleij struct device_attribute *attr, 74f956a785SLinus Walleij char *buf) 75f956a785SLinus Walleij { 76f956a785SLinus Walleij return sprintf(buf, "%s\n", integrator_arch_str(integrator_coreid)); 77f956a785SLinus Walleij } 78f956a785SLinus Walleij 79f956a785SLinus Walleij static struct device_attribute integrator_arch_attr = 80f956a785SLinus Walleij __ATTR(arch, S_IRUGO, integrator_get_arch, NULL); 81f956a785SLinus Walleij 82f956a785SLinus Walleij static ssize_t integrator_get_fpga(struct device *dev, 83f956a785SLinus Walleij struct device_attribute *attr, 84f956a785SLinus Walleij char *buf) 85f956a785SLinus Walleij { 86f956a785SLinus Walleij return sprintf(buf, "%s\n", integrator_fpga_str(integrator_coreid)); 87f956a785SLinus Walleij } 88f956a785SLinus Walleij 89f956a785SLinus Walleij static struct device_attribute integrator_fpga_attr = 90f956a785SLinus Walleij __ATTR(fpga, S_IRUGO, integrator_get_fpga, NULL); 91f956a785SLinus Walleij 92f956a785SLinus Walleij static ssize_t integrator_get_build(struct device *dev, 93f956a785SLinus Walleij struct device_attribute *attr, 94f956a785SLinus Walleij char *buf) 95f956a785SLinus Walleij { 96f956a785SLinus Walleij return sprintf(buf, "%02x\n", (integrator_coreid >> 4) & 0xFF); 97f956a785SLinus Walleij } 98f956a785SLinus Walleij 99f956a785SLinus Walleij static struct device_attribute integrator_build_attr = 100f956a785SLinus Walleij __ATTR(build, S_IRUGO, integrator_get_build, NULL); 101f956a785SLinus Walleij 102f956a785SLinus Walleij static int __init integrator_soc_init(void) 103f956a785SLinus Walleij { 104f956a785SLinus Walleij static struct regmap *syscon_regmap; 105f956a785SLinus Walleij struct soc_device *soc_dev; 106f956a785SLinus Walleij struct soc_device_attribute *soc_dev_attr; 107f956a785SLinus Walleij struct device_node *np; 108f956a785SLinus Walleij struct device *dev; 109f956a785SLinus Walleij u32 val; 110f956a785SLinus Walleij int ret; 111f956a785SLinus Walleij 112f956a785SLinus Walleij np = of_find_matching_node(NULL, integrator_cm_match); 113f956a785SLinus Walleij if (!np) 114f956a785SLinus Walleij return -ENODEV; 115f956a785SLinus Walleij 116f956a785SLinus Walleij syscon_regmap = syscon_node_to_regmap(np); 117f956a785SLinus Walleij if (IS_ERR(syscon_regmap)) 118f956a785SLinus Walleij return PTR_ERR(syscon_regmap); 119f956a785SLinus Walleij 120f956a785SLinus Walleij ret = regmap_read(syscon_regmap, INTEGRATOR_HDR_ID_OFFSET, 121f956a785SLinus Walleij &val); 122f956a785SLinus Walleij if (ret) 123f956a785SLinus Walleij return -ENODEV; 124f956a785SLinus Walleij integrator_coreid = val; 125f956a785SLinus Walleij 126f956a785SLinus Walleij soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 127f956a785SLinus Walleij if (!soc_dev_attr) 128f956a785SLinus Walleij return -ENOMEM; 129f956a785SLinus Walleij 130f956a785SLinus Walleij soc_dev_attr->soc_id = "Integrator"; 131f956a785SLinus Walleij soc_dev_attr->machine = "Integrator"; 132f956a785SLinus Walleij soc_dev_attr->family = "Versatile"; 133f956a785SLinus Walleij soc_dev = soc_device_register(soc_dev_attr); 134f956a785SLinus Walleij if (IS_ERR(soc_dev)) { 135f956a785SLinus Walleij kfree(soc_dev_attr); 136f956a785SLinus Walleij return -ENODEV; 137f956a785SLinus Walleij } 138f956a785SLinus Walleij dev = soc_device_to_device(soc_dev); 139f956a785SLinus Walleij 140f956a785SLinus Walleij device_create_file(dev, &integrator_manf_attr); 141f956a785SLinus Walleij device_create_file(dev, &integrator_arch_attr); 142f956a785SLinus Walleij device_create_file(dev, &integrator_fpga_attr); 143f956a785SLinus Walleij device_create_file(dev, &integrator_build_attr); 144f956a785SLinus Walleij 145f956a785SLinus Walleij dev_info(dev, "Detected ARM core module:\n"); 146f956a785SLinus Walleij dev_info(dev, " Manufacturer: %02x\n", (val >> 24)); 147f956a785SLinus Walleij dev_info(dev, " Architecture: %s\n", integrator_arch_str(val)); 148f956a785SLinus Walleij dev_info(dev, " FPGA: %s\n", integrator_fpga_str(val)); 149f956a785SLinus Walleij dev_info(dev, " Build: %02x\n", (val >> 4) & 0xFF); 150f956a785SLinus Walleij dev_info(dev, " Rev: %c\n", ('A' + (val & 0x03))); 151f956a785SLinus Walleij 152f956a785SLinus Walleij return 0; 153f956a785SLinus Walleij } 154f956a785SLinus Walleij device_initcall(integrator_soc_init); 155