1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Texas Instruments' K3 Interrupt Aggregator MSI bus 4 * 5 * Copyright (C) 2018-2019 Texas Instruments Incorporated - http://www.ti.com/ 6 * Lokesh Vutla <lokeshvutla@ti.com> 7 */ 8 9 #include <linux/irq.h> 10 #include <linux/irqdomain.h> 11 #include <linux/msi.h> 12 #include <linux/of_address.h> 13 #include <linux/of_device.h> 14 #include <linux/of_irq.h> 15 #include <linux/soc/ti/ti_sci_inta_msi.h> 16 #include <linux/soc/ti/ti_sci_protocol.h> 17 18 static void ti_sci_inta_msi_write_msg(struct irq_data *data, 19 struct msi_msg *msg) 20 { 21 /* Nothing to do */ 22 } 23 24 static void ti_sci_inta_msi_compose_msi_msg(struct irq_data *data, 25 struct msi_msg *msg) 26 { 27 /* Nothing to do */ 28 } 29 30 static void ti_sci_inta_msi_update_chip_ops(struct msi_domain_info *info) 31 { 32 struct irq_chip *chip = info->chip; 33 34 if (WARN_ON(!chip)) 35 return; 36 37 chip->irq_request_resources = irq_chip_request_resources_parent; 38 chip->irq_release_resources = irq_chip_release_resources_parent; 39 chip->irq_compose_msi_msg = ti_sci_inta_msi_compose_msi_msg; 40 chip->irq_write_msi_msg = ti_sci_inta_msi_write_msg; 41 chip->irq_set_type = irq_chip_set_type_parent; 42 chip->irq_unmask = irq_chip_unmask_parent; 43 chip->irq_mask = irq_chip_mask_parent; 44 chip->irq_ack = irq_chip_ack_parent; 45 } 46 47 struct irq_domain *ti_sci_inta_msi_create_irq_domain(struct fwnode_handle *fwnode, 48 struct msi_domain_info *info, 49 struct irq_domain *parent) 50 { 51 struct irq_domain *domain; 52 53 ti_sci_inta_msi_update_chip_ops(info); 54 info->flags |= MSI_FLAG_FREE_MSI_DESCS; 55 56 domain = msi_create_irq_domain(fwnode, info, parent); 57 if (domain) 58 irq_domain_update_bus_token(domain, DOMAIN_BUS_TI_SCI_INTA_MSI); 59 60 return domain; 61 } 62 EXPORT_SYMBOL_GPL(ti_sci_inta_msi_create_irq_domain); 63 64 static int ti_sci_inta_msi_alloc_descs(struct device *dev, 65 struct ti_sci_resource *res) 66 { 67 struct msi_desc msi_desc; 68 int set, i, count = 0; 69 70 memset(&msi_desc, 0, sizeof(msi_desc)); 71 msi_desc.nvec_used = 1; 72 73 for (set = 0; set < res->sets; set++) { 74 for (i = 0; i < res->desc[set].num; i++, count++) { 75 msi_desc.msi_index = res->desc[set].start + i; 76 if (msi_insert_msi_desc(dev, &msi_desc)) 77 goto fail; 78 } 79 80 for (i = 0; i < res->desc[set].num_sec; i++, count++) { 81 msi_desc.msi_index = res->desc[set].start_sec + i; 82 if (msi_insert_msi_desc(dev, &msi_desc)) 83 goto fail; 84 } 85 } 86 return count; 87 fail: 88 msi_free_msi_descs(dev); 89 return -ENOMEM; 90 } 91 92 int ti_sci_inta_msi_domain_alloc_irqs(struct device *dev, 93 struct ti_sci_resource *res) 94 { 95 struct platform_device *pdev = to_platform_device(dev); 96 int ret, nvec; 97 98 if (pdev->id < 0) 99 return -ENODEV; 100 101 ret = msi_setup_device_data(dev); 102 if (ret) 103 return ret; 104 105 msi_lock_descs(dev); 106 nvec = ti_sci_inta_msi_alloc_descs(dev, res); 107 if (nvec <= 0) { 108 ret = nvec; 109 goto unlock; 110 } 111 112 /* Use alloc ALL as it's unclear whether there are gaps in the indices */ 113 ret = msi_domain_alloc_irqs_all_locked(dev, MSI_DEFAULT_DOMAIN, nvec); 114 if (ret) 115 dev_err(dev, "Failed to allocate IRQs %d\n", ret); 116 unlock: 117 msi_unlock_descs(dev); 118 return ret; 119 } 120 EXPORT_SYMBOL_GPL(ti_sci_inta_msi_domain_alloc_irqs); 121