1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * AM33XX Power Management Routines 4 * 5 * Copyright (C) 2012-2018 Texas Instruments Incorporated - http://www.ti.com/ 6 * Vaibhav Bedia, Dave Gerlach 7 */ 8 9 #include <linux/clk.h> 10 #include <linux/cpu.h> 11 #include <linux/err.h> 12 #include <linux/genalloc.h> 13 #include <linux/kernel.h> 14 #include <linux/init.h> 15 #include <linux/io.h> 16 #include <linux/module.h> 17 #include <linux/nvmem-consumer.h> 18 #include <linux/of.h> 19 #include <linux/platform_data/pm33xx.h> 20 #include <linux/platform_device.h> 21 #include <linux/rtc.h> 22 #include <linux/rtc/rtc-omap.h> 23 #include <linux/sizes.h> 24 #include <linux/sram.h> 25 #include <linux/suspend.h> 26 #include <linux/ti-emif-sram.h> 27 #include <linux/wkup_m3_ipc.h> 28 29 #include <asm/proc-fns.h> 30 #include <asm/suspend.h> 31 #include <asm/system_misc.h> 32 33 #define AMX3_PM_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \ 34 (unsigned long)pm_sram->do_wfi) 35 36 #define RTC_SCRATCH_RESUME_REG 0 37 #define RTC_SCRATCH_MAGIC_REG 1 38 #define RTC_REG_BOOT_MAGIC 0x8cd0 /* RTC */ 39 #define GIC_INT_SET_PENDING_BASE 0x200 40 #define AM43XX_GIC_DIST_BASE 0x48241000 41 42 static u32 rtc_magic_val; 43 44 static int (*am33xx_do_wfi_sram)(unsigned long unused); 45 static phys_addr_t am33xx_do_wfi_sram_phys; 46 47 static struct gen_pool *sram_pool, *sram_pool_data; 48 static unsigned long ocmcram_location, ocmcram_location_data; 49 50 static struct rtc_device *omap_rtc; 51 static void __iomem *gic_dist_base; 52 53 static struct am33xx_pm_platform_data *pm_ops; 54 static struct am33xx_pm_sram_addr *pm_sram; 55 56 static struct device *pm33xx_dev; 57 static struct wkup_m3_ipc *m3_ipc; 58 59 #ifdef CONFIG_SUSPEND 60 static int rtc_only_idle; 61 static int retrigger_irq; 62 static unsigned long suspend_wfi_flags; 63 64 static struct wkup_m3_wakeup_src wakeup_src = {.irq_nr = 0, 65 .src = "Unknown", 66 }; 67 68 static struct wkup_m3_wakeup_src rtc_alarm_wakeup = { 69 .irq_nr = 108, .src = "RTC Alarm", 70 }; 71 72 static struct wkup_m3_wakeup_src rtc_ext_wakeup = { 73 .irq_nr = 0, .src = "Ext wakeup", 74 }; 75 #endif 76 77 static u32 sram_suspend_address(unsigned long addr) 78 { 79 return ((unsigned long)am33xx_do_wfi_sram + 80 AMX3_PM_SRAM_SYMBOL_OFFSET(addr)); 81 } 82 83 static int am33xx_push_sram_idle(void) 84 { 85 struct am33xx_pm_ro_sram_data ro_sram_data; 86 int ret; 87 u32 table_addr, ro_data_addr; 88 void *copy_addr; 89 90 ro_sram_data.amx3_pm_sram_data_virt = ocmcram_location_data; 91 ro_sram_data.amx3_pm_sram_data_phys = 92 gen_pool_virt_to_phys(sram_pool_data, ocmcram_location_data); 93 ro_sram_data.rtc_base_virt = pm_ops->get_rtc_base_addr(); 94 95 /* Save physical address to calculate resume offset during pm init */ 96 am33xx_do_wfi_sram_phys = gen_pool_virt_to_phys(sram_pool, 97 ocmcram_location); 98 99 am33xx_do_wfi_sram = sram_exec_copy(sram_pool, (void *)ocmcram_location, 100 pm_sram->do_wfi, 101 *pm_sram->do_wfi_sz); 102 if (!am33xx_do_wfi_sram) { 103 dev_err(pm33xx_dev, 104 "PM: %s: am33xx_do_wfi copy to sram failed\n", 105 __func__); 106 return -ENODEV; 107 } 108 109 table_addr = 110 sram_suspend_address((unsigned long)pm_sram->emif_sram_table); 111 ret = ti_emif_copy_pm_function_table(sram_pool, (void *)table_addr); 112 if (ret) { 113 dev_dbg(pm33xx_dev, 114 "PM: %s: EMIF function copy failed\n", __func__); 115 return -EPROBE_DEFER; 116 } 117 118 ro_data_addr = 119 sram_suspend_address((unsigned long)pm_sram->ro_sram_data); 120 copy_addr = sram_exec_copy(sram_pool, (void *)ro_data_addr, 121 &ro_sram_data, 122 sizeof(ro_sram_data)); 123 if (!copy_addr) { 124 dev_err(pm33xx_dev, 125 "PM: %s: ro_sram_data copy to sram failed\n", 126 __func__); 127 return -ENODEV; 128 } 129 130 return 0; 131 } 132 133 static int am33xx_do_sram_idle(u32 wfi_flags) 134 { 135 int ret = 0; 136 137 if (!m3_ipc || !pm_ops) 138 return 0; 139 140 if (wfi_flags & WFI_FLAG_WAKE_M3) 141 ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_IDLE); 142 143 return pm_ops->cpu_suspend(am33xx_do_wfi_sram, wfi_flags); 144 } 145 146 static int __init am43xx_map_gic(void) 147 { 148 gic_dist_base = ioremap(AM43XX_GIC_DIST_BASE, SZ_4K); 149 150 if (!gic_dist_base) 151 return -ENOMEM; 152 153 return 0; 154 } 155 156 #ifdef CONFIG_SUSPEND 157 static struct wkup_m3_wakeup_src rtc_wake_src(void) 158 { 159 u32 i; 160 161 i = __raw_readl(pm_ops->get_rtc_base_addr() + 0x44) & 0x40; 162 163 if (i) { 164 retrigger_irq = rtc_alarm_wakeup.irq_nr; 165 return rtc_alarm_wakeup; 166 } 167 168 retrigger_irq = rtc_ext_wakeup.irq_nr; 169 170 return rtc_ext_wakeup; 171 } 172 173 static int am33xx_rtc_only_idle(unsigned long wfi_flags) 174 { 175 omap_rtc_power_off_program(&omap_rtc->dev); 176 am33xx_do_wfi_sram(wfi_flags); 177 return 0; 178 } 179 180 static int am33xx_pm_suspend(suspend_state_t suspend_state) 181 { 182 int i, ret = 0; 183 184 if (suspend_state == PM_SUSPEND_MEM && 185 pm_ops->check_off_mode_enable()) { 186 pm_ops->prepare_rtc_suspend(); 187 pm_ops->save_context(); 188 suspend_wfi_flags |= WFI_FLAG_RTC_ONLY; 189 clk_save_context(); 190 ret = pm_ops->soc_suspend(suspend_state, am33xx_rtc_only_idle, 191 suspend_wfi_flags); 192 193 suspend_wfi_flags &= ~WFI_FLAG_RTC_ONLY; 194 dev_info(pm33xx_dev, "Entering RTC Only mode with DDR in self-refresh\n"); 195 196 if (!ret) { 197 clk_restore_context(); 198 pm_ops->restore_context(); 199 m3_ipc->ops->set_rtc_only(m3_ipc); 200 am33xx_push_sram_idle(); 201 } 202 } else { 203 ret = pm_ops->soc_suspend(suspend_state, am33xx_do_wfi_sram, 204 suspend_wfi_flags); 205 } 206 207 if (ret) { 208 dev_err(pm33xx_dev, "PM: Kernel suspend failure\n"); 209 } else { 210 i = m3_ipc->ops->request_pm_status(m3_ipc); 211 212 switch (i) { 213 case 0: 214 dev_info(pm33xx_dev, 215 "PM: Successfully put all powerdomains to target state\n"); 216 break; 217 case 1: 218 dev_err(pm33xx_dev, 219 "PM: Could not transition all powerdomains to target state\n"); 220 ret = -1; 221 break; 222 default: 223 dev_err(pm33xx_dev, 224 "PM: CM3 returned unknown result = %d\n", i); 225 ret = -1; 226 } 227 228 /* print the wakeup reason */ 229 if (rtc_only_idle) { 230 wakeup_src = rtc_wake_src(); 231 pr_info("PM: Wakeup source %s\n", wakeup_src.src); 232 } else { 233 pr_info("PM: Wakeup source %s\n", 234 m3_ipc->ops->request_wake_src(m3_ipc)); 235 } 236 } 237 238 if (suspend_state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) 239 pm_ops->prepare_rtc_resume(); 240 241 return ret; 242 } 243 244 static int am33xx_pm_enter(suspend_state_t suspend_state) 245 { 246 int ret = 0; 247 248 switch (suspend_state) { 249 case PM_SUSPEND_MEM: 250 case PM_SUSPEND_STANDBY: 251 ret = am33xx_pm_suspend(suspend_state); 252 break; 253 default: 254 ret = -EINVAL; 255 } 256 257 return ret; 258 } 259 260 static int am33xx_pm_begin(suspend_state_t state) 261 { 262 int ret = -EINVAL; 263 struct nvmem_device *nvmem; 264 265 if (state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) { 266 nvmem = devm_nvmem_device_get(&omap_rtc->dev, 267 "omap_rtc_scratch0"); 268 if (!IS_ERR(nvmem)) 269 nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4, 270 (void *)&rtc_magic_val); 271 rtc_only_idle = 1; 272 } else { 273 rtc_only_idle = 0; 274 } 275 276 pm_ops->begin_suspend(); 277 278 switch (state) { 279 case PM_SUSPEND_MEM: 280 ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_DEEPSLEEP); 281 break; 282 case PM_SUSPEND_STANDBY: 283 ret = m3_ipc->ops->prepare_low_power(m3_ipc, WKUP_M3_STANDBY); 284 break; 285 } 286 287 return ret; 288 } 289 290 static void am33xx_pm_end(void) 291 { 292 u32 val = 0; 293 struct nvmem_device *nvmem; 294 295 nvmem = devm_nvmem_device_get(&omap_rtc->dev, "omap_rtc_scratch0"); 296 if (IS_ERR(nvmem)) 297 return; 298 299 m3_ipc->ops->finish_low_power(m3_ipc); 300 if (rtc_only_idle) { 301 if (retrigger_irq) { 302 /* 303 * 32 bits of Interrupt Set-Pending correspond to 32 304 * 32 interrupts. Compute the bit offset of the 305 * Interrupt and set that particular bit 306 * Compute the register offset by dividing interrupt 307 * number by 32 and mutiplying by 4 308 */ 309 writel_relaxed(1 << (retrigger_irq & 31), 310 gic_dist_base + GIC_INT_SET_PENDING_BASE 311 + retrigger_irq / 32 * 4); 312 } 313 314 nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4, 315 (void *)&val); 316 } 317 318 rtc_only_idle = 0; 319 320 pm_ops->finish_suspend(); 321 } 322 323 static int am33xx_pm_valid(suspend_state_t state) 324 { 325 switch (state) { 326 case PM_SUSPEND_STANDBY: 327 case PM_SUSPEND_MEM: 328 return 1; 329 default: 330 return 0; 331 } 332 } 333 334 static const struct platform_suspend_ops am33xx_pm_ops = { 335 .begin = am33xx_pm_begin, 336 .end = am33xx_pm_end, 337 .enter = am33xx_pm_enter, 338 .valid = am33xx_pm_valid, 339 }; 340 #endif /* CONFIG_SUSPEND */ 341 342 static void am33xx_pm_set_ipc_ops(void) 343 { 344 u32 resume_address; 345 int temp; 346 347 temp = ti_emif_get_mem_type(); 348 if (temp < 0) { 349 dev_err(pm33xx_dev, "PM: Cannot determine memory type, no PM available\n"); 350 return; 351 } 352 m3_ipc->ops->set_mem_type(m3_ipc, temp); 353 354 /* Physical resume address to be used by ROM code */ 355 resume_address = am33xx_do_wfi_sram_phys + 356 *pm_sram->resume_offset + 0x4; 357 358 m3_ipc->ops->set_resume_address(m3_ipc, (void *)resume_address); 359 } 360 361 static void am33xx_pm_free_sram(void) 362 { 363 gen_pool_free(sram_pool, ocmcram_location, *pm_sram->do_wfi_sz); 364 gen_pool_free(sram_pool_data, ocmcram_location_data, 365 sizeof(struct am33xx_pm_ro_sram_data)); 366 } 367 368 /* 369 * Push the minimal suspend-resume code to SRAM 370 */ 371 static int am33xx_pm_alloc_sram(void) 372 { 373 struct device_node *np; 374 int ret = 0; 375 376 np = of_find_compatible_node(NULL, NULL, "ti,omap3-mpu"); 377 if (!np) { 378 np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu"); 379 if (!np) { 380 dev_err(pm33xx_dev, "PM: %s: Unable to find device node for mpu\n", 381 __func__); 382 return -ENODEV; 383 } 384 } 385 386 sram_pool = of_gen_pool_get(np, "pm-sram", 0); 387 if (!sram_pool) { 388 dev_err(pm33xx_dev, "PM: %s: Unable to get sram pool for ocmcram\n", 389 __func__); 390 ret = -ENODEV; 391 goto mpu_put_node; 392 } 393 394 sram_pool_data = of_gen_pool_get(np, "pm-sram", 1); 395 if (!sram_pool_data) { 396 dev_err(pm33xx_dev, "PM: %s: Unable to get sram data pool for ocmcram\n", 397 __func__); 398 ret = -ENODEV; 399 goto mpu_put_node; 400 } 401 402 ocmcram_location = gen_pool_alloc(sram_pool, *pm_sram->do_wfi_sz); 403 if (!ocmcram_location) { 404 dev_err(pm33xx_dev, "PM: %s: Unable to allocate memory from ocmcram\n", 405 __func__); 406 ret = -ENOMEM; 407 goto mpu_put_node; 408 } 409 410 ocmcram_location_data = gen_pool_alloc(sram_pool_data, 411 sizeof(struct emif_regs_amx3)); 412 if (!ocmcram_location_data) { 413 dev_err(pm33xx_dev, "PM: Unable to allocate memory from ocmcram\n"); 414 gen_pool_free(sram_pool, ocmcram_location, *pm_sram->do_wfi_sz); 415 ret = -ENOMEM; 416 } 417 418 mpu_put_node: 419 of_node_put(np); 420 return ret; 421 } 422 423 static int am33xx_pm_rtc_setup(void) 424 { 425 struct device_node *np; 426 unsigned long val = 0; 427 struct nvmem_device *nvmem; 428 429 np = of_find_node_by_name(NULL, "rtc"); 430 431 if (of_device_is_available(np)) { 432 omap_rtc = rtc_class_open("rtc0"); 433 if (!omap_rtc) { 434 pr_warn("PM: rtc0 not available"); 435 return -EPROBE_DEFER; 436 } 437 438 nvmem = devm_nvmem_device_get(&omap_rtc->dev, 439 "omap_rtc_scratch0"); 440 if (!IS_ERR(nvmem)) { 441 nvmem_device_read(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 442 4, (void *)&rtc_magic_val); 443 if ((rtc_magic_val & 0xffff) != RTC_REG_BOOT_MAGIC) 444 pr_warn("PM: bootloader does not support rtc-only!\n"); 445 446 nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 447 4, (void *)&val); 448 val = pm_sram->resume_address; 449 nvmem_device_write(nvmem, RTC_SCRATCH_RESUME_REG * 4, 450 4, (void *)&val); 451 } 452 } else { 453 pr_warn("PM: no-rtc available, rtc-only mode disabled.\n"); 454 } 455 456 return 0; 457 } 458 459 static int am33xx_pm_probe(struct platform_device *pdev) 460 { 461 struct device *dev = &pdev->dev; 462 int ret; 463 464 if (!of_machine_is_compatible("ti,am33xx") && 465 !of_machine_is_compatible("ti,am43")) 466 return -ENODEV; 467 468 pm_ops = dev->platform_data; 469 if (!pm_ops) { 470 dev_err(dev, "PM: Cannot get core PM ops!\n"); 471 return -ENODEV; 472 } 473 474 ret = am43xx_map_gic(); 475 if (ret) { 476 pr_err("PM: Could not ioremap GIC base\n"); 477 return ret; 478 } 479 480 pm_sram = pm_ops->get_sram_addrs(); 481 if (!pm_sram) { 482 dev_err(dev, "PM: Cannot get PM asm function addresses!!\n"); 483 return -ENODEV; 484 } 485 486 m3_ipc = wkup_m3_ipc_get(); 487 if (!m3_ipc) { 488 pr_err("PM: Cannot get wkup_m3_ipc handle\n"); 489 return -EPROBE_DEFER; 490 } 491 492 pm33xx_dev = dev; 493 494 ret = am33xx_pm_alloc_sram(); 495 if (ret) 496 return ret; 497 498 ret = am33xx_pm_rtc_setup(); 499 if (ret) 500 goto err_free_sram; 501 502 ret = am33xx_push_sram_idle(); 503 if (ret) 504 goto err_free_sram; 505 506 am33xx_pm_set_ipc_ops(); 507 508 #ifdef CONFIG_SUSPEND 509 suspend_set_ops(&am33xx_pm_ops); 510 511 /* 512 * For a system suspend we must flush the caches, we want 513 * the DDR in self-refresh, we want to save the context 514 * of the EMIF, and we want the wkup_m3 to handle low-power 515 * transition. 516 */ 517 suspend_wfi_flags |= WFI_FLAG_FLUSH_CACHE; 518 suspend_wfi_flags |= WFI_FLAG_SELF_REFRESH; 519 suspend_wfi_flags |= WFI_FLAG_SAVE_EMIF; 520 suspend_wfi_flags |= WFI_FLAG_WAKE_M3; 521 #endif /* CONFIG_SUSPEND */ 522 523 ret = pm_ops->init(am33xx_do_sram_idle); 524 if (ret) { 525 dev_err(dev, "Unable to call core pm init!\n"); 526 ret = -ENODEV; 527 goto err_put_wkup_m3_ipc; 528 } 529 530 return 0; 531 532 err_put_wkup_m3_ipc: 533 wkup_m3_ipc_put(m3_ipc); 534 err_free_sram: 535 am33xx_pm_free_sram(); 536 pm33xx_dev = NULL; 537 return ret; 538 } 539 540 static int am33xx_pm_remove(struct platform_device *pdev) 541 { 542 if (pm_ops->deinit) 543 pm_ops->deinit(); 544 suspend_set_ops(NULL); 545 wkup_m3_ipc_put(m3_ipc); 546 am33xx_pm_free_sram(); 547 return 0; 548 } 549 550 static struct platform_driver am33xx_pm_driver = { 551 .driver = { 552 .name = "pm33xx", 553 }, 554 .probe = am33xx_pm_probe, 555 .remove = am33xx_pm_remove, 556 }; 557 module_platform_driver(am33xx_pm_driver); 558 559 MODULE_ALIAS("platform:pm33xx"); 560 MODULE_LICENSE("GPL v2"); 561 MODULE_DESCRIPTION("am33xx power management driver"); 562