1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved. 4 */ 5 6 #include <linux/kernel.h> 7 #include <linux/of.h> 8 #include <linux/of_address.h> 9 #include <linux/io.h> 10 11 #include <soc/tegra/fuse.h> 12 #include <soc/tegra/common.h> 13 14 #include "fuse.h" 15 16 #define FUSE_SKU_INFO 0x10 17 18 #define PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT 4 19 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG \ 20 (0xf << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT) 21 #define PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT \ 22 (0x3 << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT) 23 24 static bool long_ram_code; 25 static u32 strapping; 26 static u32 chipid; 27 28 u32 tegra_read_chipid(void) 29 { 30 WARN(!chipid, "Tegra ABP MISC not yet available\n"); 31 32 return chipid; 33 } 34 35 u8 tegra_get_chip_id(void) 36 { 37 return (tegra_read_chipid() >> 8) & 0xff; 38 } 39 40 u32 tegra_read_straps(void) 41 { 42 WARN(!chipid, "Tegra ABP MISC not yet available\n"); 43 44 return strapping; 45 } 46 47 u32 tegra_read_ram_code(void) 48 { 49 u32 straps = tegra_read_straps(); 50 51 if (long_ram_code) 52 straps &= PMC_STRAPPING_OPT_A_RAM_CODE_MASK_LONG; 53 else 54 straps &= PMC_STRAPPING_OPT_A_RAM_CODE_MASK_SHORT; 55 56 return straps >> PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT; 57 } 58 59 static const struct of_device_id apbmisc_match[] __initconst = { 60 { .compatible = "nvidia,tegra20-apbmisc", }, 61 { .compatible = "nvidia,tegra186-misc", }, 62 { .compatible = "nvidia,tegra194-misc", }, 63 {}, 64 }; 65 66 void __init tegra_init_revision(void) 67 { 68 u32 id, chip_id, minor_rev; 69 int rev; 70 71 id = tegra_read_chipid(); 72 chip_id = (id >> 8) & 0xff; 73 minor_rev = (id >> 16) & 0xf; 74 75 switch (minor_rev) { 76 case 1: 77 rev = TEGRA_REVISION_A01; 78 break; 79 case 2: 80 rev = TEGRA_REVISION_A02; 81 break; 82 case 3: 83 if (chip_id == TEGRA20 && (tegra_fuse_read_spare(18) || 84 tegra_fuse_read_spare(19))) 85 rev = TEGRA_REVISION_A03p; 86 else 87 rev = TEGRA_REVISION_A03; 88 break; 89 case 4: 90 rev = TEGRA_REVISION_A04; 91 break; 92 default: 93 rev = TEGRA_REVISION_UNKNOWN; 94 } 95 96 tegra_sku_info.revision = rev; 97 98 tegra_sku_info.sku_id = tegra_fuse_read_early(FUSE_SKU_INFO); 99 } 100 101 void __init tegra_init_apbmisc(void) 102 { 103 void __iomem *apbmisc_base, *strapping_base; 104 struct resource apbmisc, straps; 105 struct device_node *np; 106 107 np = of_find_matching_node(NULL, apbmisc_match); 108 if (!np) { 109 /* 110 * Fall back to legacy initialization for 32-bit ARM only. All 111 * 64-bit ARM device tree files for Tegra are required to have 112 * an APBMISC node. 113 * 114 * This is for backwards-compatibility with old device trees 115 * that didn't contain an APBMISC node. 116 */ 117 if (IS_ENABLED(CONFIG_ARM) && soc_is_tegra()) { 118 /* APBMISC registers (chip revision, ...) */ 119 apbmisc.start = 0x70000800; 120 apbmisc.end = 0x70000863; 121 apbmisc.flags = IORESOURCE_MEM; 122 123 /* strapping options */ 124 if (of_machine_is_compatible("nvidia,tegra124")) { 125 straps.start = 0x7000e864; 126 straps.end = 0x7000e867; 127 } else { 128 straps.start = 0x70000008; 129 straps.end = 0x7000000b; 130 } 131 132 straps.flags = IORESOURCE_MEM; 133 134 pr_warn("Using APBMISC region %pR\n", &apbmisc); 135 pr_warn("Using strapping options registers %pR\n", 136 &straps); 137 } else { 138 /* 139 * At this point we're not running on Tegra, so play 140 * nice with multi-platform kernels. 141 */ 142 return; 143 } 144 } else { 145 /* 146 * Extract information from the device tree if we've found a 147 * matching node. 148 */ 149 if (of_address_to_resource(np, 0, &apbmisc) < 0) { 150 pr_err("failed to get APBMISC registers\n"); 151 return; 152 } 153 154 if (of_address_to_resource(np, 1, &straps) < 0) { 155 pr_err("failed to get strapping options registers\n"); 156 return; 157 } 158 } 159 160 apbmisc_base = ioremap(apbmisc.start, resource_size(&apbmisc)); 161 if (!apbmisc_base) { 162 pr_err("failed to map APBMISC registers\n"); 163 } else { 164 chipid = readl_relaxed(apbmisc_base + 4); 165 iounmap(apbmisc_base); 166 } 167 168 strapping_base = ioremap(straps.start, resource_size(&straps)); 169 if (!strapping_base) { 170 pr_err("failed to map strapping options registers\n"); 171 } else { 172 strapping = readl_relaxed(strapping_base); 173 iounmap(strapping_base); 174 } 175 176 long_ram_code = of_property_read_bool(np, "nvidia,long-ram-code"); 177 } 178