xref: /openbmc/linux/drivers/soc/rockchip/grf.c (revision f519f0be)
1 /*
2  * Rockchip Generic Register Files setup
3  *
4  * Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 
11 #include <linux/err.h>
12 #include <linux/mfd/syscon.h>
13 #include <linux/of_device.h>
14 #include <linux/platform_device.h>
15 #include <linux/regmap.h>
16 
17 #define HIWORD_UPDATE(val, mask, shift) \
18 		((val) << (shift) | (mask) << ((shift) + 16))
19 
20 struct rockchip_grf_value {
21 	const char *desc;
22 	u32 reg;
23 	u32 val;
24 };
25 
26 struct rockchip_grf_info {
27 	const struct rockchip_grf_value *values;
28 	int num_values;
29 };
30 
31 #define RK3036_GRF_SOC_CON0		0x140
32 
33 static const struct rockchip_grf_value rk3036_defaults[] __initconst = {
34 	/*
35 	 * Disable auto jtag/sdmmc switching that causes issues with the
36 	 * clock-framework and the mmc controllers making them unreliable.
37 	 */
38 	{ "jtag switching", RK3036_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 11) },
39 };
40 
41 static const struct rockchip_grf_info rk3036_grf __initconst = {
42 	.values = rk3036_defaults,
43 	.num_values = ARRAY_SIZE(rk3036_defaults),
44 };
45 
46 #define RK3128_GRF_SOC_CON0		0x140
47 
48 static const struct rockchip_grf_value rk3128_defaults[] __initconst = {
49 	{ "jtag switching", RK3128_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 8) },
50 };
51 
52 static const struct rockchip_grf_info rk3128_grf __initconst = {
53 	.values = rk3128_defaults,
54 	.num_values = ARRAY_SIZE(rk3128_defaults),
55 };
56 
57 #define RK3228_GRF_SOC_CON6		0x418
58 
59 static const struct rockchip_grf_value rk3228_defaults[] __initconst = {
60 	{ "jtag switching", RK3228_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 8) },
61 };
62 
63 static const struct rockchip_grf_info rk3228_grf __initconst = {
64 	.values = rk3228_defaults,
65 	.num_values = ARRAY_SIZE(rk3228_defaults),
66 };
67 
68 #define RK3288_GRF_SOC_CON0		0x244
69 #define RK3288_GRF_SOC_CON2		0x24c
70 
71 static const struct rockchip_grf_value rk3288_defaults[] __initconst = {
72 	{ "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) },
73 	{ "pwm select", RK3288_GRF_SOC_CON2, HIWORD_UPDATE(1, 1, 0) },
74 };
75 
76 static const struct rockchip_grf_info rk3288_grf __initconst = {
77 	.values = rk3288_defaults,
78 	.num_values = ARRAY_SIZE(rk3288_defaults),
79 };
80 
81 #define RK3328_GRF_SOC_CON4		0x410
82 
83 static const struct rockchip_grf_value rk3328_defaults[] __initconst = {
84 	{ "jtag switching", RK3328_GRF_SOC_CON4, HIWORD_UPDATE(0, 1, 12) },
85 };
86 
87 static const struct rockchip_grf_info rk3328_grf __initconst = {
88 	.values = rk3328_defaults,
89 	.num_values = ARRAY_SIZE(rk3328_defaults),
90 };
91 
92 #define RK3368_GRF_SOC_CON15		0x43c
93 
94 static const struct rockchip_grf_value rk3368_defaults[] __initconst = {
95 	{ "jtag switching", RK3368_GRF_SOC_CON15, HIWORD_UPDATE(0, 1, 13) },
96 };
97 
98 static const struct rockchip_grf_info rk3368_grf __initconst = {
99 	.values = rk3368_defaults,
100 	.num_values = ARRAY_SIZE(rk3368_defaults),
101 };
102 
103 #define RK3399_GRF_SOC_CON7		0xe21c
104 
105 static const struct rockchip_grf_value rk3399_defaults[] __initconst = {
106 	{ "jtag switching", RK3399_GRF_SOC_CON7, HIWORD_UPDATE(0, 1, 12) },
107 };
108 
109 static const struct rockchip_grf_info rk3399_grf __initconst = {
110 	.values = rk3399_defaults,
111 	.num_values = ARRAY_SIZE(rk3399_defaults),
112 };
113 
114 static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
115 	{
116 		.compatible = "rockchip,rk3036-grf",
117 		.data = (void *)&rk3036_grf,
118 	}, {
119 		.compatible = "rockchip,rk3128-grf",
120 		.data = (void *)&rk3128_grf,
121 	}, {
122 		.compatible = "rockchip,rk3228-grf",
123 		.data = (void *)&rk3228_grf,
124 	}, {
125 		.compatible = "rockchip,rk3288-grf",
126 		.data = (void *)&rk3288_grf,
127 	}, {
128 		.compatible = "rockchip,rk3328-grf",
129 		.data = (void *)&rk3328_grf,
130 	}, {
131 		.compatible = "rockchip,rk3368-grf",
132 		.data = (void *)&rk3368_grf,
133 	}, {
134 		.compatible = "rockchip,rk3399-grf",
135 		.data = (void *)&rk3399_grf,
136 	},
137 	{ /* sentinel */ },
138 };
139 
140 static int __init rockchip_grf_init(void)
141 {
142 	const struct rockchip_grf_info *grf_info;
143 	const struct of_device_id *match;
144 	struct device_node *np;
145 	struct regmap *grf;
146 	int ret, i;
147 
148 	np = of_find_matching_node_and_match(NULL, rockchip_grf_dt_match,
149 					     &match);
150 	if (!np)
151 		return -ENODEV;
152 	if (!match || !match->data) {
153 		pr_err("%s: missing grf data\n", __func__);
154 		return -EINVAL;
155 	}
156 
157 	grf_info = match->data;
158 
159 	grf = syscon_node_to_regmap(np);
160 	if (IS_ERR(grf)) {
161 		pr_err("%s: could not get grf syscon\n", __func__);
162 		return PTR_ERR(grf);
163 	}
164 
165 	for (i = 0; i < grf_info->num_values; i++) {
166 		const struct rockchip_grf_value *val = &grf_info->values[i];
167 
168 		pr_debug("%s: adjusting %s in %#6x to %#10x\n", __func__,
169 			val->desc, val->reg, val->val);
170 		ret = regmap_write(grf, val->reg, val->val);
171 		if (ret < 0)
172 			pr_err("%s: write to %#6x failed with %d\n",
173 			       __func__, val->reg, ret);
174 	}
175 
176 	return 0;
177 }
178 postcore_initcall(rockchip_grf_init);
179