xref: /openbmc/linux/drivers/soc/rockchip/grf.c (revision cfdfc14e)
1 /*
2  * Rockchip Generic Register Files setup
3  *
4  * Copyright (c) 2016 Heiko Stuebner <heiko@sntech.de>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 
11 #include <linux/err.h>
12 #include <linux/mfd/syscon.h>
13 #include <linux/of_device.h>
14 #include <linux/platform_device.h>
15 #include <linux/regmap.h>
16 
17 #define HIWORD_UPDATE(val, mask, shift) \
18 		((val) << (shift) | (mask) << ((shift) + 16))
19 
20 struct rockchip_grf_value {
21 	const char *desc;
22 	u32 reg;
23 	u32 val;
24 };
25 
26 struct rockchip_grf_info {
27 	const struct rockchip_grf_value *values;
28 	int num_values;
29 };
30 
31 #define RK3036_GRF_SOC_CON0		0x140
32 
33 static const struct rockchip_grf_value rk3036_defaults[] __initconst = {
34 	/*
35 	 * Disable auto jtag/sdmmc switching that causes issues with the
36 	 * clock-framework and the mmc controllers making them unreliable.
37 	 */
38 	{ "jtag switching", RK3036_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 11) },
39 };
40 
41 static const struct rockchip_grf_info rk3036_grf __initconst = {
42 	.values = rk3036_defaults,
43 	.num_values = ARRAY_SIZE(rk3036_defaults),
44 };
45 
46 #define RK3128_GRF_SOC_CON0		0x140
47 
48 static const struct rockchip_grf_value rk3128_defaults[] __initconst = {
49 	{ "jtag switching", RK3128_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 8) },
50 };
51 
52 static const struct rockchip_grf_info rk3128_grf __initconst = {
53 	.values = rk3128_defaults,
54 	.num_values = ARRAY_SIZE(rk3128_defaults),
55 };
56 
57 #define RK3228_GRF_SOC_CON6		0x418
58 
59 static const struct rockchip_grf_value rk3228_defaults[] __initconst = {
60 	{ "jtag switching", RK3228_GRF_SOC_CON6, HIWORD_UPDATE(0, 1, 8) },
61 };
62 
63 static const struct rockchip_grf_info rk3228_grf __initconst = {
64 	.values = rk3228_defaults,
65 	.num_values = ARRAY_SIZE(rk3228_defaults),
66 };
67 
68 #define RK3288_GRF_SOC_CON0		0x244
69 
70 static const struct rockchip_grf_value rk3288_defaults[] __initconst = {
71 	{ "jtag switching", RK3288_GRF_SOC_CON0, HIWORD_UPDATE(0, 1, 12) },
72 };
73 
74 static const struct rockchip_grf_info rk3288_grf __initconst = {
75 	.values = rk3288_defaults,
76 	.num_values = ARRAY_SIZE(rk3288_defaults),
77 };
78 
79 #define RK3328_GRF_SOC_CON4		0x410
80 
81 static const struct rockchip_grf_value rk3328_defaults[] __initconst = {
82 	{ "jtag switching", RK3328_GRF_SOC_CON4, HIWORD_UPDATE(0, 1, 12) },
83 };
84 
85 static const struct rockchip_grf_info rk3328_grf __initconst = {
86 	.values = rk3328_defaults,
87 	.num_values = ARRAY_SIZE(rk3328_defaults),
88 };
89 
90 #define RK3368_GRF_SOC_CON15		0x43c
91 
92 static const struct rockchip_grf_value rk3368_defaults[] __initconst = {
93 	{ "jtag switching", RK3368_GRF_SOC_CON15, HIWORD_UPDATE(0, 1, 13) },
94 };
95 
96 static const struct rockchip_grf_info rk3368_grf __initconst = {
97 	.values = rk3368_defaults,
98 	.num_values = ARRAY_SIZE(rk3368_defaults),
99 };
100 
101 #define RK3399_GRF_SOC_CON7		0xe21c
102 
103 static const struct rockchip_grf_value rk3399_defaults[] __initconst = {
104 	{ "jtag switching", RK3399_GRF_SOC_CON7, HIWORD_UPDATE(0, 1, 12) },
105 };
106 
107 static const struct rockchip_grf_info rk3399_grf __initconst = {
108 	.values = rk3399_defaults,
109 	.num_values = ARRAY_SIZE(rk3399_defaults),
110 };
111 
112 static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
113 	{
114 		.compatible = "rockchip,rk3036-grf",
115 		.data = (void *)&rk3036_grf,
116 	}, {
117 		.compatible = "rockchip,rk3128-grf",
118 		.data = (void *)&rk3128_grf,
119 	}, {
120 		.compatible = "rockchip,rk3228-grf",
121 		.data = (void *)&rk3228_grf,
122 	}, {
123 		.compatible = "rockchip,rk3288-grf",
124 		.data = (void *)&rk3288_grf,
125 	}, {
126 		.compatible = "rockchip,rk3328-grf",
127 		.data = (void *)&rk3328_grf,
128 	}, {
129 		.compatible = "rockchip,rk3368-grf",
130 		.data = (void *)&rk3368_grf,
131 	}, {
132 		.compatible = "rockchip,rk3399-grf",
133 		.data = (void *)&rk3399_grf,
134 	},
135 	{ /* sentinel */ },
136 };
137 
138 static int __init rockchip_grf_init(void)
139 {
140 	const struct rockchip_grf_info *grf_info;
141 	const struct of_device_id *match;
142 	struct device_node *np;
143 	struct regmap *grf;
144 	int ret, i;
145 
146 	np = of_find_matching_node_and_match(NULL, rockchip_grf_dt_match,
147 					     &match);
148 	if (!np)
149 		return -ENODEV;
150 	if (!match || !match->data) {
151 		pr_err("%s: missing grf data\n", __func__);
152 		return -EINVAL;
153 	}
154 
155 	grf_info = match->data;
156 
157 	grf = syscon_node_to_regmap(np);
158 	if (IS_ERR(grf)) {
159 		pr_err("%s: could not get grf syscon\n", __func__);
160 		return PTR_ERR(grf);
161 	}
162 
163 	for (i = 0; i < grf_info->num_values; i++) {
164 		const struct rockchip_grf_value *val = &grf_info->values[i];
165 
166 		pr_debug("%s: adjusting %s in %#6x to %#10x\n", __func__,
167 			val->desc, val->reg, val->val);
168 		ret = regmap_write(grf, val->reg, val->val);
169 		if (ret < 0)
170 			pr_err("%s: write to %#6x failed with %d\n",
171 			       __func__, val->reg, ret);
172 	}
173 
174 	return 0;
175 }
176 postcore_initcall(rockchip_grf_init);
177