xref: /openbmc/linux/drivers/soc/renesas/rcar-rst.c (revision addee42a)
1 /*
2  * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
3  *
4  * Copyright (C) 2016 Glider bvba
5  *
6  * This file is subject to the terms and conditions of the GNU General Public
7  * License.  See the file "COPYING" in the main directory of this archive
8  * for more details.
9  */
10 
11 #include <linux/err.h>
12 #include <linux/io.h>
13 #include <linux/of_address.h>
14 #include <linux/soc/renesas/rcar-rst.h>
15 
16 #define WDTRSTCR_RESET		0xA55A0002
17 #define WDTRSTCR		0x0054
18 
19 static int rcar_rst_enable_wdt_reset(void __iomem *base)
20 {
21 	iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
22 	return 0;
23 }
24 
25 struct rst_config {
26 	unsigned int modemr;		/* Mode Monitoring Register Offset */
27 	int (*configure)(void *base);	/* Platform specific configuration */
28 };
29 
30 static const struct rst_config rcar_rst_gen1 __initconst = {
31 	.modemr = 0x20,
32 };
33 
34 static const struct rst_config rcar_rst_gen2 __initconst = {
35 	.modemr = 0x60,
36 	.configure = rcar_rst_enable_wdt_reset,
37 };
38 
39 static const struct rst_config rcar_rst_gen3 __initconst = {
40 	.modemr = 0x60,
41 };
42 
43 static const struct of_device_id rcar_rst_matches[] __initconst = {
44 	/* RZ/G is handled like R-Car Gen2 */
45 	{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
46 	{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
47 	/* R-Car Gen1 */
48 	{ .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
49 	{ .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
50 	/* R-Car Gen2 */
51 	{ .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
52 	{ .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
53 	{ .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
54 	{ .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
55 	{ .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
56 	/* R-Car Gen3 */
57 	{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
58 	{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
59 	{ .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
60 	{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
61 	{ .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
62 	{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
63 	{ /* sentinel */ }
64 };
65 
66 static void __iomem *rcar_rst_base __initdata;
67 static u32 saved_mode __initdata;
68 
69 static int __init rcar_rst_init(void)
70 {
71 	const struct of_device_id *match;
72 	const struct rst_config *cfg;
73 	struct device_node *np;
74 	void __iomem *base;
75 	int error = 0;
76 
77 	np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
78 	if (!np)
79 		return -ENODEV;
80 
81 	base = of_iomap(np, 0);
82 	if (!base) {
83 		pr_warn("%pOF: Cannot map regs\n", np);
84 		error = -ENOMEM;
85 		goto out_put;
86 	}
87 
88 	rcar_rst_base = base;
89 	cfg = match->data;
90 	saved_mode = ioread32(base + cfg->modemr);
91 	if (cfg->configure) {
92 		error = cfg->configure(base);
93 		if (error) {
94 			pr_warn("%pOF: Cannot run SoC specific configuration\n",
95 				np);
96 			goto out_put;
97 		}
98 	}
99 
100 	pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
101 
102 out_put:
103 	of_node_put(np);
104 	return error;
105 }
106 
107 int __init rcar_rst_read_mode_pins(u32 *mode)
108 {
109 	int error;
110 
111 	if (!rcar_rst_base) {
112 		error = rcar_rst_init();
113 		if (error)
114 			return error;
115 	}
116 
117 	*mode = saved_mode;
118 	return 0;
119 }
120