xref: /openbmc/linux/drivers/soc/renesas/rcar-rst.c (revision 11c416e3)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * R-Car Gen1 RESET/WDT, R-Car Gen2, Gen3, and RZ/G RST Driver
4  *
5  * Copyright (C) 2016 Glider bvba
6  */
7 
8 #include <linux/err.h>
9 #include <linux/io.h>
10 #include <linux/of_address.h>
11 #include <linux/soc/renesas/rcar-rst.h>
12 
13 #define WDTRSTCR_RESET		0xA55A0002
14 #define WDTRSTCR		0x0054
15 
16 static int rcar_rst_enable_wdt_reset(void __iomem *base)
17 {
18 	iowrite32(WDTRSTCR_RESET, base + WDTRSTCR);
19 	return 0;
20 }
21 
22 struct rst_config {
23 	unsigned int modemr;		/* Mode Monitoring Register Offset */
24 	int (*configure)(void __iomem *base);	/* Platform specific config */
25 };
26 
27 static const struct rst_config rcar_rst_gen1 __initconst = {
28 	.modemr = 0x20,
29 };
30 
31 static const struct rst_config rcar_rst_gen2 __initconst = {
32 	.modemr = 0x60,
33 	.configure = rcar_rst_enable_wdt_reset,
34 };
35 
36 static const struct rst_config rcar_rst_gen3 __initconst = {
37 	.modemr = 0x60,
38 };
39 
40 static const struct of_device_id rcar_rst_matches[] __initconst = {
41 	/* RZ/G1 is handled like R-Car Gen2 */
42 	{ .compatible = "renesas,r8a7742-rst", .data = &rcar_rst_gen2 },
43 	{ .compatible = "renesas,r8a7743-rst", .data = &rcar_rst_gen2 },
44 	{ .compatible = "renesas,r8a7744-rst", .data = &rcar_rst_gen2 },
45 	{ .compatible = "renesas,r8a7745-rst", .data = &rcar_rst_gen2 },
46 	{ .compatible = "renesas,r8a77470-rst", .data = &rcar_rst_gen2 },
47 	/* RZ/G2 is handled like R-Car Gen3 */
48 	{ .compatible = "renesas,r8a774a1-rst", .data = &rcar_rst_gen3 },
49 	{ .compatible = "renesas,r8a774b1-rst", .data = &rcar_rst_gen3 },
50 	{ .compatible = "renesas,r8a774c0-rst", .data = &rcar_rst_gen3 },
51 	/* R-Car Gen1 */
52 	{ .compatible = "renesas,r8a7778-reset-wdt", .data = &rcar_rst_gen1 },
53 	{ .compatible = "renesas,r8a7779-reset-wdt", .data = &rcar_rst_gen1 },
54 	/* R-Car Gen2 */
55 	{ .compatible = "renesas,r8a7790-rst", .data = &rcar_rst_gen2 },
56 	{ .compatible = "renesas,r8a7791-rst", .data = &rcar_rst_gen2 },
57 	{ .compatible = "renesas,r8a7792-rst", .data = &rcar_rst_gen2 },
58 	{ .compatible = "renesas,r8a7793-rst", .data = &rcar_rst_gen2 },
59 	{ .compatible = "renesas,r8a7794-rst", .data = &rcar_rst_gen2 },
60 	/* R-Car Gen3 */
61 	{ .compatible = "renesas,r8a7795-rst", .data = &rcar_rst_gen3 },
62 	{ .compatible = "renesas,r8a7796-rst", .data = &rcar_rst_gen3 },
63 	{ .compatible = "renesas,r8a77961-rst", .data = &rcar_rst_gen3 },
64 	{ .compatible = "renesas,r8a77965-rst", .data = &rcar_rst_gen3 },
65 	{ .compatible = "renesas,r8a77970-rst", .data = &rcar_rst_gen3 },
66 	{ .compatible = "renesas,r8a77980-rst", .data = &rcar_rst_gen3 },
67 	{ .compatible = "renesas,r8a77990-rst", .data = &rcar_rst_gen3 },
68 	{ .compatible = "renesas,r8a77995-rst", .data = &rcar_rst_gen3 },
69 	{ /* sentinel */ }
70 };
71 
72 static void __iomem *rcar_rst_base __initdata;
73 static u32 saved_mode __initdata;
74 
75 static int __init rcar_rst_init(void)
76 {
77 	const struct of_device_id *match;
78 	const struct rst_config *cfg;
79 	struct device_node *np;
80 	void __iomem *base;
81 	int error = 0;
82 
83 	np = of_find_matching_node_and_match(NULL, rcar_rst_matches, &match);
84 	if (!np)
85 		return -ENODEV;
86 
87 	base = of_iomap(np, 0);
88 	if (!base) {
89 		pr_warn("%pOF: Cannot map regs\n", np);
90 		error = -ENOMEM;
91 		goto out_put;
92 	}
93 
94 	rcar_rst_base = base;
95 	cfg = match->data;
96 	saved_mode = ioread32(base + cfg->modemr);
97 	if (cfg->configure) {
98 		error = cfg->configure(base);
99 		if (error) {
100 			pr_warn("%pOF: Cannot run SoC specific configuration\n",
101 				np);
102 			goto out_put;
103 		}
104 	}
105 
106 	pr_debug("%pOF: MODE = 0x%08x\n", np, saved_mode);
107 
108 out_put:
109 	of_node_put(np);
110 	return error;
111 }
112 
113 int __init rcar_rst_read_mode_pins(u32 *mode)
114 {
115 	int error;
116 
117 	if (!rcar_rst_base) {
118 		error = rcar_rst_init();
119 		if (error)
120 			return error;
121 	}
122 
123 	*mode = saved_mode;
124 	return 0;
125 }
126