1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2017-2019, Linaro Ltd. 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/random.h> 12 #include <linux/slab.h> 13 #include <linux/soc/qcom/smem.h> 14 #include <linux/string.h> 15 #include <linux/sys_soc.h> 16 #include <linux/types.h> 17 18 /* 19 * SoC version type with major number in the upper 16 bits and minor 20 * number in the lower 16 bits. 21 */ 22 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff) 23 #define SOCINFO_MINOR(ver) ((ver) & 0xffff) 24 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff)) 25 26 #define SMEM_SOCINFO_BUILD_ID_LENGTH 32 27 #define SMEM_SOCINFO_CHIP_ID_LENGTH 32 28 29 /* 30 * SMEM item id, used to acquire handles to respective 31 * SMEM region. 32 */ 33 #define SMEM_HW_SW_BUILD_ID 137 34 35 #ifdef CONFIG_DEBUG_FS 36 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 37 #define SMEM_IMAGE_VERSION_SIZE 4096 38 #define SMEM_IMAGE_VERSION_NAME_SIZE 75 39 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20 40 #define SMEM_IMAGE_VERSION_OEM_SIZE 32 41 42 /* 43 * SMEM Image table indices 44 */ 45 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0 46 #define SMEM_IMAGE_TABLE_TZ_INDEX 1 47 #define SMEM_IMAGE_TABLE_RPM_INDEX 3 48 #define SMEM_IMAGE_TABLE_APPS_INDEX 10 49 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11 50 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12 51 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13 52 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14 53 #define SMEM_IMAGE_VERSION_TABLE 469 54 55 /* 56 * SMEM Image table names 57 */ 58 static const char *const socinfo_image_names[] = { 59 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp", 60 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps", 61 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot", 62 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss", 63 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss", 64 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm", 65 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz", 66 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video", 67 }; 68 69 static const char *const pmic_models[] = { 70 [0] = "Unknown PMIC model", 71 [9] = "PM8994", 72 [11] = "PM8916", 73 [13] = "PM8058", 74 [14] = "PM8028", 75 [15] = "PM8901", 76 [16] = "PM8027", 77 [17] = "ISL9519", 78 [18] = "PM8921", 79 [19] = "PM8018", 80 [20] = "PM8015", 81 [21] = "PM8014", 82 [22] = "PM8821", 83 [23] = "PM8038", 84 [24] = "PM8922", 85 [25] = "PM8917", 86 }; 87 #endif /* CONFIG_DEBUG_FS */ 88 89 /* Socinfo SMEM item structure */ 90 struct socinfo { 91 __le32 fmt; 92 __le32 id; 93 __le32 ver; 94 char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH]; 95 /* Version 2 */ 96 __le32 raw_id; 97 __le32 raw_ver; 98 /* Version 3 */ 99 __le32 hw_plat; 100 /* Version 4 */ 101 __le32 plat_ver; 102 /* Version 5 */ 103 __le32 accessory_chip; 104 /* Version 6 */ 105 __le32 hw_plat_subtype; 106 /* Version 7 */ 107 __le32 pmic_model; 108 __le32 pmic_die_rev; 109 /* Version 8 */ 110 __le32 pmic_model_1; 111 __le32 pmic_die_rev_1; 112 __le32 pmic_model_2; 113 __le32 pmic_die_rev_2; 114 /* Version 9 */ 115 __le32 foundry_id; 116 /* Version 10 */ 117 __le32 serial_num; 118 /* Version 11 */ 119 __le32 num_pmics; 120 __le32 pmic_array_offset; 121 /* Version 12 */ 122 __le32 chip_family; 123 __le32 raw_device_family; 124 __le32 raw_device_num; 125 /* Version 13 */ 126 __le32 nproduct_id; 127 char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH]; 128 /* Version 14 */ 129 __le32 num_clusters; 130 __le32 ncluster_array_offset; 131 __le32 num_defective_parts; 132 __le32 ndefective_parts_array_offset; 133 /* Version 15 */ 134 __le32 nmodem_supported; 135 }; 136 137 #ifdef CONFIG_DEBUG_FS 138 struct socinfo_params { 139 u32 raw_device_family; 140 u32 hw_plat_subtype; 141 u32 accessory_chip; 142 u32 raw_device_num; 143 u32 chip_family; 144 u32 foundry_id; 145 u32 plat_ver; 146 u32 raw_ver; 147 u32 hw_plat; 148 u32 fmt; 149 u32 nproduct_id; 150 u32 num_clusters; 151 u32 ncluster_array_offset; 152 u32 num_defective_parts; 153 u32 ndefective_parts_array_offset; 154 u32 nmodem_supported; 155 }; 156 157 struct smem_image_version { 158 char name[SMEM_IMAGE_VERSION_NAME_SIZE]; 159 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE]; 160 char pad; 161 char oem[SMEM_IMAGE_VERSION_OEM_SIZE]; 162 }; 163 #endif /* CONFIG_DEBUG_FS */ 164 165 struct qcom_socinfo { 166 struct soc_device *soc_dev; 167 struct soc_device_attribute attr; 168 #ifdef CONFIG_DEBUG_FS 169 struct dentry *dbg_root; 170 struct socinfo_params info; 171 #endif /* CONFIG_DEBUG_FS */ 172 }; 173 174 struct soc_id { 175 unsigned int id; 176 const char *name; 177 }; 178 179 static const struct soc_id soc_id[] = { 180 { 87, "MSM8960" }, 181 { 109, "APQ8064" }, 182 { 122, "MSM8660A" }, 183 { 123, "MSM8260A" }, 184 { 124, "APQ8060A" }, 185 { 126, "MSM8974" }, 186 { 130, "MPQ8064" }, 187 { 138, "MSM8960AB" }, 188 { 139, "APQ8060AB" }, 189 { 140, "MSM8260AB" }, 190 { 141, "MSM8660AB" }, 191 { 178, "APQ8084" }, 192 { 184, "APQ8074" }, 193 { 185, "MSM8274" }, 194 { 186, "MSM8674" }, 195 { 194, "MSM8974PRO" }, 196 { 206, "MSM8916" }, 197 { 207, "MSM8994" }, 198 { 208, "APQ8074-AA" }, 199 { 209, "APQ8074-AB" }, 200 { 210, "APQ8074PRO" }, 201 { 211, "MSM8274-AA" }, 202 { 212, "MSM8274-AB" }, 203 { 213, "MSM8274PRO" }, 204 { 214, "MSM8674-AA" }, 205 { 215, "MSM8674-AB" }, 206 { 216, "MSM8674PRO" }, 207 { 217, "MSM8974-AA" }, 208 { 218, "MSM8974-AB" }, 209 { 233, "MSM8936" }, 210 { 239, "MSM8939" }, 211 { 240, "APQ8036" }, 212 { 241, "APQ8039" }, 213 { 246, "MSM8996" }, 214 { 247, "APQ8016" }, 215 { 248, "MSM8216" }, 216 { 249, "MSM8116" }, 217 { 250, "MSM8616" }, 218 { 251, "MSM8992" }, 219 { 253, "APQ8094" }, 220 { 291, "APQ8096" }, 221 { 293, "MSM8953" }, 222 { 304, "APQ8053" }, 223 { 305, "MSM8996SG" }, 224 { 310, "MSM8996AU" }, 225 { 311, "APQ8096AU" }, 226 { 312, "APQ8096SG" }, 227 { 318, "SDM630" }, 228 { 321, "SDM845" }, 229 { 338, "SDM450" }, 230 { 341, "SDA845" }, 231 { 349, "SDM632" }, 232 { 350, "SDA632" }, 233 { 351, "SDA450" }, 234 { 356, "SM8250" }, 235 { 402, "IPQ6018" }, 236 { 425, "SC7180" }, 237 }; 238 239 static const char *socinfo_machine(struct device *dev, unsigned int id) 240 { 241 int idx; 242 243 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) { 244 if (soc_id[idx].id == id) 245 return soc_id[idx].name; 246 } 247 248 return NULL; 249 } 250 251 #ifdef CONFIG_DEBUG_FS 252 253 #define QCOM_OPEN(name, _func) \ 254 static int qcom_open_##name(struct inode *inode, struct file *file) \ 255 { \ 256 return single_open(file, _func, inode->i_private); \ 257 } \ 258 \ 259 static const struct file_operations qcom_ ##name## _ops = { \ 260 .open = qcom_open_##name, \ 261 .read = seq_read, \ 262 .llseek = seq_lseek, \ 263 .release = single_release, \ 264 } 265 266 #define DEBUGFS_ADD(info, name) \ 267 debugfs_create_file(__stringify(name), 0400, \ 268 qcom_socinfo->dbg_root, \ 269 info, &qcom_ ##name## _ops) 270 271 272 static int qcom_show_build_id(struct seq_file *seq, void *p) 273 { 274 struct socinfo *socinfo = seq->private; 275 276 seq_printf(seq, "%s\n", socinfo->build_id); 277 278 return 0; 279 } 280 281 static int qcom_show_pmic_model(struct seq_file *seq, void *p) 282 { 283 struct socinfo *socinfo = seq->private; 284 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model)); 285 286 if (model < 0) 287 return -EINVAL; 288 289 if (model <= ARRAY_SIZE(pmic_models) && pmic_models[model]) 290 seq_printf(seq, "%s\n", pmic_models[model]); 291 else 292 seq_printf(seq, "unknown (%d)\n", model); 293 294 return 0; 295 } 296 297 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) 298 { 299 struct socinfo *socinfo = seq->private; 300 301 seq_printf(seq, "%u.%u\n", 302 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)), 303 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev))); 304 305 return 0; 306 } 307 308 static int qcom_show_chip_id(struct seq_file *seq, void *p) 309 { 310 struct socinfo *socinfo = seq->private; 311 312 seq_printf(seq, "%s\n", socinfo->chip_id); 313 314 return 0; 315 } 316 317 QCOM_OPEN(build_id, qcom_show_build_id); 318 QCOM_OPEN(pmic_model, qcom_show_pmic_model); 319 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); 320 QCOM_OPEN(chip_id, qcom_show_chip_id); 321 322 #define DEFINE_IMAGE_OPS(type) \ 323 static int show_image_##type(struct seq_file *seq, void *p) \ 324 { \ 325 struct smem_image_version *image_version = seq->private; \ 326 seq_puts(seq, image_version->type); \ 327 seq_putc(seq, '\n'); \ 328 return 0; \ 329 } \ 330 static int open_image_##type(struct inode *inode, struct file *file) \ 331 { \ 332 return single_open(file, show_image_##type, inode->i_private); \ 333 } \ 334 \ 335 static const struct file_operations qcom_image_##type##_ops = { \ 336 .open = open_image_##type, \ 337 .read = seq_read, \ 338 .llseek = seq_lseek, \ 339 .release = single_release, \ 340 } 341 342 DEFINE_IMAGE_OPS(name); 343 DEFINE_IMAGE_OPS(variant); 344 DEFINE_IMAGE_OPS(oem); 345 346 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 347 struct socinfo *info) 348 { 349 struct smem_image_version *versions; 350 struct dentry *dentry; 351 size_t size; 352 int i; 353 354 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL); 355 356 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); 357 358 debugfs_create_x32("info_fmt", 0400, qcom_socinfo->dbg_root, 359 &qcom_socinfo->info.fmt); 360 361 switch (qcom_socinfo->info.fmt) { 362 case SOCINFO_VERSION(0, 15): 363 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported); 364 365 debugfs_create_u32("nmodem_supported", 0400, qcom_socinfo->dbg_root, 366 &qcom_socinfo->info.nmodem_supported); 367 fallthrough; 368 case SOCINFO_VERSION(0, 14): 369 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters); 370 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset); 371 qcom_socinfo->info.num_defective_parts = __le32_to_cpu(info->num_defective_parts); 372 qcom_socinfo->info.ndefective_parts_array_offset = __le32_to_cpu(info->ndefective_parts_array_offset); 373 374 debugfs_create_u32("num_clusters", 0400, qcom_socinfo->dbg_root, 375 &qcom_socinfo->info.num_clusters); 376 debugfs_create_u32("ncluster_array_offset", 0400, qcom_socinfo->dbg_root, 377 &qcom_socinfo->info.ncluster_array_offset); 378 debugfs_create_u32("num_defective_parts", 0400, qcom_socinfo->dbg_root, 379 &qcom_socinfo->info.num_defective_parts); 380 debugfs_create_u32("ndefective_parts_array_offset", 0400, qcom_socinfo->dbg_root, 381 &qcom_socinfo->info.ndefective_parts_array_offset); 382 fallthrough; 383 case SOCINFO_VERSION(0, 13): 384 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id); 385 386 debugfs_create_u32("nproduct_id", 0400, qcom_socinfo->dbg_root, 387 &qcom_socinfo->info.nproduct_id); 388 DEBUGFS_ADD(info, chip_id); 389 fallthrough; 390 case SOCINFO_VERSION(0, 12): 391 qcom_socinfo->info.chip_family = 392 __le32_to_cpu(info->chip_family); 393 qcom_socinfo->info.raw_device_family = 394 __le32_to_cpu(info->raw_device_family); 395 qcom_socinfo->info.raw_device_num = 396 __le32_to_cpu(info->raw_device_num); 397 398 debugfs_create_x32("chip_family", 0400, qcom_socinfo->dbg_root, 399 &qcom_socinfo->info.chip_family); 400 debugfs_create_x32("raw_device_family", 0400, 401 qcom_socinfo->dbg_root, 402 &qcom_socinfo->info.raw_device_family); 403 debugfs_create_x32("raw_device_number", 0400, 404 qcom_socinfo->dbg_root, 405 &qcom_socinfo->info.raw_device_num); 406 fallthrough; 407 case SOCINFO_VERSION(0, 11): 408 case SOCINFO_VERSION(0, 10): 409 case SOCINFO_VERSION(0, 9): 410 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id); 411 412 debugfs_create_u32("foundry_id", 0400, qcom_socinfo->dbg_root, 413 &qcom_socinfo->info.foundry_id); 414 fallthrough; 415 case SOCINFO_VERSION(0, 8): 416 case SOCINFO_VERSION(0, 7): 417 DEBUGFS_ADD(info, pmic_model); 418 DEBUGFS_ADD(info, pmic_die_rev); 419 fallthrough; 420 case SOCINFO_VERSION(0, 6): 421 qcom_socinfo->info.hw_plat_subtype = 422 __le32_to_cpu(info->hw_plat_subtype); 423 424 debugfs_create_u32("hardware_platform_subtype", 0400, 425 qcom_socinfo->dbg_root, 426 &qcom_socinfo->info.hw_plat_subtype); 427 fallthrough; 428 case SOCINFO_VERSION(0, 5): 429 qcom_socinfo->info.accessory_chip = 430 __le32_to_cpu(info->accessory_chip); 431 432 debugfs_create_u32("accessory_chip", 0400, 433 qcom_socinfo->dbg_root, 434 &qcom_socinfo->info.accessory_chip); 435 fallthrough; 436 case SOCINFO_VERSION(0, 4): 437 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver); 438 439 debugfs_create_u32("platform_version", 0400, 440 qcom_socinfo->dbg_root, 441 &qcom_socinfo->info.plat_ver); 442 fallthrough; 443 case SOCINFO_VERSION(0, 3): 444 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat); 445 446 debugfs_create_u32("hardware_platform", 0400, 447 qcom_socinfo->dbg_root, 448 &qcom_socinfo->info.hw_plat); 449 fallthrough; 450 case SOCINFO_VERSION(0, 2): 451 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver); 452 453 debugfs_create_u32("raw_version", 0400, qcom_socinfo->dbg_root, 454 &qcom_socinfo->info.raw_ver); 455 fallthrough; 456 case SOCINFO_VERSION(0, 1): 457 DEBUGFS_ADD(info, build_id); 458 break; 459 } 460 461 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE, 462 &size); 463 464 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) { 465 if (!socinfo_image_names[i]) 466 continue; 467 468 dentry = debugfs_create_dir(socinfo_image_names[i], 469 qcom_socinfo->dbg_root); 470 debugfs_create_file("name", 0400, dentry, &versions[i], 471 &qcom_image_name_ops); 472 debugfs_create_file("variant", 0400, dentry, &versions[i], 473 &qcom_image_variant_ops); 474 debugfs_create_file("oem", 0400, dentry, &versions[i], 475 &qcom_image_oem_ops); 476 } 477 } 478 479 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) 480 { 481 debugfs_remove_recursive(qcom_socinfo->dbg_root); 482 } 483 #else 484 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 485 struct socinfo *info) 486 { 487 } 488 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { } 489 #endif /* CONFIG_DEBUG_FS */ 490 491 static int qcom_socinfo_probe(struct platform_device *pdev) 492 { 493 struct qcom_socinfo *qs; 494 struct socinfo *info; 495 size_t item_size; 496 497 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, 498 &item_size); 499 if (IS_ERR(info)) { 500 dev_err(&pdev->dev, "Couldn't find socinfo\n"); 501 return PTR_ERR(info); 502 } 503 504 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL); 505 if (!qs) 506 return -ENOMEM; 507 508 qs->attr.family = "Snapdragon"; 509 qs->attr.machine = socinfo_machine(&pdev->dev, 510 le32_to_cpu(info->id)); 511 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u", 512 le32_to_cpu(info->id)); 513 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u", 514 SOCINFO_MAJOR(le32_to_cpu(info->ver)), 515 SOCINFO_MINOR(le32_to_cpu(info->ver))); 516 if (offsetof(struct socinfo, serial_num) <= item_size) 517 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL, 518 "%u", 519 le32_to_cpu(info->serial_num)); 520 521 qs->soc_dev = soc_device_register(&qs->attr); 522 if (IS_ERR(qs->soc_dev)) 523 return PTR_ERR(qs->soc_dev); 524 525 socinfo_debugfs_init(qs, info); 526 527 /* Feed the soc specific unique data into entropy pool */ 528 add_device_randomness(info, item_size); 529 530 platform_set_drvdata(pdev, qs->soc_dev); 531 532 return 0; 533 } 534 535 static int qcom_socinfo_remove(struct platform_device *pdev) 536 { 537 struct qcom_socinfo *qs = platform_get_drvdata(pdev); 538 539 soc_device_unregister(qs->soc_dev); 540 541 socinfo_debugfs_exit(qs); 542 543 return 0; 544 } 545 546 static struct platform_driver qcom_socinfo_driver = { 547 .probe = qcom_socinfo_probe, 548 .remove = qcom_socinfo_remove, 549 .driver = { 550 .name = "qcom-socinfo", 551 }, 552 }; 553 554 module_platform_driver(qcom_socinfo_driver); 555 556 MODULE_DESCRIPTION("Qualcomm SoCinfo driver"); 557 MODULE_LICENSE("GPL v2"); 558 MODULE_ALIAS("platform:qcom-socinfo"); 559