1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2017-2019, Linaro Ltd. 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/random.h> 12 #include <linux/slab.h> 13 #include <linux/soc/qcom/smem.h> 14 #include <linux/string.h> 15 #include <linux/stringify.h> 16 #include <linux/sys_soc.h> 17 #include <linux/types.h> 18 19 #include <asm/unaligned.h> 20 21 #include <dt-bindings/arm/qcom,ids.h> 22 23 /* 24 * SoC version type with major number in the upper 16 bits and minor 25 * number in the lower 16 bits. 26 */ 27 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff) 28 #define SOCINFO_MINOR(ver) ((ver) & 0xffff) 29 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff)) 30 31 /* Helper macros to create soc_id table */ 32 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id) 33 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name) 34 35 #define SMEM_SOCINFO_BUILD_ID_LENGTH 32 36 #define SMEM_SOCINFO_CHIP_ID_LENGTH 32 37 38 /* 39 * SMEM item id, used to acquire handles to respective 40 * SMEM region. 41 */ 42 #define SMEM_HW_SW_BUILD_ID 137 43 44 #ifdef CONFIG_DEBUG_FS 45 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 46 #define SMEM_IMAGE_VERSION_SIZE 4096 47 #define SMEM_IMAGE_VERSION_NAME_SIZE 75 48 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20 49 #define SMEM_IMAGE_VERSION_OEM_SIZE 32 50 51 /* 52 * SMEM Image table indices 53 */ 54 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0 55 #define SMEM_IMAGE_TABLE_TZ_INDEX 1 56 #define SMEM_IMAGE_TABLE_RPM_INDEX 3 57 #define SMEM_IMAGE_TABLE_APPS_INDEX 10 58 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11 59 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12 60 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13 61 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14 62 #define SMEM_IMAGE_VERSION_TABLE 469 63 64 /* 65 * SMEM Image table names 66 */ 67 static const char *const socinfo_image_names[] = { 68 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp", 69 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps", 70 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot", 71 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss", 72 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss", 73 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm", 74 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz", 75 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video", 76 }; 77 78 static const char *const pmic_models[] = { 79 [0] = "Unknown PMIC model", 80 [1] = "PM8941", 81 [2] = "PM8841", 82 [3] = "PM8019", 83 [4] = "PM8226", 84 [5] = "PM8110", 85 [6] = "PMA8084", 86 [7] = "PMI8962", 87 [8] = "PMD9635", 88 [9] = "PM8994", 89 [10] = "PMI8994", 90 [11] = "PM8916", 91 [12] = "PM8004", 92 [13] = "PM8909/PM8058", 93 [14] = "PM8028", 94 [15] = "PM8901", 95 [16] = "PM8950/PM8027", 96 [17] = "PMI8950/ISL9519", 97 [18] = "PMK8001/PM8921", 98 [19] = "PMI8996/PM8018", 99 [20] = "PM8998/PM8015", 100 [21] = "PMI8998/PM8014", 101 [22] = "PM8821", 102 [23] = "PM8038", 103 [24] = "PM8005/PM8922", 104 [25] = "PM8917", 105 [26] = "PM660L", 106 [27] = "PM660", 107 [30] = "PM8150", 108 [31] = "PM8150L", 109 [32] = "PM8150B", 110 [33] = "PMK8002", 111 [36] = "PM8009", 112 [37] = "PMI632", 113 [38] = "PM8150C", 114 [40] = "PM6150", 115 [41] = "SMB2351", 116 [44] = "PM8008", 117 [45] = "PM6125", 118 [46] = "PM7250B", 119 [47] = "PMK8350", 120 [48] = "PM8350", 121 [49] = "PM8350C", 122 [50] = "PM8350B", 123 [51] = "PMR735A", 124 [52] = "PMR735B", 125 [55] = "PM2250", 126 [58] = "PM8450", 127 [65] = "PM8010", 128 }; 129 #endif /* CONFIG_DEBUG_FS */ 130 131 /* Socinfo SMEM item structure */ 132 struct socinfo { 133 __le32 fmt; 134 __le32 id; 135 __le32 ver; 136 char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH]; 137 /* Version 2 */ 138 __le32 raw_id; 139 __le32 raw_ver; 140 /* Version 3 */ 141 __le32 hw_plat; 142 /* Version 4 */ 143 __le32 plat_ver; 144 /* Version 5 */ 145 __le32 accessory_chip; 146 /* Version 6 */ 147 __le32 hw_plat_subtype; 148 /* Version 7 */ 149 __le32 pmic_model; 150 __le32 pmic_die_rev; 151 /* Version 8 */ 152 __le32 pmic_model_1; 153 __le32 pmic_die_rev_1; 154 __le32 pmic_model_2; 155 __le32 pmic_die_rev_2; 156 /* Version 9 */ 157 __le32 foundry_id; 158 /* Version 10 */ 159 __le32 serial_num; 160 /* Version 11 */ 161 __le32 num_pmics; 162 __le32 pmic_array_offset; 163 /* Version 12 */ 164 __le32 chip_family; 165 __le32 raw_device_family; 166 __le32 raw_device_num; 167 /* Version 13 */ 168 __le32 nproduct_id; 169 char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH]; 170 /* Version 14 */ 171 __le32 num_clusters; 172 __le32 ncluster_array_offset; 173 __le32 num_defective_parts; 174 __le32 ndefective_parts_array_offset; 175 /* Version 15 */ 176 __le32 nmodem_supported; 177 /* Version 16 */ 178 __le32 feature_code; 179 __le32 pcode; 180 __le32 npartnamemap_offset; 181 __le32 nnum_partname_mapping; 182 /* Version 17 */ 183 __le32 oem_variant; 184 }; 185 186 #ifdef CONFIG_DEBUG_FS 187 struct socinfo_params { 188 u32 raw_device_family; 189 u32 hw_plat_subtype; 190 u32 accessory_chip; 191 u32 raw_device_num; 192 u32 chip_family; 193 u32 foundry_id; 194 u32 plat_ver; 195 u32 raw_ver; 196 u32 hw_plat; 197 u32 fmt; 198 u32 nproduct_id; 199 u32 num_clusters; 200 u32 ncluster_array_offset; 201 u32 num_defective_parts; 202 u32 ndefective_parts_array_offset; 203 u32 nmodem_supported; 204 u32 feature_code; 205 u32 pcode; 206 u32 oem_variant; 207 }; 208 209 struct smem_image_version { 210 char name[SMEM_IMAGE_VERSION_NAME_SIZE]; 211 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE]; 212 char pad; 213 char oem[SMEM_IMAGE_VERSION_OEM_SIZE]; 214 }; 215 #endif /* CONFIG_DEBUG_FS */ 216 217 struct qcom_socinfo { 218 struct soc_device *soc_dev; 219 struct soc_device_attribute attr; 220 #ifdef CONFIG_DEBUG_FS 221 struct dentry *dbg_root; 222 struct socinfo_params info; 223 #endif /* CONFIG_DEBUG_FS */ 224 }; 225 226 struct soc_id { 227 unsigned int id; 228 const char *name; 229 }; 230 231 static const struct soc_id soc_id[] = { 232 { qcom_board_id(MSM8260) }, 233 { qcom_board_id(MSM8660) }, 234 { qcom_board_id(APQ8060) }, 235 { qcom_board_id(MSM8960) }, 236 { qcom_board_id(APQ8064) }, 237 { qcom_board_id(MSM8930) }, 238 { qcom_board_id(MSM8630) }, 239 { qcom_board_id(MSM8230) }, 240 { qcom_board_id(APQ8030) }, 241 { qcom_board_id(MSM8627) }, 242 { qcom_board_id(MSM8227) }, 243 { qcom_board_id(MSM8660A) }, 244 { qcom_board_id(MSM8260A) }, 245 { qcom_board_id(APQ8060A) }, 246 { qcom_board_id(MSM8974) }, 247 { qcom_board_id(MSM8225) }, 248 { qcom_board_id(MSM8625) }, 249 { qcom_board_id(MPQ8064) }, 250 { qcom_board_id(MSM8960AB) }, 251 { qcom_board_id(APQ8060AB) }, 252 { qcom_board_id(MSM8260AB) }, 253 { qcom_board_id(MSM8660AB) }, 254 { qcom_board_id(MSM8930AA) }, 255 { qcom_board_id(MSM8630AA) }, 256 { qcom_board_id(MSM8230AA) }, 257 { qcom_board_id(MSM8626) }, 258 { qcom_board_id(MSM8610) }, 259 { qcom_board_id(APQ8064AB) }, 260 { qcom_board_id(MSM8930AB) }, 261 { qcom_board_id(MSM8630AB) }, 262 { qcom_board_id(MSM8230AB) }, 263 { qcom_board_id(APQ8030AB) }, 264 { qcom_board_id(MSM8226) }, 265 { qcom_board_id(MSM8526) }, 266 { qcom_board_id(APQ8030AA) }, 267 { qcom_board_id(MSM8110) }, 268 { qcom_board_id(MSM8210) }, 269 { qcom_board_id(MSM8810) }, 270 { qcom_board_id(MSM8212) }, 271 { qcom_board_id(MSM8612) }, 272 { qcom_board_id(MSM8112) }, 273 { qcom_board_id(MSM8125) }, 274 { qcom_board_id(MSM8225Q) }, 275 { qcom_board_id(MSM8625Q) }, 276 { qcom_board_id(MSM8125Q) }, 277 { qcom_board_id(APQ8064AA) }, 278 { qcom_board_id(APQ8084) }, 279 { qcom_board_id(MSM8130) }, 280 { qcom_board_id(MSM8130AA) }, 281 { qcom_board_id(MSM8130AB) }, 282 { qcom_board_id(MSM8627AA) }, 283 { qcom_board_id(MSM8227AA) }, 284 { qcom_board_id(APQ8074) }, 285 { qcom_board_id(MSM8274) }, 286 { qcom_board_id(MSM8674) }, 287 { qcom_board_id(MDM9635) }, 288 { qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") }, 289 { qcom_board_id(MSM8126) }, 290 { qcom_board_id(APQ8026) }, 291 { qcom_board_id(MSM8926) }, 292 { qcom_board_id(IPQ8062) }, 293 { qcom_board_id(IPQ8064) }, 294 { qcom_board_id(IPQ8066) }, 295 { qcom_board_id(IPQ8068) }, 296 { qcom_board_id(MSM8326) }, 297 { qcom_board_id(MSM8916) }, 298 { qcom_board_id(MSM8994) }, 299 { qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") }, 300 { qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") }, 301 { qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") }, 302 { qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") }, 303 { qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") }, 304 { qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") }, 305 { qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") }, 306 { qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") }, 307 { qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") }, 308 { qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") }, 309 { qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") }, 310 { qcom_board_id(APQ8028) }, 311 { qcom_board_id(MSM8128) }, 312 { qcom_board_id(MSM8228) }, 313 { qcom_board_id(MSM8528) }, 314 { qcom_board_id(MSM8628) }, 315 { qcom_board_id(MSM8928) }, 316 { qcom_board_id(MSM8510) }, 317 { qcom_board_id(MSM8512) }, 318 { qcom_board_id(MSM8936) }, 319 { qcom_board_id(MDM9640) }, 320 { qcom_board_id(MSM8939) }, 321 { qcom_board_id(APQ8036) }, 322 { qcom_board_id(APQ8039) }, 323 { qcom_board_id(MSM8236) }, 324 { qcom_board_id(MSM8636) }, 325 { qcom_board_id(MSM8909) }, 326 { qcom_board_id(MSM8996) }, 327 { qcom_board_id(APQ8016) }, 328 { qcom_board_id(MSM8216) }, 329 { qcom_board_id(MSM8116) }, 330 { qcom_board_id(MSM8616) }, 331 { qcom_board_id(MSM8992) }, 332 { qcom_board_id(APQ8092) }, 333 { qcom_board_id(APQ8094) }, 334 { qcom_board_id(MSM8209) }, 335 { qcom_board_id(MSM8208) }, 336 { qcom_board_id(MDM9209) }, 337 { qcom_board_id(MDM9309) }, 338 { qcom_board_id(MDM9609) }, 339 { qcom_board_id(MSM8239) }, 340 { qcom_board_id(MSM8952) }, 341 { qcom_board_id(APQ8009) }, 342 { qcom_board_id(MSM8956) }, 343 { qcom_board_id(MSM8929) }, 344 { qcom_board_id(MSM8629) }, 345 { qcom_board_id(MSM8229) }, 346 { qcom_board_id(APQ8029) }, 347 { qcom_board_id(APQ8056) }, 348 { qcom_board_id(MSM8609) }, 349 { qcom_board_id(APQ8076) }, 350 { qcom_board_id(MSM8976) }, 351 { qcom_board_id(IPQ8065) }, 352 { qcom_board_id(IPQ8069) }, 353 { qcom_board_id(MDM9650) }, 354 { qcom_board_id(MDM9655) }, 355 { qcom_board_id(MDM9250) }, 356 { qcom_board_id(MDM9255) }, 357 { qcom_board_id(MDM9350) }, 358 { qcom_board_id(APQ8052) }, 359 { qcom_board_id(MDM9607) }, 360 { qcom_board_id(APQ8096) }, 361 { qcom_board_id(MSM8998) }, 362 { qcom_board_id(MSM8953) }, 363 { qcom_board_id(MSM8937) }, 364 { qcom_board_id(APQ8037) }, 365 { qcom_board_id(MDM8207) }, 366 { qcom_board_id(MDM9207) }, 367 { qcom_board_id(MDM9307) }, 368 { qcom_board_id(MDM9628) }, 369 { qcom_board_id(MSM8909W) }, 370 { qcom_board_id(APQ8009W) }, 371 { qcom_board_id(MSM8996L) }, 372 { qcom_board_id(MSM8917) }, 373 { qcom_board_id(APQ8053) }, 374 { qcom_board_id(MSM8996SG) }, 375 { qcom_board_id(APQ8017) }, 376 { qcom_board_id(MSM8217) }, 377 { qcom_board_id(MSM8617) }, 378 { qcom_board_id(MSM8996AU) }, 379 { qcom_board_id(APQ8096AU) }, 380 { qcom_board_id(APQ8096SG) }, 381 { qcom_board_id(MSM8940) }, 382 { qcom_board_id(SDX201) }, 383 { qcom_board_id(SDM660) }, 384 { qcom_board_id(SDM630) }, 385 { qcom_board_id(APQ8098) }, 386 { qcom_board_id(MSM8920) }, 387 { qcom_board_id(SDM845) }, 388 { qcom_board_id(MDM9206) }, 389 { qcom_board_id(IPQ8074) }, 390 { qcom_board_id(SDA660) }, 391 { qcom_board_id(SDM658) }, 392 { qcom_board_id(SDA658) }, 393 { qcom_board_id(SDA630) }, 394 { qcom_board_id(MSM8905) }, 395 { qcom_board_id(SDX202) }, 396 { qcom_board_id(SDM450) }, 397 { qcom_board_id(SM8150) }, 398 { qcom_board_id(SDA845) }, 399 { qcom_board_id(IPQ8072) }, 400 { qcom_board_id(IPQ8076) }, 401 { qcom_board_id(IPQ8078) }, 402 { qcom_board_id(SDM636) }, 403 { qcom_board_id(SDA636) }, 404 { qcom_board_id(SDM632) }, 405 { qcom_board_id(SDA632) }, 406 { qcom_board_id(SDA450) }, 407 { qcom_board_id(SDM439) }, 408 { qcom_board_id(SDM429) }, 409 { qcom_board_id(SM8250) }, 410 { qcom_board_id(SA8155) }, 411 { qcom_board_id(SDA439) }, 412 { qcom_board_id(SDA429) }, 413 { qcom_board_id(SM7150) }, 414 { qcom_board_id(IPQ8070) }, 415 { qcom_board_id(IPQ8071) }, 416 { qcom_board_id(QM215) }, 417 { qcom_board_id(IPQ8072A) }, 418 { qcom_board_id(IPQ8074A) }, 419 { qcom_board_id(IPQ8076A) }, 420 { qcom_board_id(IPQ8078A) }, 421 { qcom_board_id(SM6125) }, 422 { qcom_board_id(IPQ8070A) }, 423 { qcom_board_id(IPQ8071A) }, 424 { qcom_board_id(IPQ6018) }, 425 { qcom_board_id(IPQ6028) }, 426 { qcom_board_id(SDM429W) }, 427 { qcom_board_id(SM4250) }, 428 { qcom_board_id(IPQ6000) }, 429 { qcom_board_id(IPQ6010) }, 430 { qcom_board_id(SC7180) }, 431 { qcom_board_id(SM6350) }, 432 { qcom_board_id(QCM2150) }, 433 { qcom_board_id(SDA429W) }, 434 { qcom_board_id(SM8350) }, 435 { qcom_board_id(QCM2290) }, 436 { qcom_board_id(SM6115) }, 437 { qcom_board_id(SC8280XP) }, 438 { qcom_board_id(IPQ6005) }, 439 { qcom_board_id(QRB5165) }, 440 { qcom_board_id(SM8450) }, 441 { qcom_board_id(SM7225) }, 442 { qcom_board_id(SA8295P) }, 443 { qcom_board_id(SA8540P) }, 444 { qcom_board_id(QCM4290) }, 445 { qcom_board_id(QCS4290) }, 446 { qcom_board_id_named(SM8450_2, "SM8450") }, 447 { qcom_board_id_named(SM8450_3, "SM8450") }, 448 { qcom_board_id(SC7280) }, 449 { qcom_board_id(SC7180P) }, 450 { qcom_board_id(SM6375) }, 451 { qcom_board_id(IPQ9514) }, 452 { qcom_board_id(IPQ9550) }, 453 { qcom_board_id(IPQ9554) }, 454 { qcom_board_id(IPQ9570) }, 455 { qcom_board_id(IPQ9574) }, 456 { qcom_board_id(SM8550) }, 457 { qcom_board_id(IPQ9510) }, 458 { qcom_board_id(QRB4210) }, 459 { qcom_board_id(QRB2210) }, 460 { qcom_board_id(SA8775P) }, 461 { qcom_board_id(QRU1000) }, 462 { qcom_board_id(QDU1000) }, 463 { qcom_board_id(QDU1010) }, 464 { qcom_board_id(QRU1032) }, 465 { qcom_board_id(QRU1052) }, 466 { qcom_board_id(QRU1062) }, 467 { qcom_board_id(IPQ5332) }, 468 { qcom_board_id(IPQ5322) }, 469 }; 470 471 static const char *socinfo_machine(struct device *dev, unsigned int id) 472 { 473 int idx; 474 475 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) { 476 if (soc_id[idx].id == id) 477 return soc_id[idx].name; 478 } 479 480 return NULL; 481 } 482 483 #ifdef CONFIG_DEBUG_FS 484 485 #define QCOM_OPEN(name, _func) \ 486 static int qcom_open_##name(struct inode *inode, struct file *file) \ 487 { \ 488 return single_open(file, _func, inode->i_private); \ 489 } \ 490 \ 491 static const struct file_operations qcom_ ##name## _ops = { \ 492 .open = qcom_open_##name, \ 493 .read = seq_read, \ 494 .llseek = seq_lseek, \ 495 .release = single_release, \ 496 } 497 498 #define DEBUGFS_ADD(info, name) \ 499 debugfs_create_file(__stringify(name), 0444, \ 500 qcom_socinfo->dbg_root, \ 501 info, &qcom_ ##name## _ops) 502 503 504 static int qcom_show_build_id(struct seq_file *seq, void *p) 505 { 506 struct socinfo *socinfo = seq->private; 507 508 seq_printf(seq, "%s\n", socinfo->build_id); 509 510 return 0; 511 } 512 513 static int qcom_show_pmic_model(struct seq_file *seq, void *p) 514 { 515 struct socinfo *socinfo = seq->private; 516 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model)); 517 518 if (model < 0) 519 return -EINVAL; 520 521 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 522 seq_printf(seq, "%s\n", pmic_models[model]); 523 else 524 seq_printf(seq, "unknown (%d)\n", model); 525 526 return 0; 527 } 528 529 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p) 530 { 531 struct socinfo *socinfo = seq->private; 532 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics); 533 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset); 534 int i; 535 void *ptr = socinfo; 536 537 ptr += pmic_array_offset; 538 539 /* No need for bounds checking, it happened at socinfo_debugfs_init */ 540 for (i = 0; i < num_pmics; i++) { 541 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32))); 542 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32)); 543 544 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model]) 545 seq_printf(seq, "%s %u.%u\n", pmic_models[model], 546 SOCINFO_MAJOR(die_rev), 547 SOCINFO_MINOR(die_rev)); 548 else 549 seq_printf(seq, "unknown (%d)\n", model); 550 } 551 552 return 0; 553 } 554 555 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) 556 { 557 struct socinfo *socinfo = seq->private; 558 559 seq_printf(seq, "%u.%u\n", 560 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)), 561 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev))); 562 563 return 0; 564 } 565 566 static int qcom_show_chip_id(struct seq_file *seq, void *p) 567 { 568 struct socinfo *socinfo = seq->private; 569 570 seq_printf(seq, "%s\n", socinfo->chip_id); 571 572 return 0; 573 } 574 575 QCOM_OPEN(build_id, qcom_show_build_id); 576 QCOM_OPEN(pmic_model, qcom_show_pmic_model); 577 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array); 578 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); 579 QCOM_OPEN(chip_id, qcom_show_chip_id); 580 581 #define DEFINE_IMAGE_OPS(type) \ 582 static int show_image_##type(struct seq_file *seq, void *p) \ 583 { \ 584 struct smem_image_version *image_version = seq->private; \ 585 if (image_version->type[0] != '\0') \ 586 seq_printf(seq, "%s\n", image_version->type); \ 587 return 0; \ 588 } \ 589 static int open_image_##type(struct inode *inode, struct file *file) \ 590 { \ 591 return single_open(file, show_image_##type, inode->i_private); \ 592 } \ 593 \ 594 static const struct file_operations qcom_image_##type##_ops = { \ 595 .open = open_image_##type, \ 596 .read = seq_read, \ 597 .llseek = seq_lseek, \ 598 .release = single_release, \ 599 } 600 601 DEFINE_IMAGE_OPS(name); 602 DEFINE_IMAGE_OPS(variant); 603 DEFINE_IMAGE_OPS(oem); 604 605 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 606 struct socinfo *info, size_t info_size) 607 { 608 struct smem_image_version *versions; 609 struct dentry *dentry; 610 size_t size; 611 int i; 612 unsigned int num_pmics; 613 unsigned int pmic_array_offset; 614 615 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL); 616 617 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); 618 619 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root, 620 &qcom_socinfo->info.fmt); 621 622 switch (qcom_socinfo->info.fmt) { 623 case SOCINFO_VERSION(0, 17): 624 qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant); 625 debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root, 626 &qcom_socinfo->info.oem_variant); 627 fallthrough; 628 case SOCINFO_VERSION(0, 16): 629 qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code); 630 qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode); 631 632 debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root, 633 &qcom_socinfo->info.feature_code); 634 debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root, 635 &qcom_socinfo->info.pcode); 636 fallthrough; 637 case SOCINFO_VERSION(0, 15): 638 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported); 639 640 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root, 641 &qcom_socinfo->info.nmodem_supported); 642 fallthrough; 643 case SOCINFO_VERSION(0, 14): 644 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters); 645 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset); 646 qcom_socinfo->info.num_defective_parts = __le32_to_cpu(info->num_defective_parts); 647 qcom_socinfo->info.ndefective_parts_array_offset = __le32_to_cpu(info->ndefective_parts_array_offset); 648 649 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root, 650 &qcom_socinfo->info.num_clusters); 651 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root, 652 &qcom_socinfo->info.ncluster_array_offset); 653 debugfs_create_u32("num_defective_parts", 0444, qcom_socinfo->dbg_root, 654 &qcom_socinfo->info.num_defective_parts); 655 debugfs_create_u32("ndefective_parts_array_offset", 0444, qcom_socinfo->dbg_root, 656 &qcom_socinfo->info.ndefective_parts_array_offset); 657 fallthrough; 658 case SOCINFO_VERSION(0, 13): 659 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id); 660 661 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root, 662 &qcom_socinfo->info.nproduct_id); 663 DEBUGFS_ADD(info, chip_id); 664 fallthrough; 665 case SOCINFO_VERSION(0, 12): 666 qcom_socinfo->info.chip_family = 667 __le32_to_cpu(info->chip_family); 668 qcom_socinfo->info.raw_device_family = 669 __le32_to_cpu(info->raw_device_family); 670 qcom_socinfo->info.raw_device_num = 671 __le32_to_cpu(info->raw_device_num); 672 673 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root, 674 &qcom_socinfo->info.chip_family); 675 debugfs_create_x32("raw_device_family", 0444, 676 qcom_socinfo->dbg_root, 677 &qcom_socinfo->info.raw_device_family); 678 debugfs_create_x32("raw_device_number", 0444, 679 qcom_socinfo->dbg_root, 680 &qcom_socinfo->info.raw_device_num); 681 fallthrough; 682 case SOCINFO_VERSION(0, 11): 683 num_pmics = le32_to_cpu(info->num_pmics); 684 pmic_array_offset = le32_to_cpu(info->pmic_array_offset); 685 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size) 686 DEBUGFS_ADD(info, pmic_model_array); 687 fallthrough; 688 case SOCINFO_VERSION(0, 10): 689 case SOCINFO_VERSION(0, 9): 690 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id); 691 692 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root, 693 &qcom_socinfo->info.foundry_id); 694 fallthrough; 695 case SOCINFO_VERSION(0, 8): 696 case SOCINFO_VERSION(0, 7): 697 DEBUGFS_ADD(info, pmic_model); 698 DEBUGFS_ADD(info, pmic_die_rev); 699 fallthrough; 700 case SOCINFO_VERSION(0, 6): 701 qcom_socinfo->info.hw_plat_subtype = 702 __le32_to_cpu(info->hw_plat_subtype); 703 704 debugfs_create_u32("hardware_platform_subtype", 0444, 705 qcom_socinfo->dbg_root, 706 &qcom_socinfo->info.hw_plat_subtype); 707 fallthrough; 708 case SOCINFO_VERSION(0, 5): 709 qcom_socinfo->info.accessory_chip = 710 __le32_to_cpu(info->accessory_chip); 711 712 debugfs_create_u32("accessory_chip", 0444, 713 qcom_socinfo->dbg_root, 714 &qcom_socinfo->info.accessory_chip); 715 fallthrough; 716 case SOCINFO_VERSION(0, 4): 717 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver); 718 719 debugfs_create_u32("platform_version", 0444, 720 qcom_socinfo->dbg_root, 721 &qcom_socinfo->info.plat_ver); 722 fallthrough; 723 case SOCINFO_VERSION(0, 3): 724 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat); 725 726 debugfs_create_u32("hardware_platform", 0444, 727 qcom_socinfo->dbg_root, 728 &qcom_socinfo->info.hw_plat); 729 fallthrough; 730 case SOCINFO_VERSION(0, 2): 731 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver); 732 733 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root, 734 &qcom_socinfo->info.raw_ver); 735 fallthrough; 736 case SOCINFO_VERSION(0, 1): 737 DEBUGFS_ADD(info, build_id); 738 break; 739 } 740 741 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE, 742 &size); 743 744 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) { 745 if (!socinfo_image_names[i]) 746 continue; 747 748 dentry = debugfs_create_dir(socinfo_image_names[i], 749 qcom_socinfo->dbg_root); 750 debugfs_create_file("name", 0444, dentry, &versions[i], 751 &qcom_image_name_ops); 752 debugfs_create_file("variant", 0444, dentry, &versions[i], 753 &qcom_image_variant_ops); 754 debugfs_create_file("oem", 0444, dentry, &versions[i], 755 &qcom_image_oem_ops); 756 } 757 } 758 759 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) 760 { 761 debugfs_remove_recursive(qcom_socinfo->dbg_root); 762 } 763 #else 764 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 765 struct socinfo *info, size_t info_size) 766 { 767 } 768 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { } 769 #endif /* CONFIG_DEBUG_FS */ 770 771 static int qcom_socinfo_probe(struct platform_device *pdev) 772 { 773 struct qcom_socinfo *qs; 774 struct socinfo *info; 775 size_t item_size; 776 777 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, 778 &item_size); 779 if (IS_ERR(info)) { 780 dev_err(&pdev->dev, "Couldn't find socinfo\n"); 781 return PTR_ERR(info); 782 } 783 784 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL); 785 if (!qs) 786 return -ENOMEM; 787 788 qs->attr.family = "Snapdragon"; 789 qs->attr.machine = socinfo_machine(&pdev->dev, 790 le32_to_cpu(info->id)); 791 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u", 792 le32_to_cpu(info->id)); 793 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u", 794 SOCINFO_MAJOR(le32_to_cpu(info->ver)), 795 SOCINFO_MINOR(le32_to_cpu(info->ver))); 796 if (offsetof(struct socinfo, serial_num) <= item_size) 797 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL, 798 "%u", 799 le32_to_cpu(info->serial_num)); 800 801 qs->soc_dev = soc_device_register(&qs->attr); 802 if (IS_ERR(qs->soc_dev)) 803 return PTR_ERR(qs->soc_dev); 804 805 socinfo_debugfs_init(qs, info, item_size); 806 807 /* Feed the soc specific unique data into entropy pool */ 808 add_device_randomness(info, item_size); 809 810 platform_set_drvdata(pdev, qs); 811 812 return 0; 813 } 814 815 static int qcom_socinfo_remove(struct platform_device *pdev) 816 { 817 struct qcom_socinfo *qs = platform_get_drvdata(pdev); 818 819 soc_device_unregister(qs->soc_dev); 820 821 socinfo_debugfs_exit(qs); 822 823 return 0; 824 } 825 826 static struct platform_driver qcom_socinfo_driver = { 827 .probe = qcom_socinfo_probe, 828 .remove = qcom_socinfo_remove, 829 .driver = { 830 .name = "qcom-socinfo", 831 }, 832 }; 833 834 module_platform_driver(qcom_socinfo_driver); 835 836 MODULE_DESCRIPTION("Qualcomm SoCinfo driver"); 837 MODULE_LICENSE("GPL v2"); 838 MODULE_ALIAS("platform:qcom-socinfo"); 839