xref: /openbmc/linux/drivers/soc/qcom/socinfo.c (revision 6c33a6f4)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
4  * Copyright (c) 2017-2019, Linaro Ltd.
5  */
6 
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/random.h>
12 #include <linux/slab.h>
13 #include <linux/soc/qcom/smem.h>
14 #include <linux/string.h>
15 #include <linux/sys_soc.h>
16 #include <linux/types.h>
17 
18 /*
19  * SoC version type with major number in the upper 16 bits and minor
20  * number in the lower 16 bits.
21  */
22 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
23 #define SOCINFO_MINOR(ver) ((ver) & 0xffff)
24 #define SOCINFO_VERSION(maj, min)  ((((maj) & 0xffff) << 16)|((min) & 0xffff))
25 
26 #define SMEM_SOCINFO_BUILD_ID_LENGTH           32
27 
28 /*
29  * SMEM item id, used to acquire handles to respective
30  * SMEM region.
31  */
32 #define SMEM_HW_SW_BUILD_ID            137
33 
34 #ifdef CONFIG_DEBUG_FS
35 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT        32
36 #define SMEM_IMAGE_VERSION_SIZE                4096
37 #define SMEM_IMAGE_VERSION_NAME_SIZE           75
38 #define SMEM_IMAGE_VERSION_VARIANT_SIZE        20
39 #define SMEM_IMAGE_VERSION_OEM_SIZE            32
40 
41 /*
42  * SMEM Image table indices
43  */
44 #define SMEM_IMAGE_TABLE_BOOT_INDEX     0
45 #define SMEM_IMAGE_TABLE_TZ_INDEX       1
46 #define SMEM_IMAGE_TABLE_RPM_INDEX      3
47 #define SMEM_IMAGE_TABLE_APPS_INDEX     10
48 #define SMEM_IMAGE_TABLE_MPSS_INDEX     11
49 #define SMEM_IMAGE_TABLE_ADSP_INDEX     12
50 #define SMEM_IMAGE_TABLE_CNSS_INDEX     13
51 #define SMEM_IMAGE_TABLE_VIDEO_INDEX    14
52 #define SMEM_IMAGE_VERSION_TABLE       469
53 
54 /*
55  * SMEM Image table names
56  */
57 static const char *const socinfo_image_names[] = {
58 	[SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
59 	[SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
60 	[SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
61 	[SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
62 	[SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
63 	[SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
64 	[SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
65 	[SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
66 };
67 
68 static const char *const pmic_models[] = {
69 	[0]  = "Unknown PMIC model",
70 	[9]  = "PM8994",
71 	[11] = "PM8916",
72 	[13] = "PM8058",
73 	[14] = "PM8028",
74 	[15] = "PM8901",
75 	[16] = "PM8027",
76 	[17] = "ISL9519",
77 	[18] = "PM8921",
78 	[19] = "PM8018",
79 	[20] = "PM8015",
80 	[21] = "PM8014",
81 	[22] = "PM8821",
82 	[23] = "PM8038",
83 	[24] = "PM8922",
84 	[25] = "PM8917",
85 };
86 #endif /* CONFIG_DEBUG_FS */
87 
88 /* Socinfo SMEM item structure */
89 struct socinfo {
90 	__le32 fmt;
91 	__le32 id;
92 	__le32 ver;
93 	char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH];
94 	/* Version 2 */
95 	__le32 raw_id;
96 	__le32 raw_ver;
97 	/* Version 3 */
98 	__le32 hw_plat;
99 	/* Version 4 */
100 	__le32 plat_ver;
101 	/* Version 5 */
102 	__le32 accessory_chip;
103 	/* Version 6 */
104 	__le32 hw_plat_subtype;
105 	/* Version 7 */
106 	__le32 pmic_model;
107 	__le32 pmic_die_rev;
108 	/* Version 8 */
109 	__le32 pmic_model_1;
110 	__le32 pmic_die_rev_1;
111 	__le32 pmic_model_2;
112 	__le32 pmic_die_rev_2;
113 	/* Version 9 */
114 	__le32 foundry_id;
115 	/* Version 10 */
116 	__le32 serial_num;
117 	/* Version 11 */
118 	__le32 num_pmics;
119 	__le32 pmic_array_offset;
120 	/* Version 12 */
121 	__le32 chip_family;
122 	__le32 raw_device_family;
123 	__le32 raw_device_num;
124 };
125 
126 #ifdef CONFIG_DEBUG_FS
127 struct socinfo_params {
128 	u32 raw_device_family;
129 	u32 hw_plat_subtype;
130 	u32 accessory_chip;
131 	u32 raw_device_num;
132 	u32 chip_family;
133 	u32 foundry_id;
134 	u32 plat_ver;
135 	u32 raw_ver;
136 	u32 hw_plat;
137 	u32 fmt;
138 };
139 
140 struct smem_image_version {
141 	char name[SMEM_IMAGE_VERSION_NAME_SIZE];
142 	char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
143 	char pad;
144 	char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
145 };
146 #endif /* CONFIG_DEBUG_FS */
147 
148 struct qcom_socinfo {
149 	struct soc_device *soc_dev;
150 	struct soc_device_attribute attr;
151 #ifdef CONFIG_DEBUG_FS
152 	struct dentry *dbg_root;
153 	struct socinfo_params info;
154 #endif /* CONFIG_DEBUG_FS */
155 };
156 
157 struct soc_id {
158 	unsigned int id;
159 	const char *name;
160 };
161 
162 static const struct soc_id soc_id[] = {
163 	{ 87, "MSM8960" },
164 	{ 109, "APQ8064" },
165 	{ 122, "MSM8660A" },
166 	{ 123, "MSM8260A" },
167 	{ 124, "APQ8060A" },
168 	{ 126, "MSM8974" },
169 	{ 130, "MPQ8064" },
170 	{ 138, "MSM8960AB" },
171 	{ 139, "APQ8060AB" },
172 	{ 140, "MSM8260AB" },
173 	{ 141, "MSM8660AB" },
174 	{ 178, "APQ8084" },
175 	{ 184, "APQ8074" },
176 	{ 185, "MSM8274" },
177 	{ 186, "MSM8674" },
178 	{ 194, "MSM8974PRO" },
179 	{ 206, "MSM8916" },
180 	{ 208, "APQ8074-AA" },
181 	{ 209, "APQ8074-AB" },
182 	{ 210, "APQ8074PRO" },
183 	{ 211, "MSM8274-AA" },
184 	{ 212, "MSM8274-AB" },
185 	{ 213, "MSM8274PRO" },
186 	{ 214, "MSM8674-AA" },
187 	{ 215, "MSM8674-AB" },
188 	{ 216, "MSM8674PRO" },
189 	{ 217, "MSM8974-AA" },
190 	{ 218, "MSM8974-AB" },
191 	{ 246, "MSM8996" },
192 	{ 247, "APQ8016" },
193 	{ 248, "MSM8216" },
194 	{ 249, "MSM8116" },
195 	{ 250, "MSM8616" },
196 	{ 291, "APQ8096" },
197 	{ 305, "MSM8996SG" },
198 	{ 310, "MSM8996AU" },
199 	{ 311, "APQ8096AU" },
200 	{ 312, "APQ8096SG" },
201 	{ 321, "SDM845" },
202 	{ 341, "SDA845" },
203 };
204 
205 static const char *socinfo_machine(struct device *dev, unsigned int id)
206 {
207 	int idx;
208 
209 	for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
210 		if (soc_id[idx].id == id)
211 			return soc_id[idx].name;
212 	}
213 
214 	return NULL;
215 }
216 
217 #ifdef CONFIG_DEBUG_FS
218 
219 #define QCOM_OPEN(name, _func)						\
220 static int qcom_open_##name(struct inode *inode, struct file *file)	\
221 {									\
222 	return single_open(file, _func, inode->i_private);		\
223 }									\
224 									\
225 static const struct file_operations qcom_ ##name## _ops = {		\
226 	.open = qcom_open_##name,					\
227 	.read = seq_read,						\
228 	.llseek = seq_lseek,						\
229 	.release = single_release,					\
230 }
231 
232 #define DEBUGFS_ADD(info, name)						\
233 	debugfs_create_file(__stringify(name), 0400,			\
234 			    qcom_socinfo->dbg_root,			\
235 			    info, &qcom_ ##name## _ops)
236 
237 
238 static int qcom_show_build_id(struct seq_file *seq, void *p)
239 {
240 	struct socinfo *socinfo = seq->private;
241 
242 	seq_printf(seq, "%s\n", socinfo->build_id);
243 
244 	return 0;
245 }
246 
247 static int qcom_show_pmic_model(struct seq_file *seq, void *p)
248 {
249 	struct socinfo *socinfo = seq->private;
250 	int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
251 
252 	if (model < 0)
253 		return -EINVAL;
254 
255 	seq_printf(seq, "%s\n", pmic_models[model]);
256 
257 	return 0;
258 }
259 
260 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
261 {
262 	struct socinfo *socinfo = seq->private;
263 
264 	seq_printf(seq, "%u.%u\n",
265 		   SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
266 		   SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
267 
268 	return 0;
269 }
270 
271 QCOM_OPEN(build_id, qcom_show_build_id);
272 QCOM_OPEN(pmic_model, qcom_show_pmic_model);
273 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
274 
275 #define DEFINE_IMAGE_OPS(type)					\
276 static int show_image_##type(struct seq_file *seq, void *p)		  \
277 {								  \
278 	struct smem_image_version *image_version = seq->private;  \
279 	seq_puts(seq, image_version->type);			  \
280 	seq_puts(seq, "\n");					  \
281 	return 0;						  \
282 }								  \
283 static int open_image_##type(struct inode *inode, struct file *file)	  \
284 {									  \
285 	return single_open(file, show_image_##type, inode->i_private); \
286 }									  \
287 									  \
288 static const struct file_operations qcom_image_##type##_ops = {	  \
289 	.open = open_image_##type,					  \
290 	.read = seq_read,						  \
291 	.llseek = seq_lseek,						  \
292 	.release = single_release,					  \
293 }
294 
295 DEFINE_IMAGE_OPS(name);
296 DEFINE_IMAGE_OPS(variant);
297 DEFINE_IMAGE_OPS(oem);
298 
299 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
300 				 struct socinfo *info)
301 {
302 	struct smem_image_version *versions;
303 	struct dentry *dentry;
304 	size_t size;
305 	int i;
306 
307 	qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
308 
309 	qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
310 
311 	switch (qcom_socinfo->info.fmt) {
312 	case SOCINFO_VERSION(0, 12):
313 		qcom_socinfo->info.chip_family =
314 			__le32_to_cpu(info->chip_family);
315 		qcom_socinfo->info.raw_device_family =
316 			__le32_to_cpu(info->raw_device_family);
317 		qcom_socinfo->info.raw_device_num =
318 			__le32_to_cpu(info->raw_device_num);
319 
320 		debugfs_create_x32("chip_family", 0400, qcom_socinfo->dbg_root,
321 				   &qcom_socinfo->info.chip_family);
322 		debugfs_create_x32("raw_device_family", 0400,
323 				   qcom_socinfo->dbg_root,
324 				   &qcom_socinfo->info.raw_device_family);
325 		debugfs_create_x32("raw_device_number", 0400,
326 				   qcom_socinfo->dbg_root,
327 				   &qcom_socinfo->info.raw_device_num);
328 		/* Fall through */
329 	case SOCINFO_VERSION(0, 11):
330 	case SOCINFO_VERSION(0, 10):
331 	case SOCINFO_VERSION(0, 9):
332 		qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
333 
334 		debugfs_create_u32("foundry_id", 0400, qcom_socinfo->dbg_root,
335 				   &qcom_socinfo->info.foundry_id);
336 		/* Fall through */
337 	case SOCINFO_VERSION(0, 8):
338 	case SOCINFO_VERSION(0, 7):
339 		DEBUGFS_ADD(info, pmic_model);
340 		DEBUGFS_ADD(info, pmic_die_rev);
341 		/* Fall through */
342 	case SOCINFO_VERSION(0, 6):
343 		qcom_socinfo->info.hw_plat_subtype =
344 			__le32_to_cpu(info->hw_plat_subtype);
345 
346 		debugfs_create_u32("hardware_platform_subtype", 0400,
347 				   qcom_socinfo->dbg_root,
348 				   &qcom_socinfo->info.hw_plat_subtype);
349 		/* Fall through */
350 	case SOCINFO_VERSION(0, 5):
351 		qcom_socinfo->info.accessory_chip =
352 			__le32_to_cpu(info->accessory_chip);
353 
354 		debugfs_create_u32("accessory_chip", 0400,
355 				   qcom_socinfo->dbg_root,
356 				   &qcom_socinfo->info.accessory_chip);
357 		/* Fall through */
358 	case SOCINFO_VERSION(0, 4):
359 		qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
360 
361 		debugfs_create_u32("platform_version", 0400,
362 				   qcom_socinfo->dbg_root,
363 				   &qcom_socinfo->info.plat_ver);
364 		/* Fall through */
365 	case SOCINFO_VERSION(0, 3):
366 		qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
367 
368 		debugfs_create_u32("hardware_platform", 0400,
369 				   qcom_socinfo->dbg_root,
370 				   &qcom_socinfo->info.hw_plat);
371 		/* Fall through */
372 	case SOCINFO_VERSION(0, 2):
373 		qcom_socinfo->info.raw_ver  = __le32_to_cpu(info->raw_ver);
374 
375 		debugfs_create_u32("raw_version", 0400, qcom_socinfo->dbg_root,
376 				   &qcom_socinfo->info.raw_ver);
377 		/* Fall through */
378 	case SOCINFO_VERSION(0, 1):
379 		DEBUGFS_ADD(info, build_id);
380 		break;
381 	}
382 
383 	versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE,
384 				 &size);
385 
386 	for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) {
387 		if (!socinfo_image_names[i])
388 			continue;
389 
390 		dentry = debugfs_create_dir(socinfo_image_names[i],
391 					    qcom_socinfo->dbg_root);
392 		debugfs_create_file("name", 0400, dentry, &versions[i],
393 				    &qcom_image_name_ops);
394 		debugfs_create_file("variant", 0400, dentry, &versions[i],
395 				    &qcom_image_variant_ops);
396 		debugfs_create_file("oem", 0400, dentry, &versions[i],
397 				    &qcom_image_oem_ops);
398 	}
399 }
400 
401 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
402 {
403 	debugfs_remove_recursive(qcom_socinfo->dbg_root);
404 }
405 #else
406 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
407 				 struct socinfo *info)
408 {
409 }
410 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) {  }
411 #endif /* CONFIG_DEBUG_FS */
412 
413 static int qcom_socinfo_probe(struct platform_device *pdev)
414 {
415 	struct qcom_socinfo *qs;
416 	struct socinfo *info;
417 	size_t item_size;
418 
419 	info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
420 			      &item_size);
421 	if (IS_ERR(info)) {
422 		dev_err(&pdev->dev, "Couldn't find socinfo\n");
423 		return PTR_ERR(info);
424 	}
425 
426 	qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
427 	if (!qs)
428 		return -ENOMEM;
429 
430 	qs->attr.family = "Snapdragon";
431 	qs->attr.machine = socinfo_machine(&pdev->dev,
432 					   le32_to_cpu(info->id));
433 	qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
434 					   SOCINFO_MAJOR(le32_to_cpu(info->ver)),
435 					   SOCINFO_MINOR(le32_to_cpu(info->ver)));
436 	if (offsetof(struct socinfo, serial_num) <= item_size)
437 		qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
438 							"%u",
439 							le32_to_cpu(info->serial_num));
440 
441 	qs->soc_dev = soc_device_register(&qs->attr);
442 	if (IS_ERR(qs->soc_dev))
443 		return PTR_ERR(qs->soc_dev);
444 
445 	socinfo_debugfs_init(qs, info);
446 
447 	/* Feed the soc specific unique data into entropy pool */
448 	add_device_randomness(info, item_size);
449 
450 	platform_set_drvdata(pdev, qs->soc_dev);
451 
452 	return 0;
453 }
454 
455 static int qcom_socinfo_remove(struct platform_device *pdev)
456 {
457 	struct qcom_socinfo *qs = platform_get_drvdata(pdev);
458 
459 	soc_device_unregister(qs->soc_dev);
460 
461 	socinfo_debugfs_exit(qs);
462 
463 	return 0;
464 }
465 
466 static struct platform_driver qcom_socinfo_driver = {
467 	.probe = qcom_socinfo_probe,
468 	.remove = qcom_socinfo_remove,
469 	.driver  = {
470 		.name = "qcom-socinfo",
471 	},
472 };
473 
474 module_platform_driver(qcom_socinfo_driver);
475 
476 MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
477 MODULE_LICENSE("GPL v2");
478 MODULE_ALIAS("platform:qcom-socinfo");
479