1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2017-2019, Linaro Ltd. 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/random.h> 12 #include <linux/slab.h> 13 #include <linux/soc/qcom/smem.h> 14 #include <linux/string.h> 15 #include <linux/sys_soc.h> 16 #include <linux/types.h> 17 18 /* 19 * SoC version type with major number in the upper 16 bits and minor 20 * number in the lower 16 bits. 21 */ 22 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff) 23 #define SOCINFO_MINOR(ver) ((ver) & 0xffff) 24 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff)) 25 26 #define SMEM_SOCINFO_BUILD_ID_LENGTH 32 27 28 /* 29 * SMEM item id, used to acquire handles to respective 30 * SMEM region. 31 */ 32 #define SMEM_HW_SW_BUILD_ID 137 33 34 #ifdef CONFIG_DEBUG_FS 35 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 36 #define SMEM_IMAGE_VERSION_SIZE 4096 37 #define SMEM_IMAGE_VERSION_NAME_SIZE 75 38 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20 39 #define SMEM_IMAGE_VERSION_OEM_SIZE 32 40 41 /* 42 * SMEM Image table indices 43 */ 44 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0 45 #define SMEM_IMAGE_TABLE_TZ_INDEX 1 46 #define SMEM_IMAGE_TABLE_RPM_INDEX 3 47 #define SMEM_IMAGE_TABLE_APPS_INDEX 10 48 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11 49 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12 50 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13 51 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14 52 #define SMEM_IMAGE_VERSION_TABLE 469 53 54 /* 55 * SMEM Image table names 56 */ 57 static const char *const socinfo_image_names[] = { 58 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp", 59 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps", 60 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot", 61 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss", 62 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss", 63 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm", 64 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz", 65 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video", 66 }; 67 68 static const char *const pmic_models[] = { 69 [0] = "Unknown PMIC model", 70 [9] = "PM8994", 71 [11] = "PM8916", 72 [13] = "PM8058", 73 [14] = "PM8028", 74 [15] = "PM8901", 75 [16] = "PM8027", 76 [17] = "ISL9519", 77 [18] = "PM8921", 78 [19] = "PM8018", 79 [20] = "PM8015", 80 [21] = "PM8014", 81 [22] = "PM8821", 82 [23] = "PM8038", 83 [24] = "PM8922", 84 [25] = "PM8917", 85 }; 86 #endif /* CONFIG_DEBUG_FS */ 87 88 /* Socinfo SMEM item structure */ 89 struct socinfo { 90 __le32 fmt; 91 __le32 id; 92 __le32 ver; 93 char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH]; 94 /* Version 2 */ 95 __le32 raw_id; 96 __le32 raw_ver; 97 /* Version 3 */ 98 __le32 hw_plat; 99 /* Version 4 */ 100 __le32 plat_ver; 101 /* Version 5 */ 102 __le32 accessory_chip; 103 /* Version 6 */ 104 __le32 hw_plat_subtype; 105 /* Version 7 */ 106 __le32 pmic_model; 107 __le32 pmic_die_rev; 108 /* Version 8 */ 109 __le32 pmic_model_1; 110 __le32 pmic_die_rev_1; 111 __le32 pmic_model_2; 112 __le32 pmic_die_rev_2; 113 /* Version 9 */ 114 __le32 foundry_id; 115 /* Version 10 */ 116 __le32 serial_num; 117 /* Version 11 */ 118 __le32 num_pmics; 119 __le32 pmic_array_offset; 120 /* Version 12 */ 121 __le32 chip_family; 122 __le32 raw_device_family; 123 __le32 raw_device_num; 124 }; 125 126 #ifdef CONFIG_DEBUG_FS 127 struct socinfo_params { 128 u32 raw_device_family; 129 u32 hw_plat_subtype; 130 u32 accessory_chip; 131 u32 raw_device_num; 132 u32 chip_family; 133 u32 foundry_id; 134 u32 plat_ver; 135 u32 raw_ver; 136 u32 hw_plat; 137 u32 fmt; 138 }; 139 140 struct smem_image_version { 141 char name[SMEM_IMAGE_VERSION_NAME_SIZE]; 142 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE]; 143 char pad; 144 char oem[SMEM_IMAGE_VERSION_OEM_SIZE]; 145 }; 146 #endif /* CONFIG_DEBUG_FS */ 147 148 struct qcom_socinfo { 149 struct soc_device *soc_dev; 150 struct soc_device_attribute attr; 151 #ifdef CONFIG_DEBUG_FS 152 struct dentry *dbg_root; 153 struct socinfo_params info; 154 #endif /* CONFIG_DEBUG_FS */ 155 }; 156 157 struct soc_id { 158 unsigned int id; 159 const char *name; 160 }; 161 162 static const struct soc_id soc_id[] = { 163 { 87, "MSM8960" }, 164 { 109, "APQ8064" }, 165 { 122, "MSM8660A" }, 166 { 123, "MSM8260A" }, 167 { 124, "APQ8060A" }, 168 { 126, "MSM8974" }, 169 { 130, "MPQ8064" }, 170 { 138, "MSM8960AB" }, 171 { 139, "APQ8060AB" }, 172 { 140, "MSM8260AB" }, 173 { 141, "MSM8660AB" }, 174 { 178, "APQ8084" }, 175 { 184, "APQ8074" }, 176 { 185, "MSM8274" }, 177 { 186, "MSM8674" }, 178 { 194, "MSM8974PRO" }, 179 { 206, "MSM8916" }, 180 { 208, "APQ8074-AA" }, 181 { 209, "APQ8074-AB" }, 182 { 210, "APQ8074PRO" }, 183 { 211, "MSM8274-AA" }, 184 { 212, "MSM8274-AB" }, 185 { 213, "MSM8274PRO" }, 186 { 214, "MSM8674-AA" }, 187 { 215, "MSM8674-AB" }, 188 { 216, "MSM8674PRO" }, 189 { 217, "MSM8974-AA" }, 190 { 218, "MSM8974-AB" }, 191 { 233, "MSM8936" }, 192 { 239, "MSM8939" }, 193 { 240, "APQ8036" }, 194 { 241, "APQ8039" }, 195 { 246, "MSM8996" }, 196 { 247, "APQ8016" }, 197 { 248, "MSM8216" }, 198 { 249, "MSM8116" }, 199 { 250, "MSM8616" }, 200 { 291, "APQ8096" }, 201 { 305, "MSM8996SG" }, 202 { 310, "MSM8996AU" }, 203 { 311, "APQ8096AU" }, 204 { 312, "APQ8096SG" }, 205 { 321, "SDM845" }, 206 { 341, "SDA845" }, 207 }; 208 209 static const char *socinfo_machine(struct device *dev, unsigned int id) 210 { 211 int idx; 212 213 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) { 214 if (soc_id[idx].id == id) 215 return soc_id[idx].name; 216 } 217 218 return NULL; 219 } 220 221 #ifdef CONFIG_DEBUG_FS 222 223 #define QCOM_OPEN(name, _func) \ 224 static int qcom_open_##name(struct inode *inode, struct file *file) \ 225 { \ 226 return single_open(file, _func, inode->i_private); \ 227 } \ 228 \ 229 static const struct file_operations qcom_ ##name## _ops = { \ 230 .open = qcom_open_##name, \ 231 .read = seq_read, \ 232 .llseek = seq_lseek, \ 233 .release = single_release, \ 234 } 235 236 #define DEBUGFS_ADD(info, name) \ 237 debugfs_create_file(__stringify(name), 0400, \ 238 qcom_socinfo->dbg_root, \ 239 info, &qcom_ ##name## _ops) 240 241 242 static int qcom_show_build_id(struct seq_file *seq, void *p) 243 { 244 struct socinfo *socinfo = seq->private; 245 246 seq_printf(seq, "%s\n", socinfo->build_id); 247 248 return 0; 249 } 250 251 static int qcom_show_pmic_model(struct seq_file *seq, void *p) 252 { 253 struct socinfo *socinfo = seq->private; 254 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model)); 255 256 if (model < 0) 257 return -EINVAL; 258 259 seq_printf(seq, "%s\n", pmic_models[model]); 260 261 return 0; 262 } 263 264 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) 265 { 266 struct socinfo *socinfo = seq->private; 267 268 seq_printf(seq, "%u.%u\n", 269 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)), 270 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev))); 271 272 return 0; 273 } 274 275 QCOM_OPEN(build_id, qcom_show_build_id); 276 QCOM_OPEN(pmic_model, qcom_show_pmic_model); 277 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); 278 279 #define DEFINE_IMAGE_OPS(type) \ 280 static int show_image_##type(struct seq_file *seq, void *p) \ 281 { \ 282 struct smem_image_version *image_version = seq->private; \ 283 seq_puts(seq, image_version->type); \ 284 seq_putc(seq, '\n'); \ 285 return 0; \ 286 } \ 287 static int open_image_##type(struct inode *inode, struct file *file) \ 288 { \ 289 return single_open(file, show_image_##type, inode->i_private); \ 290 } \ 291 \ 292 static const struct file_operations qcom_image_##type##_ops = { \ 293 .open = open_image_##type, \ 294 .read = seq_read, \ 295 .llseek = seq_lseek, \ 296 .release = single_release, \ 297 } 298 299 DEFINE_IMAGE_OPS(name); 300 DEFINE_IMAGE_OPS(variant); 301 DEFINE_IMAGE_OPS(oem); 302 303 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 304 struct socinfo *info) 305 { 306 struct smem_image_version *versions; 307 struct dentry *dentry; 308 size_t size; 309 int i; 310 311 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL); 312 313 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); 314 315 switch (qcom_socinfo->info.fmt) { 316 case SOCINFO_VERSION(0, 12): 317 qcom_socinfo->info.chip_family = 318 __le32_to_cpu(info->chip_family); 319 qcom_socinfo->info.raw_device_family = 320 __le32_to_cpu(info->raw_device_family); 321 qcom_socinfo->info.raw_device_num = 322 __le32_to_cpu(info->raw_device_num); 323 324 debugfs_create_x32("chip_family", 0400, qcom_socinfo->dbg_root, 325 &qcom_socinfo->info.chip_family); 326 debugfs_create_x32("raw_device_family", 0400, 327 qcom_socinfo->dbg_root, 328 &qcom_socinfo->info.raw_device_family); 329 debugfs_create_x32("raw_device_number", 0400, 330 qcom_socinfo->dbg_root, 331 &qcom_socinfo->info.raw_device_num); 332 /* Fall through */ 333 case SOCINFO_VERSION(0, 11): 334 case SOCINFO_VERSION(0, 10): 335 case SOCINFO_VERSION(0, 9): 336 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id); 337 338 debugfs_create_u32("foundry_id", 0400, qcom_socinfo->dbg_root, 339 &qcom_socinfo->info.foundry_id); 340 /* Fall through */ 341 case SOCINFO_VERSION(0, 8): 342 case SOCINFO_VERSION(0, 7): 343 DEBUGFS_ADD(info, pmic_model); 344 DEBUGFS_ADD(info, pmic_die_rev); 345 /* Fall through */ 346 case SOCINFO_VERSION(0, 6): 347 qcom_socinfo->info.hw_plat_subtype = 348 __le32_to_cpu(info->hw_plat_subtype); 349 350 debugfs_create_u32("hardware_platform_subtype", 0400, 351 qcom_socinfo->dbg_root, 352 &qcom_socinfo->info.hw_plat_subtype); 353 /* Fall through */ 354 case SOCINFO_VERSION(0, 5): 355 qcom_socinfo->info.accessory_chip = 356 __le32_to_cpu(info->accessory_chip); 357 358 debugfs_create_u32("accessory_chip", 0400, 359 qcom_socinfo->dbg_root, 360 &qcom_socinfo->info.accessory_chip); 361 /* Fall through */ 362 case SOCINFO_VERSION(0, 4): 363 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver); 364 365 debugfs_create_u32("platform_version", 0400, 366 qcom_socinfo->dbg_root, 367 &qcom_socinfo->info.plat_ver); 368 /* Fall through */ 369 case SOCINFO_VERSION(0, 3): 370 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat); 371 372 debugfs_create_u32("hardware_platform", 0400, 373 qcom_socinfo->dbg_root, 374 &qcom_socinfo->info.hw_plat); 375 /* Fall through */ 376 case SOCINFO_VERSION(0, 2): 377 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver); 378 379 debugfs_create_u32("raw_version", 0400, qcom_socinfo->dbg_root, 380 &qcom_socinfo->info.raw_ver); 381 /* Fall through */ 382 case SOCINFO_VERSION(0, 1): 383 DEBUGFS_ADD(info, build_id); 384 break; 385 } 386 387 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE, 388 &size); 389 390 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) { 391 if (!socinfo_image_names[i]) 392 continue; 393 394 dentry = debugfs_create_dir(socinfo_image_names[i], 395 qcom_socinfo->dbg_root); 396 debugfs_create_file("name", 0400, dentry, &versions[i], 397 &qcom_image_name_ops); 398 debugfs_create_file("variant", 0400, dentry, &versions[i], 399 &qcom_image_variant_ops); 400 debugfs_create_file("oem", 0400, dentry, &versions[i], 401 &qcom_image_oem_ops); 402 } 403 } 404 405 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) 406 { 407 debugfs_remove_recursive(qcom_socinfo->dbg_root); 408 } 409 #else 410 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 411 struct socinfo *info) 412 { 413 } 414 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { } 415 #endif /* CONFIG_DEBUG_FS */ 416 417 static int qcom_socinfo_probe(struct platform_device *pdev) 418 { 419 struct qcom_socinfo *qs; 420 struct socinfo *info; 421 size_t item_size; 422 423 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, 424 &item_size); 425 if (IS_ERR(info)) { 426 dev_err(&pdev->dev, "Couldn't find socinfo\n"); 427 return PTR_ERR(info); 428 } 429 430 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL); 431 if (!qs) 432 return -ENOMEM; 433 434 qs->attr.family = "Snapdragon"; 435 qs->attr.machine = socinfo_machine(&pdev->dev, 436 le32_to_cpu(info->id)); 437 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u", 438 le32_to_cpu(info->id)); 439 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u", 440 SOCINFO_MAJOR(le32_to_cpu(info->ver)), 441 SOCINFO_MINOR(le32_to_cpu(info->ver))); 442 if (offsetof(struct socinfo, serial_num) <= item_size) 443 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL, 444 "%u", 445 le32_to_cpu(info->serial_num)); 446 447 qs->soc_dev = soc_device_register(&qs->attr); 448 if (IS_ERR(qs->soc_dev)) 449 return PTR_ERR(qs->soc_dev); 450 451 socinfo_debugfs_init(qs, info); 452 453 /* Feed the soc specific unique data into entropy pool */ 454 add_device_randomness(info, item_size); 455 456 platform_set_drvdata(pdev, qs->soc_dev); 457 458 return 0; 459 } 460 461 static int qcom_socinfo_remove(struct platform_device *pdev) 462 { 463 struct qcom_socinfo *qs = platform_get_drvdata(pdev); 464 465 soc_device_unregister(qs->soc_dev); 466 467 socinfo_debugfs_exit(qs); 468 469 return 0; 470 } 471 472 static struct platform_driver qcom_socinfo_driver = { 473 .probe = qcom_socinfo_probe, 474 .remove = qcom_socinfo_remove, 475 .driver = { 476 .name = "qcom-socinfo", 477 }, 478 }; 479 480 module_platform_driver(qcom_socinfo_driver); 481 482 MODULE_DESCRIPTION("Qualcomm SoCinfo driver"); 483 MODULE_LICENSE("GPL v2"); 484 MODULE_ALIAS("platform:qcom-socinfo"); 485