1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved. 4 * Copyright (c) 2017-2019, Linaro Ltd. 5 */ 6 7 #include <linux/debugfs.h> 8 #include <linux/err.h> 9 #include <linux/module.h> 10 #include <linux/platform_device.h> 11 #include <linux/random.h> 12 #include <linux/slab.h> 13 #include <linux/soc/qcom/smem.h> 14 #include <linux/string.h> 15 #include <linux/sys_soc.h> 16 #include <linux/types.h> 17 18 /* 19 * SoC version type with major number in the upper 16 bits and minor 20 * number in the lower 16 bits. 21 */ 22 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff) 23 #define SOCINFO_MINOR(ver) ((ver) & 0xffff) 24 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff)) 25 26 #define SMEM_SOCINFO_BUILD_ID_LENGTH 32 27 #define SMEM_SOCINFO_CHIP_ID_LENGTH 32 28 29 /* 30 * SMEM item id, used to acquire handles to respective 31 * SMEM region. 32 */ 33 #define SMEM_HW_SW_BUILD_ID 137 34 35 #ifdef CONFIG_DEBUG_FS 36 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32 37 #define SMEM_IMAGE_VERSION_SIZE 4096 38 #define SMEM_IMAGE_VERSION_NAME_SIZE 75 39 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20 40 #define SMEM_IMAGE_VERSION_OEM_SIZE 32 41 42 /* 43 * SMEM Image table indices 44 */ 45 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0 46 #define SMEM_IMAGE_TABLE_TZ_INDEX 1 47 #define SMEM_IMAGE_TABLE_RPM_INDEX 3 48 #define SMEM_IMAGE_TABLE_APPS_INDEX 10 49 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11 50 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12 51 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13 52 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14 53 #define SMEM_IMAGE_VERSION_TABLE 469 54 55 /* 56 * SMEM Image table names 57 */ 58 static const char *const socinfo_image_names[] = { 59 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp", 60 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps", 61 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot", 62 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss", 63 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss", 64 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm", 65 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz", 66 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video", 67 }; 68 69 static const char *const pmic_models[] = { 70 [0] = "Unknown PMIC model", 71 [9] = "PM8994", 72 [11] = "PM8916", 73 [13] = "PM8058", 74 [14] = "PM8028", 75 [15] = "PM8901", 76 [16] = "PM8027", 77 [17] = "ISL9519", 78 [18] = "PM8921", 79 [19] = "PM8018", 80 [20] = "PM8015", 81 [21] = "PM8014", 82 [22] = "PM8821", 83 [23] = "PM8038", 84 [24] = "PM8922", 85 [25] = "PM8917", 86 }; 87 #endif /* CONFIG_DEBUG_FS */ 88 89 /* Socinfo SMEM item structure */ 90 struct socinfo { 91 __le32 fmt; 92 __le32 id; 93 __le32 ver; 94 char build_id[SMEM_SOCINFO_BUILD_ID_LENGTH]; 95 /* Version 2 */ 96 __le32 raw_id; 97 __le32 raw_ver; 98 /* Version 3 */ 99 __le32 hw_plat; 100 /* Version 4 */ 101 __le32 plat_ver; 102 /* Version 5 */ 103 __le32 accessory_chip; 104 /* Version 6 */ 105 __le32 hw_plat_subtype; 106 /* Version 7 */ 107 __le32 pmic_model; 108 __le32 pmic_die_rev; 109 /* Version 8 */ 110 __le32 pmic_model_1; 111 __le32 pmic_die_rev_1; 112 __le32 pmic_model_2; 113 __le32 pmic_die_rev_2; 114 /* Version 9 */ 115 __le32 foundry_id; 116 /* Version 10 */ 117 __le32 serial_num; 118 /* Version 11 */ 119 __le32 num_pmics; 120 __le32 pmic_array_offset; 121 /* Version 12 */ 122 __le32 chip_family; 123 __le32 raw_device_family; 124 __le32 raw_device_num; 125 /* Version 13 */ 126 __le32 nproduct_id; 127 char chip_id[SMEM_SOCINFO_CHIP_ID_LENGTH]; 128 /* Version 14 */ 129 __le32 num_clusters; 130 __le32 ncluster_array_offset; 131 __le32 num_defective_parts; 132 __le32 ndefective_parts_array_offset; 133 /* Version 15 */ 134 __le32 nmodem_supported; 135 }; 136 137 #ifdef CONFIG_DEBUG_FS 138 struct socinfo_params { 139 u32 raw_device_family; 140 u32 hw_plat_subtype; 141 u32 accessory_chip; 142 u32 raw_device_num; 143 u32 chip_family; 144 u32 foundry_id; 145 u32 plat_ver; 146 u32 raw_ver; 147 u32 hw_plat; 148 u32 fmt; 149 u32 nproduct_id; 150 u32 num_clusters; 151 u32 ncluster_array_offset; 152 u32 num_defective_parts; 153 u32 ndefective_parts_array_offset; 154 u32 nmodem_supported; 155 }; 156 157 struct smem_image_version { 158 char name[SMEM_IMAGE_VERSION_NAME_SIZE]; 159 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE]; 160 char pad; 161 char oem[SMEM_IMAGE_VERSION_OEM_SIZE]; 162 }; 163 #endif /* CONFIG_DEBUG_FS */ 164 165 struct qcom_socinfo { 166 struct soc_device *soc_dev; 167 struct soc_device_attribute attr; 168 #ifdef CONFIG_DEBUG_FS 169 struct dentry *dbg_root; 170 struct socinfo_params info; 171 #endif /* CONFIG_DEBUG_FS */ 172 }; 173 174 struct soc_id { 175 unsigned int id; 176 const char *name; 177 }; 178 179 static const struct soc_id soc_id[] = { 180 { 87, "MSM8960" }, 181 { 109, "APQ8064" }, 182 { 122, "MSM8660A" }, 183 { 123, "MSM8260A" }, 184 { 124, "APQ8060A" }, 185 { 126, "MSM8974" }, 186 { 130, "MPQ8064" }, 187 { 138, "MSM8960AB" }, 188 { 139, "APQ8060AB" }, 189 { 140, "MSM8260AB" }, 190 { 141, "MSM8660AB" }, 191 { 178, "APQ8084" }, 192 { 184, "APQ8074" }, 193 { 185, "MSM8274" }, 194 { 186, "MSM8674" }, 195 { 194, "MSM8974PRO" }, 196 { 206, "MSM8916" }, 197 { 207, "MSM8994" }, 198 { 208, "APQ8074-AA" }, 199 { 209, "APQ8074-AB" }, 200 { 210, "APQ8074PRO" }, 201 { 211, "MSM8274-AA" }, 202 { 212, "MSM8274-AB" }, 203 { 213, "MSM8274PRO" }, 204 { 214, "MSM8674-AA" }, 205 { 215, "MSM8674-AB" }, 206 { 216, "MSM8674PRO" }, 207 { 217, "MSM8974-AA" }, 208 { 218, "MSM8974-AB" }, 209 { 233, "MSM8936" }, 210 { 239, "MSM8939" }, 211 { 240, "APQ8036" }, 212 { 241, "APQ8039" }, 213 { 246, "MSM8996" }, 214 { 247, "APQ8016" }, 215 { 248, "MSM8216" }, 216 { 249, "MSM8116" }, 217 { 250, "MSM8616" }, 218 { 251, "MSM8992" }, 219 { 253, "APQ8094" }, 220 { 291, "APQ8096" }, 221 { 305, "MSM8996SG" }, 222 { 310, "MSM8996AU" }, 223 { 311, "APQ8096AU" }, 224 { 312, "APQ8096SG" }, 225 { 318, "SDM630" }, 226 { 321, "SDM845" }, 227 { 341, "SDA845" }, 228 { 356, "SM8250" }, 229 { 402, "IPQ6018" }, 230 { 425, "SC7180" }, 231 }; 232 233 static const char *socinfo_machine(struct device *dev, unsigned int id) 234 { 235 int idx; 236 237 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) { 238 if (soc_id[idx].id == id) 239 return soc_id[idx].name; 240 } 241 242 return NULL; 243 } 244 245 #ifdef CONFIG_DEBUG_FS 246 247 #define QCOM_OPEN(name, _func) \ 248 static int qcom_open_##name(struct inode *inode, struct file *file) \ 249 { \ 250 return single_open(file, _func, inode->i_private); \ 251 } \ 252 \ 253 static const struct file_operations qcom_ ##name## _ops = { \ 254 .open = qcom_open_##name, \ 255 .read = seq_read, \ 256 .llseek = seq_lseek, \ 257 .release = single_release, \ 258 } 259 260 #define DEBUGFS_ADD(info, name) \ 261 debugfs_create_file(__stringify(name), 0400, \ 262 qcom_socinfo->dbg_root, \ 263 info, &qcom_ ##name## _ops) 264 265 266 static int qcom_show_build_id(struct seq_file *seq, void *p) 267 { 268 struct socinfo *socinfo = seq->private; 269 270 seq_printf(seq, "%s\n", socinfo->build_id); 271 272 return 0; 273 } 274 275 static int qcom_show_pmic_model(struct seq_file *seq, void *p) 276 { 277 struct socinfo *socinfo = seq->private; 278 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model)); 279 280 if (model < 0) 281 return -EINVAL; 282 283 if (model <= ARRAY_SIZE(pmic_models) && pmic_models[model]) 284 seq_printf(seq, "%s\n", pmic_models[model]); 285 else 286 seq_printf(seq, "unknown (%d)\n", model); 287 288 return 0; 289 } 290 291 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p) 292 { 293 struct socinfo *socinfo = seq->private; 294 295 seq_printf(seq, "%u.%u\n", 296 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)), 297 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev))); 298 299 return 0; 300 } 301 302 static int qcom_show_chip_id(struct seq_file *seq, void *p) 303 { 304 struct socinfo *socinfo = seq->private; 305 306 seq_printf(seq, "%s\n", socinfo->chip_id); 307 308 return 0; 309 } 310 311 QCOM_OPEN(build_id, qcom_show_build_id); 312 QCOM_OPEN(pmic_model, qcom_show_pmic_model); 313 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision); 314 QCOM_OPEN(chip_id, qcom_show_chip_id); 315 316 #define DEFINE_IMAGE_OPS(type) \ 317 static int show_image_##type(struct seq_file *seq, void *p) \ 318 { \ 319 struct smem_image_version *image_version = seq->private; \ 320 seq_puts(seq, image_version->type); \ 321 seq_putc(seq, '\n'); \ 322 return 0; \ 323 } \ 324 static int open_image_##type(struct inode *inode, struct file *file) \ 325 { \ 326 return single_open(file, show_image_##type, inode->i_private); \ 327 } \ 328 \ 329 static const struct file_operations qcom_image_##type##_ops = { \ 330 .open = open_image_##type, \ 331 .read = seq_read, \ 332 .llseek = seq_lseek, \ 333 .release = single_release, \ 334 } 335 336 DEFINE_IMAGE_OPS(name); 337 DEFINE_IMAGE_OPS(variant); 338 DEFINE_IMAGE_OPS(oem); 339 340 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 341 struct socinfo *info) 342 { 343 struct smem_image_version *versions; 344 struct dentry *dentry; 345 size_t size; 346 int i; 347 348 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL); 349 350 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt); 351 352 debugfs_create_x32("info_fmt", 0400, qcom_socinfo->dbg_root, 353 &qcom_socinfo->info.fmt); 354 355 switch (qcom_socinfo->info.fmt) { 356 case SOCINFO_VERSION(0, 15): 357 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported); 358 359 debugfs_create_u32("nmodem_supported", 0400, qcom_socinfo->dbg_root, 360 &qcom_socinfo->info.nmodem_supported); 361 fallthrough; 362 case SOCINFO_VERSION(0, 14): 363 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters); 364 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset); 365 qcom_socinfo->info.num_defective_parts = __le32_to_cpu(info->num_defective_parts); 366 qcom_socinfo->info.ndefective_parts_array_offset = __le32_to_cpu(info->ndefective_parts_array_offset); 367 368 debugfs_create_u32("num_clusters", 0400, qcom_socinfo->dbg_root, 369 &qcom_socinfo->info.num_clusters); 370 debugfs_create_u32("ncluster_array_offset", 0400, qcom_socinfo->dbg_root, 371 &qcom_socinfo->info.ncluster_array_offset); 372 debugfs_create_u32("num_defective_parts", 0400, qcom_socinfo->dbg_root, 373 &qcom_socinfo->info.num_defective_parts); 374 debugfs_create_u32("ndefective_parts_array_offset", 0400, qcom_socinfo->dbg_root, 375 &qcom_socinfo->info.ndefective_parts_array_offset); 376 fallthrough; 377 case SOCINFO_VERSION(0, 13): 378 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id); 379 380 debugfs_create_u32("nproduct_id", 0400, qcom_socinfo->dbg_root, 381 &qcom_socinfo->info.nproduct_id); 382 DEBUGFS_ADD(info, chip_id); 383 fallthrough; 384 case SOCINFO_VERSION(0, 12): 385 qcom_socinfo->info.chip_family = 386 __le32_to_cpu(info->chip_family); 387 qcom_socinfo->info.raw_device_family = 388 __le32_to_cpu(info->raw_device_family); 389 qcom_socinfo->info.raw_device_num = 390 __le32_to_cpu(info->raw_device_num); 391 392 debugfs_create_x32("chip_family", 0400, qcom_socinfo->dbg_root, 393 &qcom_socinfo->info.chip_family); 394 debugfs_create_x32("raw_device_family", 0400, 395 qcom_socinfo->dbg_root, 396 &qcom_socinfo->info.raw_device_family); 397 debugfs_create_x32("raw_device_number", 0400, 398 qcom_socinfo->dbg_root, 399 &qcom_socinfo->info.raw_device_num); 400 fallthrough; 401 case SOCINFO_VERSION(0, 11): 402 case SOCINFO_VERSION(0, 10): 403 case SOCINFO_VERSION(0, 9): 404 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id); 405 406 debugfs_create_u32("foundry_id", 0400, qcom_socinfo->dbg_root, 407 &qcom_socinfo->info.foundry_id); 408 fallthrough; 409 case SOCINFO_VERSION(0, 8): 410 case SOCINFO_VERSION(0, 7): 411 DEBUGFS_ADD(info, pmic_model); 412 DEBUGFS_ADD(info, pmic_die_rev); 413 fallthrough; 414 case SOCINFO_VERSION(0, 6): 415 qcom_socinfo->info.hw_plat_subtype = 416 __le32_to_cpu(info->hw_plat_subtype); 417 418 debugfs_create_u32("hardware_platform_subtype", 0400, 419 qcom_socinfo->dbg_root, 420 &qcom_socinfo->info.hw_plat_subtype); 421 fallthrough; 422 case SOCINFO_VERSION(0, 5): 423 qcom_socinfo->info.accessory_chip = 424 __le32_to_cpu(info->accessory_chip); 425 426 debugfs_create_u32("accessory_chip", 0400, 427 qcom_socinfo->dbg_root, 428 &qcom_socinfo->info.accessory_chip); 429 fallthrough; 430 case SOCINFO_VERSION(0, 4): 431 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver); 432 433 debugfs_create_u32("platform_version", 0400, 434 qcom_socinfo->dbg_root, 435 &qcom_socinfo->info.plat_ver); 436 fallthrough; 437 case SOCINFO_VERSION(0, 3): 438 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat); 439 440 debugfs_create_u32("hardware_platform", 0400, 441 qcom_socinfo->dbg_root, 442 &qcom_socinfo->info.hw_plat); 443 fallthrough; 444 case SOCINFO_VERSION(0, 2): 445 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver); 446 447 debugfs_create_u32("raw_version", 0400, qcom_socinfo->dbg_root, 448 &qcom_socinfo->info.raw_ver); 449 fallthrough; 450 case SOCINFO_VERSION(0, 1): 451 DEBUGFS_ADD(info, build_id); 452 break; 453 } 454 455 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE, 456 &size); 457 458 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) { 459 if (!socinfo_image_names[i]) 460 continue; 461 462 dentry = debugfs_create_dir(socinfo_image_names[i], 463 qcom_socinfo->dbg_root); 464 debugfs_create_file("name", 0400, dentry, &versions[i], 465 &qcom_image_name_ops); 466 debugfs_create_file("variant", 0400, dentry, &versions[i], 467 &qcom_image_variant_ops); 468 debugfs_create_file("oem", 0400, dentry, &versions[i], 469 &qcom_image_oem_ops); 470 } 471 } 472 473 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) 474 { 475 debugfs_remove_recursive(qcom_socinfo->dbg_root); 476 } 477 #else 478 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo, 479 struct socinfo *info) 480 { 481 } 482 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { } 483 #endif /* CONFIG_DEBUG_FS */ 484 485 static int qcom_socinfo_probe(struct platform_device *pdev) 486 { 487 struct qcom_socinfo *qs; 488 struct socinfo *info; 489 size_t item_size; 490 491 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID, 492 &item_size); 493 if (IS_ERR(info)) { 494 dev_err(&pdev->dev, "Couldn't find socinfo\n"); 495 return PTR_ERR(info); 496 } 497 498 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL); 499 if (!qs) 500 return -ENOMEM; 501 502 qs->attr.family = "Snapdragon"; 503 qs->attr.machine = socinfo_machine(&pdev->dev, 504 le32_to_cpu(info->id)); 505 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u", 506 le32_to_cpu(info->id)); 507 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u", 508 SOCINFO_MAJOR(le32_to_cpu(info->ver)), 509 SOCINFO_MINOR(le32_to_cpu(info->ver))); 510 if (offsetof(struct socinfo, serial_num) <= item_size) 511 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL, 512 "%u", 513 le32_to_cpu(info->serial_num)); 514 515 qs->soc_dev = soc_device_register(&qs->attr); 516 if (IS_ERR(qs->soc_dev)) 517 return PTR_ERR(qs->soc_dev); 518 519 socinfo_debugfs_init(qs, info); 520 521 /* Feed the soc specific unique data into entropy pool */ 522 add_device_randomness(info, item_size); 523 524 platform_set_drvdata(pdev, qs->soc_dev); 525 526 return 0; 527 } 528 529 static int qcom_socinfo_remove(struct platform_device *pdev) 530 { 531 struct qcom_socinfo *qs = platform_get_drvdata(pdev); 532 533 soc_device_unregister(qs->soc_dev); 534 535 socinfo_debugfs_exit(qs); 536 537 return 0; 538 } 539 540 static struct platform_driver qcom_socinfo_driver = { 541 .probe = qcom_socinfo_probe, 542 .remove = qcom_socinfo_remove, 543 .driver = { 544 .name = "qcom-socinfo", 545 }, 546 }; 547 548 module_platform_driver(qcom_socinfo_driver); 549 550 MODULE_DESCRIPTION("Qualcomm SoCinfo driver"); 551 MODULE_LICENSE("GPL v2"); 552 MODULE_ALIAS("platform:qcom-socinfo"); 553