1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2009-2017, The Linux Foundation. All rights reserved.
4 * Copyright (c) 2017-2019, Linaro Ltd.
5 */
6
7 #include <linux/debugfs.h>
8 #include <linux/err.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/random.h>
12 #include <linux/slab.h>
13 #include <linux/soc/qcom/smem.h>
14 #include <linux/soc/qcom/socinfo.h>
15 #include <linux/string.h>
16 #include <linux/stringify.h>
17 #include <linux/sys_soc.h>
18 #include <linux/types.h>
19
20 #include <asm/unaligned.h>
21
22 #include <dt-bindings/arm/qcom,ids.h>
23
24 /*
25 * SoC version type with major number in the upper 16 bits and minor
26 * number in the lower 16 bits.
27 */
28 #define SOCINFO_MAJOR(ver) (((ver) >> 16) & 0xffff)
29 #define SOCINFO_MINOR(ver) ((ver) & 0xffff)
30 #define SOCINFO_VERSION(maj, min) ((((maj) & 0xffff) << 16)|((min) & 0xffff))
31
32 /* Helper macros to create soc_id table */
33 #define qcom_board_id(id) QCOM_ID_ ## id, __stringify(id)
34 #define qcom_board_id_named(id, name) QCOM_ID_ ## id, (name)
35
36 #ifdef CONFIG_DEBUG_FS
37 #define SMEM_IMAGE_VERSION_BLOCKS_COUNT 32
38 #define SMEM_IMAGE_VERSION_SIZE 4096
39 #define SMEM_IMAGE_VERSION_NAME_SIZE 75
40 #define SMEM_IMAGE_VERSION_VARIANT_SIZE 20
41 #define SMEM_IMAGE_VERSION_OEM_SIZE 32
42
43 /*
44 * SMEM Image table indices
45 */
46 #define SMEM_IMAGE_TABLE_BOOT_INDEX 0
47 #define SMEM_IMAGE_TABLE_TZ_INDEX 1
48 #define SMEM_IMAGE_TABLE_RPM_INDEX 3
49 #define SMEM_IMAGE_TABLE_APPS_INDEX 10
50 #define SMEM_IMAGE_TABLE_MPSS_INDEX 11
51 #define SMEM_IMAGE_TABLE_ADSP_INDEX 12
52 #define SMEM_IMAGE_TABLE_CNSS_INDEX 13
53 #define SMEM_IMAGE_TABLE_VIDEO_INDEX 14
54 #define SMEM_IMAGE_VERSION_TABLE 469
55
56 /*
57 * SMEM Image table names
58 */
59 static const char *const socinfo_image_names[] = {
60 [SMEM_IMAGE_TABLE_ADSP_INDEX] = "adsp",
61 [SMEM_IMAGE_TABLE_APPS_INDEX] = "apps",
62 [SMEM_IMAGE_TABLE_BOOT_INDEX] = "boot",
63 [SMEM_IMAGE_TABLE_CNSS_INDEX] = "cnss",
64 [SMEM_IMAGE_TABLE_MPSS_INDEX] = "mpss",
65 [SMEM_IMAGE_TABLE_RPM_INDEX] = "rpm",
66 [SMEM_IMAGE_TABLE_TZ_INDEX] = "tz",
67 [SMEM_IMAGE_TABLE_VIDEO_INDEX] = "video",
68 };
69
70 static const char *const pmic_models[] = {
71 [0] = "Unknown PMIC model",
72 [1] = "PM8941",
73 [2] = "PM8841",
74 [3] = "PM8019",
75 [4] = "PM8226",
76 [5] = "PM8110",
77 [6] = "PMA8084",
78 [7] = "PMI8962",
79 [8] = "PMD9635",
80 [9] = "PM8994",
81 [10] = "PMI8994",
82 [11] = "PM8916",
83 [12] = "PM8004",
84 [13] = "PM8909/PM8058",
85 [14] = "PM8028",
86 [15] = "PM8901",
87 [16] = "PM8950/PM8027",
88 [17] = "PMI8950/ISL9519",
89 [18] = "PMK8001/PM8921",
90 [19] = "PMI8996/PM8018",
91 [20] = "PM8998/PM8015",
92 [21] = "PMI8998/PM8014",
93 [22] = "PM8821",
94 [23] = "PM8038",
95 [24] = "PM8005/PM8922",
96 [25] = "PM8917",
97 [26] = "PM660L",
98 [27] = "PM660",
99 [30] = "PM8150",
100 [31] = "PM8150L",
101 [32] = "PM8150B",
102 [33] = "PMK8002",
103 [36] = "PM8009",
104 [37] = "PMI632",
105 [38] = "PM8150C",
106 [40] = "PM6150",
107 [41] = "SMB2351",
108 [44] = "PM8008",
109 [45] = "PM6125",
110 [46] = "PM7250B",
111 [47] = "PMK8350",
112 [48] = "PM8350",
113 [49] = "PM8350C",
114 [50] = "PM8350B",
115 [51] = "PMR735A",
116 [52] = "PMR735B",
117 [55] = "PM4125",
118 [58] = "PM8450",
119 [65] = "PM8010",
120 };
121
122 struct socinfo_params {
123 u32 raw_device_family;
124 u32 hw_plat_subtype;
125 u32 accessory_chip;
126 u32 raw_device_num;
127 u32 chip_family;
128 u32 foundry_id;
129 u32 plat_ver;
130 u32 raw_ver;
131 u32 hw_plat;
132 u32 fmt;
133 u32 nproduct_id;
134 u32 num_clusters;
135 u32 ncluster_array_offset;
136 u32 num_subset_parts;
137 u32 nsubset_parts_array_offset;
138 u32 nmodem_supported;
139 u32 feature_code;
140 u32 pcode;
141 u32 oem_variant;
142 u32 num_func_clusters;
143 u32 boot_cluster;
144 u32 boot_core;
145 };
146
147 struct smem_image_version {
148 char name[SMEM_IMAGE_VERSION_NAME_SIZE];
149 char variant[SMEM_IMAGE_VERSION_VARIANT_SIZE];
150 char pad;
151 char oem[SMEM_IMAGE_VERSION_OEM_SIZE];
152 };
153 #endif /* CONFIG_DEBUG_FS */
154
155 struct qcom_socinfo {
156 struct soc_device *soc_dev;
157 struct soc_device_attribute attr;
158 #ifdef CONFIG_DEBUG_FS
159 struct dentry *dbg_root;
160 struct socinfo_params info;
161 #endif /* CONFIG_DEBUG_FS */
162 };
163
164 struct soc_id {
165 unsigned int id;
166 const char *name;
167 };
168
169 static const struct soc_id soc_id[] = {
170 { qcom_board_id(MSM8260) },
171 { qcom_board_id(MSM8660) },
172 { qcom_board_id(APQ8060) },
173 { qcom_board_id(MSM8960) },
174 { qcom_board_id(APQ8064) },
175 { qcom_board_id(MSM8930) },
176 { qcom_board_id(MSM8630) },
177 { qcom_board_id(MSM8230) },
178 { qcom_board_id(APQ8030) },
179 { qcom_board_id(MSM8627) },
180 { qcom_board_id(MSM8227) },
181 { qcom_board_id(MSM8660A) },
182 { qcom_board_id(MSM8260A) },
183 { qcom_board_id(APQ8060A) },
184 { qcom_board_id(MSM8974) },
185 { qcom_board_id(MSM8225) },
186 { qcom_board_id(MSM8625) },
187 { qcom_board_id(MPQ8064) },
188 { qcom_board_id(MSM8960AB) },
189 { qcom_board_id(APQ8060AB) },
190 { qcom_board_id(MSM8260AB) },
191 { qcom_board_id(MSM8660AB) },
192 { qcom_board_id(MSM8930AA) },
193 { qcom_board_id(MSM8630AA) },
194 { qcom_board_id(MSM8230AA) },
195 { qcom_board_id(MSM8626) },
196 { qcom_board_id(MSM8610) },
197 { qcom_board_id(APQ8064AB) },
198 { qcom_board_id(MSM8930AB) },
199 { qcom_board_id(MSM8630AB) },
200 { qcom_board_id(MSM8230AB) },
201 { qcom_board_id(APQ8030AB) },
202 { qcom_board_id(MSM8226) },
203 { qcom_board_id(MSM8526) },
204 { qcom_board_id(APQ8030AA) },
205 { qcom_board_id(MSM8110) },
206 { qcom_board_id(MSM8210) },
207 { qcom_board_id(MSM8810) },
208 { qcom_board_id(MSM8212) },
209 { qcom_board_id(MSM8612) },
210 { qcom_board_id(MSM8112) },
211 { qcom_board_id(MSM8125) },
212 { qcom_board_id(MSM8225Q) },
213 { qcom_board_id(MSM8625Q) },
214 { qcom_board_id(MSM8125Q) },
215 { qcom_board_id(APQ8064AA) },
216 { qcom_board_id(APQ8084) },
217 { qcom_board_id(MSM8130) },
218 { qcom_board_id(MSM8130AA) },
219 { qcom_board_id(MSM8130AB) },
220 { qcom_board_id(MSM8627AA) },
221 { qcom_board_id(MSM8227AA) },
222 { qcom_board_id(APQ8074) },
223 { qcom_board_id(MSM8274) },
224 { qcom_board_id(MSM8674) },
225 { qcom_board_id(MDM9635) },
226 { qcom_board_id_named(MSM8974PRO_AC, "MSM8974PRO-AC") },
227 { qcom_board_id(MSM8126) },
228 { qcom_board_id(APQ8026) },
229 { qcom_board_id(MSM8926) },
230 { qcom_board_id(IPQ8062) },
231 { qcom_board_id(IPQ8064) },
232 { qcom_board_id(IPQ8066) },
233 { qcom_board_id(IPQ8068) },
234 { qcom_board_id(MSM8326) },
235 { qcom_board_id(MSM8916) },
236 { qcom_board_id(MSM8994) },
237 { qcom_board_id_named(APQ8074PRO_AA, "APQ8074PRO-AA") },
238 { qcom_board_id_named(APQ8074PRO_AB, "APQ8074PRO-AB") },
239 { qcom_board_id_named(APQ8074PRO_AC, "APQ8074PRO-AC") },
240 { qcom_board_id_named(MSM8274PRO_AA, "MSM8274PRO-AA") },
241 { qcom_board_id_named(MSM8274PRO_AB, "MSM8274PRO-AB") },
242 { qcom_board_id_named(MSM8274PRO_AC, "MSM8274PRO-AC") },
243 { qcom_board_id_named(MSM8674PRO_AA, "MSM8674PRO-AA") },
244 { qcom_board_id_named(MSM8674PRO_AB, "MSM8674PRO-AB") },
245 { qcom_board_id_named(MSM8674PRO_AC, "MSM8674PRO-AC") },
246 { qcom_board_id_named(MSM8974PRO_AA, "MSM8974PRO-AA") },
247 { qcom_board_id_named(MSM8974PRO_AB, "MSM8974PRO-AB") },
248 { qcom_board_id(APQ8028) },
249 { qcom_board_id(MSM8128) },
250 { qcom_board_id(MSM8228) },
251 { qcom_board_id(MSM8528) },
252 { qcom_board_id(MSM8628) },
253 { qcom_board_id(MSM8928) },
254 { qcom_board_id(MSM8510) },
255 { qcom_board_id(MSM8512) },
256 { qcom_board_id(MSM8936) },
257 { qcom_board_id(MDM9640) },
258 { qcom_board_id(MSM8939) },
259 { qcom_board_id(APQ8036) },
260 { qcom_board_id(APQ8039) },
261 { qcom_board_id(MSM8236) },
262 { qcom_board_id(MSM8636) },
263 { qcom_board_id(MSM8909) },
264 { qcom_board_id(MSM8996) },
265 { qcom_board_id(APQ8016) },
266 { qcom_board_id(MSM8216) },
267 { qcom_board_id(MSM8116) },
268 { qcom_board_id(MSM8616) },
269 { qcom_board_id(MSM8992) },
270 { qcom_board_id(APQ8092) },
271 { qcom_board_id(APQ8094) },
272 { qcom_board_id(MSM8209) },
273 { qcom_board_id(MSM8208) },
274 { qcom_board_id(MDM9209) },
275 { qcom_board_id(MDM9309) },
276 { qcom_board_id(MDM9609) },
277 { qcom_board_id(MSM8239) },
278 { qcom_board_id(MSM8952) },
279 { qcom_board_id(APQ8009) },
280 { qcom_board_id(MSM8956) },
281 { qcom_board_id(MSM8929) },
282 { qcom_board_id(MSM8629) },
283 { qcom_board_id(MSM8229) },
284 { qcom_board_id(APQ8029) },
285 { qcom_board_id(APQ8056) },
286 { qcom_board_id(MSM8609) },
287 { qcom_board_id(APQ8076) },
288 { qcom_board_id(MSM8976) },
289 { qcom_board_id(IPQ8065) },
290 { qcom_board_id(IPQ8069) },
291 { qcom_board_id(MDM9650) },
292 { qcom_board_id(MDM9655) },
293 { qcom_board_id(MDM9250) },
294 { qcom_board_id(MDM9255) },
295 { qcom_board_id(MDM9350) },
296 { qcom_board_id(APQ8052) },
297 { qcom_board_id(MDM9607) },
298 { qcom_board_id(APQ8096) },
299 { qcom_board_id(MSM8998) },
300 { qcom_board_id(MSM8953) },
301 { qcom_board_id(MSM8937) },
302 { qcom_board_id(APQ8037) },
303 { qcom_board_id(MDM8207) },
304 { qcom_board_id(MDM9207) },
305 { qcom_board_id(MDM9307) },
306 { qcom_board_id(MDM9628) },
307 { qcom_board_id(MSM8909W) },
308 { qcom_board_id(APQ8009W) },
309 { qcom_board_id(MSM8996L) },
310 { qcom_board_id(MSM8917) },
311 { qcom_board_id(APQ8053) },
312 { qcom_board_id(MSM8996SG) },
313 { qcom_board_id(APQ8017) },
314 { qcom_board_id(MSM8217) },
315 { qcom_board_id(MSM8617) },
316 { qcom_board_id(MSM8996AU) },
317 { qcom_board_id(APQ8096AU) },
318 { qcom_board_id(APQ8096SG) },
319 { qcom_board_id(MSM8940) },
320 { qcom_board_id(SDX201) },
321 { qcom_board_id(SDM660) },
322 { qcom_board_id(SDM630) },
323 { qcom_board_id(APQ8098) },
324 { qcom_board_id(MSM8920) },
325 { qcom_board_id(SDM845) },
326 { qcom_board_id(MDM9206) },
327 { qcom_board_id(IPQ8074) },
328 { qcom_board_id(SDA660) },
329 { qcom_board_id(SDM658) },
330 { qcom_board_id(SDA658) },
331 { qcom_board_id(SDA630) },
332 { qcom_board_id(MSM8905) },
333 { qcom_board_id(SDX202) },
334 { qcom_board_id(SDM450) },
335 { qcom_board_id(SM8150) },
336 { qcom_board_id(SDA845) },
337 { qcom_board_id(IPQ8072) },
338 { qcom_board_id(IPQ8076) },
339 { qcom_board_id(IPQ8078) },
340 { qcom_board_id(SDM636) },
341 { qcom_board_id(SDA636) },
342 { qcom_board_id(SDM632) },
343 { qcom_board_id(SDA632) },
344 { qcom_board_id(SDA450) },
345 { qcom_board_id(SDM439) },
346 { qcom_board_id(SDM429) },
347 { qcom_board_id(SM8250) },
348 { qcom_board_id(SA8155) },
349 { qcom_board_id(SDA439) },
350 { qcom_board_id(SDA429) },
351 { qcom_board_id(SM7150) },
352 { qcom_board_id(IPQ8070) },
353 { qcom_board_id(IPQ8071) },
354 { qcom_board_id(QM215) },
355 { qcom_board_id(IPQ8072A) },
356 { qcom_board_id(IPQ8074A) },
357 { qcom_board_id(IPQ8076A) },
358 { qcom_board_id(IPQ8078A) },
359 { qcom_board_id(SM6125) },
360 { qcom_board_id(IPQ8070A) },
361 { qcom_board_id(IPQ8071A) },
362 { qcom_board_id(IPQ6018) },
363 { qcom_board_id(IPQ6028) },
364 { qcom_board_id(SDM429W) },
365 { qcom_board_id(SM4250) },
366 { qcom_board_id(IPQ6000) },
367 { qcom_board_id(IPQ6010) },
368 { qcom_board_id(SC7180) },
369 { qcom_board_id(SM6350) },
370 { qcom_board_id(QCM2150) },
371 { qcom_board_id(SDA429W) },
372 { qcom_board_id(SM8350) },
373 { qcom_board_id(QCM2290) },
374 { qcom_board_id(SM7125) },
375 { qcom_board_id(SM6115) },
376 { qcom_board_id(IPQ5010) },
377 { qcom_board_id(IPQ5018) },
378 { qcom_board_id(IPQ5028) },
379 { qcom_board_id(SC8280XP) },
380 { qcom_board_id(IPQ6005) },
381 { qcom_board_id(QRB5165) },
382 { qcom_board_id(SM8450) },
383 { qcom_board_id(SM7225) },
384 { qcom_board_id(SA8295P) },
385 { qcom_board_id(SA8540P) },
386 { qcom_board_id(QCM4290) },
387 { qcom_board_id(QCS4290) },
388 { qcom_board_id_named(SM8450_2, "SM8450") },
389 { qcom_board_id_named(SM8450_3, "SM8450") },
390 { qcom_board_id(SC7280) },
391 { qcom_board_id(SC7180P) },
392 { qcom_board_id(IPQ5000) },
393 { qcom_board_id(IPQ0509) },
394 { qcom_board_id(IPQ0518) },
395 { qcom_board_id(SM6375) },
396 { qcom_board_id(IPQ9514) },
397 { qcom_board_id(IPQ9550) },
398 { qcom_board_id(IPQ9554) },
399 { qcom_board_id(IPQ9570) },
400 { qcom_board_id(IPQ9574) },
401 { qcom_board_id(SM8550) },
402 { qcom_board_id(IPQ5016) },
403 { qcom_board_id(IPQ9510) },
404 { qcom_board_id(QRB4210) },
405 { qcom_board_id(QRB2210) },
406 { qcom_board_id(SA8775P) },
407 { qcom_board_id(QRU1000) },
408 { qcom_board_id(QDU1000) },
409 { qcom_board_id(SM4450) },
410 { qcom_board_id(QDU1010) },
411 { qcom_board_id(QRU1032) },
412 { qcom_board_id(QRU1052) },
413 { qcom_board_id(QRU1062) },
414 { qcom_board_id(IPQ5332) },
415 { qcom_board_id(IPQ5322) },
416 { qcom_board_id(IPQ5312) },
417 { qcom_board_id(IPQ5302) },
418 { qcom_board_id(IPQ5300) },
419 };
420
socinfo_machine(struct device * dev,unsigned int id)421 static const char *socinfo_machine(struct device *dev, unsigned int id)
422 {
423 int idx;
424
425 for (idx = 0; idx < ARRAY_SIZE(soc_id); idx++) {
426 if (soc_id[idx].id == id)
427 return soc_id[idx].name;
428 }
429
430 return NULL;
431 }
432
433 #ifdef CONFIG_DEBUG_FS
434
435 #define QCOM_OPEN(name, _func) \
436 static int qcom_open_##name(struct inode *inode, struct file *file) \
437 { \
438 return single_open(file, _func, inode->i_private); \
439 } \
440 \
441 static const struct file_operations qcom_ ##name## _ops = { \
442 .open = qcom_open_##name, \
443 .read = seq_read, \
444 .llseek = seq_lseek, \
445 .release = single_release, \
446 }
447
448 #define DEBUGFS_ADD(info, name) \
449 debugfs_create_file(__stringify(name), 0444, \
450 qcom_socinfo->dbg_root, \
451 info, &qcom_ ##name## _ops)
452
453
qcom_show_build_id(struct seq_file * seq,void * p)454 static int qcom_show_build_id(struct seq_file *seq, void *p)
455 {
456 struct socinfo *socinfo = seq->private;
457
458 seq_printf(seq, "%s\n", socinfo->build_id);
459
460 return 0;
461 }
462
qcom_show_pmic_model(struct seq_file * seq,void * p)463 static int qcom_show_pmic_model(struct seq_file *seq, void *p)
464 {
465 struct socinfo *socinfo = seq->private;
466 int model = SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_model));
467
468 if (model < 0)
469 return -EINVAL;
470
471 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
472 seq_printf(seq, "%s\n", pmic_models[model]);
473 else
474 seq_printf(seq, "unknown (%d)\n", model);
475
476 return 0;
477 }
478
qcom_show_pmic_model_array(struct seq_file * seq,void * p)479 static int qcom_show_pmic_model_array(struct seq_file *seq, void *p)
480 {
481 struct socinfo *socinfo = seq->private;
482 unsigned int num_pmics = le32_to_cpu(socinfo->num_pmics);
483 unsigned int pmic_array_offset = le32_to_cpu(socinfo->pmic_array_offset);
484 int i;
485 void *ptr = socinfo;
486
487 ptr += pmic_array_offset;
488
489 /* No need for bounds checking, it happened at socinfo_debugfs_init */
490 for (i = 0; i < num_pmics; i++) {
491 unsigned int model = SOCINFO_MINOR(get_unaligned_le32(ptr + 2 * i * sizeof(u32)));
492 unsigned int die_rev = get_unaligned_le32(ptr + (2 * i + 1) * sizeof(u32));
493
494 if (model < ARRAY_SIZE(pmic_models) && pmic_models[model])
495 seq_printf(seq, "%s %u.%u\n", pmic_models[model],
496 SOCINFO_MAJOR(die_rev),
497 SOCINFO_MINOR(die_rev));
498 else
499 seq_printf(seq, "unknown (%d)\n", model);
500 }
501
502 return 0;
503 }
504
qcom_show_pmic_die_revision(struct seq_file * seq,void * p)505 static int qcom_show_pmic_die_revision(struct seq_file *seq, void *p)
506 {
507 struct socinfo *socinfo = seq->private;
508
509 seq_printf(seq, "%u.%u\n",
510 SOCINFO_MAJOR(le32_to_cpu(socinfo->pmic_die_rev)),
511 SOCINFO_MINOR(le32_to_cpu(socinfo->pmic_die_rev)));
512
513 return 0;
514 }
515
qcom_show_chip_id(struct seq_file * seq,void * p)516 static int qcom_show_chip_id(struct seq_file *seq, void *p)
517 {
518 struct socinfo *socinfo = seq->private;
519
520 seq_printf(seq, "%s\n", socinfo->chip_id);
521
522 return 0;
523 }
524
525 QCOM_OPEN(build_id, qcom_show_build_id);
526 QCOM_OPEN(pmic_model, qcom_show_pmic_model);
527 QCOM_OPEN(pmic_model_array, qcom_show_pmic_model_array);
528 QCOM_OPEN(pmic_die_rev, qcom_show_pmic_die_revision);
529 QCOM_OPEN(chip_id, qcom_show_chip_id);
530
531 #define DEFINE_IMAGE_OPS(type) \
532 static int show_image_##type(struct seq_file *seq, void *p) \
533 { \
534 struct smem_image_version *image_version = seq->private; \
535 if (image_version->type[0] != '\0') \
536 seq_printf(seq, "%s\n", image_version->type); \
537 return 0; \
538 } \
539 static int open_image_##type(struct inode *inode, struct file *file) \
540 { \
541 return single_open(file, show_image_##type, inode->i_private); \
542 } \
543 \
544 static const struct file_operations qcom_image_##type##_ops = { \
545 .open = open_image_##type, \
546 .read = seq_read, \
547 .llseek = seq_lseek, \
548 .release = single_release, \
549 }
550
551 DEFINE_IMAGE_OPS(name);
552 DEFINE_IMAGE_OPS(variant);
553 DEFINE_IMAGE_OPS(oem);
554
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)555 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
556 struct socinfo *info, size_t info_size)
557 {
558 struct smem_image_version *versions;
559 struct dentry *dentry;
560 size_t size;
561 int i;
562 unsigned int num_pmics;
563 unsigned int pmic_array_offset;
564
565 qcom_socinfo->dbg_root = debugfs_create_dir("qcom_socinfo", NULL);
566
567 qcom_socinfo->info.fmt = __le32_to_cpu(info->fmt);
568
569 debugfs_create_x32("info_fmt", 0444, qcom_socinfo->dbg_root,
570 &qcom_socinfo->info.fmt);
571
572 switch (qcom_socinfo->info.fmt) {
573 case SOCINFO_VERSION(0, 19):
574 qcom_socinfo->info.num_func_clusters = __le32_to_cpu(info->num_func_clusters);
575 qcom_socinfo->info.boot_cluster = __le32_to_cpu(info->boot_cluster);
576 qcom_socinfo->info.boot_core = __le32_to_cpu(info->boot_core);
577
578 debugfs_create_u32("num_func_clusters", 0444, qcom_socinfo->dbg_root,
579 &qcom_socinfo->info.num_func_clusters);
580 debugfs_create_u32("boot_cluster", 0444, qcom_socinfo->dbg_root,
581 &qcom_socinfo->info.boot_cluster);
582 debugfs_create_u32("boot_core", 0444, qcom_socinfo->dbg_root,
583 &qcom_socinfo->info.boot_core);
584 fallthrough;
585 case SOCINFO_VERSION(0, 18):
586 case SOCINFO_VERSION(0, 17):
587 qcom_socinfo->info.oem_variant = __le32_to_cpu(info->oem_variant);
588 debugfs_create_u32("oem_variant", 0444, qcom_socinfo->dbg_root,
589 &qcom_socinfo->info.oem_variant);
590 fallthrough;
591 case SOCINFO_VERSION(0, 16):
592 qcom_socinfo->info.feature_code = __le32_to_cpu(info->feature_code);
593 qcom_socinfo->info.pcode = __le32_to_cpu(info->pcode);
594
595 debugfs_create_u32("feature_code", 0444, qcom_socinfo->dbg_root,
596 &qcom_socinfo->info.feature_code);
597 debugfs_create_u32("pcode", 0444, qcom_socinfo->dbg_root,
598 &qcom_socinfo->info.pcode);
599 fallthrough;
600 case SOCINFO_VERSION(0, 15):
601 qcom_socinfo->info.nmodem_supported = __le32_to_cpu(info->nmodem_supported);
602
603 debugfs_create_u32("nmodem_supported", 0444, qcom_socinfo->dbg_root,
604 &qcom_socinfo->info.nmodem_supported);
605 fallthrough;
606 case SOCINFO_VERSION(0, 14):
607 qcom_socinfo->info.num_clusters = __le32_to_cpu(info->num_clusters);
608 qcom_socinfo->info.ncluster_array_offset = __le32_to_cpu(info->ncluster_array_offset);
609 qcom_socinfo->info.num_subset_parts = __le32_to_cpu(info->num_subset_parts);
610 qcom_socinfo->info.nsubset_parts_array_offset =
611 __le32_to_cpu(info->nsubset_parts_array_offset);
612
613 debugfs_create_u32("num_clusters", 0444, qcom_socinfo->dbg_root,
614 &qcom_socinfo->info.num_clusters);
615 debugfs_create_u32("ncluster_array_offset", 0444, qcom_socinfo->dbg_root,
616 &qcom_socinfo->info.ncluster_array_offset);
617 debugfs_create_u32("num_subset_parts", 0444, qcom_socinfo->dbg_root,
618 &qcom_socinfo->info.num_subset_parts);
619 debugfs_create_u32("nsubset_parts_array_offset", 0444, qcom_socinfo->dbg_root,
620 &qcom_socinfo->info.nsubset_parts_array_offset);
621 fallthrough;
622 case SOCINFO_VERSION(0, 13):
623 qcom_socinfo->info.nproduct_id = __le32_to_cpu(info->nproduct_id);
624
625 debugfs_create_u32("nproduct_id", 0444, qcom_socinfo->dbg_root,
626 &qcom_socinfo->info.nproduct_id);
627 DEBUGFS_ADD(info, chip_id);
628 fallthrough;
629 case SOCINFO_VERSION(0, 12):
630 qcom_socinfo->info.chip_family =
631 __le32_to_cpu(info->chip_family);
632 qcom_socinfo->info.raw_device_family =
633 __le32_to_cpu(info->raw_device_family);
634 qcom_socinfo->info.raw_device_num =
635 __le32_to_cpu(info->raw_device_num);
636
637 debugfs_create_x32("chip_family", 0444, qcom_socinfo->dbg_root,
638 &qcom_socinfo->info.chip_family);
639 debugfs_create_x32("raw_device_family", 0444,
640 qcom_socinfo->dbg_root,
641 &qcom_socinfo->info.raw_device_family);
642 debugfs_create_x32("raw_device_number", 0444,
643 qcom_socinfo->dbg_root,
644 &qcom_socinfo->info.raw_device_num);
645 fallthrough;
646 case SOCINFO_VERSION(0, 11):
647 num_pmics = le32_to_cpu(info->num_pmics);
648 pmic_array_offset = le32_to_cpu(info->pmic_array_offset);
649 if (pmic_array_offset + 2 * num_pmics * sizeof(u32) <= info_size)
650 DEBUGFS_ADD(info, pmic_model_array);
651 fallthrough;
652 case SOCINFO_VERSION(0, 10):
653 case SOCINFO_VERSION(0, 9):
654 qcom_socinfo->info.foundry_id = __le32_to_cpu(info->foundry_id);
655
656 debugfs_create_u32("foundry_id", 0444, qcom_socinfo->dbg_root,
657 &qcom_socinfo->info.foundry_id);
658 fallthrough;
659 case SOCINFO_VERSION(0, 8):
660 case SOCINFO_VERSION(0, 7):
661 DEBUGFS_ADD(info, pmic_model);
662 DEBUGFS_ADD(info, pmic_die_rev);
663 fallthrough;
664 case SOCINFO_VERSION(0, 6):
665 qcom_socinfo->info.hw_plat_subtype =
666 __le32_to_cpu(info->hw_plat_subtype);
667
668 debugfs_create_u32("hardware_platform_subtype", 0444,
669 qcom_socinfo->dbg_root,
670 &qcom_socinfo->info.hw_plat_subtype);
671 fallthrough;
672 case SOCINFO_VERSION(0, 5):
673 qcom_socinfo->info.accessory_chip =
674 __le32_to_cpu(info->accessory_chip);
675
676 debugfs_create_u32("accessory_chip", 0444,
677 qcom_socinfo->dbg_root,
678 &qcom_socinfo->info.accessory_chip);
679 fallthrough;
680 case SOCINFO_VERSION(0, 4):
681 qcom_socinfo->info.plat_ver = __le32_to_cpu(info->plat_ver);
682
683 debugfs_create_u32("platform_version", 0444,
684 qcom_socinfo->dbg_root,
685 &qcom_socinfo->info.plat_ver);
686 fallthrough;
687 case SOCINFO_VERSION(0, 3):
688 qcom_socinfo->info.hw_plat = __le32_to_cpu(info->hw_plat);
689
690 debugfs_create_u32("hardware_platform", 0444,
691 qcom_socinfo->dbg_root,
692 &qcom_socinfo->info.hw_plat);
693 fallthrough;
694 case SOCINFO_VERSION(0, 2):
695 qcom_socinfo->info.raw_ver = __le32_to_cpu(info->raw_ver);
696
697 debugfs_create_u32("raw_version", 0444, qcom_socinfo->dbg_root,
698 &qcom_socinfo->info.raw_ver);
699 fallthrough;
700 case SOCINFO_VERSION(0, 1):
701 DEBUGFS_ADD(info, build_id);
702 break;
703 }
704
705 versions = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_IMAGE_VERSION_TABLE,
706 &size);
707
708 for (i = 0; i < ARRAY_SIZE(socinfo_image_names); i++) {
709 if (!socinfo_image_names[i])
710 continue;
711
712 dentry = debugfs_create_dir(socinfo_image_names[i],
713 qcom_socinfo->dbg_root);
714 debugfs_create_file("name", 0444, dentry, &versions[i],
715 &qcom_image_name_ops);
716 debugfs_create_file("variant", 0444, dentry, &versions[i],
717 &qcom_image_variant_ops);
718 debugfs_create_file("oem", 0444, dentry, &versions[i],
719 &qcom_image_oem_ops);
720 }
721 }
722
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)723 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo)
724 {
725 debugfs_remove_recursive(qcom_socinfo->dbg_root);
726 }
727 #else
socinfo_debugfs_init(struct qcom_socinfo * qcom_socinfo,struct socinfo * info,size_t info_size)728 static void socinfo_debugfs_init(struct qcom_socinfo *qcom_socinfo,
729 struct socinfo *info, size_t info_size)
730 {
731 }
socinfo_debugfs_exit(struct qcom_socinfo * qcom_socinfo)732 static void socinfo_debugfs_exit(struct qcom_socinfo *qcom_socinfo) { }
733 #endif /* CONFIG_DEBUG_FS */
734
qcom_socinfo_probe(struct platform_device * pdev)735 static int qcom_socinfo_probe(struct platform_device *pdev)
736 {
737 struct qcom_socinfo *qs;
738 struct socinfo *info;
739 size_t item_size;
740
741 info = qcom_smem_get(QCOM_SMEM_HOST_ANY, SMEM_HW_SW_BUILD_ID,
742 &item_size);
743 if (IS_ERR(info)) {
744 dev_err(&pdev->dev, "Couldn't find socinfo\n");
745 return PTR_ERR(info);
746 }
747
748 qs = devm_kzalloc(&pdev->dev, sizeof(*qs), GFP_KERNEL);
749 if (!qs)
750 return -ENOMEM;
751
752 qs->attr.family = "Snapdragon";
753 qs->attr.machine = socinfo_machine(&pdev->dev,
754 le32_to_cpu(info->id));
755 qs->attr.soc_id = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u",
756 le32_to_cpu(info->id));
757 qs->attr.revision = devm_kasprintf(&pdev->dev, GFP_KERNEL, "%u.%u",
758 SOCINFO_MAJOR(le32_to_cpu(info->ver)),
759 SOCINFO_MINOR(le32_to_cpu(info->ver)));
760 if (offsetof(struct socinfo, serial_num) <= item_size)
761 qs->attr.serial_number = devm_kasprintf(&pdev->dev, GFP_KERNEL,
762 "%u",
763 le32_to_cpu(info->serial_num));
764
765 qs->soc_dev = soc_device_register(&qs->attr);
766 if (IS_ERR(qs->soc_dev))
767 return PTR_ERR(qs->soc_dev);
768
769 socinfo_debugfs_init(qs, info, item_size);
770
771 /* Feed the soc specific unique data into entropy pool */
772 add_device_randomness(info, item_size);
773
774 platform_set_drvdata(pdev, qs);
775
776 return 0;
777 }
778
qcom_socinfo_remove(struct platform_device * pdev)779 static int qcom_socinfo_remove(struct platform_device *pdev)
780 {
781 struct qcom_socinfo *qs = platform_get_drvdata(pdev);
782
783 soc_device_unregister(qs->soc_dev);
784
785 socinfo_debugfs_exit(qs);
786
787 return 0;
788 }
789
790 static struct platform_driver qcom_socinfo_driver = {
791 .probe = qcom_socinfo_probe,
792 .remove = qcom_socinfo_remove,
793 .driver = {
794 .name = "qcom-socinfo",
795 },
796 };
797
798 module_platform_driver(qcom_socinfo_driver);
799
800 MODULE_DESCRIPTION("Qualcomm SoCinfo driver");
801 MODULE_LICENSE("GPL v2");
802 MODULE_ALIAS("platform:qcom-socinfo");
803