1658628e7SLina Iyer // SPDX-License-Identifier: GPL-2.0 2658628e7SLina Iyer /* 3658628e7SLina Iyer * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 4658628e7SLina Iyer */ 5658628e7SLina Iyer 6658628e7SLina Iyer #define pr_fmt(fmt) "%s " fmt, KBUILD_MODNAME 7658628e7SLina Iyer 8658628e7SLina Iyer #include <linux/atomic.h> 9658628e7SLina Iyer #include <linux/delay.h> 10658628e7SLina Iyer #include <linux/interrupt.h> 11658628e7SLina Iyer #include <linux/io.h> 12658628e7SLina Iyer #include <linux/kernel.h> 13658628e7SLina Iyer #include <linux/list.h> 14658628e7SLina Iyer #include <linux/of.h> 15658628e7SLina Iyer #include <linux/of_irq.h> 16658628e7SLina Iyer #include <linux/of_platform.h> 17658628e7SLina Iyer #include <linux/platform_device.h> 18658628e7SLina Iyer #include <linux/slab.h> 19658628e7SLina Iyer #include <linux/spinlock.h> 20658628e7SLina Iyer 21658628e7SLina Iyer #include <soc/qcom/tcs.h> 22658628e7SLina Iyer #include <dt-bindings/soc/qcom,rpmh-rsc.h> 23658628e7SLina Iyer 24658628e7SLina Iyer #include "rpmh-internal.h" 25658628e7SLina Iyer 26fc087fe5SLina Iyer #define CREATE_TRACE_POINTS 27fc087fe5SLina Iyer #include "trace-rpmh.h" 28fc087fe5SLina Iyer 29658628e7SLina Iyer #define RSC_DRV_TCS_OFFSET 672 30658628e7SLina Iyer #define RSC_DRV_CMD_OFFSET 20 31658628e7SLina Iyer 32658628e7SLina Iyer /* DRV Configuration Information Register */ 33658628e7SLina Iyer #define DRV_PRNT_CHLD_CONFIG 0x0C 34658628e7SLina Iyer #define DRV_NUM_TCS_MASK 0x3F 35658628e7SLina Iyer #define DRV_NUM_TCS_SHIFT 6 36658628e7SLina Iyer #define DRV_NCPT_MASK 0x1F 37658628e7SLina Iyer #define DRV_NCPT_SHIFT 27 38658628e7SLina Iyer 39658628e7SLina Iyer /* Register offsets */ 40658628e7SLina Iyer #define RSC_DRV_IRQ_ENABLE 0x00 41658628e7SLina Iyer #define RSC_DRV_IRQ_STATUS 0x04 42658628e7SLina Iyer #define RSC_DRV_IRQ_CLEAR 0x08 43658628e7SLina Iyer #define RSC_DRV_CMD_WAIT_FOR_CMPL 0x10 44658628e7SLina Iyer #define RSC_DRV_CONTROL 0x14 45658628e7SLina Iyer #define RSC_DRV_STATUS 0x18 46658628e7SLina Iyer #define RSC_DRV_CMD_ENABLE 0x1C 47658628e7SLina Iyer #define RSC_DRV_CMD_MSGID 0x30 48658628e7SLina Iyer #define RSC_DRV_CMD_ADDR 0x34 49658628e7SLina Iyer #define RSC_DRV_CMD_DATA 0x38 50658628e7SLina Iyer #define RSC_DRV_CMD_STATUS 0x3C 51658628e7SLina Iyer #define RSC_DRV_CMD_RESP_DATA 0x40 52658628e7SLina Iyer 53658628e7SLina Iyer #define TCS_AMC_MODE_ENABLE BIT(16) 54658628e7SLina Iyer #define TCS_AMC_MODE_TRIGGER BIT(24) 55658628e7SLina Iyer 56658628e7SLina Iyer /* TCS CMD register bit mask */ 57658628e7SLina Iyer #define CMD_MSGID_LEN 8 58658628e7SLina Iyer #define CMD_MSGID_RESP_REQ BIT(8) 59658628e7SLina Iyer #define CMD_MSGID_WRITE BIT(16) 60658628e7SLina Iyer #define CMD_STATUS_ISSUED BIT(8) 61658628e7SLina Iyer #define CMD_STATUS_COMPL BIT(16) 62658628e7SLina Iyer 63658628e7SLina Iyer static u32 read_tcs_reg(struct rsc_drv *drv, int reg, int tcs_id, int cmd_id) 64658628e7SLina Iyer { 65658628e7SLina Iyer return readl_relaxed(drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id + 66658628e7SLina Iyer RSC_DRV_CMD_OFFSET * cmd_id); 67658628e7SLina Iyer } 68658628e7SLina Iyer 69658628e7SLina Iyer static void write_tcs_cmd(struct rsc_drv *drv, int reg, int tcs_id, int cmd_id, 70658628e7SLina Iyer u32 data) 71658628e7SLina Iyer { 72658628e7SLina Iyer writel_relaxed(data, drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id + 73658628e7SLina Iyer RSC_DRV_CMD_OFFSET * cmd_id); 74658628e7SLina Iyer } 75658628e7SLina Iyer 76658628e7SLina Iyer static void write_tcs_reg(struct rsc_drv *drv, int reg, int tcs_id, u32 data) 77658628e7SLina Iyer { 78658628e7SLina Iyer writel_relaxed(data, drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id); 79658628e7SLina Iyer } 80658628e7SLina Iyer 81658628e7SLina Iyer static void write_tcs_reg_sync(struct rsc_drv *drv, int reg, int tcs_id, 82658628e7SLina Iyer u32 data) 83658628e7SLina Iyer { 84658628e7SLina Iyer writel(data, drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id); 85658628e7SLina Iyer for (;;) { 86658628e7SLina Iyer if (data == readl(drv->tcs_base + reg + 87658628e7SLina Iyer RSC_DRV_TCS_OFFSET * tcs_id)) 88658628e7SLina Iyer break; 89658628e7SLina Iyer udelay(1); 90658628e7SLina Iyer } 91658628e7SLina Iyer } 92658628e7SLina Iyer 93658628e7SLina Iyer static bool tcs_is_free(struct rsc_drv *drv, int tcs_id) 94658628e7SLina Iyer { 95658628e7SLina Iyer return !test_bit(tcs_id, drv->tcs_in_use) && 96658628e7SLina Iyer read_tcs_reg(drv, RSC_DRV_STATUS, tcs_id, 0); 97658628e7SLina Iyer } 98658628e7SLina Iyer 99658628e7SLina Iyer static struct tcs_group *get_tcs_of_type(struct rsc_drv *drv, int type) 100658628e7SLina Iyer { 101658628e7SLina Iyer return &drv->tcs[type]; 102658628e7SLina Iyer } 103658628e7SLina Iyer 1049a3afcfbSLina Iyer static int tcs_invalidate(struct rsc_drv *drv, int type) 1059a3afcfbSLina Iyer { 1069a3afcfbSLina Iyer int m; 1079a3afcfbSLina Iyer struct tcs_group *tcs; 1089a3afcfbSLina Iyer 1099a3afcfbSLina Iyer tcs = get_tcs_of_type(drv, type); 1109a3afcfbSLina Iyer if (IS_ERR(tcs)) 1119a3afcfbSLina Iyer return PTR_ERR(tcs); 1129a3afcfbSLina Iyer 1139a3afcfbSLina Iyer spin_lock(&tcs->lock); 1149a3afcfbSLina Iyer if (bitmap_empty(tcs->slots, MAX_TCS_SLOTS)) { 1159a3afcfbSLina Iyer spin_unlock(&tcs->lock); 1169a3afcfbSLina Iyer return 0; 1179a3afcfbSLina Iyer } 1189a3afcfbSLina Iyer 1199a3afcfbSLina Iyer for (m = tcs->offset; m < tcs->offset + tcs->num_tcs; m++) { 1209a3afcfbSLina Iyer if (!tcs_is_free(drv, m)) { 1219a3afcfbSLina Iyer spin_unlock(&tcs->lock); 1229a3afcfbSLina Iyer return -EAGAIN; 1239a3afcfbSLina Iyer } 1249a3afcfbSLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CMD_ENABLE, m, 0); 1259a3afcfbSLina Iyer } 1269a3afcfbSLina Iyer bitmap_zero(tcs->slots, MAX_TCS_SLOTS); 1279a3afcfbSLina Iyer spin_unlock(&tcs->lock); 1289a3afcfbSLina Iyer 1299a3afcfbSLina Iyer return 0; 1309a3afcfbSLina Iyer } 1319a3afcfbSLina Iyer 1329a3afcfbSLina Iyer /** 1339a3afcfbSLina Iyer * rpmh_rsc_invalidate - Invalidate sleep and wake TCSes 1349a3afcfbSLina Iyer * 1359a3afcfbSLina Iyer * @drv: the RSC controller 1369a3afcfbSLina Iyer */ 1379a3afcfbSLina Iyer int rpmh_rsc_invalidate(struct rsc_drv *drv) 1389a3afcfbSLina Iyer { 1399a3afcfbSLina Iyer int ret; 1409a3afcfbSLina Iyer 1419a3afcfbSLina Iyer ret = tcs_invalidate(drv, SLEEP_TCS); 1429a3afcfbSLina Iyer if (!ret) 1439a3afcfbSLina Iyer ret = tcs_invalidate(drv, WAKE_TCS); 1449a3afcfbSLina Iyer 1459a3afcfbSLina Iyer return ret; 1469a3afcfbSLina Iyer } 1479a3afcfbSLina Iyer 148658628e7SLina Iyer static struct tcs_group *get_tcs_for_msg(struct rsc_drv *drv, 149658628e7SLina Iyer const struct tcs_request *msg) 150658628e7SLina Iyer { 151658628e7SLina Iyer int type; 152658628e7SLina Iyer 153658628e7SLina Iyer switch (msg->state) { 154658628e7SLina Iyer case RPMH_ACTIVE_ONLY_STATE: 155658628e7SLina Iyer type = ACTIVE_TCS; 156658628e7SLina Iyer break; 157fa460e45SLina Iyer case RPMH_WAKE_ONLY_STATE: 158fa460e45SLina Iyer type = WAKE_TCS; 159fa460e45SLina Iyer break; 160fa460e45SLina Iyer case RPMH_SLEEP_STATE: 161fa460e45SLina Iyer type = SLEEP_TCS; 162fa460e45SLina Iyer break; 163658628e7SLina Iyer default: 164658628e7SLina Iyer return ERR_PTR(-EINVAL); 165658628e7SLina Iyer } 166658628e7SLina Iyer 167658628e7SLina Iyer return get_tcs_of_type(drv, type); 168658628e7SLina Iyer } 169658628e7SLina Iyer 170658628e7SLina Iyer static const struct tcs_request *get_req_from_tcs(struct rsc_drv *drv, 171658628e7SLina Iyer int tcs_id) 172658628e7SLina Iyer { 173658628e7SLina Iyer struct tcs_group *tcs; 174658628e7SLina Iyer int i; 175658628e7SLina Iyer 176658628e7SLina Iyer for (i = 0; i < drv->num_tcs; i++) { 177658628e7SLina Iyer tcs = &drv->tcs[i]; 178658628e7SLina Iyer if (tcs->mask & BIT(tcs_id)) 179658628e7SLina Iyer return tcs->req[tcs_id - tcs->offset]; 180658628e7SLina Iyer } 181658628e7SLina Iyer 182658628e7SLina Iyer return NULL; 183658628e7SLina Iyer } 184658628e7SLina Iyer 185658628e7SLina Iyer /** 186658628e7SLina Iyer * tcs_tx_done: TX Done interrupt handler 187658628e7SLina Iyer */ 188658628e7SLina Iyer static irqreturn_t tcs_tx_done(int irq, void *p) 189658628e7SLina Iyer { 190658628e7SLina Iyer struct rsc_drv *drv = p; 191c1038456SLina Iyer int i, j, err = 0; 192658628e7SLina Iyer unsigned long irq_status; 193658628e7SLina Iyer const struct tcs_request *req; 194658628e7SLina Iyer struct tcs_cmd *cmd; 195658628e7SLina Iyer 196658628e7SLina Iyer irq_status = read_tcs_reg(drv, RSC_DRV_IRQ_STATUS, 0, 0); 197658628e7SLina Iyer 198658628e7SLina Iyer for_each_set_bit(i, &irq_status, BITS_PER_LONG) { 199658628e7SLina Iyer req = get_req_from_tcs(drv, i); 200658628e7SLina Iyer if (!req) { 201658628e7SLina Iyer WARN_ON(1); 202658628e7SLina Iyer goto skip; 203658628e7SLina Iyer } 204658628e7SLina Iyer 205fc087fe5SLina Iyer err = 0; 206658628e7SLina Iyer for (j = 0; j < req->num_cmds; j++) { 207658628e7SLina Iyer u32 sts; 208658628e7SLina Iyer 209658628e7SLina Iyer cmd = &req->cmds[j]; 210658628e7SLina Iyer sts = read_tcs_reg(drv, RSC_DRV_CMD_STATUS, i, j); 211658628e7SLina Iyer if (!(sts & CMD_STATUS_ISSUED) || 212658628e7SLina Iyer ((req->wait_for_compl || cmd->wait) && 213658628e7SLina Iyer !(sts & CMD_STATUS_COMPL))) { 214658628e7SLina Iyer pr_err("Incomplete request: %s: addr=%#x data=%#x", 215658628e7SLina Iyer drv->name, cmd->addr, cmd->data); 216fc087fe5SLina Iyer err = -EIO; 217658628e7SLina Iyer } 218658628e7SLina Iyer } 219fc087fe5SLina Iyer 220fc087fe5SLina Iyer trace_rpmh_tx_done(drv, i, req, err); 221658628e7SLina Iyer skip: 222658628e7SLina Iyer /* Reclaim the TCS */ 223658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, i, 0); 224658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_IRQ_CLEAR, 0, BIT(i)); 225658628e7SLina Iyer spin_lock(&drv->lock); 226658628e7SLina Iyer clear_bit(i, drv->tcs_in_use); 227658628e7SLina Iyer spin_unlock(&drv->lock); 228c1038456SLina Iyer if (req) 229c1038456SLina Iyer rpmh_tx_done(req, err); 230658628e7SLina Iyer } 231658628e7SLina Iyer 232658628e7SLina Iyer return IRQ_HANDLED; 233658628e7SLina Iyer } 234658628e7SLina Iyer 235658628e7SLina Iyer static void __tcs_buffer_write(struct rsc_drv *drv, int tcs_id, int cmd_id, 236658628e7SLina Iyer const struct tcs_request *msg) 237658628e7SLina Iyer { 238658628e7SLina Iyer u32 msgid, cmd_msgid; 239658628e7SLina Iyer u32 cmd_enable = 0; 240658628e7SLina Iyer u32 cmd_complete; 241658628e7SLina Iyer struct tcs_cmd *cmd; 242658628e7SLina Iyer int i, j; 243658628e7SLina Iyer 244658628e7SLina Iyer cmd_msgid = CMD_MSGID_LEN; 245658628e7SLina Iyer cmd_msgid |= msg->wait_for_compl ? CMD_MSGID_RESP_REQ : 0; 246658628e7SLina Iyer cmd_msgid |= CMD_MSGID_WRITE; 247658628e7SLina Iyer 248658628e7SLina Iyer cmd_complete = read_tcs_reg(drv, RSC_DRV_CMD_WAIT_FOR_CMPL, tcs_id, 0); 249658628e7SLina Iyer 250658628e7SLina Iyer for (i = 0, j = cmd_id; i < msg->num_cmds; i++, j++) { 251658628e7SLina Iyer cmd = &msg->cmds[i]; 252658628e7SLina Iyer cmd_enable |= BIT(j); 253658628e7SLina Iyer cmd_complete |= cmd->wait << j; 254658628e7SLina Iyer msgid = cmd_msgid; 255658628e7SLina Iyer msgid |= cmd->wait ? CMD_MSGID_RESP_REQ : 0; 256fc087fe5SLina Iyer 257658628e7SLina Iyer write_tcs_cmd(drv, RSC_DRV_CMD_MSGID, tcs_id, j, msgid); 258658628e7SLina Iyer write_tcs_cmd(drv, RSC_DRV_CMD_ADDR, tcs_id, j, cmd->addr); 259658628e7SLina Iyer write_tcs_cmd(drv, RSC_DRV_CMD_DATA, tcs_id, j, cmd->data); 260fc087fe5SLina Iyer trace_rpmh_send_msg(drv, tcs_id, j, msgid, cmd); 261658628e7SLina Iyer } 262658628e7SLina Iyer 263658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_CMD_WAIT_FOR_CMPL, tcs_id, cmd_complete); 264658628e7SLina Iyer cmd_enable |= read_tcs_reg(drv, RSC_DRV_CMD_ENABLE, tcs_id, 0); 265658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, tcs_id, cmd_enable); 266658628e7SLina Iyer } 267658628e7SLina Iyer 268658628e7SLina Iyer static void __tcs_trigger(struct rsc_drv *drv, int tcs_id) 269658628e7SLina Iyer { 270658628e7SLina Iyer u32 enable; 271658628e7SLina Iyer 272658628e7SLina Iyer /* 273658628e7SLina Iyer * HW req: Clear the DRV_CONTROL and enable TCS again 274658628e7SLina Iyer * While clearing ensure that the AMC mode trigger is cleared 275658628e7SLina Iyer * and then the mode enable is cleared. 276658628e7SLina Iyer */ 277658628e7SLina Iyer enable = read_tcs_reg(drv, RSC_DRV_CONTROL, tcs_id, 0); 278658628e7SLina Iyer enable &= ~TCS_AMC_MODE_TRIGGER; 279658628e7SLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); 280658628e7SLina Iyer enable &= ~TCS_AMC_MODE_ENABLE; 281658628e7SLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); 282658628e7SLina Iyer 283658628e7SLina Iyer /* Enable the AMC mode on the TCS and then trigger the TCS */ 284658628e7SLina Iyer enable = TCS_AMC_MODE_ENABLE; 285658628e7SLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); 286658628e7SLina Iyer enable |= TCS_AMC_MODE_TRIGGER; 287658628e7SLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); 288658628e7SLina Iyer } 289658628e7SLina Iyer 290658628e7SLina Iyer static int check_for_req_inflight(struct rsc_drv *drv, struct tcs_group *tcs, 291658628e7SLina Iyer const struct tcs_request *msg) 292658628e7SLina Iyer { 293658628e7SLina Iyer unsigned long curr_enabled; 294658628e7SLina Iyer u32 addr; 295658628e7SLina Iyer int i, j, k; 296658628e7SLina Iyer int tcs_id = tcs->offset; 297658628e7SLina Iyer 298658628e7SLina Iyer for (i = 0; i < tcs->num_tcs; i++, tcs_id++) { 299658628e7SLina Iyer if (tcs_is_free(drv, tcs_id)) 300658628e7SLina Iyer continue; 301658628e7SLina Iyer 302658628e7SLina Iyer curr_enabled = read_tcs_reg(drv, RSC_DRV_CMD_ENABLE, tcs_id, 0); 303658628e7SLina Iyer 304658628e7SLina Iyer for_each_set_bit(j, &curr_enabled, MAX_CMDS_PER_TCS) { 305658628e7SLina Iyer addr = read_tcs_reg(drv, RSC_DRV_CMD_ADDR, tcs_id, j); 306658628e7SLina Iyer for (k = 0; k < msg->num_cmds; k++) { 307658628e7SLina Iyer if (addr == msg->cmds[k].addr) 308658628e7SLina Iyer return -EBUSY; 309658628e7SLina Iyer } 310658628e7SLina Iyer } 311658628e7SLina Iyer } 312658628e7SLina Iyer 313658628e7SLina Iyer return 0; 314658628e7SLina Iyer } 315658628e7SLina Iyer 316658628e7SLina Iyer static int find_free_tcs(struct tcs_group *tcs) 317658628e7SLina Iyer { 318658628e7SLina Iyer int i; 319658628e7SLina Iyer 320658628e7SLina Iyer for (i = 0; i < tcs->num_tcs; i++) { 321658628e7SLina Iyer if (tcs_is_free(tcs->drv, tcs->offset + i)) 322658628e7SLina Iyer return tcs->offset + i; 323658628e7SLina Iyer } 324658628e7SLina Iyer 325658628e7SLina Iyer return -EBUSY; 326658628e7SLina Iyer } 327658628e7SLina Iyer 328658628e7SLina Iyer static int tcs_write(struct rsc_drv *drv, const struct tcs_request *msg) 329658628e7SLina Iyer { 330658628e7SLina Iyer struct tcs_group *tcs; 331658628e7SLina Iyer int tcs_id; 332658628e7SLina Iyer unsigned long flags; 333658628e7SLina Iyer int ret; 334658628e7SLina Iyer 335658628e7SLina Iyer tcs = get_tcs_for_msg(drv, msg); 336658628e7SLina Iyer if (IS_ERR(tcs)) 337658628e7SLina Iyer return PTR_ERR(tcs); 338658628e7SLina Iyer 339658628e7SLina Iyer spin_lock_irqsave(&tcs->lock, flags); 340658628e7SLina Iyer spin_lock(&drv->lock); 341658628e7SLina Iyer /* 342658628e7SLina Iyer * The h/w does not like if we send a request to the same address, 343658628e7SLina Iyer * when one is already in-flight or being processed. 344658628e7SLina Iyer */ 345658628e7SLina Iyer ret = check_for_req_inflight(drv, tcs, msg); 346658628e7SLina Iyer if (ret) { 347658628e7SLina Iyer spin_unlock(&drv->lock); 348658628e7SLina Iyer goto done_write; 349658628e7SLina Iyer } 350658628e7SLina Iyer 351658628e7SLina Iyer tcs_id = find_free_tcs(tcs); 352658628e7SLina Iyer if (tcs_id < 0) { 353658628e7SLina Iyer ret = tcs_id; 354658628e7SLina Iyer spin_unlock(&drv->lock); 355658628e7SLina Iyer goto done_write; 356658628e7SLina Iyer } 357658628e7SLina Iyer 358658628e7SLina Iyer tcs->req[tcs_id - tcs->offset] = msg; 359658628e7SLina Iyer set_bit(tcs_id, drv->tcs_in_use); 360658628e7SLina Iyer spin_unlock(&drv->lock); 361658628e7SLina Iyer 362658628e7SLina Iyer __tcs_buffer_write(drv, tcs_id, 0, msg); 363658628e7SLina Iyer __tcs_trigger(drv, tcs_id); 364658628e7SLina Iyer 365658628e7SLina Iyer done_write: 366658628e7SLina Iyer spin_unlock_irqrestore(&tcs->lock, flags); 367658628e7SLina Iyer return ret; 368658628e7SLina Iyer } 369658628e7SLina Iyer 370658628e7SLina Iyer /** 371658628e7SLina Iyer * rpmh_rsc_send_data: Validate the incoming message and write to the 372658628e7SLina Iyer * appropriate TCS block. 373658628e7SLina Iyer * 374658628e7SLina Iyer * @drv: the controller 375658628e7SLina Iyer * @msg: the data to be sent 376658628e7SLina Iyer * 377658628e7SLina Iyer * Return: 0 on success, -EINVAL on error. 378658628e7SLina Iyer * Note: This call blocks until a valid data is written to the TCS. 379658628e7SLina Iyer */ 380658628e7SLina Iyer int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg) 381658628e7SLina Iyer { 382658628e7SLina Iyer int ret; 383658628e7SLina Iyer 384658628e7SLina Iyer if (!msg || !msg->cmds || !msg->num_cmds || 385658628e7SLina Iyer msg->num_cmds > MAX_RPMH_PAYLOAD) { 386658628e7SLina Iyer WARN_ON(1); 387658628e7SLina Iyer return -EINVAL; 388658628e7SLina Iyer } 389658628e7SLina Iyer 390658628e7SLina Iyer do { 391658628e7SLina Iyer ret = tcs_write(drv, msg); 392658628e7SLina Iyer if (ret == -EBUSY) { 393658628e7SLina Iyer pr_info_ratelimited("TCS Busy, retrying RPMH message send: addr=%#x\n", 394658628e7SLina Iyer msg->cmds[0].addr); 395658628e7SLina Iyer udelay(10); 396658628e7SLina Iyer } 397658628e7SLina Iyer } while (ret == -EBUSY); 398658628e7SLina Iyer 399658628e7SLina Iyer return ret; 400658628e7SLina Iyer } 401658628e7SLina Iyer 402fa460e45SLina Iyer static int find_match(const struct tcs_group *tcs, const struct tcs_cmd *cmd, 403fa460e45SLina Iyer int len) 404fa460e45SLina Iyer { 405fa460e45SLina Iyer int i, j; 406fa460e45SLina Iyer 407fa460e45SLina Iyer /* Check for already cached commands */ 408fa460e45SLina Iyer for_each_set_bit(i, tcs->slots, MAX_TCS_SLOTS) { 409fa460e45SLina Iyer if (tcs->cmd_cache[i] != cmd[0].addr) 410fa460e45SLina Iyer continue; 411fa460e45SLina Iyer if (i + len >= tcs->num_tcs * tcs->ncpt) 412fa460e45SLina Iyer goto seq_err; 413fa460e45SLina Iyer for (j = 0; j < len; j++) { 414fa460e45SLina Iyer if (tcs->cmd_cache[i + j] != cmd[j].addr) 415fa460e45SLina Iyer goto seq_err; 416fa460e45SLina Iyer } 417fa460e45SLina Iyer return i; 418fa460e45SLina Iyer } 419fa460e45SLina Iyer 420fa460e45SLina Iyer return -ENODATA; 421fa460e45SLina Iyer 422fa460e45SLina Iyer seq_err: 423fa460e45SLina Iyer WARN(1, "Message does not match previous sequence.\n"); 424fa460e45SLina Iyer return -EINVAL; 425fa460e45SLina Iyer } 426fa460e45SLina Iyer 427fa460e45SLina Iyer static int find_slots(struct tcs_group *tcs, const struct tcs_request *msg, 428fa460e45SLina Iyer int *tcs_id, int *cmd_id) 429fa460e45SLina Iyer { 430fa460e45SLina Iyer int slot, offset; 431fa460e45SLina Iyer int i = 0; 432fa460e45SLina Iyer 433fa460e45SLina Iyer /* Find if we already have the msg in our TCS */ 434fa460e45SLina Iyer slot = find_match(tcs, msg->cmds, msg->num_cmds); 435fa460e45SLina Iyer if (slot >= 0) 436fa460e45SLina Iyer goto copy_data; 437fa460e45SLina Iyer 438fa460e45SLina Iyer /* Do over, until we can fit the full payload in a TCS */ 439fa460e45SLina Iyer do { 440fa460e45SLina Iyer slot = bitmap_find_next_zero_area(tcs->slots, MAX_TCS_SLOTS, 441fa460e45SLina Iyer i, msg->num_cmds, 0); 442fa460e45SLina Iyer if (slot == tcs->num_tcs * tcs->ncpt) 443fa460e45SLina Iyer return -ENOMEM; 444fa460e45SLina Iyer i += tcs->ncpt; 445fa460e45SLina Iyer } while (slot + msg->num_cmds - 1 >= i); 446fa460e45SLina Iyer 447fa460e45SLina Iyer copy_data: 448fa460e45SLina Iyer bitmap_set(tcs->slots, slot, msg->num_cmds); 449fa460e45SLina Iyer /* Copy the addresses of the resources over to the slots */ 450fa460e45SLina Iyer for (i = 0; i < msg->num_cmds; i++) 451fa460e45SLina Iyer tcs->cmd_cache[slot + i] = msg->cmds[i].addr; 452fa460e45SLina Iyer 453fa460e45SLina Iyer offset = slot / tcs->ncpt; 454fa460e45SLina Iyer *tcs_id = offset + tcs->offset; 455fa460e45SLina Iyer *cmd_id = slot % tcs->ncpt; 456fa460e45SLina Iyer 457fa460e45SLina Iyer return 0; 458fa460e45SLina Iyer } 459fa460e45SLina Iyer 460fa460e45SLina Iyer static int tcs_ctrl_write(struct rsc_drv *drv, const struct tcs_request *msg) 461fa460e45SLina Iyer { 462fa460e45SLina Iyer struct tcs_group *tcs; 463fa460e45SLina Iyer int tcs_id = 0, cmd_id = 0; 464fa460e45SLina Iyer unsigned long flags; 465fa460e45SLina Iyer int ret; 466fa460e45SLina Iyer 467fa460e45SLina Iyer tcs = get_tcs_for_msg(drv, msg); 468fa460e45SLina Iyer if (IS_ERR(tcs)) 469fa460e45SLina Iyer return PTR_ERR(tcs); 470fa460e45SLina Iyer 471fa460e45SLina Iyer spin_lock_irqsave(&tcs->lock, flags); 472fa460e45SLina Iyer /* find the TCS id and the command in the TCS to write to */ 473fa460e45SLina Iyer ret = find_slots(tcs, msg, &tcs_id, &cmd_id); 474fa460e45SLina Iyer if (!ret) 475fa460e45SLina Iyer __tcs_buffer_write(drv, tcs_id, cmd_id, msg); 476fa460e45SLina Iyer spin_unlock_irqrestore(&tcs->lock, flags); 477fa460e45SLina Iyer 478fa460e45SLina Iyer return ret; 479fa460e45SLina Iyer } 480fa460e45SLina Iyer 481fa460e45SLina Iyer /** 482fa460e45SLina Iyer * rpmh_rsc_write_ctrl_data: Write request to the controller 483fa460e45SLina Iyer * 484fa460e45SLina Iyer * @drv: the controller 485fa460e45SLina Iyer * @msg: the data to be written to the controller 486fa460e45SLina Iyer * 487fa460e45SLina Iyer * There is no response returned for writing the request to the controller. 488fa460e45SLina Iyer */ 489fa460e45SLina Iyer int rpmh_rsc_write_ctrl_data(struct rsc_drv *drv, const struct tcs_request *msg) 490fa460e45SLina Iyer { 491fa460e45SLina Iyer if (!msg || !msg->cmds || !msg->num_cmds || 492fa460e45SLina Iyer msg->num_cmds > MAX_RPMH_PAYLOAD) { 493fa460e45SLina Iyer pr_err("Payload error\n"); 494fa460e45SLina Iyer return -EINVAL; 495fa460e45SLina Iyer } 496fa460e45SLina Iyer 497fa460e45SLina Iyer /* Data sent to this API will not be sent immediately */ 498fa460e45SLina Iyer if (msg->state == RPMH_ACTIVE_ONLY_STATE) 499fa460e45SLina Iyer return -EINVAL; 500fa460e45SLina Iyer 501fa460e45SLina Iyer return tcs_ctrl_write(drv, msg); 502fa460e45SLina Iyer } 503fa460e45SLina Iyer 504658628e7SLina Iyer static int rpmh_probe_tcs_config(struct platform_device *pdev, 505658628e7SLina Iyer struct rsc_drv *drv) 506658628e7SLina Iyer { 507658628e7SLina Iyer struct tcs_type_config { 508658628e7SLina Iyer u32 type; 509658628e7SLina Iyer u32 n; 510658628e7SLina Iyer } tcs_cfg[TCS_TYPE_NR] = { { 0 } }; 511658628e7SLina Iyer struct device_node *dn = pdev->dev.of_node; 512658628e7SLina Iyer u32 config, max_tcs, ncpt, offset; 513658628e7SLina Iyer int i, ret, n, st = 0; 514658628e7SLina Iyer struct tcs_group *tcs; 515658628e7SLina Iyer struct resource *res; 516658628e7SLina Iyer void __iomem *base; 517658628e7SLina Iyer char drv_id[10] = {0}; 518658628e7SLina Iyer 519658628e7SLina Iyer snprintf(drv_id, ARRAY_SIZE(drv_id), "drv-%d", drv->id); 520658628e7SLina Iyer res = platform_get_resource_byname(pdev, IORESOURCE_MEM, drv_id); 521658628e7SLina Iyer base = devm_ioremap_resource(&pdev->dev, res); 522658628e7SLina Iyer if (IS_ERR(base)) 523658628e7SLina Iyer return PTR_ERR(base); 524658628e7SLina Iyer 525658628e7SLina Iyer ret = of_property_read_u32(dn, "qcom,tcs-offset", &offset); 526658628e7SLina Iyer if (ret) 527658628e7SLina Iyer return ret; 528658628e7SLina Iyer drv->tcs_base = base + offset; 529658628e7SLina Iyer 530658628e7SLina Iyer config = readl_relaxed(base + DRV_PRNT_CHLD_CONFIG); 531658628e7SLina Iyer 532658628e7SLina Iyer max_tcs = config; 533658628e7SLina Iyer max_tcs &= DRV_NUM_TCS_MASK << (DRV_NUM_TCS_SHIFT * drv->id); 534658628e7SLina Iyer max_tcs = max_tcs >> (DRV_NUM_TCS_SHIFT * drv->id); 535658628e7SLina Iyer 536658628e7SLina Iyer ncpt = config & (DRV_NCPT_MASK << DRV_NCPT_SHIFT); 537658628e7SLina Iyer ncpt = ncpt >> DRV_NCPT_SHIFT; 538658628e7SLina Iyer 539658628e7SLina Iyer n = of_property_count_u32_elems(dn, "qcom,tcs-config"); 540658628e7SLina Iyer if (n != 2 * TCS_TYPE_NR) 541658628e7SLina Iyer return -EINVAL; 542658628e7SLina Iyer 543658628e7SLina Iyer for (i = 0; i < TCS_TYPE_NR; i++) { 544658628e7SLina Iyer ret = of_property_read_u32_index(dn, "qcom,tcs-config", 545658628e7SLina Iyer i * 2, &tcs_cfg[i].type); 546658628e7SLina Iyer if (ret) 547658628e7SLina Iyer return ret; 548658628e7SLina Iyer if (tcs_cfg[i].type >= TCS_TYPE_NR) 549658628e7SLina Iyer return -EINVAL; 550658628e7SLina Iyer 551658628e7SLina Iyer ret = of_property_read_u32_index(dn, "qcom,tcs-config", 552658628e7SLina Iyer i * 2 + 1, &tcs_cfg[i].n); 553658628e7SLina Iyer if (ret) 554658628e7SLina Iyer return ret; 555658628e7SLina Iyer if (tcs_cfg[i].n > MAX_TCS_PER_TYPE) 556658628e7SLina Iyer return -EINVAL; 557658628e7SLina Iyer } 558658628e7SLina Iyer 559658628e7SLina Iyer for (i = 0; i < TCS_TYPE_NR; i++) { 560658628e7SLina Iyer tcs = &drv->tcs[tcs_cfg[i].type]; 561658628e7SLina Iyer if (tcs->drv) 562658628e7SLina Iyer return -EINVAL; 563658628e7SLina Iyer tcs->drv = drv; 564658628e7SLina Iyer tcs->type = tcs_cfg[i].type; 565658628e7SLina Iyer tcs->num_tcs = tcs_cfg[i].n; 566658628e7SLina Iyer tcs->ncpt = ncpt; 567658628e7SLina Iyer spin_lock_init(&tcs->lock); 568658628e7SLina Iyer 569658628e7SLina Iyer if (!tcs->num_tcs || tcs->type == CONTROL_TCS) 570658628e7SLina Iyer continue; 571658628e7SLina Iyer 572658628e7SLina Iyer if (st + tcs->num_tcs > max_tcs || 573658628e7SLina Iyer st + tcs->num_tcs >= BITS_PER_BYTE * sizeof(tcs->mask)) 574658628e7SLina Iyer return -EINVAL; 575658628e7SLina Iyer 576658628e7SLina Iyer tcs->mask = ((1 << tcs->num_tcs) - 1) << st; 577658628e7SLina Iyer tcs->offset = st; 578658628e7SLina Iyer st += tcs->num_tcs; 579fa460e45SLina Iyer 580fa460e45SLina Iyer /* 581fa460e45SLina Iyer * Allocate memory to cache sleep and wake requests to 582fa460e45SLina Iyer * avoid reading TCS register memory. 583fa460e45SLina Iyer */ 584fa460e45SLina Iyer if (tcs->type == ACTIVE_TCS) 585fa460e45SLina Iyer continue; 586fa460e45SLina Iyer 587fa460e45SLina Iyer tcs->cmd_cache = devm_kcalloc(&pdev->dev, 588fa460e45SLina Iyer tcs->num_tcs * ncpt, sizeof(u32), 589fa460e45SLina Iyer GFP_KERNEL); 590fa460e45SLina Iyer if (!tcs->cmd_cache) 591fa460e45SLina Iyer return -ENOMEM; 592658628e7SLina Iyer } 593658628e7SLina Iyer 594658628e7SLina Iyer drv->num_tcs = st; 595658628e7SLina Iyer 596658628e7SLina Iyer return 0; 597658628e7SLina Iyer } 598658628e7SLina Iyer 599658628e7SLina Iyer static int rpmh_rsc_probe(struct platform_device *pdev) 600658628e7SLina Iyer { 601658628e7SLina Iyer struct device_node *dn = pdev->dev.of_node; 602658628e7SLina Iyer struct rsc_drv *drv; 603658628e7SLina Iyer int ret, irq; 604658628e7SLina Iyer 605658628e7SLina Iyer drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); 606658628e7SLina Iyer if (!drv) 607658628e7SLina Iyer return -ENOMEM; 608658628e7SLina Iyer 609658628e7SLina Iyer ret = of_property_read_u32(dn, "qcom,drv-id", &drv->id); 610658628e7SLina Iyer if (ret) 611658628e7SLina Iyer return ret; 612658628e7SLina Iyer 613658628e7SLina Iyer drv->name = of_get_property(dn, "label", NULL); 614658628e7SLina Iyer if (!drv->name) 615658628e7SLina Iyer drv->name = dev_name(&pdev->dev); 616658628e7SLina Iyer 617658628e7SLina Iyer ret = rpmh_probe_tcs_config(pdev, drv); 618658628e7SLina Iyer if (ret) 619658628e7SLina Iyer return ret; 620658628e7SLina Iyer 621658628e7SLina Iyer spin_lock_init(&drv->lock); 622658628e7SLina Iyer bitmap_zero(drv->tcs_in_use, MAX_TCS_NR); 623658628e7SLina Iyer 624658628e7SLina Iyer irq = platform_get_irq(pdev, drv->id); 625658628e7SLina Iyer if (irq < 0) 626658628e7SLina Iyer return irq; 627658628e7SLina Iyer 628658628e7SLina Iyer ret = devm_request_irq(&pdev->dev, irq, tcs_tx_done, 629658628e7SLina Iyer IRQF_TRIGGER_HIGH | IRQF_NO_SUSPEND, 630658628e7SLina Iyer drv->name, drv); 631658628e7SLina Iyer if (ret) 632658628e7SLina Iyer return ret; 633658628e7SLina Iyer 634658628e7SLina Iyer /* Enable the active TCS to send requests immediately */ 635658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, drv->tcs[ACTIVE_TCS].mask); 636658628e7SLina Iyer 637600513dfSLina Iyer spin_lock_init(&drv->client.cache_lock); 638600513dfSLina Iyer INIT_LIST_HEAD(&drv->client.cache); 639600513dfSLina Iyer 640c1038456SLina Iyer dev_set_drvdata(&pdev->dev, drv); 641c1038456SLina Iyer 642658628e7SLina Iyer return devm_of_platform_populate(&pdev->dev); 643658628e7SLina Iyer } 644658628e7SLina Iyer 645658628e7SLina Iyer static const struct of_device_id rpmh_drv_match[] = { 646658628e7SLina Iyer { .compatible = "qcom,rpmh-rsc", }, 647658628e7SLina Iyer { } 648658628e7SLina Iyer }; 649658628e7SLina Iyer 650658628e7SLina Iyer static struct platform_driver rpmh_driver = { 651658628e7SLina Iyer .probe = rpmh_rsc_probe, 652658628e7SLina Iyer .driver = { 653658628e7SLina Iyer .name = "rpmh", 654658628e7SLina Iyer .of_match_table = rpmh_drv_match, 655658628e7SLina Iyer }, 656658628e7SLina Iyer }; 657658628e7SLina Iyer 658658628e7SLina Iyer static int __init rpmh_driver_init(void) 659658628e7SLina Iyer { 660658628e7SLina Iyer return platform_driver_register(&rpmh_driver); 661658628e7SLina Iyer } 662658628e7SLina Iyer arch_initcall(rpmh_driver_init); 663