1658628e7SLina Iyer // SPDX-License-Identifier: GPL-2.0 2658628e7SLina Iyer /* 3658628e7SLina Iyer * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 4658628e7SLina Iyer */ 5658628e7SLina Iyer 6658628e7SLina Iyer #define pr_fmt(fmt) "%s " fmt, KBUILD_MODNAME 7658628e7SLina Iyer 8658628e7SLina Iyer #include <linux/atomic.h> 9658628e7SLina Iyer #include <linux/delay.h> 10658628e7SLina Iyer #include <linux/interrupt.h> 11658628e7SLina Iyer #include <linux/io.h> 12658628e7SLina Iyer #include <linux/kernel.h> 13658628e7SLina Iyer #include <linux/list.h> 14658628e7SLina Iyer #include <linux/of.h> 15658628e7SLina Iyer #include <linux/of_irq.h> 16658628e7SLina Iyer #include <linux/of_platform.h> 17658628e7SLina Iyer #include <linux/platform_device.h> 18658628e7SLina Iyer #include <linux/slab.h> 19658628e7SLina Iyer #include <linux/spinlock.h> 20658628e7SLina Iyer 21fdd102b5SDouglas Anderson #include <soc/qcom/cmd-db.h> 22658628e7SLina Iyer #include <soc/qcom/tcs.h> 23658628e7SLina Iyer #include <dt-bindings/soc/qcom,rpmh-rsc.h> 24658628e7SLina Iyer 25658628e7SLina Iyer #include "rpmh-internal.h" 26658628e7SLina Iyer 27fc087fe5SLina Iyer #define CREATE_TRACE_POINTS 28fc087fe5SLina Iyer #include "trace-rpmh.h" 29fc087fe5SLina Iyer 30658628e7SLina Iyer #define RSC_DRV_TCS_OFFSET 672 31658628e7SLina Iyer #define RSC_DRV_CMD_OFFSET 20 32658628e7SLina Iyer 33658628e7SLina Iyer /* DRV Configuration Information Register */ 34658628e7SLina Iyer #define DRV_PRNT_CHLD_CONFIG 0x0C 35658628e7SLina Iyer #define DRV_NUM_TCS_MASK 0x3F 36658628e7SLina Iyer #define DRV_NUM_TCS_SHIFT 6 37658628e7SLina Iyer #define DRV_NCPT_MASK 0x1F 38658628e7SLina Iyer #define DRV_NCPT_SHIFT 27 39658628e7SLina Iyer 40658628e7SLina Iyer /* Register offsets */ 41658628e7SLina Iyer #define RSC_DRV_IRQ_ENABLE 0x00 42658628e7SLina Iyer #define RSC_DRV_IRQ_STATUS 0x04 43658628e7SLina Iyer #define RSC_DRV_IRQ_CLEAR 0x08 44658628e7SLina Iyer #define RSC_DRV_CMD_WAIT_FOR_CMPL 0x10 45658628e7SLina Iyer #define RSC_DRV_CONTROL 0x14 46658628e7SLina Iyer #define RSC_DRV_STATUS 0x18 47658628e7SLina Iyer #define RSC_DRV_CMD_ENABLE 0x1C 48658628e7SLina Iyer #define RSC_DRV_CMD_MSGID 0x30 49658628e7SLina Iyer #define RSC_DRV_CMD_ADDR 0x34 50658628e7SLina Iyer #define RSC_DRV_CMD_DATA 0x38 51658628e7SLina Iyer #define RSC_DRV_CMD_STATUS 0x3C 52658628e7SLina Iyer #define RSC_DRV_CMD_RESP_DATA 0x40 53658628e7SLina Iyer 54658628e7SLina Iyer #define TCS_AMC_MODE_ENABLE BIT(16) 55658628e7SLina Iyer #define TCS_AMC_MODE_TRIGGER BIT(24) 56658628e7SLina Iyer 57658628e7SLina Iyer /* TCS CMD register bit mask */ 58658628e7SLina Iyer #define CMD_MSGID_LEN 8 59658628e7SLina Iyer #define CMD_MSGID_RESP_REQ BIT(8) 60658628e7SLina Iyer #define CMD_MSGID_WRITE BIT(16) 61658628e7SLina Iyer #define CMD_STATUS_ISSUED BIT(8) 62658628e7SLina Iyer #define CMD_STATUS_COMPL BIT(16) 63658628e7SLina Iyer 64658628e7SLina Iyer static u32 read_tcs_reg(struct rsc_drv *drv, int reg, int tcs_id, int cmd_id) 65658628e7SLina Iyer { 66658628e7SLina Iyer return readl_relaxed(drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id + 67658628e7SLina Iyer RSC_DRV_CMD_OFFSET * cmd_id); 68658628e7SLina Iyer } 69658628e7SLina Iyer 70658628e7SLina Iyer static void write_tcs_cmd(struct rsc_drv *drv, int reg, int tcs_id, int cmd_id, 71658628e7SLina Iyer u32 data) 72658628e7SLina Iyer { 73658628e7SLina Iyer writel_relaxed(data, drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id + 74658628e7SLina Iyer RSC_DRV_CMD_OFFSET * cmd_id); 75658628e7SLina Iyer } 76658628e7SLina Iyer 77658628e7SLina Iyer static void write_tcs_reg(struct rsc_drv *drv, int reg, int tcs_id, u32 data) 78658628e7SLina Iyer { 79658628e7SLina Iyer writel_relaxed(data, drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id); 80658628e7SLina Iyer } 81658628e7SLina Iyer 82658628e7SLina Iyer static void write_tcs_reg_sync(struct rsc_drv *drv, int reg, int tcs_id, 83658628e7SLina Iyer u32 data) 84658628e7SLina Iyer { 85658628e7SLina Iyer writel(data, drv->tcs_base + reg + RSC_DRV_TCS_OFFSET * tcs_id); 86658628e7SLina Iyer for (;;) { 87658628e7SLina Iyer if (data == readl(drv->tcs_base + reg + 88658628e7SLina Iyer RSC_DRV_TCS_OFFSET * tcs_id)) 89658628e7SLina Iyer break; 90658628e7SLina Iyer udelay(1); 91658628e7SLina Iyer } 92658628e7SLina Iyer } 93658628e7SLina Iyer 94658628e7SLina Iyer static bool tcs_is_free(struct rsc_drv *drv, int tcs_id) 95658628e7SLina Iyer { 96658628e7SLina Iyer return !test_bit(tcs_id, drv->tcs_in_use) && 97658628e7SLina Iyer read_tcs_reg(drv, RSC_DRV_STATUS, tcs_id, 0); 98658628e7SLina Iyer } 99658628e7SLina Iyer 100658628e7SLina Iyer static struct tcs_group *get_tcs_of_type(struct rsc_drv *drv, int type) 101658628e7SLina Iyer { 102658628e7SLina Iyer return &drv->tcs[type]; 103658628e7SLina Iyer } 104658628e7SLina Iyer 1059a3afcfbSLina Iyer static int tcs_invalidate(struct rsc_drv *drv, int type) 1069a3afcfbSLina Iyer { 1079a3afcfbSLina Iyer int m; 1089a3afcfbSLina Iyer struct tcs_group *tcs; 1099a3afcfbSLina Iyer 1109a3afcfbSLina Iyer tcs = get_tcs_of_type(drv, type); 1119a3afcfbSLina Iyer 1129a3afcfbSLina Iyer spin_lock(&tcs->lock); 1139a3afcfbSLina Iyer if (bitmap_empty(tcs->slots, MAX_TCS_SLOTS)) { 1149a3afcfbSLina Iyer spin_unlock(&tcs->lock); 1159a3afcfbSLina Iyer return 0; 1169a3afcfbSLina Iyer } 1179a3afcfbSLina Iyer 1189a3afcfbSLina Iyer for (m = tcs->offset; m < tcs->offset + tcs->num_tcs; m++) { 1199a3afcfbSLina Iyer if (!tcs_is_free(drv, m)) { 1209a3afcfbSLina Iyer spin_unlock(&tcs->lock); 1219a3afcfbSLina Iyer return -EAGAIN; 1229a3afcfbSLina Iyer } 1239a3afcfbSLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CMD_ENABLE, m, 0); 12409e97b6cSLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CMD_WAIT_FOR_CMPL, m, 0); 1259a3afcfbSLina Iyer } 1269a3afcfbSLina Iyer bitmap_zero(tcs->slots, MAX_TCS_SLOTS); 1279a3afcfbSLina Iyer spin_unlock(&tcs->lock); 1289a3afcfbSLina Iyer 1299a3afcfbSLina Iyer return 0; 1309a3afcfbSLina Iyer } 1319a3afcfbSLina Iyer 1329a3afcfbSLina Iyer /** 1339a3afcfbSLina Iyer * rpmh_rsc_invalidate - Invalidate sleep and wake TCSes 1349a3afcfbSLina Iyer * 1359a3afcfbSLina Iyer * @drv: the RSC controller 1369a3afcfbSLina Iyer */ 1379a3afcfbSLina Iyer int rpmh_rsc_invalidate(struct rsc_drv *drv) 1389a3afcfbSLina Iyer { 1399a3afcfbSLina Iyer int ret; 1409a3afcfbSLina Iyer 1419a3afcfbSLina Iyer ret = tcs_invalidate(drv, SLEEP_TCS); 1429a3afcfbSLina Iyer if (!ret) 1439a3afcfbSLina Iyer ret = tcs_invalidate(drv, WAKE_TCS); 1449a3afcfbSLina Iyer 1459a3afcfbSLina Iyer return ret; 1469a3afcfbSLina Iyer } 1479a3afcfbSLina Iyer 148658628e7SLina Iyer static struct tcs_group *get_tcs_for_msg(struct rsc_drv *drv, 149658628e7SLina Iyer const struct tcs_request *msg) 150658628e7SLina Iyer { 1512de4b8d3SLina Iyer int type, ret; 1522de4b8d3SLina Iyer struct tcs_group *tcs; 153658628e7SLina Iyer 154658628e7SLina Iyer switch (msg->state) { 155658628e7SLina Iyer case RPMH_ACTIVE_ONLY_STATE: 156658628e7SLina Iyer type = ACTIVE_TCS; 157658628e7SLina Iyer break; 158fa460e45SLina Iyer case RPMH_WAKE_ONLY_STATE: 159fa460e45SLina Iyer type = WAKE_TCS; 160fa460e45SLina Iyer break; 161fa460e45SLina Iyer case RPMH_SLEEP_STATE: 162fa460e45SLina Iyer type = SLEEP_TCS; 163fa460e45SLina Iyer break; 164658628e7SLina Iyer default: 165658628e7SLina Iyer return ERR_PTR(-EINVAL); 166658628e7SLina Iyer } 167658628e7SLina Iyer 1682de4b8d3SLina Iyer /* 1692de4b8d3SLina Iyer * If we are making an active request on a RSC that does not have a 1702de4b8d3SLina Iyer * dedicated TCS for active state use, then re-purpose a wake TCS to 1712de4b8d3SLina Iyer * send active votes. 1722de4b8d3SLina Iyer * NOTE: The driver must be aware that this RSC does not have a 1732de4b8d3SLina Iyer * dedicated AMC, and therefore would invalidate the sleep and wake 1742de4b8d3SLina Iyer * TCSes before making an active state request. 1752de4b8d3SLina Iyer */ 1762de4b8d3SLina Iyer tcs = get_tcs_of_type(drv, type); 1776c805adfSRaju P.L.S.S.S.N if (msg->state == RPMH_ACTIVE_ONLY_STATE && !tcs->num_tcs) { 1782de4b8d3SLina Iyer tcs = get_tcs_of_type(drv, WAKE_TCS); 1796c805adfSRaju P.L.S.S.S.N if (tcs->num_tcs) { 1802de4b8d3SLina Iyer ret = rpmh_rsc_invalidate(drv); 1812de4b8d3SLina Iyer if (ret) 1822de4b8d3SLina Iyer return ERR_PTR(ret); 1832de4b8d3SLina Iyer } 1842de4b8d3SLina Iyer } 1852de4b8d3SLina Iyer 1862de4b8d3SLina Iyer return tcs; 187658628e7SLina Iyer } 188658628e7SLina Iyer 189658628e7SLina Iyer static const struct tcs_request *get_req_from_tcs(struct rsc_drv *drv, 190658628e7SLina Iyer int tcs_id) 191658628e7SLina Iyer { 192658628e7SLina Iyer struct tcs_group *tcs; 193658628e7SLina Iyer int i; 194658628e7SLina Iyer 195efa1c257SRaju P.L.S.S.S.N for (i = 0; i < TCS_TYPE_NR; i++) { 196658628e7SLina Iyer tcs = &drv->tcs[i]; 197658628e7SLina Iyer if (tcs->mask & BIT(tcs_id)) 198658628e7SLina Iyer return tcs->req[tcs_id - tcs->offset]; 199658628e7SLina Iyer } 200658628e7SLina Iyer 201658628e7SLina Iyer return NULL; 202658628e7SLina Iyer } 203658628e7SLina Iyer 204658628e7SLina Iyer /** 205658628e7SLina Iyer * tcs_tx_done: TX Done interrupt handler 206658628e7SLina Iyer */ 207658628e7SLina Iyer static irqreturn_t tcs_tx_done(int irq, void *p) 208658628e7SLina Iyer { 209658628e7SLina Iyer struct rsc_drv *drv = p; 210c1038456SLina Iyer int i, j, err = 0; 211658628e7SLina Iyer unsigned long irq_status; 212658628e7SLina Iyer const struct tcs_request *req; 213658628e7SLina Iyer struct tcs_cmd *cmd; 214658628e7SLina Iyer 215658628e7SLina Iyer irq_status = read_tcs_reg(drv, RSC_DRV_IRQ_STATUS, 0, 0); 216658628e7SLina Iyer 217658628e7SLina Iyer for_each_set_bit(i, &irq_status, BITS_PER_LONG) { 218658628e7SLina Iyer req = get_req_from_tcs(drv, i); 219658628e7SLina Iyer if (!req) { 220658628e7SLina Iyer WARN_ON(1); 221658628e7SLina Iyer goto skip; 222658628e7SLina Iyer } 223658628e7SLina Iyer 224fc087fe5SLina Iyer err = 0; 225658628e7SLina Iyer for (j = 0; j < req->num_cmds; j++) { 226658628e7SLina Iyer u32 sts; 227658628e7SLina Iyer 228658628e7SLina Iyer cmd = &req->cmds[j]; 229658628e7SLina Iyer sts = read_tcs_reg(drv, RSC_DRV_CMD_STATUS, i, j); 230658628e7SLina Iyer if (!(sts & CMD_STATUS_ISSUED) || 231658628e7SLina Iyer ((req->wait_for_compl || cmd->wait) && 232658628e7SLina Iyer !(sts & CMD_STATUS_COMPL))) { 233658628e7SLina Iyer pr_err("Incomplete request: %s: addr=%#x data=%#x", 234658628e7SLina Iyer drv->name, cmd->addr, cmd->data); 235fc087fe5SLina Iyer err = -EIO; 236658628e7SLina Iyer } 237658628e7SLina Iyer } 238fc087fe5SLina Iyer 239fc087fe5SLina Iyer trace_rpmh_tx_done(drv, i, req, err); 240658628e7SLina Iyer skip: 241658628e7SLina Iyer /* Reclaim the TCS */ 242658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, i, 0); 24309e97b6cSLina Iyer write_tcs_reg(drv, RSC_DRV_CMD_WAIT_FOR_CMPL, i, 0); 244658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_IRQ_CLEAR, 0, BIT(i)); 245658628e7SLina Iyer spin_lock(&drv->lock); 246658628e7SLina Iyer clear_bit(i, drv->tcs_in_use); 247658628e7SLina Iyer spin_unlock(&drv->lock); 248c1038456SLina Iyer if (req) 249c1038456SLina Iyer rpmh_tx_done(req, err); 250658628e7SLina Iyer } 251658628e7SLina Iyer 252658628e7SLina Iyer return IRQ_HANDLED; 253658628e7SLina Iyer } 254658628e7SLina Iyer 255658628e7SLina Iyer static void __tcs_buffer_write(struct rsc_drv *drv, int tcs_id, int cmd_id, 256658628e7SLina Iyer const struct tcs_request *msg) 257658628e7SLina Iyer { 258658628e7SLina Iyer u32 msgid, cmd_msgid; 259658628e7SLina Iyer u32 cmd_enable = 0; 260658628e7SLina Iyer u32 cmd_complete; 261658628e7SLina Iyer struct tcs_cmd *cmd; 262658628e7SLina Iyer int i, j; 263658628e7SLina Iyer 264658628e7SLina Iyer cmd_msgid = CMD_MSGID_LEN; 265658628e7SLina Iyer cmd_msgid |= msg->wait_for_compl ? CMD_MSGID_RESP_REQ : 0; 266658628e7SLina Iyer cmd_msgid |= CMD_MSGID_WRITE; 267658628e7SLina Iyer 268658628e7SLina Iyer cmd_complete = read_tcs_reg(drv, RSC_DRV_CMD_WAIT_FOR_CMPL, tcs_id, 0); 269658628e7SLina Iyer 270658628e7SLina Iyer for (i = 0, j = cmd_id; i < msg->num_cmds; i++, j++) { 271658628e7SLina Iyer cmd = &msg->cmds[i]; 272658628e7SLina Iyer cmd_enable |= BIT(j); 273658628e7SLina Iyer cmd_complete |= cmd->wait << j; 274658628e7SLina Iyer msgid = cmd_msgid; 275658628e7SLina Iyer msgid |= cmd->wait ? CMD_MSGID_RESP_REQ : 0; 276fc087fe5SLina Iyer 277658628e7SLina Iyer write_tcs_cmd(drv, RSC_DRV_CMD_MSGID, tcs_id, j, msgid); 278658628e7SLina Iyer write_tcs_cmd(drv, RSC_DRV_CMD_ADDR, tcs_id, j, cmd->addr); 279658628e7SLina Iyer write_tcs_cmd(drv, RSC_DRV_CMD_DATA, tcs_id, j, cmd->data); 280fc087fe5SLina Iyer trace_rpmh_send_msg(drv, tcs_id, j, msgid, cmd); 281658628e7SLina Iyer } 282658628e7SLina Iyer 283658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_CMD_WAIT_FOR_CMPL, tcs_id, cmd_complete); 284658628e7SLina Iyer cmd_enable |= read_tcs_reg(drv, RSC_DRV_CMD_ENABLE, tcs_id, 0); 285658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_CMD_ENABLE, tcs_id, cmd_enable); 286658628e7SLina Iyer } 287658628e7SLina Iyer 288658628e7SLina Iyer static void __tcs_trigger(struct rsc_drv *drv, int tcs_id) 289658628e7SLina Iyer { 290658628e7SLina Iyer u32 enable; 291658628e7SLina Iyer 292658628e7SLina Iyer /* 293658628e7SLina Iyer * HW req: Clear the DRV_CONTROL and enable TCS again 294658628e7SLina Iyer * While clearing ensure that the AMC mode trigger is cleared 295658628e7SLina Iyer * and then the mode enable is cleared. 296658628e7SLina Iyer */ 297658628e7SLina Iyer enable = read_tcs_reg(drv, RSC_DRV_CONTROL, tcs_id, 0); 298658628e7SLina Iyer enable &= ~TCS_AMC_MODE_TRIGGER; 299658628e7SLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); 300658628e7SLina Iyer enable &= ~TCS_AMC_MODE_ENABLE; 301658628e7SLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); 302658628e7SLina Iyer 303658628e7SLina Iyer /* Enable the AMC mode on the TCS and then trigger the TCS */ 304658628e7SLina Iyer enable = TCS_AMC_MODE_ENABLE; 305658628e7SLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); 306658628e7SLina Iyer enable |= TCS_AMC_MODE_TRIGGER; 307658628e7SLina Iyer write_tcs_reg_sync(drv, RSC_DRV_CONTROL, tcs_id, enable); 308658628e7SLina Iyer } 309658628e7SLina Iyer 310658628e7SLina Iyer static int check_for_req_inflight(struct rsc_drv *drv, struct tcs_group *tcs, 311658628e7SLina Iyer const struct tcs_request *msg) 312658628e7SLina Iyer { 313658628e7SLina Iyer unsigned long curr_enabled; 314658628e7SLina Iyer u32 addr; 315658628e7SLina Iyer int i, j, k; 316658628e7SLina Iyer int tcs_id = tcs->offset; 317658628e7SLina Iyer 318658628e7SLina Iyer for (i = 0; i < tcs->num_tcs; i++, tcs_id++) { 319658628e7SLina Iyer if (tcs_is_free(drv, tcs_id)) 320658628e7SLina Iyer continue; 321658628e7SLina Iyer 322658628e7SLina Iyer curr_enabled = read_tcs_reg(drv, RSC_DRV_CMD_ENABLE, tcs_id, 0); 323658628e7SLina Iyer 324658628e7SLina Iyer for_each_set_bit(j, &curr_enabled, MAX_CMDS_PER_TCS) { 325658628e7SLina Iyer addr = read_tcs_reg(drv, RSC_DRV_CMD_ADDR, tcs_id, j); 326658628e7SLina Iyer for (k = 0; k < msg->num_cmds; k++) { 327658628e7SLina Iyer if (addr == msg->cmds[k].addr) 328658628e7SLina Iyer return -EBUSY; 329658628e7SLina Iyer } 330658628e7SLina Iyer } 331658628e7SLina Iyer } 332658628e7SLina Iyer 333658628e7SLina Iyer return 0; 334658628e7SLina Iyer } 335658628e7SLina Iyer 336658628e7SLina Iyer static int find_free_tcs(struct tcs_group *tcs) 337658628e7SLina Iyer { 338658628e7SLina Iyer int i; 339658628e7SLina Iyer 340658628e7SLina Iyer for (i = 0; i < tcs->num_tcs; i++) { 341658628e7SLina Iyer if (tcs_is_free(tcs->drv, tcs->offset + i)) 342658628e7SLina Iyer return tcs->offset + i; 343658628e7SLina Iyer } 344658628e7SLina Iyer 345658628e7SLina Iyer return -EBUSY; 346658628e7SLina Iyer } 347658628e7SLina Iyer 348658628e7SLina Iyer static int tcs_write(struct rsc_drv *drv, const struct tcs_request *msg) 349658628e7SLina Iyer { 350658628e7SLina Iyer struct tcs_group *tcs; 351658628e7SLina Iyer int tcs_id; 352658628e7SLina Iyer unsigned long flags; 353658628e7SLina Iyer int ret; 354658628e7SLina Iyer 355658628e7SLina Iyer tcs = get_tcs_for_msg(drv, msg); 356658628e7SLina Iyer if (IS_ERR(tcs)) 357658628e7SLina Iyer return PTR_ERR(tcs); 358658628e7SLina Iyer 359658628e7SLina Iyer spin_lock_irqsave(&tcs->lock, flags); 360658628e7SLina Iyer spin_lock(&drv->lock); 361658628e7SLina Iyer /* 362658628e7SLina Iyer * The h/w does not like if we send a request to the same address, 363658628e7SLina Iyer * when one is already in-flight or being processed. 364658628e7SLina Iyer */ 365658628e7SLina Iyer ret = check_for_req_inflight(drv, tcs, msg); 366658628e7SLina Iyer if (ret) { 367658628e7SLina Iyer spin_unlock(&drv->lock); 368658628e7SLina Iyer goto done_write; 369658628e7SLina Iyer } 370658628e7SLina Iyer 371658628e7SLina Iyer tcs_id = find_free_tcs(tcs); 372658628e7SLina Iyer if (tcs_id < 0) { 373658628e7SLina Iyer ret = tcs_id; 374658628e7SLina Iyer spin_unlock(&drv->lock); 375658628e7SLina Iyer goto done_write; 376658628e7SLina Iyer } 377658628e7SLina Iyer 378658628e7SLina Iyer tcs->req[tcs_id - tcs->offset] = msg; 379658628e7SLina Iyer set_bit(tcs_id, drv->tcs_in_use); 380658628e7SLina Iyer spin_unlock(&drv->lock); 381658628e7SLina Iyer 382658628e7SLina Iyer __tcs_buffer_write(drv, tcs_id, 0, msg); 383658628e7SLina Iyer __tcs_trigger(drv, tcs_id); 384658628e7SLina Iyer 385658628e7SLina Iyer done_write: 386658628e7SLina Iyer spin_unlock_irqrestore(&tcs->lock, flags); 387658628e7SLina Iyer return ret; 388658628e7SLina Iyer } 389658628e7SLina Iyer 390658628e7SLina Iyer /** 391658628e7SLina Iyer * rpmh_rsc_send_data: Validate the incoming message and write to the 392658628e7SLina Iyer * appropriate TCS block. 393658628e7SLina Iyer * 394658628e7SLina Iyer * @drv: the controller 395658628e7SLina Iyer * @msg: the data to be sent 396658628e7SLina Iyer * 397658628e7SLina Iyer * Return: 0 on success, -EINVAL on error. 398658628e7SLina Iyer * Note: This call blocks until a valid data is written to the TCS. 399658628e7SLina Iyer */ 400658628e7SLina Iyer int rpmh_rsc_send_data(struct rsc_drv *drv, const struct tcs_request *msg) 401658628e7SLina Iyer { 402658628e7SLina Iyer int ret; 403658628e7SLina Iyer 404658628e7SLina Iyer if (!msg || !msg->cmds || !msg->num_cmds || 405658628e7SLina Iyer msg->num_cmds > MAX_RPMH_PAYLOAD) { 406658628e7SLina Iyer WARN_ON(1); 407658628e7SLina Iyer return -EINVAL; 408658628e7SLina Iyer } 409658628e7SLina Iyer 410658628e7SLina Iyer do { 411658628e7SLina Iyer ret = tcs_write(drv, msg); 412658628e7SLina Iyer if (ret == -EBUSY) { 413658628e7SLina Iyer pr_info_ratelimited("TCS Busy, retrying RPMH message send: addr=%#x\n", 414658628e7SLina Iyer msg->cmds[0].addr); 415658628e7SLina Iyer udelay(10); 416658628e7SLina Iyer } 417658628e7SLina Iyer } while (ret == -EBUSY); 418658628e7SLina Iyer 419658628e7SLina Iyer return ret; 420658628e7SLina Iyer } 421658628e7SLina Iyer 422fa460e45SLina Iyer static int find_match(const struct tcs_group *tcs, const struct tcs_cmd *cmd, 423fa460e45SLina Iyer int len) 424fa460e45SLina Iyer { 425fa460e45SLina Iyer int i, j; 426fa460e45SLina Iyer 427fa460e45SLina Iyer /* Check for already cached commands */ 428fa460e45SLina Iyer for_each_set_bit(i, tcs->slots, MAX_TCS_SLOTS) { 429fa460e45SLina Iyer if (tcs->cmd_cache[i] != cmd[0].addr) 430fa460e45SLina Iyer continue; 431fa460e45SLina Iyer if (i + len >= tcs->num_tcs * tcs->ncpt) 432fa460e45SLina Iyer goto seq_err; 433fa460e45SLina Iyer for (j = 0; j < len; j++) { 434fa460e45SLina Iyer if (tcs->cmd_cache[i + j] != cmd[j].addr) 435fa460e45SLina Iyer goto seq_err; 436fa460e45SLina Iyer } 437fa460e45SLina Iyer return i; 438fa460e45SLina Iyer } 439fa460e45SLina Iyer 440fa460e45SLina Iyer return -ENODATA; 441fa460e45SLina Iyer 442fa460e45SLina Iyer seq_err: 443fa460e45SLina Iyer WARN(1, "Message does not match previous sequence.\n"); 444fa460e45SLina Iyer return -EINVAL; 445fa460e45SLina Iyer } 446fa460e45SLina Iyer 447fa460e45SLina Iyer static int find_slots(struct tcs_group *tcs, const struct tcs_request *msg, 448fa460e45SLina Iyer int *tcs_id, int *cmd_id) 449fa460e45SLina Iyer { 450fa460e45SLina Iyer int slot, offset; 451fa460e45SLina Iyer int i = 0; 452fa460e45SLina Iyer 453fa460e45SLina Iyer /* Find if we already have the msg in our TCS */ 454fa460e45SLina Iyer slot = find_match(tcs, msg->cmds, msg->num_cmds); 455fa460e45SLina Iyer if (slot >= 0) 456fa460e45SLina Iyer goto copy_data; 457fa460e45SLina Iyer 458fa460e45SLina Iyer /* Do over, until we can fit the full payload in a TCS */ 459fa460e45SLina Iyer do { 460fa460e45SLina Iyer slot = bitmap_find_next_zero_area(tcs->slots, MAX_TCS_SLOTS, 461fa460e45SLina Iyer i, msg->num_cmds, 0); 462fa460e45SLina Iyer if (slot == tcs->num_tcs * tcs->ncpt) 463fa460e45SLina Iyer return -ENOMEM; 464fa460e45SLina Iyer i += tcs->ncpt; 465fa460e45SLina Iyer } while (slot + msg->num_cmds - 1 >= i); 466fa460e45SLina Iyer 467fa460e45SLina Iyer copy_data: 468fa460e45SLina Iyer bitmap_set(tcs->slots, slot, msg->num_cmds); 469fa460e45SLina Iyer /* Copy the addresses of the resources over to the slots */ 470fa460e45SLina Iyer for (i = 0; i < msg->num_cmds; i++) 471fa460e45SLina Iyer tcs->cmd_cache[slot + i] = msg->cmds[i].addr; 472fa460e45SLina Iyer 473fa460e45SLina Iyer offset = slot / tcs->ncpt; 474fa460e45SLina Iyer *tcs_id = offset + tcs->offset; 475fa460e45SLina Iyer *cmd_id = slot % tcs->ncpt; 476fa460e45SLina Iyer 477fa460e45SLina Iyer return 0; 478fa460e45SLina Iyer } 479fa460e45SLina Iyer 480fa460e45SLina Iyer static int tcs_ctrl_write(struct rsc_drv *drv, const struct tcs_request *msg) 481fa460e45SLina Iyer { 482fa460e45SLina Iyer struct tcs_group *tcs; 483fa460e45SLina Iyer int tcs_id = 0, cmd_id = 0; 484fa460e45SLina Iyer unsigned long flags; 485fa460e45SLina Iyer int ret; 486fa460e45SLina Iyer 487fa460e45SLina Iyer tcs = get_tcs_for_msg(drv, msg); 488fa460e45SLina Iyer if (IS_ERR(tcs)) 489fa460e45SLina Iyer return PTR_ERR(tcs); 490fa460e45SLina Iyer 491fa460e45SLina Iyer spin_lock_irqsave(&tcs->lock, flags); 492fa460e45SLina Iyer /* find the TCS id and the command in the TCS to write to */ 493fa460e45SLina Iyer ret = find_slots(tcs, msg, &tcs_id, &cmd_id); 494fa460e45SLina Iyer if (!ret) 495fa460e45SLina Iyer __tcs_buffer_write(drv, tcs_id, cmd_id, msg); 496fa460e45SLina Iyer spin_unlock_irqrestore(&tcs->lock, flags); 497fa460e45SLina Iyer 498fa460e45SLina Iyer return ret; 499fa460e45SLina Iyer } 500fa460e45SLina Iyer 501fa460e45SLina Iyer /** 502fa460e45SLina Iyer * rpmh_rsc_write_ctrl_data: Write request to the controller 503fa460e45SLina Iyer * 504fa460e45SLina Iyer * @drv: the controller 505fa460e45SLina Iyer * @msg: the data to be written to the controller 506fa460e45SLina Iyer * 507fa460e45SLina Iyer * There is no response returned for writing the request to the controller. 508fa460e45SLina Iyer */ 509fa460e45SLina Iyer int rpmh_rsc_write_ctrl_data(struct rsc_drv *drv, const struct tcs_request *msg) 510fa460e45SLina Iyer { 511fa460e45SLina Iyer if (!msg || !msg->cmds || !msg->num_cmds || 512fa460e45SLina Iyer msg->num_cmds > MAX_RPMH_PAYLOAD) { 513fa460e45SLina Iyer pr_err("Payload error\n"); 514fa460e45SLina Iyer return -EINVAL; 515fa460e45SLina Iyer } 516fa460e45SLina Iyer 517fa460e45SLina Iyer /* Data sent to this API will not be sent immediately */ 518fa460e45SLina Iyer if (msg->state == RPMH_ACTIVE_ONLY_STATE) 519fa460e45SLina Iyer return -EINVAL; 520fa460e45SLina Iyer 521fa460e45SLina Iyer return tcs_ctrl_write(drv, msg); 522fa460e45SLina Iyer } 523fa460e45SLina Iyer 524658628e7SLina Iyer static int rpmh_probe_tcs_config(struct platform_device *pdev, 525658628e7SLina Iyer struct rsc_drv *drv) 526658628e7SLina Iyer { 527658628e7SLina Iyer struct tcs_type_config { 528658628e7SLina Iyer u32 type; 529658628e7SLina Iyer u32 n; 530658628e7SLina Iyer } tcs_cfg[TCS_TYPE_NR] = { { 0 } }; 531658628e7SLina Iyer struct device_node *dn = pdev->dev.of_node; 532658628e7SLina Iyer u32 config, max_tcs, ncpt, offset; 533658628e7SLina Iyer int i, ret, n, st = 0; 534658628e7SLina Iyer struct tcs_group *tcs; 535658628e7SLina Iyer struct resource *res; 536658628e7SLina Iyer void __iomem *base; 537658628e7SLina Iyer char drv_id[10] = {0}; 538658628e7SLina Iyer 539658628e7SLina Iyer snprintf(drv_id, ARRAY_SIZE(drv_id), "drv-%d", drv->id); 540658628e7SLina Iyer res = platform_get_resource_byname(pdev, IORESOURCE_MEM, drv_id); 541658628e7SLina Iyer base = devm_ioremap_resource(&pdev->dev, res); 542658628e7SLina Iyer if (IS_ERR(base)) 543658628e7SLina Iyer return PTR_ERR(base); 544658628e7SLina Iyer 545658628e7SLina Iyer ret = of_property_read_u32(dn, "qcom,tcs-offset", &offset); 546658628e7SLina Iyer if (ret) 547658628e7SLina Iyer return ret; 548658628e7SLina Iyer drv->tcs_base = base + offset; 549658628e7SLina Iyer 550658628e7SLina Iyer config = readl_relaxed(base + DRV_PRNT_CHLD_CONFIG); 551658628e7SLina Iyer 552658628e7SLina Iyer max_tcs = config; 553658628e7SLina Iyer max_tcs &= DRV_NUM_TCS_MASK << (DRV_NUM_TCS_SHIFT * drv->id); 554658628e7SLina Iyer max_tcs = max_tcs >> (DRV_NUM_TCS_SHIFT * drv->id); 555658628e7SLina Iyer 556658628e7SLina Iyer ncpt = config & (DRV_NCPT_MASK << DRV_NCPT_SHIFT); 557658628e7SLina Iyer ncpt = ncpt >> DRV_NCPT_SHIFT; 558658628e7SLina Iyer 559658628e7SLina Iyer n = of_property_count_u32_elems(dn, "qcom,tcs-config"); 560658628e7SLina Iyer if (n != 2 * TCS_TYPE_NR) 561658628e7SLina Iyer return -EINVAL; 562658628e7SLina Iyer 563658628e7SLina Iyer for (i = 0; i < TCS_TYPE_NR; i++) { 564658628e7SLina Iyer ret = of_property_read_u32_index(dn, "qcom,tcs-config", 565658628e7SLina Iyer i * 2, &tcs_cfg[i].type); 566658628e7SLina Iyer if (ret) 567658628e7SLina Iyer return ret; 568658628e7SLina Iyer if (tcs_cfg[i].type >= TCS_TYPE_NR) 569658628e7SLina Iyer return -EINVAL; 570658628e7SLina Iyer 571658628e7SLina Iyer ret = of_property_read_u32_index(dn, "qcom,tcs-config", 572658628e7SLina Iyer i * 2 + 1, &tcs_cfg[i].n); 573658628e7SLina Iyer if (ret) 574658628e7SLina Iyer return ret; 575658628e7SLina Iyer if (tcs_cfg[i].n > MAX_TCS_PER_TYPE) 576658628e7SLina Iyer return -EINVAL; 577658628e7SLina Iyer } 578658628e7SLina Iyer 579658628e7SLina Iyer for (i = 0; i < TCS_TYPE_NR; i++) { 580658628e7SLina Iyer tcs = &drv->tcs[tcs_cfg[i].type]; 581658628e7SLina Iyer if (tcs->drv) 582658628e7SLina Iyer return -EINVAL; 583658628e7SLina Iyer tcs->drv = drv; 584658628e7SLina Iyer tcs->type = tcs_cfg[i].type; 585658628e7SLina Iyer tcs->num_tcs = tcs_cfg[i].n; 586658628e7SLina Iyer tcs->ncpt = ncpt; 587658628e7SLina Iyer spin_lock_init(&tcs->lock); 588658628e7SLina Iyer 589658628e7SLina Iyer if (!tcs->num_tcs || tcs->type == CONTROL_TCS) 590658628e7SLina Iyer continue; 591658628e7SLina Iyer 592658628e7SLina Iyer if (st + tcs->num_tcs > max_tcs || 593658628e7SLina Iyer st + tcs->num_tcs >= BITS_PER_BYTE * sizeof(tcs->mask)) 594658628e7SLina Iyer return -EINVAL; 595658628e7SLina Iyer 596658628e7SLina Iyer tcs->mask = ((1 << tcs->num_tcs) - 1) << st; 597658628e7SLina Iyer tcs->offset = st; 598658628e7SLina Iyer st += tcs->num_tcs; 599fa460e45SLina Iyer 600fa460e45SLina Iyer /* 601fa460e45SLina Iyer * Allocate memory to cache sleep and wake requests to 602fa460e45SLina Iyer * avoid reading TCS register memory. 603fa460e45SLina Iyer */ 604fa460e45SLina Iyer if (tcs->type == ACTIVE_TCS) 605fa460e45SLina Iyer continue; 606fa460e45SLina Iyer 607fa460e45SLina Iyer tcs->cmd_cache = devm_kcalloc(&pdev->dev, 608fa460e45SLina Iyer tcs->num_tcs * ncpt, sizeof(u32), 609fa460e45SLina Iyer GFP_KERNEL); 610fa460e45SLina Iyer if (!tcs->cmd_cache) 611fa460e45SLina Iyer return -ENOMEM; 612658628e7SLina Iyer } 613658628e7SLina Iyer 614658628e7SLina Iyer drv->num_tcs = st; 615658628e7SLina Iyer 616658628e7SLina Iyer return 0; 617658628e7SLina Iyer } 618658628e7SLina Iyer 619658628e7SLina Iyer static int rpmh_rsc_probe(struct platform_device *pdev) 620658628e7SLina Iyer { 621658628e7SLina Iyer struct device_node *dn = pdev->dev.of_node; 622658628e7SLina Iyer struct rsc_drv *drv; 623658628e7SLina Iyer int ret, irq; 624658628e7SLina Iyer 625fdd102b5SDouglas Anderson /* 626fdd102b5SDouglas Anderson * Even though RPMh doesn't directly use cmd-db, all of its children 627fdd102b5SDouglas Anderson * do. To avoid adding this check to our children we'll do it now. 628fdd102b5SDouglas Anderson */ 629fdd102b5SDouglas Anderson ret = cmd_db_ready(); 630fdd102b5SDouglas Anderson if (ret) { 631fdd102b5SDouglas Anderson if (ret != -EPROBE_DEFER) 632fdd102b5SDouglas Anderson dev_err(&pdev->dev, "Command DB not available (%d)\n", 633fdd102b5SDouglas Anderson ret); 634fdd102b5SDouglas Anderson return ret; 635fdd102b5SDouglas Anderson } 636fdd102b5SDouglas Anderson 637658628e7SLina Iyer drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); 638658628e7SLina Iyer if (!drv) 639658628e7SLina Iyer return -ENOMEM; 640658628e7SLina Iyer 641658628e7SLina Iyer ret = of_property_read_u32(dn, "qcom,drv-id", &drv->id); 642658628e7SLina Iyer if (ret) 643658628e7SLina Iyer return ret; 644658628e7SLina Iyer 645658628e7SLina Iyer drv->name = of_get_property(dn, "label", NULL); 646658628e7SLina Iyer if (!drv->name) 647658628e7SLina Iyer drv->name = dev_name(&pdev->dev); 648658628e7SLina Iyer 649658628e7SLina Iyer ret = rpmh_probe_tcs_config(pdev, drv); 650658628e7SLina Iyer if (ret) 651658628e7SLina Iyer return ret; 652658628e7SLina Iyer 653658628e7SLina Iyer spin_lock_init(&drv->lock); 654658628e7SLina Iyer bitmap_zero(drv->tcs_in_use, MAX_TCS_NR); 655658628e7SLina Iyer 656658628e7SLina Iyer irq = platform_get_irq(pdev, drv->id); 657658628e7SLina Iyer if (irq < 0) 658658628e7SLina Iyer return irq; 659658628e7SLina Iyer 660658628e7SLina Iyer ret = devm_request_irq(&pdev->dev, irq, tcs_tx_done, 661658628e7SLina Iyer IRQF_TRIGGER_HIGH | IRQF_NO_SUSPEND, 662658628e7SLina Iyer drv->name, drv); 663658628e7SLina Iyer if (ret) 664658628e7SLina Iyer return ret; 665658628e7SLina Iyer 666658628e7SLina Iyer /* Enable the active TCS to send requests immediately */ 667658628e7SLina Iyer write_tcs_reg(drv, RSC_DRV_IRQ_ENABLE, 0, drv->tcs[ACTIVE_TCS].mask); 668658628e7SLina Iyer 669600513dfSLina Iyer spin_lock_init(&drv->client.cache_lock); 670600513dfSLina Iyer INIT_LIST_HEAD(&drv->client.cache); 671c8790cb6SLina Iyer INIT_LIST_HEAD(&drv->client.batch_cache); 672600513dfSLina Iyer 673c1038456SLina Iyer dev_set_drvdata(&pdev->dev, drv); 674c1038456SLina Iyer 675658628e7SLina Iyer return devm_of_platform_populate(&pdev->dev); 676658628e7SLina Iyer } 677658628e7SLina Iyer 678658628e7SLina Iyer static const struct of_device_id rpmh_drv_match[] = { 679658628e7SLina Iyer { .compatible = "qcom,rpmh-rsc", }, 680658628e7SLina Iyer { } 681658628e7SLina Iyer }; 682658628e7SLina Iyer 683658628e7SLina Iyer static struct platform_driver rpmh_driver = { 684658628e7SLina Iyer .probe = rpmh_rsc_probe, 685658628e7SLina Iyer .driver = { 686658628e7SLina Iyer .name = "rpmh", 687658628e7SLina Iyer .of_match_table = rpmh_drv_match, 688658628e7SLina Iyer }, 689658628e7SLina Iyer }; 690658628e7SLina Iyer 691658628e7SLina Iyer static int __init rpmh_driver_init(void) 692658628e7SLina Iyer { 693658628e7SLina Iyer return platform_driver_register(&rpmh_driver); 694658628e7SLina Iyer } 695658628e7SLina Iyer arch_initcall(rpmh_driver_init); 696