xref: /openbmc/linux/drivers/soc/qcom/Kconfig (revision 9b93eb47)
1# SPDX-License-Identifier: GPL-2.0-only
2#
3# QCOM Soc drivers
4#
5menu "Qualcomm SoC drivers"
6
7config QCOM_COMMAND_DB
8	bool "Qualcomm Command DB"
9	depends on ARCH_QCOM || COMPILE_TEST
10	depends on OF_RESERVED_MEM
11	help
12	  Command DB queries shared memory by key string for shared system
13	  resources. Platform drivers that require to set state of a shared
14	  resource on a RPM-hardened platform must use this database to get
15	  SoC specific identifier and information for the shared resources.
16
17config QCOM_GENI_SE
18	tristate "QCOM GENI Serial Engine Driver"
19	depends on ARCH_QCOM || COMPILE_TEST
20	help
21	  This driver is used to manage Generic Interface (GENI) firmware based
22	  Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper. This
23	  driver is also used to manage the common aspects of multiple Serial
24	  Engines present in the QUP.
25
26config QCOM_GLINK_SSR
27	tristate "Qualcomm Glink SSR driver"
28	depends on RPMSG
29	depends on QCOM_RPROC_COMMON
30	help
31	  Say y here to enable GLINK SSR support. The GLINK SSR driver
32	  implements the SSR protocol for notifying the remote processor about
33	  neighboring subsystems going up or down.
34
35config QCOM_GSBI
36        tristate "QCOM General Serial Bus Interface"
37        depends on ARCH_QCOM || COMPILE_TEST
38        select MFD_SYSCON
39        help
40          Say y here to enable GSBI support.  The GSBI provides control
41          functions for connecting the underlying serial UART, SPI, and I2C
42          devices to the output pins.
43
44config QCOM_LLCC
45	tristate "Qualcomm Technologies, Inc. LLCC driver"
46	depends on ARCH_QCOM || COMPILE_TEST
47	help
48	  Qualcomm Technologies, Inc. platform specific
49	  Last Level Cache Controller(LLCC) driver. This provides interfaces
50	  to clients that use the LLCC. Say yes here to enable LLCC slice
51	  driver.
52
53config QCOM_SDM845_LLCC
54	tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver"
55	depends on QCOM_LLCC
56	help
57	  Say yes here to enable the LLCC driver for SDM845. This provides
58	  data required to configure LLCC so that clients can start using the
59	  LLCC slices.
60
61config QCOM_MDT_LOADER
62	tristate
63	select QCOM_SCM
64
65config QCOM_PM
66	bool "Qualcomm Power Management"
67	depends on ARCH_QCOM && !ARM64
68	select ARM_CPU_SUSPEND
69	select QCOM_SCM
70	help
71	  QCOM Platform specific power driver to manage cores and L2 low power
72	  modes. It interface with various system drivers to put the cores in
73	  low power modes.
74
75config QCOM_QMI_HELPERS
76	tristate
77	depends on ARCH_QCOM || COMPILE_TEST
78	depends on NET
79
80config QCOM_RMTFS_MEM
81	tristate "Qualcomm Remote Filesystem memory driver"
82	depends on ARCH_QCOM
83	select QCOM_SCM
84	help
85	  The Qualcomm remote filesystem memory driver is used for allocating
86	  and exposing regions of shared memory with remote processors for the
87	  purpose of exchanging sector-data between the remote filesystem
88	  service and its clients.
89
90	  Say y here if you intend to boot the modem remoteproc.
91
92config QCOM_RPMH
93	bool "Qualcomm RPM-Hardened (RPMH) Communication"
94	depends on ARCH_QCOM && ARM64 || COMPILE_TEST
95	help
96	  Support for communication with the hardened-RPM blocks in
97	  Qualcomm Technologies Inc (QTI) SoCs. RPMH communication uses an
98	  internal bus to transmit state requests for shared resources. A set
99	  of hardware components aggregate requests for these resources and
100	  help apply the aggregated state on the resource.
101
102config QCOM_RPMHPD
103	bool "Qualcomm RPMh Power domain driver"
104	depends on QCOM_RPMH && QCOM_COMMAND_DB
105	help
106	  QCOM RPMh Power domain driver to support power-domains with
107	  performance states. The driver communicates a performance state
108	  value to RPMh which then translates it into corresponding voltage
109	  for the voltage rail.
110
111config QCOM_RPMPD
112	bool "Qualcomm RPM Power domain driver"
113	depends on QCOM_SMD_RPM=y
114	help
115	  QCOM RPM Power domain driver to support power-domains with
116	  performance states. The driver communicates a performance state
117	  value to RPM which then translates it into corresponding voltage
118	  for the voltage rail.
119
120config QCOM_SMEM
121	tristate "Qualcomm Shared Memory Manager (SMEM)"
122	depends on ARCH_QCOM || COMPILE_TEST
123	depends on HWSPINLOCK
124	help
125	  Say y here to enable support for the Qualcomm Shared Memory Manager.
126	  The driver provides an interface to items in a heap shared among all
127	  processors in a Qualcomm platform.
128
129config QCOM_SMD_RPM
130	tristate "Qualcomm Resource Power Manager (RPM) over SMD"
131	depends on ARCH_QCOM || COMPILE_TEST
132	depends on RPMSG
133	help
134	  If you say yes to this option, support will be included for the
135	  Resource Power Manager system found in the Qualcomm 8974 based
136	  devices.
137
138	  This is required to access many regulators, clocks and bus
139	  frequencies controlled by the RPM on these devices.
140
141	  Say M here if you want to include support for the Qualcomm RPM as a
142	  module. This will build a module called "qcom-smd-rpm".
143
144config QCOM_SMEM_STATE
145	bool
146
147config QCOM_SMP2P
148	tristate "Qualcomm Shared Memory Point to Point support"
149	depends on MAILBOX
150	depends on QCOM_SMEM
151	select QCOM_SMEM_STATE
152	select IRQ_DOMAIN
153	help
154	  Say yes here to support the Qualcomm Shared Memory Point to Point
155	  protocol.
156
157config QCOM_SMSM
158	tristate "Qualcomm Shared Memory State Machine"
159	depends on QCOM_SMEM
160	select QCOM_SMEM_STATE
161	select IRQ_DOMAIN
162	help
163	  Say yes here to support the Qualcomm Shared Memory State Machine.
164	  The state machine is represented by bits in shared memory.
165
166config QCOM_WCNSS_CTRL
167	tristate "Qualcomm WCNSS control driver"
168	depends on ARCH_QCOM || COMPILE_TEST
169	depends on RPMSG
170	help
171	  Client driver for the WCNSS_CTRL SMD channel, used to download nv
172	  firmware to a newly booted WCNSS chip.
173
174config QCOM_APR
175	tristate "Qualcomm APR Bus (Asynchronous Packet Router)"
176	depends on ARCH_QCOM || COMPILE_TEST
177	depends on RPMSG
178	help
179          Enable APR IPC protocol support between
180          application processor and QDSP6. APR is
181          used by audio driver to configure QDSP6
182          ASM, ADM and AFE modules.
183endmenu
184