1# SPDX-License-Identifier: GPL-2.0-only 2# 3# QCOM Soc drivers 4# 5menu "Qualcomm SoC drivers" 6 7config QCOM_AOSS_QMP 8 tristate "Qualcomm AOSS Driver" 9 depends on ARCH_QCOM || COMPILE_TEST 10 depends on MAILBOX 11 depends on COMMON_CLK && PM 12 select PM_GENERIC_DOMAINS 13 help 14 This driver provides the means of communicating with and controlling 15 the low-power state for resources related to the remoteproc 16 subsystems as well as controlling the debug clocks exposed by the Always On 17 Subsystem (AOSS) using Qualcomm Messaging Protocol (QMP). 18 19config QCOM_COMMAND_DB 20 tristate "Qualcomm Command DB" 21 depends on ARCH_QCOM || COMPILE_TEST 22 depends on OF_RESERVED_MEM 23 help 24 Command DB queries shared memory by key string for shared system 25 resources. Platform drivers that require to set state of a shared 26 resource on a RPM-hardened platform must use this database to get 27 SoC specific identifier and information for the shared resources. 28 29config QCOM_CPR 30 tristate "QCOM Core Power Reduction (CPR) support" 31 depends on ARCH_QCOM && HAS_IOMEM 32 select PM_OPP 33 select REGMAP 34 help 35 Say Y here to enable support for the CPR hardware found on Qualcomm 36 SoCs like QCS404. 37 38 This driver populates CPU OPPs tables and makes adjustments to the 39 tables based on feedback from the CPR hardware. If you want to do 40 CPUfrequency scaling say Y here. 41 42 To compile this driver as a module, choose M here: the module will 43 be called qcom-cpr 44 45config QCOM_GENI_SE 46 tristate "QCOM GENI Serial Engine Driver" 47 depends on ARCH_QCOM || COMPILE_TEST 48 help 49 This driver is used to manage Generic Interface (GENI) firmware based 50 Qualcomm Technologies, Inc. Universal Peripheral (QUP) Wrapper. This 51 driver is also used to manage the common aspects of multiple Serial 52 Engines present in the QUP. 53 54config QCOM_GSBI 55 tristate "QCOM General Serial Bus Interface" 56 depends on ARCH_QCOM || COMPILE_TEST 57 select MFD_SYSCON 58 help 59 Say y here to enable GSBI support. The GSBI provides control 60 functions for connecting the underlying serial UART, SPI, and I2C 61 devices to the output pins. 62 63config QCOM_LLCC 64 tristate "Qualcomm Technologies, Inc. LLCC driver" 65 depends on ARCH_QCOM || COMPILE_TEST 66 help 67 Qualcomm Technologies, Inc. platform specific 68 Last Level Cache Controller(LLCC) driver for platforms such as, 69 SDM845. This provides interfaces to clients that use the LLCC. 70 Say yes here to enable LLCC slice driver. 71 72config QCOM_KRYO_L2_ACCESSORS 73 bool 74 depends on ARCH_QCOM && ARM64 || COMPILE_TEST 75 76config QCOM_MDT_LOADER 77 tristate 78 select QCOM_SCM 79 80config QCOM_OCMEM 81 tristate "Qualcomm On Chip Memory (OCMEM) driver" 82 depends on ARCH_QCOM 83 select QCOM_SCM 84 help 85 The On Chip Memory (OCMEM) allocator allows various clients to 86 allocate memory from OCMEM based on performance, latency and power 87 requirements. This is typically used by the GPU, camera/video, and 88 audio components on some Snapdragon SoCs. 89 90config QCOM_PDR_HELPERS 91 tristate 92 select QCOM_QMI_HELPERS 93 94config QCOM_QMI_HELPERS 95 tristate 96 depends on NET 97 98config QCOM_RMTFS_MEM 99 tristate "Qualcomm Remote Filesystem memory driver" 100 depends on ARCH_QCOM 101 select QCOM_SCM 102 help 103 The Qualcomm remote filesystem memory driver is used for allocating 104 and exposing regions of shared memory with remote processors for the 105 purpose of exchanging sector-data between the remote filesystem 106 service and its clients. 107 108 Say y here if you intend to boot the modem remoteproc. 109 110config QCOM_RPMH 111 tristate "Qualcomm RPM-Hardened (RPMH) Communication" 112 depends on ARCH_QCOM || COMPILE_TEST 113 depends on (QCOM_COMMAND_DB || !QCOM_COMMAND_DB) 114 help 115 Support for communication with the hardened-RPM blocks in 116 Qualcomm Technologies Inc (QTI) SoCs. RPMH communication uses an 117 internal bus to transmit state requests for shared resources. A set 118 of hardware components aggregate requests for these resources and 119 help apply the aggregated state on the resource. 120 121config QCOM_RPMHPD 122 tristate "Qualcomm RPMh Power domain driver" 123 depends on QCOM_RPMH && QCOM_COMMAND_DB 124 help 125 QCOM RPMh Power domain driver to support power-domains with 126 performance states. The driver communicates a performance state 127 value to RPMh which then translates it into corresponding voltage 128 for the voltage rail. 129 130config QCOM_RPMPD 131 tristate "Qualcomm RPM Power domain driver" 132 depends on PM 133 depends on QCOM_SMD_RPM 134 select PM_GENERIC_DOMAINS 135 select PM_GENERIC_DOMAINS_OF 136 help 137 QCOM RPM Power domain driver to support power-domains with 138 performance states. The driver communicates a performance state 139 value to RPM which then translates it into corresponding voltage 140 for the voltage rail. 141 142config QCOM_SMEM 143 tristate "Qualcomm Shared Memory Manager (SMEM)" 144 depends on ARCH_QCOM || COMPILE_TEST 145 depends on HWSPINLOCK 146 help 147 Say y here to enable support for the Qualcomm Shared Memory Manager. 148 The driver provides an interface to items in a heap shared among all 149 processors in a Qualcomm platform. 150 151config QCOM_SMD_RPM 152 tristate "Qualcomm Resource Power Manager (RPM) over SMD" 153 depends on ARCH_QCOM || COMPILE_TEST 154 depends on RPMSG 155 help 156 If you say yes to this option, support will be included for the 157 Resource Power Manager system found in the Qualcomm 8974 based 158 devices. 159 160 This is required to access many regulators, clocks and bus 161 frequencies controlled by the RPM on these devices. 162 163 Say M here if you want to include support for the Qualcomm RPM as a 164 module. This will build a module called "qcom-smd-rpm". 165 166config QCOM_SMEM_STATE 167 bool 168 169config QCOM_SMP2P 170 tristate "Qualcomm Shared Memory Point to Point support" 171 depends on MAILBOX 172 depends on QCOM_SMEM 173 select QCOM_SMEM_STATE 174 select IRQ_DOMAIN 175 help 176 Say yes here to support the Qualcomm Shared Memory Point to Point 177 protocol. 178 179config QCOM_SMSM 180 tristate "Qualcomm Shared Memory State Machine" 181 depends on QCOM_SMEM 182 select QCOM_SMEM_STATE 183 select IRQ_DOMAIN 184 help 185 Say yes here to support the Qualcomm Shared Memory State Machine. 186 The state machine is represented by bits in shared memory. 187 188config QCOM_SOCINFO 189 tristate "Qualcomm socinfo driver" 190 depends on QCOM_SMEM 191 select SOC_BUS 192 help 193 Say yes here to support the Qualcomm socinfo driver, providing 194 information about the SoC to user space. 195 196config QCOM_SPM 197 tristate "Qualcomm Subsystem Power Manager (SPM)" 198 depends on ARCH_QCOM || COMPILE_TEST 199 select QCOM_SCM 200 help 201 Enable the support for the Qualcomm Subsystem Power Manager, used 202 to manage cores, L2 low power modes and to configure the internal 203 Adaptive Voltage Scaler parameters, where supported. 204 205config QCOM_STATS 206 tristate "Qualcomm Technologies, Inc. (QTI) Sleep stats driver" 207 depends on (ARCH_QCOM && DEBUG_FS) || COMPILE_TEST 208 depends on QCOM_SMEM 209 help 210 Qualcomm Technologies, Inc. (QTI) Sleep stats driver to read 211 the shared memory exported by the remote processor related to 212 various SoC level low power modes statistics and export to debugfs 213 interface. 214 215config QCOM_WCNSS_CTRL 216 tristate "Qualcomm WCNSS control driver" 217 depends on ARCH_QCOM || COMPILE_TEST 218 depends on RPMSG 219 help 220 Client driver for the WCNSS_CTRL SMD channel, used to download nv 221 firmware to a newly booted WCNSS chip. 222 223config QCOM_APR 224 tristate "Qualcomm APR/GPR Bus (Asynchronous/Generic Packet Router)" 225 depends on ARCH_QCOM || COMPILE_TEST 226 depends on RPMSG 227 depends on NET 228 select QCOM_PDR_HELPERS 229 help 230 Enable APR IPC protocol support between 231 application processor and QDSP6. APR is 232 used by audio driver to configure QDSP6 233 ASM, ADM and AFE modules. 234 235config QCOM_ICC_BWMON 236 tristate "QCOM Interconnect Bandwidth Monitor driver" 237 depends on ARCH_QCOM || COMPILE_TEST 238 select PM_OPP 239 help 240 Sets up driver monitoring bandwidth on various interconnects and 241 based on that voting for interconnect bandwidth, adjusting their 242 speed to current demand. 243 Current implementation brings support for BWMON v4, used for example 244 on SDM845 to measure bandwidth between CPU (gladiator_noc) and Last 245 Level Cache (memnoc). Usage of this BWMON allows to remove some of 246 the fixed bandwidth votes from cpufreq (CPU nodes) thus achieve high 247 memory throughput even with lower CPU frequencies. 248 249endmenu 250