xref: /openbmc/linux/drivers/soc/mediatek/mtk-mmsys.c (revision da1d9caf)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (c) 2014 MediaTek Inc.
4  * Author: James Liao <jamesjj.liao@mediatek.com>
5  */
6 
7 #include <linux/delay.h>
8 #include <linux/device.h>
9 #include <linux/io.h>
10 #include <linux/of_device.h>
11 #include <linux/platform_device.h>
12 #include <linux/reset-controller.h>
13 #include <linux/soc/mediatek/mtk-mmsys.h>
14 
15 #include "mtk-mmsys.h"
16 #include "mt8167-mmsys.h"
17 #include "mt8183-mmsys.h"
18 #include "mt8186-mmsys.h"
19 #include "mt8192-mmsys.h"
20 #include "mt8195-mmsys.h"
21 #include "mt8365-mmsys.h"
22 
23 static const struct mtk_mmsys_driver_data mt2701_mmsys_driver_data = {
24 	.clk_driver = "clk-mt2701-mm",
25 	.routes = mmsys_default_routing_table,
26 	.num_routes = ARRAY_SIZE(mmsys_default_routing_table),
27 };
28 
29 static const struct mtk_mmsys_match_data mt2701_mmsys_match_data = {
30 	.num_drv_data = 1,
31 	.drv_data = {
32 		&mt2701_mmsys_driver_data,
33 	},
34 };
35 
36 static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
37 	.clk_driver = "clk-mt2712-mm",
38 	.routes = mmsys_default_routing_table,
39 	.num_routes = ARRAY_SIZE(mmsys_default_routing_table),
40 };
41 
42 static const struct mtk_mmsys_match_data mt2712_mmsys_match_data = {
43 	.num_drv_data = 1,
44 	.drv_data = {
45 		&mt2712_mmsys_driver_data,
46 	},
47 };
48 
49 static const struct mtk_mmsys_driver_data mt6779_mmsys_driver_data = {
50 	.clk_driver = "clk-mt6779-mm",
51 };
52 
53 static const struct mtk_mmsys_match_data mt6779_mmsys_match_data = {
54 	.num_drv_data = 1,
55 	.drv_data = {
56 		&mt6779_mmsys_driver_data,
57 	},
58 };
59 
60 static const struct mtk_mmsys_driver_data mt6797_mmsys_driver_data = {
61 	.clk_driver = "clk-mt6797-mm",
62 };
63 
64 static const struct mtk_mmsys_match_data mt6797_mmsys_match_data = {
65 	.num_drv_data = 1,
66 	.drv_data = {
67 		&mt6797_mmsys_driver_data,
68 	},
69 };
70 
71 static const struct mtk_mmsys_driver_data mt8167_mmsys_driver_data = {
72 	.clk_driver = "clk-mt8167-mm",
73 	.routes = mt8167_mmsys_routing_table,
74 	.num_routes = ARRAY_SIZE(mt8167_mmsys_routing_table),
75 };
76 
77 static const struct mtk_mmsys_match_data mt8167_mmsys_match_data = {
78 	.num_drv_data = 1,
79 	.drv_data = {
80 		&mt8167_mmsys_driver_data,
81 	},
82 };
83 
84 static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
85 	.clk_driver = "clk-mt8173-mm",
86 	.routes = mmsys_default_routing_table,
87 	.num_routes = ARRAY_SIZE(mmsys_default_routing_table),
88 	.sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
89 };
90 
91 static const struct mtk_mmsys_match_data mt8173_mmsys_match_data = {
92 	.num_drv_data = 1,
93 	.drv_data = {
94 		&mt8173_mmsys_driver_data,
95 	},
96 };
97 
98 static const struct mtk_mmsys_driver_data mt8183_mmsys_driver_data = {
99 	.clk_driver = "clk-mt8183-mm",
100 	.routes = mmsys_mt8183_routing_table,
101 	.num_routes = ARRAY_SIZE(mmsys_mt8183_routing_table),
102 	.sw0_rst_offset = MT8183_MMSYS_SW0_RST_B,
103 };
104 
105 static const struct mtk_mmsys_match_data mt8183_mmsys_match_data = {
106 	.num_drv_data = 1,
107 	.drv_data = {
108 		&mt8183_mmsys_driver_data,
109 	},
110 };
111 
112 static const struct mtk_mmsys_driver_data mt8186_mmsys_driver_data = {
113 	.clk_driver = "clk-mt8186-mm",
114 	.routes = mmsys_mt8186_routing_table,
115 	.num_routes = ARRAY_SIZE(mmsys_mt8186_routing_table),
116 	.sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,
117 };
118 
119 static const struct mtk_mmsys_match_data mt8186_mmsys_match_data = {
120 	.num_drv_data = 1,
121 	.drv_data = {
122 		&mt8186_mmsys_driver_data,
123 	},
124 };
125 
126 static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = {
127 	.clk_driver = "clk-mt8192-mm",
128 	.routes = mmsys_mt8192_routing_table,
129 	.num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table),
130 	.sw0_rst_offset = MT8186_MMSYS_SW0_RST_B,
131 };
132 
133 static const struct mtk_mmsys_match_data mt8192_mmsys_match_data = {
134 	.num_drv_data = 1,
135 	.drv_data = {
136 		&mt8192_mmsys_driver_data,
137 	},
138 };
139 
140 static const struct mtk_mmsys_driver_data mt8195_vdosys0_driver_data = {
141 	.io_start = 0x1c01a000,
142 	.clk_driver = "clk-mt8195-vdo0",
143 	.routes = mmsys_mt8195_routing_table,
144 	.num_routes = ARRAY_SIZE(mmsys_mt8195_routing_table),
145 };
146 
147 static const struct mtk_mmsys_driver_data mt8195_vdosys1_driver_data = {
148 	.io_start = 0x1c100000,
149 	.clk_driver = "clk-mt8195-vdo1",
150 };
151 
152 static const struct mtk_mmsys_match_data mt8195_mmsys_match_data = {
153 	.num_drv_data = 2,
154 	.drv_data = {
155 		&mt8195_vdosys0_driver_data,
156 		&mt8195_vdosys1_driver_data,
157 	},
158 };
159 
160 static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
161 	.clk_driver = "clk-mt8365-mm",
162 	.routes = mt8365_mmsys_routing_table,
163 	.num_routes = ARRAY_SIZE(mt8365_mmsys_routing_table),
164 };
165 
166 static const struct mtk_mmsys_match_data mt8365_mmsys_match_data = {
167 	.num_drv_data = 1,
168 	.drv_data = {
169 		&mt8365_mmsys_driver_data,
170 	},
171 };
172 
173 struct mtk_mmsys {
174 	void __iomem *regs;
175 	const struct mtk_mmsys_driver_data *data;
176 	spinlock_t lock; /* protects mmsys_sw_rst_b reg */
177 	struct reset_controller_dev rcdev;
178 	phys_addr_t io_start;
179 };
180 
181 static int mtk_mmsys_find_match_drvdata(struct mtk_mmsys *mmsys,
182 					const struct mtk_mmsys_match_data *match)
183 {
184 	int i;
185 
186 	for (i = 0; i < match->num_drv_data; i++)
187 		if (mmsys->io_start == match->drv_data[i]->io_start)
188 			return i;
189 
190 	return -EINVAL;
191 }
192 
193 void mtk_mmsys_ddp_connect(struct device *dev,
194 			   enum mtk_ddp_comp_id cur,
195 			   enum mtk_ddp_comp_id next)
196 {
197 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
198 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
199 	u32 reg;
200 	int i;
201 
202 	for (i = 0; i < mmsys->data->num_routes; i++)
203 		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
204 			reg = readl_relaxed(mmsys->regs + routes[i].addr);
205 			reg &= ~routes[i].mask;
206 			reg |= routes[i].val;
207 			writel_relaxed(reg, mmsys->regs + routes[i].addr);
208 		}
209 }
210 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_connect);
211 
212 void mtk_mmsys_ddp_disconnect(struct device *dev,
213 			      enum mtk_ddp_comp_id cur,
214 			      enum mtk_ddp_comp_id next)
215 {
216 	struct mtk_mmsys *mmsys = dev_get_drvdata(dev);
217 	const struct mtk_mmsys_routes *routes = mmsys->data->routes;
218 	u32 reg;
219 	int i;
220 
221 	for (i = 0; i < mmsys->data->num_routes; i++)
222 		if (cur == routes[i].from_comp && next == routes[i].to_comp) {
223 			reg = readl_relaxed(mmsys->regs + routes[i].addr);
224 			reg &= ~routes[i].mask;
225 			writel_relaxed(reg, mmsys->regs + routes[i].addr);
226 		}
227 }
228 EXPORT_SYMBOL_GPL(mtk_mmsys_ddp_disconnect);
229 
230 static int mtk_mmsys_reset_update(struct reset_controller_dev *rcdev, unsigned long id,
231 				  bool assert)
232 {
233 	struct mtk_mmsys *mmsys = container_of(rcdev, struct mtk_mmsys, rcdev);
234 	unsigned long flags;
235 	u32 reg;
236 
237 	spin_lock_irqsave(&mmsys->lock, flags);
238 
239 	reg = readl_relaxed(mmsys->regs + mmsys->data->sw0_rst_offset);
240 
241 	if (assert)
242 		reg &= ~BIT(id);
243 	else
244 		reg |= BIT(id);
245 
246 	writel_relaxed(reg, mmsys->regs + mmsys->data->sw0_rst_offset);
247 
248 	spin_unlock_irqrestore(&mmsys->lock, flags);
249 
250 	return 0;
251 }
252 
253 static int mtk_mmsys_reset_assert(struct reset_controller_dev *rcdev, unsigned long id)
254 {
255 	return mtk_mmsys_reset_update(rcdev, id, true);
256 }
257 
258 static int mtk_mmsys_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id)
259 {
260 	return mtk_mmsys_reset_update(rcdev, id, false);
261 }
262 
263 static int mtk_mmsys_reset(struct reset_controller_dev *rcdev, unsigned long id)
264 {
265 	int ret;
266 
267 	ret = mtk_mmsys_reset_assert(rcdev, id);
268 	if (ret)
269 		return ret;
270 
271 	usleep_range(1000, 1100);
272 
273 	return mtk_mmsys_reset_deassert(rcdev, id);
274 }
275 
276 static const struct reset_control_ops mtk_mmsys_reset_ops = {
277 	.assert = mtk_mmsys_reset_assert,
278 	.deassert = mtk_mmsys_reset_deassert,
279 	.reset = mtk_mmsys_reset,
280 };
281 
282 static int mtk_mmsys_probe(struct platform_device *pdev)
283 {
284 	struct device *dev = &pdev->dev;
285 	struct platform_device *clks;
286 	struct platform_device *drm;
287 	const struct mtk_mmsys_match_data *match_data;
288 	struct mtk_mmsys *mmsys;
289 	struct resource *res;
290 	int ret;
291 
292 	mmsys = devm_kzalloc(dev, sizeof(*mmsys), GFP_KERNEL);
293 	if (!mmsys)
294 		return -ENOMEM;
295 
296 	mmsys->regs = devm_platform_ioremap_resource(pdev, 0);
297 	if (IS_ERR(mmsys->regs)) {
298 		ret = PTR_ERR(mmsys->regs);
299 		dev_err(dev, "Failed to ioremap mmsys registers: %d\n", ret);
300 		return ret;
301 	}
302 
303 	spin_lock_init(&mmsys->lock);
304 
305 	mmsys->rcdev.owner = THIS_MODULE;
306 	mmsys->rcdev.nr_resets = 32;
307 	mmsys->rcdev.ops = &mtk_mmsys_reset_ops;
308 	mmsys->rcdev.of_node = pdev->dev.of_node;
309 	ret = devm_reset_controller_register(&pdev->dev, &mmsys->rcdev);
310 	if (ret) {
311 		dev_err(&pdev->dev, "Couldn't register mmsys reset controller: %d\n", ret);
312 		return ret;
313 	}
314 
315 	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
316 	if (!res) {
317 		dev_err(dev, "Couldn't get mmsys resource\n");
318 		return -EINVAL;
319 	}
320 	mmsys->io_start = res->start;
321 
322 	match_data = of_device_get_match_data(dev);
323 	if (match_data->num_drv_data > 1) {
324 		/* This SoC has multiple mmsys channels */
325 		ret = mtk_mmsys_find_match_drvdata(mmsys, match_data);
326 		if (ret < 0) {
327 			dev_err(dev, "Couldn't get match driver data\n");
328 			return ret;
329 		}
330 		mmsys->data = match_data->drv_data[ret];
331 	} else {
332 		dev_dbg(dev, "Using single mmsys channel\n");
333 		mmsys->data = match_data->drv_data[0];
334 	}
335 
336 	platform_set_drvdata(pdev, mmsys);
337 
338 	clks = platform_device_register_data(&pdev->dev, mmsys->data->clk_driver,
339 					     PLATFORM_DEVID_AUTO, NULL, 0);
340 	if (IS_ERR(clks))
341 		return PTR_ERR(clks);
342 
343 	drm = platform_device_register_data(&pdev->dev, "mediatek-drm",
344 					    PLATFORM_DEVID_AUTO, NULL, 0);
345 	if (IS_ERR(drm)) {
346 		platform_device_unregister(clks);
347 		return PTR_ERR(drm);
348 	}
349 
350 	return 0;
351 }
352 
353 static const struct of_device_id of_match_mtk_mmsys[] = {
354 	{
355 		.compatible = "mediatek,mt2701-mmsys",
356 		.data = &mt2701_mmsys_match_data,
357 	},
358 	{
359 		.compatible = "mediatek,mt2712-mmsys",
360 		.data = &mt2712_mmsys_match_data,
361 	},
362 	{
363 		.compatible = "mediatek,mt6779-mmsys",
364 		.data = &mt6779_mmsys_match_data,
365 	},
366 	{
367 		.compatible = "mediatek,mt6797-mmsys",
368 		.data = &mt6797_mmsys_match_data,
369 	},
370 	{
371 		.compatible = "mediatek,mt8167-mmsys",
372 		.data = &mt8167_mmsys_match_data,
373 	},
374 	{
375 		.compatible = "mediatek,mt8173-mmsys",
376 		.data = &mt8173_mmsys_match_data,
377 	},
378 	{
379 		.compatible = "mediatek,mt8183-mmsys",
380 		.data = &mt8183_mmsys_match_data,
381 	},
382 	{
383 		.compatible = "mediatek,mt8186-mmsys",
384 		.data = &mt8186_mmsys_match_data,
385 	},
386 	{
387 		.compatible = "mediatek,mt8192-mmsys",
388 		.data = &mt8192_mmsys_match_data,
389 	},
390 	{
391 		.compatible = "mediatek,mt8195-mmsys",
392 		.data = &mt8195_mmsys_match_data,
393 	},
394 	{
395 		.compatible = "mediatek,mt8365-mmsys",
396 		.data = &mt8365_mmsys_match_data,
397 	},
398 	{ }
399 };
400 
401 static struct platform_driver mtk_mmsys_drv = {
402 	.driver = {
403 		.name = "mtk-mmsys",
404 		.of_match_table = of_match_mtk_mmsys,
405 	},
406 	.probe = mtk_mmsys_probe,
407 };
408 
409 builtin_platform_driver(mtk_mmsys_drv);
410