1 // SPDX-License-Identifier: GPL-2.0 2 // 3 // Copyright (c) 2018 MediaTek Inc. 4 5 #include <linux/completion.h> 6 #include <linux/errno.h> 7 #include <linux/dma-mapping.h> 8 #include <linux/module.h> 9 #include <linux/mailbox_controller.h> 10 #include <linux/soc/mediatek/mtk-cmdq.h> 11 12 #define CMDQ_WRITE_ENABLE_MASK BIT(0) 13 #define CMDQ_POLL_ENABLE_MASK BIT(0) 14 #define CMDQ_EOC_IRQ_EN BIT(0) 15 #define CMDQ_REG_TYPE 1 16 #define CMDQ_JUMP_RELATIVE 1 17 18 struct cmdq_instruction { 19 union { 20 u32 value; 21 u32 mask; 22 struct { 23 u16 arg_c; 24 u16 src_reg; 25 }; 26 }; 27 union { 28 u16 offset; 29 u16 event; 30 u16 reg_dst; 31 }; 32 union { 33 u8 subsys; 34 struct { 35 u8 sop:5; 36 u8 arg_c_t:1; 37 u8 src_t:1; 38 u8 dst_t:1; 39 }; 40 }; 41 u8 op; 42 }; 43 44 int cmdq_dev_get_client_reg(struct device *dev, 45 struct cmdq_client_reg *client_reg, int idx) 46 { 47 struct of_phandle_args spec; 48 int err; 49 50 if (!client_reg) 51 return -ENOENT; 52 53 err = of_parse_phandle_with_fixed_args(dev->of_node, 54 "mediatek,gce-client-reg", 55 3, idx, &spec); 56 if (err < 0) { 57 dev_err(dev, 58 "error %d can't parse gce-client-reg property (%d)", 59 err, idx); 60 61 return err; 62 } 63 64 client_reg->subsys = (u8)spec.args[0]; 65 client_reg->offset = (u16)spec.args[1]; 66 client_reg->size = (u16)spec.args[2]; 67 of_node_put(spec.np); 68 69 return 0; 70 } 71 EXPORT_SYMBOL(cmdq_dev_get_client_reg); 72 73 static void cmdq_client_timeout(struct timer_list *t) 74 { 75 struct cmdq_client *client = from_timer(client, t, timer); 76 77 dev_err(client->client.dev, "cmdq timeout!\n"); 78 } 79 80 struct cmdq_client *cmdq_mbox_create(struct device *dev, int index, u32 timeout) 81 { 82 struct cmdq_client *client; 83 84 client = kzalloc(sizeof(*client), GFP_KERNEL); 85 if (!client) 86 return (struct cmdq_client *)-ENOMEM; 87 88 client->timeout_ms = timeout; 89 if (timeout != CMDQ_NO_TIMEOUT) { 90 spin_lock_init(&client->lock); 91 timer_setup(&client->timer, cmdq_client_timeout, 0); 92 } 93 client->pkt_cnt = 0; 94 client->client.dev = dev; 95 client->client.tx_block = false; 96 client->client.knows_txdone = true; 97 client->chan = mbox_request_channel(&client->client, index); 98 99 if (IS_ERR(client->chan)) { 100 long err; 101 102 dev_err(dev, "failed to request channel\n"); 103 err = PTR_ERR(client->chan); 104 kfree(client); 105 106 return ERR_PTR(err); 107 } 108 109 return client; 110 } 111 EXPORT_SYMBOL(cmdq_mbox_create); 112 113 void cmdq_mbox_destroy(struct cmdq_client *client) 114 { 115 if (client->timeout_ms != CMDQ_NO_TIMEOUT) { 116 spin_lock(&client->lock); 117 del_timer_sync(&client->timer); 118 spin_unlock(&client->lock); 119 } 120 mbox_free_channel(client->chan); 121 kfree(client); 122 } 123 EXPORT_SYMBOL(cmdq_mbox_destroy); 124 125 struct cmdq_pkt *cmdq_pkt_create(struct cmdq_client *client, size_t size) 126 { 127 struct cmdq_pkt *pkt; 128 struct device *dev; 129 dma_addr_t dma_addr; 130 131 pkt = kzalloc(sizeof(*pkt), GFP_KERNEL); 132 if (!pkt) 133 return ERR_PTR(-ENOMEM); 134 pkt->va_base = kzalloc(size, GFP_KERNEL); 135 if (!pkt->va_base) { 136 kfree(pkt); 137 return ERR_PTR(-ENOMEM); 138 } 139 pkt->buf_size = size; 140 pkt->cl = (void *)client; 141 142 dev = client->chan->mbox->dev; 143 dma_addr = dma_map_single(dev, pkt->va_base, pkt->buf_size, 144 DMA_TO_DEVICE); 145 if (dma_mapping_error(dev, dma_addr)) { 146 dev_err(dev, "dma map failed, size=%u\n", (u32)(u64)size); 147 kfree(pkt->va_base); 148 kfree(pkt); 149 return ERR_PTR(-ENOMEM); 150 } 151 152 pkt->pa_base = dma_addr; 153 154 return pkt; 155 } 156 EXPORT_SYMBOL(cmdq_pkt_create); 157 158 void cmdq_pkt_destroy(struct cmdq_pkt *pkt) 159 { 160 struct cmdq_client *client = (struct cmdq_client *)pkt->cl; 161 162 dma_unmap_single(client->chan->mbox->dev, pkt->pa_base, pkt->buf_size, 163 DMA_TO_DEVICE); 164 kfree(pkt->va_base); 165 kfree(pkt); 166 } 167 EXPORT_SYMBOL(cmdq_pkt_destroy); 168 169 static int cmdq_pkt_append_command(struct cmdq_pkt *pkt, 170 struct cmdq_instruction inst) 171 { 172 struct cmdq_instruction *cmd_ptr; 173 174 if (unlikely(pkt->cmd_buf_size + CMDQ_INST_SIZE > pkt->buf_size)) { 175 /* 176 * In the case of allocated buffer size (pkt->buf_size) is used 177 * up, the real required size (pkt->cmdq_buf_size) is still 178 * increased, so that the user knows how much memory should be 179 * ultimately allocated after appending all commands and 180 * flushing the command packet. Therefor, the user can call 181 * cmdq_pkt_create() again with the real required buffer size. 182 */ 183 pkt->cmd_buf_size += CMDQ_INST_SIZE; 184 WARN_ONCE(1, "%s: buffer size %u is too small !\n", 185 __func__, (u32)pkt->buf_size); 186 return -ENOMEM; 187 } 188 189 cmd_ptr = pkt->va_base + pkt->cmd_buf_size; 190 *cmd_ptr = inst; 191 pkt->cmd_buf_size += CMDQ_INST_SIZE; 192 193 return 0; 194 } 195 196 int cmdq_pkt_write(struct cmdq_pkt *pkt, u8 subsys, u16 offset, u32 value) 197 { 198 struct cmdq_instruction inst; 199 200 inst.op = CMDQ_CODE_WRITE; 201 inst.value = value; 202 inst.offset = offset; 203 inst.subsys = subsys; 204 205 return cmdq_pkt_append_command(pkt, inst); 206 } 207 EXPORT_SYMBOL(cmdq_pkt_write); 208 209 int cmdq_pkt_write_mask(struct cmdq_pkt *pkt, u8 subsys, 210 u16 offset, u32 value, u32 mask) 211 { 212 struct cmdq_instruction inst = { {0} }; 213 u16 offset_mask = offset; 214 int err; 215 216 if (mask != 0xffffffff) { 217 inst.op = CMDQ_CODE_MASK; 218 inst.mask = ~mask; 219 err = cmdq_pkt_append_command(pkt, inst); 220 if (err < 0) 221 return err; 222 223 offset_mask |= CMDQ_WRITE_ENABLE_MASK; 224 } 225 err = cmdq_pkt_write(pkt, subsys, offset_mask, value); 226 227 return err; 228 } 229 EXPORT_SYMBOL(cmdq_pkt_write_mask); 230 231 int cmdq_pkt_read_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, u16 addr_low, 232 u16 reg_idx) 233 { 234 struct cmdq_instruction inst = {}; 235 236 inst.op = CMDQ_CODE_READ_S; 237 inst.dst_t = CMDQ_REG_TYPE; 238 inst.sop = high_addr_reg_idx; 239 inst.reg_dst = reg_idx; 240 inst.src_reg = addr_low; 241 242 return cmdq_pkt_append_command(pkt, inst); 243 } 244 EXPORT_SYMBOL(cmdq_pkt_read_s); 245 246 int cmdq_pkt_write_s(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, 247 u16 addr_low, u16 src_reg_idx) 248 { 249 struct cmdq_instruction inst = {}; 250 251 inst.op = CMDQ_CODE_WRITE_S; 252 inst.src_t = CMDQ_REG_TYPE; 253 inst.sop = high_addr_reg_idx; 254 inst.offset = addr_low; 255 inst.src_reg = src_reg_idx; 256 257 return cmdq_pkt_append_command(pkt, inst); 258 } 259 EXPORT_SYMBOL(cmdq_pkt_write_s); 260 261 int cmdq_pkt_write_s_mask(struct cmdq_pkt *pkt, u16 high_addr_reg_idx, 262 u16 addr_low, u16 src_reg_idx, u32 mask) 263 { 264 struct cmdq_instruction inst = {}; 265 int err; 266 267 inst.op = CMDQ_CODE_MASK; 268 inst.mask = ~mask; 269 err = cmdq_pkt_append_command(pkt, inst); 270 if (err < 0) 271 return err; 272 273 inst.mask = 0; 274 inst.op = CMDQ_CODE_WRITE_S_MASK; 275 inst.src_t = CMDQ_REG_TYPE; 276 inst.sop = high_addr_reg_idx; 277 inst.offset = addr_low; 278 inst.src_reg = src_reg_idx; 279 280 return cmdq_pkt_append_command(pkt, inst); 281 } 282 EXPORT_SYMBOL(cmdq_pkt_write_s_mask); 283 284 int cmdq_pkt_write_s_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, 285 u16 addr_low, u32 value) 286 { 287 struct cmdq_instruction inst = {}; 288 289 inst.op = CMDQ_CODE_WRITE_S; 290 inst.sop = high_addr_reg_idx; 291 inst.offset = addr_low; 292 inst.value = value; 293 294 return cmdq_pkt_append_command(pkt, inst); 295 } 296 EXPORT_SYMBOL(cmdq_pkt_write_s_value); 297 298 int cmdq_pkt_write_s_mask_value(struct cmdq_pkt *pkt, u8 high_addr_reg_idx, 299 u16 addr_low, u32 value, u32 mask) 300 { 301 struct cmdq_instruction inst = {}; 302 int err; 303 304 inst.op = CMDQ_CODE_MASK; 305 inst.mask = ~mask; 306 err = cmdq_pkt_append_command(pkt, inst); 307 if (err < 0) 308 return err; 309 310 inst.op = CMDQ_CODE_WRITE_S_MASK; 311 inst.sop = high_addr_reg_idx; 312 inst.offset = addr_low; 313 inst.value = value; 314 315 return cmdq_pkt_append_command(pkt, inst); 316 } 317 EXPORT_SYMBOL(cmdq_pkt_write_s_mask_value); 318 319 int cmdq_pkt_wfe(struct cmdq_pkt *pkt, u16 event, bool clear) 320 { 321 struct cmdq_instruction inst = { {0} }; 322 u32 clear_option = clear ? CMDQ_WFE_UPDATE : 0; 323 324 if (event >= CMDQ_MAX_EVENT) 325 return -EINVAL; 326 327 inst.op = CMDQ_CODE_WFE; 328 inst.value = CMDQ_WFE_OPTION | clear_option; 329 inst.event = event; 330 331 return cmdq_pkt_append_command(pkt, inst); 332 } 333 EXPORT_SYMBOL(cmdq_pkt_wfe); 334 335 int cmdq_pkt_clear_event(struct cmdq_pkt *pkt, u16 event) 336 { 337 struct cmdq_instruction inst = { {0} }; 338 339 if (event >= CMDQ_MAX_EVENT) 340 return -EINVAL; 341 342 inst.op = CMDQ_CODE_WFE; 343 inst.value = CMDQ_WFE_UPDATE; 344 inst.event = event; 345 346 return cmdq_pkt_append_command(pkt, inst); 347 } 348 EXPORT_SYMBOL(cmdq_pkt_clear_event); 349 350 int cmdq_pkt_set_event(struct cmdq_pkt *pkt, u16 event) 351 { 352 struct cmdq_instruction inst = {}; 353 354 if (event >= CMDQ_MAX_EVENT) 355 return -EINVAL; 356 357 inst.op = CMDQ_CODE_WFE; 358 inst.value = CMDQ_WFE_UPDATE | CMDQ_WFE_UPDATE_VALUE; 359 inst.event = event; 360 361 return cmdq_pkt_append_command(pkt, inst); 362 } 363 EXPORT_SYMBOL(cmdq_pkt_set_event); 364 365 int cmdq_pkt_poll(struct cmdq_pkt *pkt, u8 subsys, 366 u16 offset, u32 value) 367 { 368 struct cmdq_instruction inst = { {0} }; 369 int err; 370 371 inst.op = CMDQ_CODE_POLL; 372 inst.value = value; 373 inst.offset = offset; 374 inst.subsys = subsys; 375 err = cmdq_pkt_append_command(pkt, inst); 376 377 return err; 378 } 379 EXPORT_SYMBOL(cmdq_pkt_poll); 380 381 int cmdq_pkt_poll_mask(struct cmdq_pkt *pkt, u8 subsys, 382 u16 offset, u32 value, u32 mask) 383 { 384 struct cmdq_instruction inst = { {0} }; 385 int err; 386 387 inst.op = CMDQ_CODE_MASK; 388 inst.mask = ~mask; 389 err = cmdq_pkt_append_command(pkt, inst); 390 if (err < 0) 391 return err; 392 393 offset = offset | CMDQ_POLL_ENABLE_MASK; 394 err = cmdq_pkt_poll(pkt, subsys, offset, value); 395 396 return err; 397 } 398 EXPORT_SYMBOL(cmdq_pkt_poll_mask); 399 400 int cmdq_pkt_assign(struct cmdq_pkt *pkt, u16 reg_idx, u32 value) 401 { 402 struct cmdq_instruction inst = {}; 403 404 inst.op = CMDQ_CODE_LOGIC; 405 inst.dst_t = CMDQ_REG_TYPE; 406 inst.reg_dst = reg_idx; 407 inst.value = value; 408 return cmdq_pkt_append_command(pkt, inst); 409 } 410 EXPORT_SYMBOL(cmdq_pkt_assign); 411 412 int cmdq_pkt_jump(struct cmdq_pkt *pkt, dma_addr_t addr) 413 { 414 struct cmdq_instruction inst = {}; 415 416 inst.op = CMDQ_CODE_JUMP; 417 inst.offset = CMDQ_JUMP_RELATIVE; 418 inst.value = addr >> 419 cmdq_get_shift_pa(((struct cmdq_client *)pkt->cl)->chan); 420 return cmdq_pkt_append_command(pkt, inst); 421 } 422 EXPORT_SYMBOL(cmdq_pkt_jump); 423 424 int cmdq_pkt_finalize(struct cmdq_pkt *pkt) 425 { 426 struct cmdq_instruction inst = { {0} }; 427 int err; 428 429 /* insert EOC and generate IRQ for each command iteration */ 430 inst.op = CMDQ_CODE_EOC; 431 inst.value = CMDQ_EOC_IRQ_EN; 432 err = cmdq_pkt_append_command(pkt, inst); 433 if (err < 0) 434 return err; 435 436 /* JUMP to end */ 437 inst.op = CMDQ_CODE_JUMP; 438 inst.value = CMDQ_JUMP_PASS >> 439 cmdq_get_shift_pa(((struct cmdq_client *)pkt->cl)->chan); 440 err = cmdq_pkt_append_command(pkt, inst); 441 442 return err; 443 } 444 EXPORT_SYMBOL(cmdq_pkt_finalize); 445 446 static void cmdq_pkt_flush_async_cb(struct cmdq_cb_data data) 447 { 448 struct cmdq_pkt *pkt = (struct cmdq_pkt *)data.data; 449 struct cmdq_task_cb *cb = &pkt->cb; 450 struct cmdq_client *client = (struct cmdq_client *)pkt->cl; 451 452 if (client->timeout_ms != CMDQ_NO_TIMEOUT) { 453 unsigned long flags = 0; 454 455 spin_lock_irqsave(&client->lock, flags); 456 if (--client->pkt_cnt == 0) 457 del_timer(&client->timer); 458 else 459 mod_timer(&client->timer, jiffies + 460 msecs_to_jiffies(client->timeout_ms)); 461 spin_unlock_irqrestore(&client->lock, flags); 462 } 463 464 dma_sync_single_for_cpu(client->chan->mbox->dev, pkt->pa_base, 465 pkt->cmd_buf_size, DMA_TO_DEVICE); 466 if (cb->cb) { 467 data.data = cb->data; 468 cb->cb(data); 469 } 470 } 471 472 int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb, 473 void *data) 474 { 475 int err; 476 unsigned long flags = 0; 477 struct cmdq_client *client = (struct cmdq_client *)pkt->cl; 478 479 pkt->cb.cb = cb; 480 pkt->cb.data = data; 481 pkt->async_cb.cb = cmdq_pkt_flush_async_cb; 482 pkt->async_cb.data = pkt; 483 484 dma_sync_single_for_device(client->chan->mbox->dev, pkt->pa_base, 485 pkt->cmd_buf_size, DMA_TO_DEVICE); 486 487 if (client->timeout_ms != CMDQ_NO_TIMEOUT) { 488 spin_lock_irqsave(&client->lock, flags); 489 if (client->pkt_cnt++ == 0) 490 mod_timer(&client->timer, jiffies + 491 msecs_to_jiffies(client->timeout_ms)); 492 spin_unlock_irqrestore(&client->lock, flags); 493 } 494 495 err = mbox_send_message(client->chan, pkt); 496 if (err < 0) 497 return err; 498 /* We can send next packet immediately, so just call txdone. */ 499 mbox_client_txdone(client->chan, 0); 500 501 return 0; 502 } 503 EXPORT_SYMBOL(cmdq_pkt_flush_async); 504 505 struct cmdq_flush_completion { 506 struct completion cmplt; 507 bool err; 508 }; 509 510 static void cmdq_pkt_flush_cb(struct cmdq_cb_data data) 511 { 512 struct cmdq_flush_completion *cmplt; 513 514 cmplt = (struct cmdq_flush_completion *)data.data; 515 if (data.sta != CMDQ_CB_NORMAL) 516 cmplt->err = true; 517 else 518 cmplt->err = false; 519 complete(&cmplt->cmplt); 520 } 521 522 int cmdq_pkt_flush(struct cmdq_pkt *pkt) 523 { 524 struct cmdq_flush_completion cmplt; 525 int err; 526 527 init_completion(&cmplt.cmplt); 528 err = cmdq_pkt_flush_async(pkt, cmdq_pkt_flush_cb, &cmplt); 529 if (err < 0) 530 return err; 531 wait_for_completion(&cmplt.cmplt); 532 533 return cmplt.err ? -EFAULT : 0; 534 } 535 EXPORT_SYMBOL(cmdq_pkt_flush); 536 537 MODULE_LICENSE("GPL v2"); 538