1bc3fc5c0SFabien Parent /* SPDX-License-Identifier: GPL-2.0-only */
2bc3fc5c0SFabien Parent 
3bc3fc5c0SFabien Parent #ifndef __SOC_MEDIATEK_MT8365_MMSYS_H
4bc3fc5c0SFabien Parent #define __SOC_MEDIATEK_MT8365_MMSYS_H
5bc3fc5c0SFabien Parent 
6bc3fc5c0SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN	0xf3c
7bc3fc5c0SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL	0xf4c
8bc3fc5c0SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_DITHER0_MOUT_EN	0xf50
9bc3fc5c0SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_RDMA0_SEL_IN	0xf54
10bc3fc5c0SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_RDMA0_RSZ0_SEL_IN	0xf60
11bc3fc5c0SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN	0xf64
12bc3fc5c0SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN		0xf68
13*38077cb3SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_RDMA1_SOUT_SEL	0xfd0
14*38077cb3SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_DPI0_SEL_IN		0xfd8
15*38077cb3SFabien Parent #define MT8365_DISP_REG_CONFIG_DISP_LVDS_SYS_CFG_00	0xfdc
16bc3fc5c0SFabien Parent 
17bc3fc5c0SFabien Parent #define MT8365_RDMA0_SOUT_COLOR0			0x1
18bc3fc5c0SFabien Parent #define MT8365_DITHER_MOUT_EN_DSI0			0x1
19bc3fc5c0SFabien Parent #define MT8365_DSI0_SEL_IN_DITHER			0x1
20bc3fc5c0SFabien Parent #define MT8365_RDMA0_SEL_IN_OVL0			0x0
21bc3fc5c0SFabien Parent #define MT8365_RDMA0_RSZ0_SEL_IN_RDMA0			0x0
22bc3fc5c0SFabien Parent #define MT8365_DISP_COLOR_SEL_IN_COLOR0			0x0
23bc3fc5c0SFabien Parent #define MT8365_OVL0_MOUT_PATH0_SEL			BIT(0)
24*38077cb3SFabien Parent #define MT8365_RDMA1_SOUT_DPI0				0x1
25*38077cb3SFabien Parent #define MT8365_DPI0_SEL_IN_RDMA1			0x0
26*38077cb3SFabien Parent #define MT8365_LVDS_SYS_CFG_00_SEL_LVDS_PXL_CLK		0x1
27*38077cb3SFabien Parent #define MT8365_DPI0_SEL_IN_RDMA1			0x0
28bc3fc5c0SFabien Parent 
29bc3fc5c0SFabien Parent static const struct mtk_mmsys_routes mt8365_mmsys_routing_table[] = {
30bc3fc5c0SFabien Parent 	{
31bc3fc5c0SFabien Parent 		DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
32bc3fc5c0SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN,
33bc3fc5c0SFabien Parent 		MT8365_OVL0_MOUT_PATH0_SEL, MT8365_OVL0_MOUT_PATH0_SEL
34bc3fc5c0SFabien Parent 	},
35bc3fc5c0SFabien Parent 	{
36bc3fc5c0SFabien Parent 		DDP_COMPONENT_OVL0, DDP_COMPONENT_RDMA0,
37bc3fc5c0SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_RDMA0_SEL_IN,
38bc3fc5c0SFabien Parent 		MT8365_RDMA0_SEL_IN_OVL0, MT8365_RDMA0_SEL_IN_OVL0
39bc3fc5c0SFabien Parent 	},
40bc3fc5c0SFabien Parent 	{
41bc3fc5c0SFabien Parent 		DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
42bc3fc5c0SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_RDMA0_SOUT_SEL,
43bc3fc5c0SFabien Parent 		MT8365_RDMA0_SOUT_COLOR0, MT8365_RDMA0_SOUT_COLOR0
44bc3fc5c0SFabien Parent 	},
45bc3fc5c0SFabien Parent 	{
46bc3fc5c0SFabien Parent 		DDP_COMPONENT_COLOR0, DDP_COMPONENT_CCORR,
47bc3fc5c0SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_COLOR0_SEL_IN,
48bc3fc5c0SFabien Parent 		MT8365_DISP_COLOR_SEL_IN_COLOR0,MT8365_DISP_COLOR_SEL_IN_COLOR0
49bc3fc5c0SFabien Parent 	},
50bc3fc5c0SFabien Parent 	{
514e8988c6Sjason-jh.lin 		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
52bc3fc5c0SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_DITHER0_MOUT_EN,
53bc3fc5c0SFabien Parent 		MT8365_DITHER_MOUT_EN_DSI0, MT8365_DITHER_MOUT_EN_DSI0
54bc3fc5c0SFabien Parent 	},
55bc3fc5c0SFabien Parent 	{
564e8988c6Sjason-jh.lin 		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
57bc3fc5c0SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN,
58bc3fc5c0SFabien Parent 		MT8365_DSI0_SEL_IN_DITHER, MT8365_DSI0_SEL_IN_DITHER
59bc3fc5c0SFabien Parent 	},
60bc3fc5c0SFabien Parent 	{
61bc3fc5c0SFabien Parent 		DDP_COMPONENT_RDMA0, DDP_COMPONENT_COLOR0,
62bc3fc5c0SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_RDMA0_RSZ0_SEL_IN,
63bc3fc5c0SFabien Parent 		MT8365_RDMA0_RSZ0_SEL_IN_RDMA0, MT8365_RDMA0_RSZ0_SEL_IN_RDMA0
64bc3fc5c0SFabien Parent 	},
65*38077cb3SFabien Parent 	{
66*38077cb3SFabien Parent 		DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,
67*38077cb3SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_LVDS_SYS_CFG_00,
68*38077cb3SFabien Parent 		MT8365_LVDS_SYS_CFG_00_SEL_LVDS_PXL_CLK, MT8365_LVDS_SYS_CFG_00_SEL_LVDS_PXL_CLK
69*38077cb3SFabien Parent 	},
70*38077cb3SFabien Parent 	{
71*38077cb3SFabien Parent 		DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,
72*38077cb3SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_DPI0_SEL_IN,
73*38077cb3SFabien Parent 		MT8365_DPI0_SEL_IN_RDMA1, MT8365_DPI0_SEL_IN_RDMA1
74*38077cb3SFabien Parent 	},
75*38077cb3SFabien Parent 	{
76*38077cb3SFabien Parent 		DDP_COMPONENT_RDMA1, DDP_COMPONENT_DPI0,
77*38077cb3SFabien Parent 		MT8365_DISP_REG_CONFIG_DISP_RDMA1_SOUT_SEL,
78*38077cb3SFabien Parent 		MT8365_RDMA1_SOUT_DPI0, MT8365_RDMA1_SOUT_DPI0
79*38077cb3SFabien Parent 	},
80bc3fc5c0SFabien Parent };
81bc3fc5c0SFabien Parent 
82bc3fc5c0SFabien Parent #endif /* __SOC_MEDIATEK_MT8365_MMSYS_H */
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