1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright 2019 NXP. 4 */ 5 6 #include <linux/init.h> 7 #include <linux/io.h> 8 #include <linux/of_address.h> 9 #include <linux/slab.h> 10 #include <linux/sys_soc.h> 11 #include <linux/platform_device.h> 12 #include <linux/arm-smccc.h> 13 #include <linux/of.h> 14 15 #define REV_B1 0x21 16 17 #define IMX8MQ_SW_INFO_B1 0x40 18 #define IMX8MQ_SW_MAGIC_B1 0xff0055aa 19 20 #define IMX_SIP_GET_SOC_INFO 0xc2000006 21 22 #define OCOTP_UID_LOW 0x410 23 #define OCOTP_UID_HIGH 0x420 24 25 /* Same as ANADIG_DIGPROG_IMX7D */ 26 #define ANADIG_DIGPROG_IMX8MM 0x800 27 28 struct imx8_soc_data { 29 char *name; 30 u32 (*soc_revision)(void); 31 }; 32 33 static u64 soc_uid; 34 35 #ifdef CONFIG_HAVE_ARM_SMCCC 36 static u32 imx8mq_soc_revision_from_atf(void) 37 { 38 struct arm_smccc_res res; 39 40 arm_smccc_smc(IMX_SIP_GET_SOC_INFO, 0, 0, 0, 0, 0, 0, 0, &res); 41 42 if (res.a0 == SMCCC_RET_NOT_SUPPORTED) 43 return 0; 44 else 45 return res.a0 & 0xff; 46 } 47 #else 48 static inline u32 imx8mq_soc_revision_from_atf(void) { return 0; }; 49 #endif 50 51 static u32 __init imx8mq_soc_revision(void) 52 { 53 struct device_node *np; 54 void __iomem *ocotp_base; 55 u32 magic; 56 u32 rev; 57 58 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp"); 59 if (!np) 60 return 0; 61 62 ocotp_base = of_iomap(np, 0); 63 WARN_ON(!ocotp_base); 64 65 /* 66 * SOC revision on older imx8mq is not available in fuses so query 67 * the value from ATF instead. 68 */ 69 rev = imx8mq_soc_revision_from_atf(); 70 if (!rev) { 71 magic = readl_relaxed(ocotp_base + IMX8MQ_SW_INFO_B1); 72 if (magic == IMX8MQ_SW_MAGIC_B1) 73 rev = REV_B1; 74 } 75 76 soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH); 77 soc_uid <<= 32; 78 soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW); 79 80 iounmap(ocotp_base); 81 of_node_put(np); 82 83 return rev; 84 } 85 86 static void __init imx8mm_soc_uid(void) 87 { 88 void __iomem *ocotp_base; 89 struct device_node *np; 90 91 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp"); 92 if (!np) 93 return; 94 95 ocotp_base = of_iomap(np, 0); 96 WARN_ON(!ocotp_base); 97 98 soc_uid = readl_relaxed(ocotp_base + OCOTP_UID_HIGH); 99 soc_uid <<= 32; 100 soc_uid |= readl_relaxed(ocotp_base + OCOTP_UID_LOW); 101 102 iounmap(ocotp_base); 103 of_node_put(np); 104 } 105 106 static u32 __init imx8mm_soc_revision(void) 107 { 108 struct device_node *np; 109 void __iomem *anatop_base; 110 u32 rev; 111 112 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop"); 113 if (!np) 114 return 0; 115 116 anatop_base = of_iomap(np, 0); 117 WARN_ON(!anatop_base); 118 119 rev = readl_relaxed(anatop_base + ANADIG_DIGPROG_IMX8MM); 120 121 iounmap(anatop_base); 122 of_node_put(np); 123 124 imx8mm_soc_uid(); 125 126 return rev; 127 } 128 129 static const struct imx8_soc_data imx8mq_soc_data = { 130 .name = "i.MX8MQ", 131 .soc_revision = imx8mq_soc_revision, 132 }; 133 134 static const struct imx8_soc_data imx8mm_soc_data = { 135 .name = "i.MX8MM", 136 .soc_revision = imx8mm_soc_revision, 137 }; 138 139 static const struct imx8_soc_data imx8mn_soc_data = { 140 .name = "i.MX8MN", 141 .soc_revision = imx8mm_soc_revision, 142 }; 143 144 static const struct imx8_soc_data imx8mp_soc_data = { 145 .name = "i.MX8MP", 146 .soc_revision = imx8mm_soc_revision, 147 }; 148 149 static const struct of_device_id imx8_soc_match[] = { 150 { .compatible = "fsl,imx8mq", .data = &imx8mq_soc_data, }, 151 { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, }, 152 { .compatible = "fsl,imx8mn", .data = &imx8mn_soc_data, }, 153 { .compatible = "fsl,imx8mp", .data = &imx8mp_soc_data, }, 154 { } 155 }; 156 157 #define imx8_revision(soc_rev) \ 158 soc_rev ? \ 159 kasprintf(GFP_KERNEL, "%d.%d", (soc_rev >> 4) & 0xf, soc_rev & 0xf) : \ 160 "unknown" 161 162 static int __init imx8_soc_init(void) 163 { 164 struct soc_device_attribute *soc_dev_attr; 165 struct soc_device *soc_dev; 166 const struct of_device_id *id; 167 u32 soc_rev = 0; 168 const struct imx8_soc_data *data; 169 int ret; 170 171 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 172 if (!soc_dev_attr) 173 return -ENOMEM; 174 175 soc_dev_attr->family = "Freescale i.MX"; 176 177 ret = of_property_read_string(of_root, "model", &soc_dev_attr->machine); 178 if (ret) 179 goto free_soc; 180 181 id = of_match_node(imx8_soc_match, of_root); 182 if (!id) { 183 ret = -ENODEV; 184 goto free_soc; 185 } 186 187 data = id->data; 188 if (data) { 189 soc_dev_attr->soc_id = data->name; 190 if (data->soc_revision) 191 soc_rev = data->soc_revision(); 192 } 193 194 soc_dev_attr->revision = imx8_revision(soc_rev); 195 if (!soc_dev_attr->revision) { 196 ret = -ENOMEM; 197 goto free_soc; 198 } 199 200 soc_dev_attr->serial_number = kasprintf(GFP_KERNEL, "%016llX", soc_uid); 201 if (!soc_dev_attr->serial_number) { 202 ret = -ENOMEM; 203 goto free_rev; 204 } 205 206 soc_dev = soc_device_register(soc_dev_attr); 207 if (IS_ERR(soc_dev)) { 208 ret = PTR_ERR(soc_dev); 209 goto free_serial_number; 210 } 211 212 pr_info("SoC: %s revision %s\n", soc_dev_attr->soc_id, 213 soc_dev_attr->revision); 214 215 if (IS_ENABLED(CONFIG_ARM_IMX_CPUFREQ_DT)) 216 platform_device_register_simple("imx-cpufreq-dt", -1, NULL, 0); 217 218 return 0; 219 220 free_serial_number: 221 kfree(soc_dev_attr->serial_number); 222 free_rev: 223 if (strcmp(soc_dev_attr->revision, "unknown")) 224 kfree(soc_dev_attr->revision); 225 free_soc: 226 kfree(soc_dev_attr); 227 return ret; 228 } 229 device_initcall(imx8_soc_init); 230