xref: /openbmc/linux/drivers/soc/fsl/qbman/dpaa_sys.h (revision d3964221)
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30 
31 #ifndef __DPAA_SYS_H
32 #define __DPAA_SYS_H
33 
34 #include <linux/cpu.h>
35 #include <linux/slab.h>
36 #include <linux/module.h>
37 #include <linux/interrupt.h>
38 #include <linux/kthread.h>
39 #include <linux/sched/signal.h>
40 #include <linux/vmalloc.h>
41 #include <linux/platform_device.h>
42 #include <linux/of.h>
43 #include <linux/of_reserved_mem.h>
44 #include <linux/prefetch.h>
45 #include <linux/genalloc.h>
46 #include <asm/cacheflush.h>
47 
48 /* For 2-element tables related to cache-inhibited and cache-enabled mappings */
49 #define DPAA_PORTAL_CE 0
50 #define DPAA_PORTAL_CI 1
51 
52 #if (L1_CACHE_BYTES != 32) && (L1_CACHE_BYTES != 64)
53 #error "Unsupported Cacheline Size"
54 #endif
55 
56 static inline void dpaa_flush(void *p)
57 {
58 #ifdef CONFIG_PPC
59 	flush_dcache_range((unsigned long)p, (unsigned long)p+64);
60 #elif defined(CONFIG_ARM32)
61 	__cpuc_flush_dcache_area(p, 64);
62 #elif defined(CONFIG_ARM64)
63 	__flush_dcache_area(p, 64);
64 #endif
65 }
66 
67 #define dpaa_invalidate(p) dpaa_flush(p)
68 
69 #define dpaa_zero(p) memset(p, 0, 64)
70 
71 static inline void dpaa_touch_ro(void *p)
72 {
73 #if (L1_CACHE_BYTES == 32)
74 	prefetch(p+32);
75 #endif
76 	prefetch(p);
77 }
78 
79 /* Commonly used combo */
80 static inline void dpaa_invalidate_touch_ro(void *p)
81 {
82 	dpaa_invalidate(p);
83 	dpaa_touch_ro(p);
84 }
85 
86 
87 #ifdef CONFIG_FSL_DPAA_CHECKING
88 #define DPAA_ASSERT(x) WARN_ON(!(x))
89 #else
90 #define DPAA_ASSERT(x)
91 #endif
92 
93 /* cyclic helper for rings */
94 static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last)
95 {
96 	/* 'first' is included, 'last' is excluded */
97 	if (first <= last)
98 		return last - first;
99 	return ringsize + last - first;
100 }
101 
102 /* Offset applied to genalloc pools due to zero being an error return */
103 #define DPAA_GENALLOC_OFF	0x80000000
104 
105 #endif	/* __DPAA_SYS_H */
106