xref: /openbmc/linux/drivers/soc/fsl/qbman/dpaa_sys.h (revision 2f28d218)
1 /* Copyright 2008 - 2016 Freescale Semiconductor, Inc.
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30 
31 #ifndef __DPAA_SYS_H
32 #define __DPAA_SYS_H
33 
34 #include <linux/cpu.h>
35 #include <linux/slab.h>
36 #include <linux/module.h>
37 #include <linux/interrupt.h>
38 #include <linux/kthread.h>
39 #include <linux/vmalloc.h>
40 #include <linux/platform_device.h>
41 #include <linux/of.h>
42 #include <linux/of_reserved_mem.h>
43 #include <linux/prefetch.h>
44 #include <linux/genalloc.h>
45 #include <asm/cacheflush.h>
46 
47 /* For 2-element tables related to cache-inhibited and cache-enabled mappings */
48 #define DPAA_PORTAL_CE 0
49 #define DPAA_PORTAL_CI 1
50 
51 #if (L1_CACHE_BYTES != 32) && (L1_CACHE_BYTES != 64)
52 #error "Unsupported Cacheline Size"
53 #endif
54 
55 static inline void dpaa_flush(void *p)
56 {
57 #ifdef CONFIG_PPC
58 	flush_dcache_range((unsigned long)p, (unsigned long)p+64);
59 #elif defined(CONFIG_ARM32)
60 	__cpuc_flush_dcache_area(p, 64);
61 #elif defined(CONFIG_ARM64)
62 	__flush_dcache_area(p, 64);
63 #endif
64 }
65 
66 #define dpaa_invalidate(p) dpaa_flush(p)
67 
68 #define dpaa_zero(p) memset(p, 0, 64)
69 
70 static inline void dpaa_touch_ro(void *p)
71 {
72 #if (L1_CACHE_BYTES == 32)
73 	prefetch(p+32);
74 #endif
75 	prefetch(p);
76 }
77 
78 /* Commonly used combo */
79 static inline void dpaa_invalidate_touch_ro(void *p)
80 {
81 	dpaa_invalidate(p);
82 	dpaa_touch_ro(p);
83 }
84 
85 
86 #ifdef CONFIG_FSL_DPAA_CHECKING
87 #define DPAA_ASSERT(x) WARN_ON(!(x))
88 #else
89 #define DPAA_ASSERT(x)
90 #endif
91 
92 /* cyclic helper for rings */
93 static inline u8 dpaa_cyc_diff(u8 ringsize, u8 first, u8 last)
94 {
95 	/* 'first' is included, 'last' is excluded */
96 	if (first <= last)
97 		return last - first;
98 	return ringsize + last - first;
99 }
100 
101 /* Offset applied to genalloc pools due to zero being an error return */
102 #define DPAA_GENALLOC_OFF	0x80000000
103 
104 #endif	/* __DPAA_SYS_H */
105