1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */ 2 /* 3 * Copyright 2013-2016 Freescale Semiconductor Inc. 4 * Copyright 2016 NXP 5 * 6 */ 7 #ifndef _FSL_DPIO_CMD_H 8 #define _FSL_DPIO_CMD_H 9 10 /* DPIO Version */ 11 #define DPIO_VER_MAJOR 4 12 #define DPIO_VER_MINOR 2 13 14 /* Command Versioning */ 15 16 #define DPIO_CMD_ID_OFFSET 4 17 #define DPIO_CMD_BASE_VERSION 1 18 19 #define DPIO_CMD(id) (((id) << DPIO_CMD_ID_OFFSET) | DPIO_CMD_BASE_VERSION) 20 21 /* Command IDs */ 22 #define DPIO_CMDID_CLOSE DPIO_CMD(0x800) 23 #define DPIO_CMDID_OPEN DPIO_CMD(0x803) 24 #define DPIO_CMDID_GET_API_VERSION DPIO_CMD(0xa03) 25 #define DPIO_CMDID_ENABLE DPIO_CMD(0x002) 26 #define DPIO_CMDID_DISABLE DPIO_CMD(0x003) 27 #define DPIO_CMDID_GET_ATTR DPIO_CMD(0x004) 28 29 struct dpio_cmd_open { 30 __le32 dpio_id; 31 }; 32 33 #define DPIO_CHANNEL_MODE_MASK 0x3 34 35 struct dpio_rsp_get_attr { 36 /* cmd word 0 */ 37 __le32 id; 38 __le16 qbman_portal_id; 39 u8 num_priorities; 40 u8 channel_mode; 41 /* cmd word 1 */ 42 __le64 qbman_portal_ce_addr; 43 /* cmd word 2 */ 44 __le64 qbman_portal_ci_addr; 45 /* cmd word 3 */ 46 __le32 qbman_version; 47 }; 48 49 #endif /* _FSL_DPIO_CMD_H */ 50