10b741b82SBrian Norris /* 20b741b82SBrian Norris * Definitions for Broadcom STB power management / Always ON (AON) block 30b741b82SBrian Norris * 40b741b82SBrian Norris * Copyright © 2016-2017 Broadcom 50b741b82SBrian Norris * 60b741b82SBrian Norris * This program is free software; you can redistribute it and/or modify 70b741b82SBrian Norris * it under the terms of the GNU General Public License version 2 as 80b741b82SBrian Norris * published by the Free Software Foundation. 90b741b82SBrian Norris * 100b741b82SBrian Norris * This program is distributed in the hope that it will be useful, 110b741b82SBrian Norris * but WITHOUT ANY WARRANTY; without even the implied warranty of 120b741b82SBrian Norris * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 130b741b82SBrian Norris * GNU General Public License for more details. 140b741b82SBrian Norris */ 150b741b82SBrian Norris 160b741b82SBrian Norris #ifndef __BRCMSTB_PM_H__ 170b741b82SBrian Norris #define __BRCMSTB_PM_H__ 180b741b82SBrian Norris 190b741b82SBrian Norris #define AON_CTRL_RESET_CTRL 0x00 200b741b82SBrian Norris #define AON_CTRL_PM_CTRL 0x04 210b741b82SBrian Norris #define AON_CTRL_PM_STATUS 0x08 220b741b82SBrian Norris #define AON_CTRL_PM_CPU_WAIT_COUNT 0x10 230b741b82SBrian Norris #define AON_CTRL_PM_INITIATE 0x88 240b741b82SBrian Norris #define AON_CTRL_HOST_MISC_CMDS 0x8c 250b741b82SBrian Norris #define AON_CTRL_SYSTEM_DATA_RAM_OFS 0x200 260b741b82SBrian Norris 270b741b82SBrian Norris /* MIPS PM constants */ 280b741b82SBrian Norris /* MEMC0 offsets */ 290b741b82SBrian Norris #define DDR40_PHY_CONTROL_REGS_0_PLL_STATUS 0x10 300b741b82SBrian Norris #define DDR40_PHY_CONTROL_REGS_0_STANDBY_CTRL 0xa4 310b741b82SBrian Norris 320b741b82SBrian Norris /* TIMER offsets */ 330b741b82SBrian Norris #define TIMER_TIMER1_CTRL 0x0c 340b741b82SBrian Norris #define TIMER_TIMER1_STAT 0x1c 350b741b82SBrian Norris 360b741b82SBrian Norris /* TIMER defines */ 370b741b82SBrian Norris #define RESET_TIMER 0x0 380b741b82SBrian Norris #define START_TIMER 0xbfffffff 390b741b82SBrian Norris #define TIMER_MASK 0x3fffffff 400b741b82SBrian Norris 410b741b82SBrian Norris /* PM_CTRL bitfield (Method #0) */ 420b741b82SBrian Norris #define PM_FAST_PWRDOWN (1 << 6) 430b741b82SBrian Norris #define PM_WARM_BOOT (1 << 5) 440b741b82SBrian Norris #define PM_DEEP_STANDBY (1 << 4) 450b741b82SBrian Norris #define PM_CPU_PWR (1 << 3) 460b741b82SBrian Norris #define PM_USE_CPU_RDY (1 << 2) 470b741b82SBrian Norris #define PM_PLL_PWRDOWN (1 << 1) 480b741b82SBrian Norris #define PM_PWR_DOWN (1 << 0) 490b741b82SBrian Norris 500b741b82SBrian Norris /* PM_CTRL bitfield (Method #1) */ 510b741b82SBrian Norris #define PM_DPHY_STANDBY_CLEAR (1 << 20) 520b741b82SBrian Norris #define PM_MIN_S3_WIDTH_TIMER_BYPASS (1 << 7) 530b741b82SBrian Norris 540b741b82SBrian Norris #define PM_S2_COMMAND (PM_PLL_PWRDOWN | PM_USE_CPU_RDY | PM_PWR_DOWN) 550b741b82SBrian Norris 560b741b82SBrian Norris /* Method 0 bitmasks */ 570b741b82SBrian Norris #define PM_COLD_CONFIG (PM_PLL_PWRDOWN | PM_DEEP_STANDBY) 580b741b82SBrian Norris #define PM_WARM_CONFIG (PM_COLD_CONFIG | PM_USE_CPU_RDY | PM_WARM_BOOT) 590b741b82SBrian Norris 600b741b82SBrian Norris /* Method 1 bitmask */ 610b741b82SBrian Norris #define M1_PM_WARM_CONFIG (PM_DPHY_STANDBY_CLEAR | \ 620b741b82SBrian Norris PM_MIN_S3_WIDTH_TIMER_BYPASS | \ 630b741b82SBrian Norris PM_WARM_BOOT | PM_DEEP_STANDBY | \ 640b741b82SBrian Norris PM_PLL_PWRDOWN | PM_PWR_DOWN) 650b741b82SBrian Norris 660b741b82SBrian Norris #define M1_PM_COLD_CONFIG (PM_DPHY_STANDBY_CLEAR | \ 670b741b82SBrian Norris PM_MIN_S3_WIDTH_TIMER_BYPASS | \ 680b741b82SBrian Norris PM_DEEP_STANDBY | \ 690b741b82SBrian Norris PM_PLL_PWRDOWN | PM_PWR_DOWN) 700b741b82SBrian Norris 710b741b82SBrian Norris #ifndef __ASSEMBLY__ 720b741b82SBrian Norris 730b741b82SBrian Norris extern const unsigned long brcmstb_pm_do_s2_sz; 740b741b82SBrian Norris extern asmlinkage int brcmstb_pm_do_s2(void __iomem *aon_ctrl_base, 750b741b82SBrian Norris void __iomem *ddr_phy_pll_status); 760b741b82SBrian Norris #endif 770b741b82SBrian Norris 780b741b82SBrian Norris #endif /* __BRCMSTB_PM_H__ */ 79