xref: /openbmc/linux/drivers/soc/atmel/soc.h (revision c35a824c)
1 /*
2  * Copyright (C) 2015 Atmel
3  *
4  * Boris Brezillon <boris.brezillon@free-electrons.com
5  *
6  * This file is licensed under the terms of the GNU General Public
7  * License version 2.  This program is licensed "as is" without any
8  * warranty of any kind, whether express or implied.
9  *
10  */
11 
12 #ifndef __AT91_SOC_H
13 #define __AT91_SOC_H
14 
15 #include <linux/sys_soc.h>
16 
17 struct at91_soc {
18 	u32 cidr_match;
19 	u32 exid_match;
20 	const char *name;
21 	const char *family;
22 };
23 
24 #define AT91_SOC(__cidr, __exid, __name, __family)		\
25 	{							\
26 		.cidr_match = (__cidr),				\
27 		.exid_match = (__exid),				\
28 		.name = (__name),				\
29 		.family = (__family),				\
30 	}
31 
32 struct soc_device * __init
33 at91_soc_init(const struct at91_soc *socs);
34 
35 #define AT91RM9200_CIDR_MATCH		0x09290780
36 
37 #define AT91SAM9260_CIDR_MATCH		0x019803a0
38 #define AT91SAM9261_CIDR_MATCH		0x019703a0
39 #define AT91SAM9263_CIDR_MATCH		0x019607a0
40 #define AT91SAM9G20_CIDR_MATCH		0x019905a0
41 #define AT91SAM9RL64_CIDR_MATCH		0x019b03a0
42 #define AT91SAM9G45_CIDR_MATCH		0x019b05a0
43 #define AT91SAM9X5_CIDR_MATCH		0x019a05a0
44 #define AT91SAM9N12_CIDR_MATCH		0x019a07a0
45 #define SAM9X60_CIDR_MATCH		0x019b35a0
46 
47 #define AT91SAM9M11_EXID_MATCH		0x00000001
48 #define AT91SAM9M10_EXID_MATCH		0x00000002
49 #define AT91SAM9G46_EXID_MATCH		0x00000003
50 #define AT91SAM9G45_EXID_MATCH		0x00000004
51 
52 #define AT91SAM9G15_EXID_MATCH		0x00000000
53 #define AT91SAM9G35_EXID_MATCH		0x00000001
54 #define AT91SAM9X35_EXID_MATCH		0x00000002
55 #define AT91SAM9G25_EXID_MATCH		0x00000003
56 #define AT91SAM9X25_EXID_MATCH		0x00000004
57 
58 #define AT91SAM9CN12_EXID_MATCH		0x00000005
59 #define AT91SAM9N12_EXID_MATCH		0x00000006
60 #define AT91SAM9CN11_EXID_MATCH		0x00000009
61 
62 #define SAM9X60_EXID_MATCH		0x00000000
63 #define SAM9X60_D5M_EXID_MATCH		0x00000001
64 #define SAM9X60_D1G_EXID_MATCH		0x00000010
65 #define SAM9X60_D6K_EXID_MATCH		0x00000011
66 
67 #define AT91SAM9XE128_CIDR_MATCH	0x329973a0
68 #define AT91SAM9XE256_CIDR_MATCH	0x329a93a0
69 #define AT91SAM9XE512_CIDR_MATCH	0x329aa3a0
70 
71 #define SAMA5D2_CIDR_MATCH		0x0a5c08c0
72 #define SAMA5D21CU_EXID_MATCH		0x0000005a
73 #define SAMA5D225C_D1M_EXID_MATCH	0x00000053
74 #define SAMA5D22CU_EXID_MATCH		0x00000059
75 #define SAMA5D22CN_EXID_MATCH		0x00000069
76 #define SAMA5D23CU_EXID_MATCH		0x00000058
77 #define SAMA5D24CX_EXID_MATCH		0x00000004
78 #define SAMA5D24CU_EXID_MATCH		0x00000014
79 #define SAMA5D26CU_EXID_MATCH		0x00000012
80 #define SAMA5D27C_D1G_EXID_MATCH	0x00000033
81 #define SAMA5D27C_D5M_EXID_MATCH	0x00000032
82 #define SAMA5D27C_LD1G_EXID_MATCH	0x00000061
83 #define SAMA5D27C_LD2G_EXID_MATCH	0x00000062
84 #define SAMA5D27CU_EXID_MATCH		0x00000011
85 #define SAMA5D27CN_EXID_MATCH		0x00000021
86 #define SAMA5D28C_D1G_EXID_MATCH	0x00000013
87 #define SAMA5D28C_LD1G_EXID_MATCH	0x00000071
88 #define SAMA5D28C_LD2G_EXID_MATCH	0x00000072
89 #define SAMA5D28CU_EXID_MATCH		0x00000010
90 #define SAMA5D28CN_EXID_MATCH		0x00000020
91 
92 #define SAMA5D3_CIDR_MATCH		0x0a5c07c0
93 #define SAMA5D31_EXID_MATCH		0x00444300
94 #define SAMA5D33_EXID_MATCH		0x00414300
95 #define SAMA5D34_EXID_MATCH		0x00414301
96 #define SAMA5D35_EXID_MATCH		0x00584300
97 #define SAMA5D36_EXID_MATCH		0x00004301
98 
99 #define SAMA5D4_CIDR_MATCH		0x0a5c07c0
100 #define SAMA5D41_EXID_MATCH		0x00000001
101 #define SAMA5D42_EXID_MATCH		0x00000002
102 #define SAMA5D43_EXID_MATCH		0x00000003
103 #define SAMA5D44_EXID_MATCH		0x00000004
104 
105 #define SAME70Q21_CIDR_MATCH		0x21020e00
106 #define SAME70Q21_EXID_MATCH		0x00000002
107 #define SAME70Q20_CIDR_MATCH		0x21020c00
108 #define SAME70Q20_EXID_MATCH		0x00000002
109 #define SAME70Q19_CIDR_MATCH		0x210d0a00
110 #define SAME70Q19_EXID_MATCH		0x00000002
111 
112 #define SAMS70Q21_CIDR_MATCH		0x21120e00
113 #define SAMS70Q21_EXID_MATCH		0x00000002
114 #define SAMS70Q20_CIDR_MATCH		0x21120c00
115 #define SAMS70Q20_EXID_MATCH		0x00000002
116 #define SAMS70Q19_CIDR_MATCH		0x211d0a00
117 #define SAMS70Q19_EXID_MATCH		0x00000002
118 
119 #define SAMV71Q21_CIDR_MATCH		0x21220e00
120 #define SAMV71Q21_EXID_MATCH		0x00000002
121 #define SAMV71Q20_CIDR_MATCH		0x21220c00
122 #define SAMV71Q20_EXID_MATCH		0x00000002
123 #define SAMV71Q19_CIDR_MATCH		0x212d0a00
124 #define SAMV71Q19_EXID_MATCH		0x00000002
125 
126 #define SAMV70Q20_CIDR_MATCH		0x21320c00
127 #define SAMV70Q20_EXID_MATCH		0x00000002
128 #define SAMV70Q19_CIDR_MATCH		0x213d0a00
129 #define SAMV70Q19_EXID_MATCH		0x00000002
130 
131 #endif /* __AT91_SOC_H */
132