1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2017 IBM Corporation
4  */
5 
6 #include <linux/clk.h>
7 #include <linux/mfd/syscon.h>
8 #include <linux/miscdevice.h>
9 #include <linux/mm.h>
10 #include <linux/module.h>
11 #include <linux/of_address.h>
12 #include <linux/platform_device.h>
13 #include <linux/poll.h>
14 #include <linux/regmap.h>
15 
16 #include <linux/aspeed-lpc-ctrl.h>
17 
18 #define DEVICE_NAME	"aspeed-lpc-ctrl"
19 
20 #define HICR5 0x0
21 #define HICR5_ENL2H	BIT(8)
22 #define HICR5_ENFWH	BIT(10)
23 
24 #define HICR7 0x8
25 #define HICR8 0xc
26 
27 struct aspeed_lpc_ctrl {
28 	struct miscdevice	miscdev;
29 	struct regmap		*regmap;
30 	struct clk		*clk;
31 	phys_addr_t		mem_base;
32 	resource_size_t		mem_size;
33 	u32		pnor_size;
34 	u32		pnor_base;
35 };
36 
37 static struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file)
38 {
39 	return container_of(file->private_data, struct aspeed_lpc_ctrl,
40 			miscdev);
41 }
42 
43 static int aspeed_lpc_ctrl_mmap(struct file *file, struct vm_area_struct *vma)
44 {
45 	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
46 	unsigned long vsize = vma->vm_end - vma->vm_start;
47 	pgprot_t prot = vma->vm_page_prot;
48 
49 	if (vma->vm_pgoff + vsize > lpc_ctrl->mem_base + lpc_ctrl->mem_size)
50 		return -EINVAL;
51 
52 	/* ast2400/2500 AHB accesses are not cache coherent */
53 	prot = pgprot_noncached(prot);
54 
55 	if (remap_pfn_range(vma, vma->vm_start,
56 		(lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff,
57 		vsize, prot))
58 		return -EAGAIN;
59 
60 	return 0;
61 }
62 
63 static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
64 		unsigned long param)
65 {
66 	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
67 	void __user *p = (void __user *)param;
68 	struct aspeed_lpc_ctrl_mapping map;
69 	u32 addr;
70 	u32 size;
71 	long rc;
72 
73 	if (copy_from_user(&map, p, sizeof(map)))
74 		return -EFAULT;
75 
76 	if (map.flags != 0)
77 		return -EINVAL;
78 
79 	switch (cmd) {
80 	case ASPEED_LPC_CTRL_IOCTL_GET_SIZE:
81 		/* The flash windows don't report their size */
82 		if (map.window_type != ASPEED_LPC_CTRL_WINDOW_MEMORY)
83 			return -EINVAL;
84 
85 		/* Support more than one window id in the future */
86 		if (map.window_id != 0)
87 			return -EINVAL;
88 
89 		map.size = lpc_ctrl->mem_size;
90 
91 		return copy_to_user(p, &map, sizeof(map)) ? -EFAULT : 0;
92 	case ASPEED_LPC_CTRL_IOCTL_MAP:
93 
94 		/*
95 		 * The top half of HICR7 is the MSB of the BMC address of the
96 		 * mapping.
97 		 * The bottom half of HICR7 is the MSB of the HOST LPC
98 		 * firmware space address of the mapping.
99 		 *
100 		 * The 1 bits in the top of half of HICR8 represent the bits
101 		 * (in the requested address) that should be ignored and
102 		 * replaced with those from the top half of HICR7.
103 		 * The 1 bits in the bottom half of HICR8 represent the bits
104 		 * (in the requested address) that should be kept and pass
105 		 * into the BMC address space.
106 		 */
107 
108 		/*
109 		 * It doesn't make sense to talk about a size or offset with
110 		 * low 16 bits set. Both HICR7 and HICR8 talk about the top 16
111 		 * bits of addresses and sizes.
112 		 */
113 
114 		if ((map.size & 0x0000ffff) || (map.offset & 0x0000ffff))
115 			return -EINVAL;
116 
117 		/*
118 		 * Because of the way the masks work in HICR8 offset has to
119 		 * be a multiple of size.
120 		 */
121 		if (map.offset & (map.size - 1))
122 			return -EINVAL;
123 
124 		if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
125 			addr = lpc_ctrl->pnor_base;
126 			size = lpc_ctrl->pnor_size;
127 		} else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
128 			addr = lpc_ctrl->mem_base;
129 			size = lpc_ctrl->mem_size;
130 		} else {
131 			return -EINVAL;
132 		}
133 
134 		/* Check overflow first! */
135 		if (map.offset + map.size < map.offset ||
136 			map.offset + map.size > size)
137 			return -EINVAL;
138 
139 		if (map.size == 0 || map.size > size)
140 			return -EINVAL;
141 
142 		addr += map.offset;
143 
144 		/*
145 		 * addr (host lpc address) is safe regardless of values. This
146 		 * simply changes the address the host has to request on its
147 		 * side of the LPC bus. This cannot impact the hosts own
148 		 * memory space by surprise as LPC specific accessors are
149 		 * required. The only strange thing that could be done is
150 		 * setting the lower 16 bits but the shift takes care of that.
151 		 */
152 
153 		rc = regmap_write(lpc_ctrl->regmap, HICR7,
154 				(addr | (map.addr >> 16)));
155 		if (rc)
156 			return rc;
157 
158 		rc = regmap_write(lpc_ctrl->regmap, HICR8,
159 				(~(map.size - 1)) | ((map.size >> 16) - 1));
160 		if (rc)
161 			return rc;
162 
163 		/*
164 		 * Enable LPC FHW cycles. This is required for the host to
165 		 * access the regions specified.
166 		 */
167 		return regmap_update_bits(lpc_ctrl->regmap, HICR5,
168 				HICR5_ENFWH | HICR5_ENL2H,
169 				HICR5_ENFWH | HICR5_ENL2H);
170 	}
171 
172 	return -EINVAL;
173 }
174 
175 static const struct file_operations aspeed_lpc_ctrl_fops = {
176 	.owner		= THIS_MODULE,
177 	.mmap		= aspeed_lpc_ctrl_mmap,
178 	.unlocked_ioctl	= aspeed_lpc_ctrl_ioctl,
179 };
180 
181 static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
182 {
183 	struct aspeed_lpc_ctrl *lpc_ctrl;
184 	struct device_node *node;
185 	struct resource resm;
186 	struct device *dev;
187 	int rc;
188 
189 	dev = &pdev->dev;
190 
191 	lpc_ctrl = devm_kzalloc(dev, sizeof(*lpc_ctrl), GFP_KERNEL);
192 	if (!lpc_ctrl)
193 		return -ENOMEM;
194 
195 	node = of_parse_phandle(dev->of_node, "flash", 0);
196 	if (!node) {
197 		dev_err(dev, "Didn't find host pnor flash node\n");
198 		return -ENODEV;
199 	}
200 
201 	rc = of_address_to_resource(node, 1, &resm);
202 	of_node_put(node);
203 	if (rc) {
204 		dev_err(dev, "Couldn't address to resource for flash\n");
205 		return rc;
206 	}
207 
208 	lpc_ctrl->pnor_size = resource_size(&resm);
209 	lpc_ctrl->pnor_base = resm.start;
210 
211 	dev_set_drvdata(&pdev->dev, lpc_ctrl);
212 
213 	node = of_parse_phandle(dev->of_node, "memory-region", 0);
214 	if (!node) {
215 		dev_err(dev, "Didn't find reserved memory\n");
216 		return -EINVAL;
217 	}
218 
219 	rc = of_address_to_resource(node, 0, &resm);
220 	of_node_put(node);
221 	if (rc) {
222 		dev_err(dev, "Couldn't address to resource for reserved memory\n");
223 		return -ENOMEM;
224 	}
225 
226 	lpc_ctrl->mem_size = resource_size(&resm);
227 	lpc_ctrl->mem_base = resm.start;
228 
229 	lpc_ctrl->regmap = syscon_node_to_regmap(
230 			pdev->dev.parent->of_node);
231 	if (IS_ERR(lpc_ctrl->regmap)) {
232 		dev_err(dev, "Couldn't get regmap\n");
233 		return -ENODEV;
234 	}
235 
236 	lpc_ctrl->clk = devm_clk_get(dev, NULL);
237 	if (IS_ERR(lpc_ctrl->clk)) {
238 		dev_err(dev, "couldn't get clock\n");
239 		return PTR_ERR(lpc_ctrl->clk);
240 	}
241 	rc = clk_prepare_enable(lpc_ctrl->clk);
242 	if (rc) {
243 		dev_err(dev, "couldn't enable clock\n");
244 		return rc;
245 	}
246 
247 	lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
248 	lpc_ctrl->miscdev.name = DEVICE_NAME;
249 	lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops;
250 	lpc_ctrl->miscdev.parent = dev;
251 	rc = misc_register(&lpc_ctrl->miscdev);
252 	if (rc) {
253 		dev_err(dev, "Unable to register device\n");
254 		goto err;
255 	}
256 
257 	dev_info(dev, "Loaded at %pr\n", &resm);
258 
259 	return 0;
260 
261 err:
262 	clk_disable_unprepare(lpc_ctrl->clk);
263 	return rc;
264 }
265 
266 static int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
267 {
268 	struct aspeed_lpc_ctrl *lpc_ctrl = dev_get_drvdata(&pdev->dev);
269 
270 	misc_deregister(&lpc_ctrl->miscdev);
271 	clk_disable_unprepare(lpc_ctrl->clk);
272 
273 	return 0;
274 }
275 
276 static const struct of_device_id aspeed_lpc_ctrl_match[] = {
277 	{ .compatible = "aspeed,ast2400-lpc-ctrl" },
278 	{ .compatible = "aspeed,ast2500-lpc-ctrl" },
279 	{ },
280 };
281 
282 static struct platform_driver aspeed_lpc_ctrl_driver = {
283 	.driver = {
284 		.name		= DEVICE_NAME,
285 		.of_match_table = aspeed_lpc_ctrl_match,
286 	},
287 	.probe = aspeed_lpc_ctrl_probe,
288 	.remove = aspeed_lpc_ctrl_remove,
289 };
290 
291 module_platform_driver(aspeed_lpc_ctrl_driver);
292 
293 MODULE_DEVICE_TABLE(of, aspeed_lpc_ctrl_match);
294 MODULE_LICENSE("GPL");
295 MODULE_AUTHOR("Cyril Bur <cyrilbur@gmail.com>");
296 MODULE_DESCRIPTION("Control for aspeed 2400/2500 LPC HOST to BMC mappings");
297