1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * Copyright 2017 IBM Corporation
4  */
5 
6 #include <linux/clk.h>
7 #include <linux/mfd/syscon.h>
8 #include <linux/miscdevice.h>
9 #include <linux/mm.h>
10 #include <linux/module.h>
11 #include <linux/of_address.h>
12 #include <linux/platform_device.h>
13 #include <linux/poll.h>
14 #include <linux/regmap.h>
15 
16 #include <linux/aspeed-lpc-ctrl.h>
17 
18 #define DEVICE_NAME	"aspeed-lpc-ctrl"
19 
20 #define HICR5 0x0
21 #define HICR5_ENL2H	BIT(8)
22 #define HICR5_ENFWH	BIT(10)
23 
24 #define HICR7 0x8
25 #define HICR8 0xc
26 
27 struct aspeed_lpc_ctrl {
28 	struct miscdevice	miscdev;
29 	struct regmap		*regmap;
30 	struct clk		*clk;
31 	phys_addr_t		mem_base;
32 	resource_size_t		mem_size;
33 	u32		pnor_size;
34 	u32		pnor_base;
35 };
36 
37 static struct aspeed_lpc_ctrl *file_aspeed_lpc_ctrl(struct file *file)
38 {
39 	return container_of(file->private_data, struct aspeed_lpc_ctrl,
40 			miscdev);
41 }
42 
43 static int aspeed_lpc_ctrl_mmap(struct file *file, struct vm_area_struct *vma)
44 {
45 	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
46 	unsigned long vsize = vma->vm_end - vma->vm_start;
47 	pgprot_t prot = vma->vm_page_prot;
48 
49 	if (vma->vm_pgoff + vsize > lpc_ctrl->mem_base + lpc_ctrl->mem_size)
50 		return -EINVAL;
51 
52 	/* ast2400/2500 AHB accesses are not cache coherent */
53 	prot = pgprot_noncached(prot);
54 
55 	if (remap_pfn_range(vma, vma->vm_start,
56 		(lpc_ctrl->mem_base >> PAGE_SHIFT) + vma->vm_pgoff,
57 		vsize, prot))
58 		return -EAGAIN;
59 
60 	return 0;
61 }
62 
63 static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
64 		unsigned long param)
65 {
66 	struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
67 	struct device *dev = file->private_data;
68 	void __user *p = (void __user *)param;
69 	struct aspeed_lpc_ctrl_mapping map;
70 	u32 addr;
71 	u32 size;
72 	long rc;
73 
74 	if (copy_from_user(&map, p, sizeof(map)))
75 		return -EFAULT;
76 
77 	if (map.flags != 0)
78 		return -EINVAL;
79 
80 	switch (cmd) {
81 	case ASPEED_LPC_CTRL_IOCTL_GET_SIZE:
82 		/* The flash windows don't report their size */
83 		if (map.window_type != ASPEED_LPC_CTRL_WINDOW_MEMORY)
84 			return -EINVAL;
85 
86 		/* Support more than one window id in the future */
87 		if (map.window_id != 0)
88 			return -EINVAL;
89 
90 		/* If memory-region is not described in device tree */
91 		if (!lpc_ctrl->mem_size) {
92 			dev_dbg(dev, "Didn't find reserved memory\n");
93 			return -ENXIO;
94 		}
95 
96 		map.size = lpc_ctrl->mem_size;
97 
98 		return copy_to_user(p, &map, sizeof(map)) ? -EFAULT : 0;
99 	case ASPEED_LPC_CTRL_IOCTL_MAP:
100 
101 		/*
102 		 * The top half of HICR7 is the MSB of the BMC address of the
103 		 * mapping.
104 		 * The bottom half of HICR7 is the MSB of the HOST LPC
105 		 * firmware space address of the mapping.
106 		 *
107 		 * The 1 bits in the top of half of HICR8 represent the bits
108 		 * (in the requested address) that should be ignored and
109 		 * replaced with those from the top half of HICR7.
110 		 * The 1 bits in the bottom half of HICR8 represent the bits
111 		 * (in the requested address) that should be kept and pass
112 		 * into the BMC address space.
113 		 */
114 
115 		/*
116 		 * It doesn't make sense to talk about a size or offset with
117 		 * low 16 bits set. Both HICR7 and HICR8 talk about the top 16
118 		 * bits of addresses and sizes.
119 		 */
120 
121 		if ((map.size & 0x0000ffff) || (map.offset & 0x0000ffff))
122 			return -EINVAL;
123 
124 		/*
125 		 * Because of the way the masks work in HICR8 offset has to
126 		 * be a multiple of size.
127 		 */
128 		if (map.offset & (map.size - 1))
129 			return -EINVAL;
130 
131 		if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
132 			if (!lpc_ctrl->pnor_size) {
133 				dev_dbg(dev, "Didn't find host pnor flash\n");
134 				return -ENXIO;
135 			}
136 			addr = lpc_ctrl->pnor_base;
137 			size = lpc_ctrl->pnor_size;
138 		} else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
139 			/* If memory-region is not described in device tree */
140 			if (!lpc_ctrl->mem_size) {
141 				dev_dbg(dev, "Didn't find reserved memory\n");
142 				return -ENXIO;
143 			}
144 			addr = lpc_ctrl->mem_base;
145 			size = lpc_ctrl->mem_size;
146 		} else {
147 			return -EINVAL;
148 		}
149 
150 		/* Check overflow first! */
151 		if (map.offset + map.size < map.offset ||
152 			map.offset + map.size > size)
153 			return -EINVAL;
154 
155 		if (map.size == 0 || map.size > size)
156 			return -EINVAL;
157 
158 		addr += map.offset;
159 
160 		/*
161 		 * addr (host lpc address) is safe regardless of values. This
162 		 * simply changes the address the host has to request on its
163 		 * side of the LPC bus. This cannot impact the hosts own
164 		 * memory space by surprise as LPC specific accessors are
165 		 * required. The only strange thing that could be done is
166 		 * setting the lower 16 bits but the shift takes care of that.
167 		 */
168 
169 		rc = regmap_write(lpc_ctrl->regmap, HICR7,
170 				(addr | (map.addr >> 16)));
171 		if (rc)
172 			return rc;
173 
174 		rc = regmap_write(lpc_ctrl->regmap, HICR8,
175 				(~(map.size - 1)) | ((map.size >> 16) - 1));
176 		if (rc)
177 			return rc;
178 
179 		/*
180 		 * Enable LPC FHW cycles. This is required for the host to
181 		 * access the regions specified.
182 		 */
183 		return regmap_update_bits(lpc_ctrl->regmap, HICR5,
184 				HICR5_ENFWH | HICR5_ENL2H,
185 				HICR5_ENFWH | HICR5_ENL2H);
186 	}
187 
188 	return -EINVAL;
189 }
190 
191 static const struct file_operations aspeed_lpc_ctrl_fops = {
192 	.owner		= THIS_MODULE,
193 	.mmap		= aspeed_lpc_ctrl_mmap,
194 	.unlocked_ioctl	= aspeed_lpc_ctrl_ioctl,
195 };
196 
197 static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
198 {
199 	struct aspeed_lpc_ctrl *lpc_ctrl;
200 	struct device_node *node;
201 	struct resource resm;
202 	struct device *dev;
203 	int rc;
204 
205 	dev = &pdev->dev;
206 
207 	lpc_ctrl = devm_kzalloc(dev, sizeof(*lpc_ctrl), GFP_KERNEL);
208 	if (!lpc_ctrl)
209 		return -ENOMEM;
210 
211 	/* If flash is described in device tree then store */
212 	node = of_parse_phandle(dev->of_node, "flash", 0);
213 	if (!node) {
214 		dev_dbg(dev, "Didn't find host pnor flash node\n");
215 	} else {
216 		rc = of_address_to_resource(node, 1, &resm);
217 		of_node_put(node);
218 		if (rc) {
219 			dev_err(dev, "Couldn't address to resource for flash\n");
220 			return rc;
221 		}
222 
223 		lpc_ctrl->pnor_size = resource_size(&resm);
224 		lpc_ctrl->pnor_base = resm.start;
225 	}
226 
227 
228 	dev_set_drvdata(&pdev->dev, lpc_ctrl);
229 
230 	/* If memory-region is described in device tree then store */
231 	node = of_parse_phandle(dev->of_node, "memory-region", 0);
232 	if (!node) {
233 		dev_dbg(dev, "Didn't find reserved memory\n");
234 	} else {
235 		rc = of_address_to_resource(node, 0, &resm);
236 		of_node_put(node);
237 		if (rc) {
238 			dev_err(dev, "Couldn't address to resource for reserved memory\n");
239 			return -ENXIO;
240 		}
241 
242 		lpc_ctrl->mem_size = resource_size(&resm);
243 		lpc_ctrl->mem_base = resm.start;
244 	}
245 
246 	lpc_ctrl->regmap = syscon_node_to_regmap(
247 			pdev->dev.parent->of_node);
248 	if (IS_ERR(lpc_ctrl->regmap)) {
249 		dev_err(dev, "Couldn't get regmap\n");
250 		return -ENODEV;
251 	}
252 
253 	lpc_ctrl->clk = devm_clk_get(dev, NULL);
254 	if (IS_ERR(lpc_ctrl->clk)) {
255 		dev_err(dev, "couldn't get clock\n");
256 		return PTR_ERR(lpc_ctrl->clk);
257 	}
258 	rc = clk_prepare_enable(lpc_ctrl->clk);
259 	if (rc) {
260 		dev_err(dev, "couldn't enable clock\n");
261 		return rc;
262 	}
263 
264 	lpc_ctrl->miscdev.minor = MISC_DYNAMIC_MINOR;
265 	lpc_ctrl->miscdev.name = DEVICE_NAME;
266 	lpc_ctrl->miscdev.fops = &aspeed_lpc_ctrl_fops;
267 	lpc_ctrl->miscdev.parent = dev;
268 	rc = misc_register(&lpc_ctrl->miscdev);
269 	if (rc) {
270 		dev_err(dev, "Unable to register device\n");
271 		goto err;
272 	}
273 
274 	return 0;
275 
276 err:
277 	clk_disable_unprepare(lpc_ctrl->clk);
278 	return rc;
279 }
280 
281 static int aspeed_lpc_ctrl_remove(struct platform_device *pdev)
282 {
283 	struct aspeed_lpc_ctrl *lpc_ctrl = dev_get_drvdata(&pdev->dev);
284 
285 	misc_deregister(&lpc_ctrl->miscdev);
286 	clk_disable_unprepare(lpc_ctrl->clk);
287 
288 	return 0;
289 }
290 
291 static const struct of_device_id aspeed_lpc_ctrl_match[] = {
292 	{ .compatible = "aspeed,ast2400-lpc-ctrl" },
293 	{ .compatible = "aspeed,ast2500-lpc-ctrl" },
294 	{ },
295 };
296 
297 static struct platform_driver aspeed_lpc_ctrl_driver = {
298 	.driver = {
299 		.name		= DEVICE_NAME,
300 		.of_match_table = aspeed_lpc_ctrl_match,
301 	},
302 	.probe = aspeed_lpc_ctrl_probe,
303 	.remove = aspeed_lpc_ctrl_remove,
304 };
305 
306 module_platform_driver(aspeed_lpc_ctrl_driver);
307 
308 MODULE_DEVICE_TABLE(of, aspeed_lpc_ctrl_match);
309 MODULE_LICENSE("GPL");
310 MODULE_AUTHOR("Cyril Bur <cyrilbur@gmail.com>");
311 MODULE_DESCRIPTION("Control for aspeed 2400/2500 LPC HOST to BMC mappings");
312