1 /* SPDX-License-Identifier: GPL-2.0 */ 2 #include <linux/sh_intc.h> 3 #include <linux/irq.h> 4 #include <linux/irqdomain.h> 5 #include <linux/list.h> 6 #include <linux/kernel.h> 7 #include <linux/types.h> 8 #include <linux/radix-tree.h> 9 #include <linux/device.h> 10 11 #define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \ 12 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \ 13 ((addr_e) << 16) | ((addr_d << 24))) 14 15 #define _INTC_SHIFT(h) (h & 0x1f) 16 #define _INTC_WIDTH(h) ((h >> 5) & 0xf) 17 #define _INTC_FN(h) ((h >> 9) & 0xf) 18 #define _INTC_MODE(h) ((h >> 13) & 0x7) 19 #define _INTC_ADDR_E(h) ((h >> 16) & 0xff) 20 #define _INTC_ADDR_D(h) ((h >> 24) & 0xff) 21 22 #ifdef CONFIG_SMP 23 #define IS_SMP(x) (x.smp) 24 #define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c)) 25 #define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1) 26 #else 27 #define IS_SMP(x) 0 28 #define INTC_REG(d, x, c) (d->reg[(x)]) 29 #define SMP_NR(d, x) 1 30 #endif 31 32 struct intc_handle_int { 33 unsigned int irq; 34 unsigned long handle; 35 }; 36 37 struct intc_window { 38 phys_addr_t phys; 39 void __iomem *virt; 40 unsigned long size; 41 }; 42 43 struct intc_map_entry { 44 intc_enum enum_id; 45 struct intc_desc_int *desc; 46 }; 47 48 struct intc_subgroup_entry { 49 unsigned int pirq; 50 intc_enum enum_id; 51 unsigned long handle; 52 }; 53 54 struct intc_desc_int { 55 struct list_head list; 56 struct device dev; 57 struct radix_tree_root tree; 58 raw_spinlock_t lock; 59 unsigned int index; 60 unsigned long *reg; 61 #ifdef CONFIG_SMP 62 unsigned long *smp; 63 #endif 64 unsigned int nr_reg; 65 struct intc_handle_int *prio; 66 unsigned int nr_prio; 67 struct intc_handle_int *sense; 68 unsigned int nr_sense; 69 struct intc_window *window; 70 unsigned int nr_windows; 71 struct irq_domain *domain; 72 struct irq_chip chip; 73 bool skip_suspend; 74 }; 75 76 77 enum { 78 REG_FN_ERR = 0, 79 REG_FN_TEST_BASE = 1, 80 REG_FN_WRITE_BASE = 5, 81 REG_FN_MODIFY_BASE = 9 82 }; 83 84 enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */ 85 MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */ 86 MODE_DUAL_REG, /* Two registers, set bit to enable / disable */ 87 MODE_PRIO_REG, /* Priority value written to enable interrupt */ 88 MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */ 89 }; 90 91 static inline struct intc_desc_int *get_intc_desc(unsigned int irq) 92 { 93 struct irq_chip *chip = irq_get_chip(irq); 94 95 return container_of(chip, struct intc_desc_int, chip); 96 } 97 98 /* 99 * Grumble. 100 */ 101 static inline void activate_irq(int irq) 102 { 103 irq_modify_status(irq, IRQ_NOREQUEST, IRQ_NOPROBE); 104 } 105 106 static inline int intc_handle_int_cmp(const void *a, const void *b) 107 { 108 const struct intc_handle_int *_a = a; 109 const struct intc_handle_int *_b = b; 110 111 return _a->irq - _b->irq; 112 } 113 114 /* access.c */ 115 extern unsigned long 116 (*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data); 117 118 extern unsigned long 119 (*intc_enable_fns[])(unsigned long addr, unsigned long handle, 120 unsigned long (*fn)(unsigned long, 121 unsigned long, unsigned long), 122 unsigned int irq); 123 extern unsigned long 124 (*intc_disable_fns[])(unsigned long addr, unsigned long handle, 125 unsigned long (*fn)(unsigned long, 126 unsigned long, unsigned long), 127 unsigned int irq); 128 extern unsigned long 129 (*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle, 130 unsigned long (*fn)(unsigned long, 131 unsigned long, unsigned long), 132 unsigned int irq); 133 134 unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address); 135 unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address); 136 unsigned int intc_set_field_from_handle(unsigned int value, 137 unsigned int field_value, 138 unsigned int handle); 139 unsigned long intc_get_field_from_handle(unsigned int value, 140 unsigned int handle); 141 142 /* balancing.c */ 143 #ifdef CONFIG_INTC_BALANCING 144 void intc_balancing_enable(unsigned int irq); 145 void intc_balancing_disable(unsigned int irq); 146 void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc, 147 struct intc_desc_int *d, intc_enum id); 148 #else 149 static inline void intc_balancing_enable(unsigned int irq) { } 150 static inline void intc_balancing_disable(unsigned int irq) { } 151 static inline void 152 intc_set_dist_handle(unsigned int irq, struct intc_desc *desc, 153 struct intc_desc_int *d, intc_enum id) { } 154 #endif 155 156 /* chip.c */ 157 extern struct irq_chip intc_irq_chip; 158 void _intc_enable(struct irq_data *data, unsigned long handle); 159 160 /* core.c */ 161 extern struct list_head intc_list; 162 extern raw_spinlock_t intc_big_lock; 163 extern struct bus_type intc_subsys; 164 165 unsigned int intc_get_dfl_prio_level(void); 166 unsigned int intc_get_prio_level(unsigned int irq); 167 void intc_set_prio_level(unsigned int irq, unsigned int level); 168 169 /* handle.c */ 170 unsigned int intc_get_mask_handle(struct intc_desc *desc, 171 struct intc_desc_int *d, 172 intc_enum enum_id, int do_grps); 173 unsigned int intc_get_prio_handle(struct intc_desc *desc, 174 struct intc_desc_int *d, 175 intc_enum enum_id, int do_grps); 176 unsigned int intc_get_sense_handle(struct intc_desc *desc, 177 struct intc_desc_int *d, 178 intc_enum enum_id); 179 void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc, 180 struct intc_desc_int *d, intc_enum id); 181 unsigned long intc_get_ack_handle(unsigned int irq); 182 void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d, 183 intc_enum enum_id, int enable); 184 185 /* irqdomain.c */ 186 void intc_irq_domain_init(struct intc_desc_int *d, struct intc_hw_desc *hw); 187 188 /* virq.c */ 189 void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d); 190 void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d); 191 struct intc_map_entry *intc_irq_xlate_get(unsigned int irq); 192