1 #include <linux/sh_intc.h> 2 #include <linux/irq.h> 3 #include <linux/list.h> 4 #include <linux/kernel.h> 5 #include <linux/types.h> 6 #include <linux/radix-tree.h> 7 #include <linux/device.h> 8 9 #define _INTC_MK(fn, mode, addr_e, addr_d, width, shift) \ 10 ((shift) | ((width) << 5) | ((fn) << 9) | ((mode) << 13) | \ 11 ((addr_e) << 16) | ((addr_d << 24))) 12 13 #define _INTC_SHIFT(h) (h & 0x1f) 14 #define _INTC_WIDTH(h) ((h >> 5) & 0xf) 15 #define _INTC_FN(h) ((h >> 9) & 0xf) 16 #define _INTC_MODE(h) ((h >> 13) & 0x7) 17 #define _INTC_ADDR_E(h) ((h >> 16) & 0xff) 18 #define _INTC_ADDR_D(h) ((h >> 24) & 0xff) 19 20 #ifdef CONFIG_SMP 21 #define IS_SMP(x) (x.smp) 22 #define INTC_REG(d, x, c) (d->reg[(x)] + ((d->smp[(x)] & 0xff) * c)) 23 #define SMP_NR(d, x) ((d->smp[(x)] >> 8) ? (d->smp[(x)] >> 8) : 1) 24 #else 25 #define IS_SMP(x) 0 26 #define INTC_REG(d, x, c) (d->reg[(x)]) 27 #define SMP_NR(d, x) 1 28 #endif 29 30 struct intc_handle_int { 31 unsigned int irq; 32 unsigned long handle; 33 }; 34 35 struct intc_window { 36 phys_addr_t phys; 37 void __iomem *virt; 38 unsigned long size; 39 }; 40 41 struct intc_map_entry { 42 intc_enum enum_id; 43 struct intc_desc_int *desc; 44 }; 45 46 struct intc_subgroup_entry { 47 unsigned int pirq; 48 intc_enum enum_id; 49 unsigned long handle; 50 }; 51 52 struct intc_desc_int { 53 struct list_head list; 54 struct device dev; 55 struct radix_tree_root tree; 56 raw_spinlock_t lock; 57 unsigned int index; 58 unsigned long *reg; 59 #ifdef CONFIG_SMP 60 unsigned long *smp; 61 #endif 62 unsigned int nr_reg; 63 struct intc_handle_int *prio; 64 unsigned int nr_prio; 65 struct intc_handle_int *sense; 66 unsigned int nr_sense; 67 struct intc_window *window; 68 unsigned int nr_windows; 69 struct irq_chip chip; 70 bool skip_suspend; 71 }; 72 73 74 enum { 75 REG_FN_ERR = 0, 76 REG_FN_TEST_BASE = 1, 77 REG_FN_WRITE_BASE = 5, 78 REG_FN_MODIFY_BASE = 9 79 }; 80 81 enum { MODE_ENABLE_REG = 0, /* Bit(s) set -> interrupt enabled */ 82 MODE_MASK_REG, /* Bit(s) set -> interrupt disabled */ 83 MODE_DUAL_REG, /* Two registers, set bit to enable / disable */ 84 MODE_PRIO_REG, /* Priority value written to enable interrupt */ 85 MODE_PCLR_REG, /* Above plus all bits set to disable interrupt */ 86 }; 87 88 static inline struct intc_desc_int *get_intc_desc(unsigned int irq) 89 { 90 struct irq_chip *chip = irq_get_chip(irq); 91 92 return container_of(chip, struct intc_desc_int, chip); 93 } 94 95 /* 96 * Grumble. 97 */ 98 static inline void activate_irq(int irq) 99 { 100 #ifdef CONFIG_ARM 101 /* ARM requires an extra step to clear IRQ_NOREQUEST, which it 102 * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE. 103 */ 104 set_irq_flags(irq, IRQF_VALID); 105 #else 106 /* same effect on other architectures */ 107 irq_set_noprobe(irq); 108 #endif 109 } 110 111 static inline int intc_handle_int_cmp(const void *a, const void *b) 112 { 113 const struct intc_handle_int *_a = a; 114 const struct intc_handle_int *_b = b; 115 116 return _a->irq - _b->irq; 117 } 118 119 /* access.c */ 120 extern unsigned long 121 (*intc_reg_fns[])(unsigned long addr, unsigned long h, unsigned long data); 122 123 extern unsigned long 124 (*intc_enable_fns[])(unsigned long addr, unsigned long handle, 125 unsigned long (*fn)(unsigned long, 126 unsigned long, unsigned long), 127 unsigned int irq); 128 extern unsigned long 129 (*intc_disable_fns[])(unsigned long addr, unsigned long handle, 130 unsigned long (*fn)(unsigned long, 131 unsigned long, unsigned long), 132 unsigned int irq); 133 extern unsigned long 134 (*intc_enable_noprio_fns[])(unsigned long addr, unsigned long handle, 135 unsigned long (*fn)(unsigned long, 136 unsigned long, unsigned long), 137 unsigned int irq); 138 139 unsigned long intc_phys_to_virt(struct intc_desc_int *d, unsigned long address); 140 unsigned int intc_get_reg(struct intc_desc_int *d, unsigned long address); 141 unsigned int intc_set_field_from_handle(unsigned int value, 142 unsigned int field_value, 143 unsigned int handle); 144 unsigned long intc_get_field_from_handle(unsigned int value, 145 unsigned int handle); 146 147 /* balancing.c */ 148 #ifdef CONFIG_INTC_BALANCING 149 void intc_balancing_enable(unsigned int irq); 150 void intc_balancing_disable(unsigned int irq); 151 void intc_set_dist_handle(unsigned int irq, struct intc_desc *desc, 152 struct intc_desc_int *d, intc_enum id); 153 #else 154 static inline void intc_balancing_enable(unsigned int irq) { } 155 static inline void intc_balancing_disable(unsigned int irq) { } 156 static inline void 157 intc_set_dist_handle(unsigned int irq, struct intc_desc *desc, 158 struct intc_desc_int *d, intc_enum id) { } 159 #endif 160 161 /* chip.c */ 162 extern struct irq_chip intc_irq_chip; 163 void _intc_enable(struct irq_data *data, unsigned long handle); 164 165 /* core.c */ 166 extern struct list_head intc_list; 167 extern raw_spinlock_t intc_big_lock; 168 extern struct bus_type intc_subsys; 169 170 unsigned int intc_get_dfl_prio_level(void); 171 unsigned int intc_get_prio_level(unsigned int irq); 172 void intc_set_prio_level(unsigned int irq, unsigned int level); 173 174 /* handle.c */ 175 unsigned int intc_get_mask_handle(struct intc_desc *desc, 176 struct intc_desc_int *d, 177 intc_enum enum_id, int do_grps); 178 unsigned int intc_get_prio_handle(struct intc_desc *desc, 179 struct intc_desc_int *d, 180 intc_enum enum_id, int do_grps); 181 unsigned int intc_get_sense_handle(struct intc_desc *desc, 182 struct intc_desc_int *d, 183 intc_enum enum_id); 184 void intc_set_ack_handle(unsigned int irq, struct intc_desc *desc, 185 struct intc_desc_int *d, intc_enum id); 186 unsigned long intc_get_ack_handle(unsigned int irq); 187 void intc_enable_disable_enum(struct intc_desc *desc, struct intc_desc_int *d, 188 intc_enum enum_id, int enable); 189 190 /* virq.c */ 191 void intc_subgroup_init(struct intc_desc *desc, struct intc_desc_int *d); 192 void intc_irq_xlate_set(unsigned int irq, intc_enum id, struct intc_desc_int *d); 193 struct intc_map_entry *intc_irq_xlate_get(unsigned int irq); 194