11d6a21b0SPaul Mundtconfig SH_INTC 21d6a21b0SPaul Mundt def_bool y 31d6a21b0SPaul Mundt select IRQ_DOMAIN 41d6a21b0SPaul Mundt 533fc1a21SPaul Mundtcomment "Interrupt controller options" 633fc1a21SPaul Mundt 733fc1a21SPaul Mundtconfig INTC_USERIMASK 833fc1a21SPaul Mundt bool "Userspace interrupt masking support" 939c5abbcSGeert Uytterhoeven depends on (SUPERH && CPU_SH4A) || COMPILE_TEST 1033fc1a21SPaul Mundt help 1133fc1a21SPaul Mundt This enables support for hardware-assisted userspace hardirq 1233fc1a21SPaul Mundt masking. 1333fc1a21SPaul Mundt 1433fc1a21SPaul Mundt SH-4A and newer interrupt blocks all support a special shadowed 1533fc1a21SPaul Mundt page with all non-masking registers obscured when mapped in to 1633fc1a21SPaul Mundt userspace. This is primarily for use by userspace device 1733fc1a21SPaul Mundt drivers that are using special priority levels. 1833fc1a21SPaul Mundt 1933fc1a21SPaul Mundt If in doubt, say N. 2033fc1a21SPaul Mundt 2133fc1a21SPaul Mundtconfig INTC_BALANCING 2233fc1a21SPaul Mundt bool "Hardware IRQ balancing support" 2333fc1a21SPaul Mundt depends on SMP && SUPERH && CPU_SHX3 2433fc1a21SPaul Mundt help 2533fc1a21SPaul Mundt This enables support for IRQ auto-distribution mode on SH-X3 2633fc1a21SPaul Mundt SMP parts. All of the balancing and CPU wakeup decisions are 2733fc1a21SPaul Mundt taken care of automatically by hardware for distributed 2833fc1a21SPaul Mundt vectors. 2933fc1a21SPaul Mundt 3033fc1a21SPaul Mundt If in doubt, say N. 3133fc1a21SPaul Mundt 3233fc1a21SPaul Mundtconfig INTC_MAPPING_DEBUG 3333fc1a21SPaul Mundt bool "Expose IRQ to per-controller id mapping via debugfs" 3433fc1a21SPaul Mundt depends on DEBUG_FS 3533fc1a21SPaul Mundt help 3633fc1a21SPaul Mundt This will create a debugfs entry for showing the relationship 3733fc1a21SPaul Mundt between system IRQs and the per-controller id tables. 3833fc1a21SPaul Mundt 3933fc1a21SPaul Mundt If in doubt, say N. 40