1 /* 2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family 3 * of PCI-SCSI IO processors. 4 * 5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr> 6 * Copyright (c) 2003-2005 Matthew Wilcox <matthew@wil.cx> 7 * 8 * This driver is derived from the Linux sym53c8xx driver. 9 * Copyright (C) 1998-2000 Gerard Roudier 10 * 11 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been 12 * a port of the FreeBSD ncr driver to Linux-1.2.13. 13 * 14 * The original ncr driver has been written for 386bsd and FreeBSD by 15 * Wolfgang Stanglmeier <wolf@cologne.de> 16 * Stefan Esser <se@mi.Uni-Koeln.de> 17 * Copyright (C) 1994 Wolfgang Stanglmeier 18 * 19 * Other major contributions: 20 * 21 * NVRAM detection and reading. 22 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk> 23 * 24 *----------------------------------------------------------------------------- 25 * 26 * This program is free software; you can redistribute it and/or modify 27 * it under the terms of the GNU General Public License as published by 28 * the Free Software Foundation; either version 2 of the License, or 29 * (at your option) any later version. 30 * 31 * This program is distributed in the hope that it will be useful, 32 * but WITHOUT ANY WARRANTY; without even the implied warranty of 33 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 34 * GNU General Public License for more details. 35 * 36 * You should have received a copy of the GNU General Public License 37 * along with this program; if not, write to the Free Software 38 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 39 */ 40 41 #include <linux/slab.h> 42 #include <asm/param.h> /* for timeouts in units of HZ */ 43 44 #include "sym_glue.h" 45 #include "sym_nvram.h" 46 47 #if 0 48 #define SYM_DEBUG_GENERIC_SUPPORT 49 #endif 50 51 /* 52 * Needed function prototypes. 53 */ 54 static void sym_int_ma (struct sym_hcb *np); 55 static void sym_int_sir(struct sym_hcb *); 56 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np); 57 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa); 58 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln); 59 static void sym_complete_error (struct sym_hcb *np, struct sym_ccb *cp); 60 static void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp); 61 static int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp); 62 63 /* 64 * Print a buffer in hexadecimal format with a ".\n" at end. 65 */ 66 static void sym_printl_hex(u_char *p, int n) 67 { 68 while (n-- > 0) 69 printf (" %x", *p++); 70 printf (".\n"); 71 } 72 73 static void sym_print_msg(struct sym_ccb *cp, char *label, u_char *msg) 74 { 75 if (label) 76 sym_print_addr(cp->cmd, "%s: ", label); 77 else 78 sym_print_addr(cp->cmd, ""); 79 80 spi_print_msg(msg); 81 printf("\n"); 82 } 83 84 static void sym_print_nego_msg(struct sym_hcb *np, int target, char *label, u_char *msg) 85 { 86 struct sym_tcb *tp = &np->target[target]; 87 dev_info(&tp->starget->dev, "%s: ", label); 88 89 spi_print_msg(msg); 90 printf("\n"); 91 } 92 93 /* 94 * Print something that tells about extended errors. 95 */ 96 void sym_print_xerr(struct scsi_cmnd *cmd, int x_status) 97 { 98 if (x_status & XE_PARITY_ERR) { 99 sym_print_addr(cmd, "unrecovered SCSI parity error.\n"); 100 } 101 if (x_status & XE_EXTRA_DATA) { 102 sym_print_addr(cmd, "extraneous data discarded.\n"); 103 } 104 if (x_status & XE_BAD_PHASE) { 105 sym_print_addr(cmd, "illegal scsi phase (4/5).\n"); 106 } 107 if (x_status & XE_SODL_UNRUN) { 108 sym_print_addr(cmd, "ODD transfer in DATA OUT phase.\n"); 109 } 110 if (x_status & XE_SWIDE_OVRUN) { 111 sym_print_addr(cmd, "ODD transfer in DATA IN phase.\n"); 112 } 113 } 114 115 /* 116 * Return a string for SCSI BUS mode. 117 */ 118 static char *sym_scsi_bus_mode(int mode) 119 { 120 switch(mode) { 121 case SMODE_HVD: return "HVD"; 122 case SMODE_SE: return "SE"; 123 case SMODE_LVD: return "LVD"; 124 } 125 return "??"; 126 } 127 128 /* 129 * Soft reset the chip. 130 * 131 * Raising SRST when the chip is running may cause 132 * problems on dual function chips (see below). 133 * On the other hand, LVD devices need some delay 134 * to settle and report actual BUS mode in STEST4. 135 */ 136 static void sym_chip_reset (struct sym_hcb *np) 137 { 138 OUTB(np, nc_istat, SRST); 139 INB(np, nc_mbox1); 140 udelay(10); 141 OUTB(np, nc_istat, 0); 142 INB(np, nc_mbox1); 143 udelay(2000); /* For BUS MODE to settle */ 144 } 145 146 /* 147 * Really soft reset the chip.:) 148 * 149 * Some 896 and 876 chip revisions may hang-up if we set 150 * the SRST (soft reset) bit at the wrong time when SCRIPTS 151 * are running. 152 * So, we need to abort the current operation prior to 153 * soft resetting the chip. 154 */ 155 static void sym_soft_reset (struct sym_hcb *np) 156 { 157 u_char istat = 0; 158 int i; 159 160 if (!(np->features & FE_ISTAT1) || !(INB(np, nc_istat1) & SCRUN)) 161 goto do_chip_reset; 162 163 OUTB(np, nc_istat, CABRT); 164 for (i = 100000 ; i ; --i) { 165 istat = INB(np, nc_istat); 166 if (istat & SIP) { 167 INW(np, nc_sist); 168 } 169 else if (istat & DIP) { 170 if (INB(np, nc_dstat) & ABRT) 171 break; 172 } 173 udelay(5); 174 } 175 OUTB(np, nc_istat, 0); 176 if (!i) 177 printf("%s: unable to abort current chip operation, " 178 "ISTAT=0x%02x.\n", sym_name(np), istat); 179 do_chip_reset: 180 sym_chip_reset(np); 181 } 182 183 /* 184 * Start reset process. 185 * 186 * The interrupt handler will reinitialize the chip. 187 */ 188 static void sym_start_reset(struct sym_hcb *np) 189 { 190 sym_reset_scsi_bus(np, 1); 191 } 192 193 int sym_reset_scsi_bus(struct sym_hcb *np, int enab_int) 194 { 195 u32 term; 196 int retv = 0; 197 198 sym_soft_reset(np); /* Soft reset the chip */ 199 if (enab_int) 200 OUTW(np, nc_sien, RST); 201 /* 202 * Enable Tolerant, reset IRQD if present and 203 * properly set IRQ mode, prior to resetting the bus. 204 */ 205 OUTB(np, nc_stest3, TE); 206 OUTB(np, nc_dcntl, (np->rv_dcntl & IRQM)); 207 OUTB(np, nc_scntl1, CRST); 208 INB(np, nc_mbox1); 209 udelay(200); 210 211 if (!SYM_SETUP_SCSI_BUS_CHECK) 212 goto out; 213 /* 214 * Check for no terminators or SCSI bus shorts to ground. 215 * Read SCSI data bus, data parity bits and control signals. 216 * We are expecting RESET to be TRUE and other signals to be 217 * FALSE. 218 */ 219 term = INB(np, nc_sstat0); 220 term = ((term & 2) << 7) + ((term & 1) << 17); /* rst sdp0 */ 221 term |= ((INB(np, nc_sstat2) & 0x01) << 26) | /* sdp1 */ 222 ((INW(np, nc_sbdl) & 0xff) << 9) | /* d7-0 */ 223 ((INW(np, nc_sbdl) & 0xff00) << 10) | /* d15-8 */ 224 INB(np, nc_sbcl); /* req ack bsy sel atn msg cd io */ 225 226 if (!np->maxwide) 227 term &= 0x3ffff; 228 229 if (term != (2<<7)) { 230 printf("%s: suspicious SCSI data while resetting the BUS.\n", 231 sym_name(np)); 232 printf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = " 233 "0x%lx, expecting 0x%lx\n", 234 sym_name(np), 235 (np->features & FE_WIDE) ? "dp1,d15-8," : "", 236 (u_long)term, (u_long)(2<<7)); 237 if (SYM_SETUP_SCSI_BUS_CHECK == 1) 238 retv = 1; 239 } 240 out: 241 OUTB(np, nc_scntl1, 0); 242 return retv; 243 } 244 245 /* 246 * Select SCSI clock frequency 247 */ 248 static void sym_selectclock(struct sym_hcb *np, u_char scntl3) 249 { 250 /* 251 * If multiplier not present or not selected, leave here. 252 */ 253 if (np->multiplier <= 1) { 254 OUTB(np, nc_scntl3, scntl3); 255 return; 256 } 257 258 if (sym_verbose >= 2) 259 printf ("%s: enabling clock multiplier\n", sym_name(np)); 260 261 OUTB(np, nc_stest1, DBLEN); /* Enable clock multiplier */ 262 /* 263 * Wait for the LCKFRQ bit to be set if supported by the chip. 264 * Otherwise wait 50 micro-seconds (at least). 265 */ 266 if (np->features & FE_LCKFRQ) { 267 int i = 20; 268 while (!(INB(np, nc_stest4) & LCKFRQ) && --i > 0) 269 udelay(20); 270 if (!i) 271 printf("%s: the chip cannot lock the frequency\n", 272 sym_name(np)); 273 } else { 274 INB(np, nc_mbox1); 275 udelay(50+10); 276 } 277 OUTB(np, nc_stest3, HSC); /* Halt the scsi clock */ 278 OUTB(np, nc_scntl3, scntl3); 279 OUTB(np, nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ 280 OUTB(np, nc_stest3, 0x00); /* Restart scsi clock */ 281 } 282 283 284 /* 285 * Determine the chip's clock frequency. 286 * 287 * This is essential for the negotiation of the synchronous 288 * transfer rate. 289 * 290 * Note: we have to return the correct value. 291 * THERE IS NO SAFE DEFAULT VALUE. 292 * 293 * Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. 294 * 53C860 and 53C875 rev. 1 support fast20 transfers but 295 * do not have a clock doubler and so are provided with a 296 * 80 MHz clock. All other fast20 boards incorporate a doubler 297 * and so should be delivered with a 40 MHz clock. 298 * The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base 299 * clock and provide a clock quadrupler (160 Mhz). 300 */ 301 302 /* 303 * calculate SCSI clock frequency (in KHz) 304 */ 305 static unsigned getfreq (struct sym_hcb *np, int gen) 306 { 307 unsigned int ms = 0; 308 unsigned int f; 309 310 /* 311 * Measure GEN timer delay in order 312 * to calculate SCSI clock frequency 313 * 314 * This code will never execute too 315 * many loop iterations (if DELAY is 316 * reasonably correct). It could get 317 * too low a delay (too high a freq.) 318 * if the CPU is slow executing the 319 * loop for some reason (an NMI, for 320 * example). For this reason we will 321 * if multiple measurements are to be 322 * performed trust the higher delay 323 * (lower frequency returned). 324 */ 325 OUTW(np, nc_sien, 0); /* mask all scsi interrupts */ 326 INW(np, nc_sist); /* clear pending scsi interrupt */ 327 OUTB(np, nc_dien, 0); /* mask all dma interrupts */ 328 INW(np, nc_sist); /* another one, just to be sure :) */ 329 /* 330 * The C1010-33 core does not report GEN in SIST, 331 * if this interrupt is masked in SIEN. 332 * I don't know yet if the C1010-66 behaves the same way. 333 */ 334 if (np->features & FE_C10) { 335 OUTW(np, nc_sien, GEN); 336 OUTB(np, nc_istat1, SIRQD); 337 } 338 OUTB(np, nc_scntl3, 4); /* set pre-scaler to divide by 3 */ 339 OUTB(np, nc_stime1, 0); /* disable general purpose timer */ 340 OUTB(np, nc_stime1, gen); /* set to nominal delay of 1<<gen * 125us */ 341 while (!(INW(np, nc_sist) & GEN) && ms++ < 100000) 342 udelay(1000/4); /* count in 1/4 of ms */ 343 OUTB(np, nc_stime1, 0); /* disable general purpose timer */ 344 /* 345 * Undo C1010-33 specific settings. 346 */ 347 if (np->features & FE_C10) { 348 OUTW(np, nc_sien, 0); 349 OUTB(np, nc_istat1, 0); 350 } 351 /* 352 * set prescaler to divide by whatever 0 means 353 * 0 ought to choose divide by 2, but appears 354 * to set divide by 3.5 mode in my 53c810 ... 355 */ 356 OUTB(np, nc_scntl3, 0); 357 358 /* 359 * adjust for prescaler, and convert into KHz 360 */ 361 f = ms ? ((1 << gen) * (4340*4)) / ms : 0; 362 363 /* 364 * The C1010-33 result is biased by a factor 365 * of 2/3 compared to earlier chips. 366 */ 367 if (np->features & FE_C10) 368 f = (f * 2) / 3; 369 370 if (sym_verbose >= 2) 371 printf ("%s: Delay (GEN=%d): %u msec, %u KHz\n", 372 sym_name(np), gen, ms/4, f); 373 374 return f; 375 } 376 377 static unsigned sym_getfreq (struct sym_hcb *np) 378 { 379 u_int f1, f2; 380 int gen = 8; 381 382 getfreq (np, gen); /* throw away first result */ 383 f1 = getfreq (np, gen); 384 f2 = getfreq (np, gen); 385 if (f1 > f2) f1 = f2; /* trust lower result */ 386 return f1; 387 } 388 389 /* 390 * Get/probe chip SCSI clock frequency 391 */ 392 static void sym_getclock (struct sym_hcb *np, int mult) 393 { 394 unsigned char scntl3 = np->sv_scntl3; 395 unsigned char stest1 = np->sv_stest1; 396 unsigned f1; 397 398 np->multiplier = 1; 399 f1 = 40000; 400 /* 401 * True with 875/895/896/895A with clock multiplier selected 402 */ 403 if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) { 404 if (sym_verbose >= 2) 405 printf ("%s: clock multiplier found\n", sym_name(np)); 406 np->multiplier = mult; 407 } 408 409 /* 410 * If multiplier not found or scntl3 not 7,5,3, 411 * reset chip and get frequency from general purpose timer. 412 * Otherwise trust scntl3 BIOS setting. 413 */ 414 if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) { 415 OUTB(np, nc_stest1, 0); /* make sure doubler is OFF */ 416 f1 = sym_getfreq (np); 417 418 if (sym_verbose) 419 printf ("%s: chip clock is %uKHz\n", sym_name(np), f1); 420 421 if (f1 < 45000) f1 = 40000; 422 else if (f1 < 55000) f1 = 50000; 423 else f1 = 80000; 424 425 if (f1 < 80000 && mult > 1) { 426 if (sym_verbose >= 2) 427 printf ("%s: clock multiplier assumed\n", 428 sym_name(np)); 429 np->multiplier = mult; 430 } 431 } else { 432 if ((scntl3 & 7) == 3) f1 = 40000; 433 else if ((scntl3 & 7) == 5) f1 = 80000; 434 else f1 = 160000; 435 436 f1 /= np->multiplier; 437 } 438 439 /* 440 * Compute controller synchronous parameters. 441 */ 442 f1 *= np->multiplier; 443 np->clock_khz = f1; 444 } 445 446 /* 447 * Get/probe PCI clock frequency 448 */ 449 static int sym_getpciclock (struct sym_hcb *np) 450 { 451 int f = 0; 452 453 /* 454 * For now, we only need to know about the actual 455 * PCI BUS clock frequency for C1010-66 chips. 456 */ 457 #if 1 458 if (np->features & FE_66MHZ) { 459 #else 460 if (1) { 461 #endif 462 OUTB(np, nc_stest1, SCLK); /* Use the PCI clock as SCSI clock */ 463 f = sym_getfreq(np); 464 OUTB(np, nc_stest1, 0); 465 } 466 np->pciclk_khz = f; 467 468 return f; 469 } 470 471 /* 472 * SYMBIOS chip clock divisor table. 473 * 474 * Divisors are multiplied by 10,000,000 in order to make 475 * calculations more simple. 476 */ 477 #define _5M 5000000 478 static const u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; 479 480 /* 481 * Get clock factor and sync divisor for a given 482 * synchronous factor period. 483 */ 484 static int 485 sym_getsync(struct sym_hcb *np, u_char dt, u_char sfac, u_char *divp, u_char *fakp) 486 { 487 u32 clk = np->clock_khz; /* SCSI clock frequency in kHz */ 488 int div = np->clock_divn; /* Number of divisors supported */ 489 u32 fak; /* Sync factor in sxfer */ 490 u32 per; /* Period in tenths of ns */ 491 u32 kpc; /* (per * clk) */ 492 int ret; 493 494 /* 495 * Compute the synchronous period in tenths of nano-seconds 496 */ 497 if (dt && sfac <= 9) per = 125; 498 else if (sfac <= 10) per = 250; 499 else if (sfac == 11) per = 303; 500 else if (sfac == 12) per = 500; 501 else per = 40 * sfac; 502 ret = per; 503 504 kpc = per * clk; 505 if (dt) 506 kpc <<= 1; 507 508 /* 509 * For earliest C10 revision 0, we cannot use extra 510 * clocks for the setting of the SCSI clocking. 511 * Note that this limits the lowest sync data transfer 512 * to 5 Mega-transfers per second and may result in 513 * using higher clock divisors. 514 */ 515 #if 1 516 if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) { 517 /* 518 * Look for the lowest clock divisor that allows an 519 * output speed not faster than the period. 520 */ 521 while (div > 0) { 522 --div; 523 if (kpc > (div_10M[div] << 2)) { 524 ++div; 525 break; 526 } 527 } 528 fak = 0; /* No extra clocks */ 529 if (div == np->clock_divn) { /* Are we too fast ? */ 530 ret = -1; 531 } 532 *divp = div; 533 *fakp = fak; 534 return ret; 535 } 536 #endif 537 538 /* 539 * Look for the greatest clock divisor that allows an 540 * input speed faster than the period. 541 */ 542 while (div-- > 0) 543 if (kpc >= (div_10M[div] << 2)) break; 544 545 /* 546 * Calculate the lowest clock factor that allows an output 547 * speed not faster than the period, and the max output speed. 548 * If fak >= 1 we will set both XCLKH_ST and XCLKH_DT. 549 * If fak >= 2 we will also set XCLKS_ST and XCLKS_DT. 550 */ 551 if (dt) { 552 fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2; 553 /* ret = ((2+fak)*div_10M[div])/np->clock_khz; */ 554 } else { 555 fak = (kpc - 1) / div_10M[div] + 1 - 4; 556 /* ret = ((4+fak)*div_10M[div])/np->clock_khz; */ 557 } 558 559 /* 560 * Check against our hardware limits, or bugs :). 561 */ 562 if (fak > 2) { 563 fak = 2; 564 ret = -1; 565 } 566 567 /* 568 * Compute and return sync parameters. 569 */ 570 *divp = div; 571 *fakp = fak; 572 573 return ret; 574 } 575 576 /* 577 * SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64, 578 * 128 transfers. All chips support at least 16 transfers 579 * bursts. The 825A, 875 and 895 chips support bursts of up 580 * to 128 transfers and the 895A and 896 support bursts of up 581 * to 64 transfers. All other chips support up to 16 582 * transfers bursts. 583 * 584 * For PCI 32 bit data transfers each transfer is a DWORD. 585 * It is a QUADWORD (8 bytes) for PCI 64 bit data transfers. 586 * 587 * We use log base 2 (burst length) as internal code, with 588 * value 0 meaning "burst disabled". 589 */ 590 591 /* 592 * Burst length from burst code. 593 */ 594 #define burst_length(bc) (!(bc))? 0 : 1 << (bc) 595 596 /* 597 * Burst code from io register bits. 598 */ 599 #define burst_code(dmode, ctest4, ctest5) \ 600 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1 601 602 /* 603 * Set initial io register bits from burst code. 604 */ 605 static inline void sym_init_burst(struct sym_hcb *np, u_char bc) 606 { 607 np->rv_ctest4 &= ~0x80; 608 np->rv_dmode &= ~(0x3 << 6); 609 np->rv_ctest5 &= ~0x4; 610 611 if (!bc) { 612 np->rv_ctest4 |= 0x80; 613 } 614 else { 615 --bc; 616 np->rv_dmode |= ((bc & 0x3) << 6); 617 np->rv_ctest5 |= (bc & 0x4); 618 } 619 } 620 621 /* 622 * Save initial settings of some IO registers. 623 * Assumed to have been set by BIOS. 624 * We cannot reset the chip prior to reading the 625 * IO registers, since informations will be lost. 626 * Since the SCRIPTS processor may be running, this 627 * is not safe on paper, but it seems to work quite 628 * well. :) 629 */ 630 static void sym_save_initial_setting (struct sym_hcb *np) 631 { 632 np->sv_scntl0 = INB(np, nc_scntl0) & 0x0a; 633 np->sv_scntl3 = INB(np, nc_scntl3) & 0x07; 634 np->sv_dmode = INB(np, nc_dmode) & 0xce; 635 np->sv_dcntl = INB(np, nc_dcntl) & 0xa8; 636 np->sv_ctest3 = INB(np, nc_ctest3) & 0x01; 637 np->sv_ctest4 = INB(np, nc_ctest4) & 0x80; 638 np->sv_gpcntl = INB(np, nc_gpcntl); 639 np->sv_stest1 = INB(np, nc_stest1); 640 np->sv_stest2 = INB(np, nc_stest2) & 0x20; 641 np->sv_stest4 = INB(np, nc_stest4); 642 if (np->features & FE_C10) { /* Always large DMA fifo + ultra3 */ 643 np->sv_scntl4 = INB(np, nc_scntl4); 644 np->sv_ctest5 = INB(np, nc_ctest5) & 0x04; 645 } 646 else 647 np->sv_ctest5 = INB(np, nc_ctest5) & 0x24; 648 } 649 650 /* 651 * Set SCSI BUS mode. 652 * - LVD capable chips (895/895A/896/1010) report the current BUS mode 653 * through the STEST4 IO register. 654 * - For previous generation chips (825/825A/875), the user has to tell us 655 * how to check against HVD, since a 100% safe algorithm is not possible. 656 */ 657 static void sym_set_bus_mode(struct sym_hcb *np, struct sym_nvram *nvram) 658 { 659 if (np->scsi_mode) 660 return; 661 662 np->scsi_mode = SMODE_SE; 663 if (np->features & (FE_ULTRA2|FE_ULTRA3)) 664 np->scsi_mode = (np->sv_stest4 & SMODE); 665 else if (np->features & FE_DIFF) { 666 if (SYM_SETUP_SCSI_DIFF == 1) { 667 if (np->sv_scntl3) { 668 if (np->sv_stest2 & 0x20) 669 np->scsi_mode = SMODE_HVD; 670 } else if (nvram->type == SYM_SYMBIOS_NVRAM) { 671 if (!(INB(np, nc_gpreg) & 0x08)) 672 np->scsi_mode = SMODE_HVD; 673 } 674 } else if (SYM_SETUP_SCSI_DIFF == 2) 675 np->scsi_mode = SMODE_HVD; 676 } 677 if (np->scsi_mode == SMODE_HVD) 678 np->rv_stest2 |= 0x20; 679 } 680 681 /* 682 * Prepare io register values used by sym_start_up() 683 * according to selected and supported features. 684 */ 685 static int sym_prepare_setting(struct Scsi_Host *shost, struct sym_hcb *np, struct sym_nvram *nvram) 686 { 687 struct sym_data *sym_data = shost_priv(shost); 688 struct pci_dev *pdev = sym_data->pdev; 689 u_char burst_max; 690 u32 period; 691 int i; 692 693 np->maxwide = (np->features & FE_WIDE) ? 1 : 0; 694 695 /* 696 * Guess the frequency of the chip's clock. 697 */ 698 if (np->features & (FE_ULTRA3 | FE_ULTRA2)) 699 np->clock_khz = 160000; 700 else if (np->features & FE_ULTRA) 701 np->clock_khz = 80000; 702 else 703 np->clock_khz = 40000; 704 705 /* 706 * Get the clock multiplier factor. 707 */ 708 if (np->features & FE_QUAD) 709 np->multiplier = 4; 710 else if (np->features & FE_DBLR) 711 np->multiplier = 2; 712 else 713 np->multiplier = 1; 714 715 /* 716 * Measure SCSI clock frequency for chips 717 * it may vary from assumed one. 718 */ 719 if (np->features & FE_VARCLK) 720 sym_getclock(np, np->multiplier); 721 722 /* 723 * Divisor to be used for async (timer pre-scaler). 724 */ 725 i = np->clock_divn - 1; 726 while (--i >= 0) { 727 if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) { 728 ++i; 729 break; 730 } 731 } 732 np->rv_scntl3 = i+1; 733 734 /* 735 * The C1010 uses hardwired divisors for async. 736 * So, we just throw away, the async. divisor.:-) 737 */ 738 if (np->features & FE_C10) 739 np->rv_scntl3 = 0; 740 741 /* 742 * Minimum synchronous period factor supported by the chip. 743 * Btw, 'period' is in tenths of nanoseconds. 744 */ 745 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; 746 747 if (period <= 250) np->minsync = 10; 748 else if (period <= 303) np->minsync = 11; 749 else if (period <= 500) np->minsync = 12; 750 else np->minsync = (period + 40 - 1) / 40; 751 752 /* 753 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). 754 */ 755 if (np->minsync < 25 && 756 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3))) 757 np->minsync = 25; 758 else if (np->minsync < 12 && 759 !(np->features & (FE_ULTRA2|FE_ULTRA3))) 760 np->minsync = 12; 761 762 /* 763 * Maximum synchronous period factor supported by the chip. 764 */ 765 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); 766 np->maxsync = period > 2540 ? 254 : period / 10; 767 768 /* 769 * If chip is a C1010, guess the sync limits in DT mode. 770 */ 771 if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) { 772 if (np->clock_khz == 160000) { 773 np->minsync_dt = 9; 774 np->maxsync_dt = 50; 775 np->maxoffs_dt = nvram->type ? 62 : 31; 776 } 777 } 778 779 /* 780 * 64 bit addressing (895A/896/1010) ? 781 */ 782 if (np->features & FE_DAC) { 783 if (!use_dac(np)) 784 np->rv_ccntl1 |= (DDAC); 785 else if (SYM_CONF_DMA_ADDRESSING_MODE == 1) 786 np->rv_ccntl1 |= (XTIMOD | EXTIBMV); 787 else if (SYM_CONF_DMA_ADDRESSING_MODE == 2) 788 np->rv_ccntl1 |= (0 | EXTIBMV); 789 } 790 791 /* 792 * Phase mismatch handled by SCRIPTS (895A/896/1010) ? 793 */ 794 if (np->features & FE_NOPM) 795 np->rv_ccntl0 |= (ENPMJ); 796 797 /* 798 * C1010-33 Errata: Part Number:609-039638 (rev. 1) is fixed. 799 * In dual channel mode, contention occurs if internal cycles 800 * are used. Disable internal cycles. 801 */ 802 if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_33 && 803 pdev->revision < 0x1) 804 np->rv_ccntl0 |= DILS; 805 806 /* 807 * Select burst length (dwords) 808 */ 809 burst_max = SYM_SETUP_BURST_ORDER; 810 if (burst_max == 255) 811 burst_max = burst_code(np->sv_dmode, np->sv_ctest4, 812 np->sv_ctest5); 813 if (burst_max > 7) 814 burst_max = 7; 815 if (burst_max > np->maxburst) 816 burst_max = np->maxburst; 817 818 /* 819 * DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2. 820 * This chip and the 860 Rev 1 may wrongly use PCI cache line 821 * based transactions on LOAD/STORE instructions. So we have 822 * to prevent these chips from using such PCI transactions in 823 * this driver. The generic ncr driver that does not use 824 * LOAD/STORE instructions does not need this work-around. 825 */ 826 if ((pdev->device == PCI_DEVICE_ID_NCR_53C810 && 827 pdev->revision >= 0x10 && pdev->revision <= 0x11) || 828 (pdev->device == PCI_DEVICE_ID_NCR_53C860 && 829 pdev->revision <= 0x1)) 830 np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP); 831 832 /* 833 * Select all supported special features. 834 * If we are using on-board RAM for scripts, prefetch (PFEN) 835 * does not help, but burst op fetch (BOF) does. 836 * Disabling PFEN makes sure BOF will be used. 837 */ 838 if (np->features & FE_ERL) 839 np->rv_dmode |= ERL; /* Enable Read Line */ 840 if (np->features & FE_BOF) 841 np->rv_dmode |= BOF; /* Burst Opcode Fetch */ 842 if (np->features & FE_ERMP) 843 np->rv_dmode |= ERMP; /* Enable Read Multiple */ 844 #if 1 845 if ((np->features & FE_PFEN) && !np->ram_ba) 846 #else 847 if (np->features & FE_PFEN) 848 #endif 849 np->rv_dcntl |= PFEN; /* Prefetch Enable */ 850 if (np->features & FE_CLSE) 851 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ 852 if (np->features & FE_WRIE) 853 np->rv_ctest3 |= WRIE; /* Write and Invalidate */ 854 if (np->features & FE_DFS) 855 np->rv_ctest5 |= DFS; /* Dma Fifo Size */ 856 857 /* 858 * Select some other 859 */ 860 np->rv_ctest4 |= MPEE; /* Master parity checking */ 861 np->rv_scntl0 |= 0x0a; /* full arb., ena parity, par->ATN */ 862 863 /* 864 * Get parity checking, host ID and verbose mode from NVRAM 865 */ 866 np->myaddr = 255; 867 np->scsi_mode = 0; 868 sym_nvram_setup_host(shost, np, nvram); 869 870 /* 871 * Get SCSI addr of host adapter (set by bios?). 872 */ 873 if (np->myaddr == 255) { 874 np->myaddr = INB(np, nc_scid) & 0x07; 875 if (!np->myaddr) 876 np->myaddr = SYM_SETUP_HOST_ID; 877 } 878 879 /* 880 * Prepare initial io register bits for burst length 881 */ 882 sym_init_burst(np, burst_max); 883 884 sym_set_bus_mode(np, nvram); 885 886 /* 887 * Set LED support from SCRIPTS. 888 * Ignore this feature for boards known to use a 889 * specific GPIO wiring and for the 895A, 896 890 * and 1010 that drive the LED directly. 891 */ 892 if ((SYM_SETUP_SCSI_LED || 893 (nvram->type == SYM_SYMBIOS_NVRAM || 894 (nvram->type == SYM_TEKRAM_NVRAM && 895 pdev->device == PCI_DEVICE_ID_NCR_53C895))) && 896 !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01)) 897 np->features |= FE_LED0; 898 899 /* 900 * Set irq mode. 901 */ 902 switch(SYM_SETUP_IRQ_MODE & 3) { 903 case 2: 904 np->rv_dcntl |= IRQM; 905 break; 906 case 1: 907 np->rv_dcntl |= (np->sv_dcntl & IRQM); 908 break; 909 default: 910 break; 911 } 912 913 /* 914 * Configure targets according to driver setup. 915 * If NVRAM present get targets setup from NVRAM. 916 */ 917 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) { 918 struct sym_tcb *tp = &np->target[i]; 919 920 tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED); 921 tp->usrtags = SYM_SETUP_MAX_TAG; 922 tp->usr_width = np->maxwide; 923 tp->usr_period = 9; 924 925 sym_nvram_setup_target(tp, i, nvram); 926 927 if (!tp->usrtags) 928 tp->usrflags &= ~SYM_TAGS_ENABLED; 929 } 930 931 /* 932 * Let user know about the settings. 933 */ 934 printf("%s: %s, ID %d, Fast-%d, %s, %s\n", sym_name(np), 935 sym_nvram_type(nvram), np->myaddr, 936 (np->features & FE_ULTRA3) ? 80 : 937 (np->features & FE_ULTRA2) ? 40 : 938 (np->features & FE_ULTRA) ? 20 : 10, 939 sym_scsi_bus_mode(np->scsi_mode), 940 (np->rv_scntl0 & 0xa) ? "parity checking" : "NO parity"); 941 /* 942 * Tell him more on demand. 943 */ 944 if (sym_verbose) { 945 printf("%s: %s IRQ line driver%s\n", 946 sym_name(np), 947 np->rv_dcntl & IRQM ? "totem pole" : "open drain", 948 np->ram_ba ? ", using on-chip SRAM" : ""); 949 printf("%s: using %s firmware.\n", sym_name(np), np->fw_name); 950 if (np->features & FE_NOPM) 951 printf("%s: handling phase mismatch from SCRIPTS.\n", 952 sym_name(np)); 953 } 954 /* 955 * And still more. 956 */ 957 if (sym_verbose >= 2) { 958 printf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 959 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 960 sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl, 961 np->sv_ctest3, np->sv_ctest4, np->sv_ctest5); 962 963 printf ("%s: final SCNTL3/DMODE/DCNTL/CTEST3/4/5 = " 964 "(hex) %02x/%02x/%02x/%02x/%02x/%02x\n", 965 sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl, 966 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 967 } 968 969 return 0; 970 } 971 972 /* 973 * Test the pci bus snoop logic :-( 974 * 975 * Has to be called with interrupts disabled. 976 */ 977 #ifdef CONFIG_SCSI_SYM53C8XX_MMIO 978 static int sym_regtest(struct sym_hcb *np) 979 { 980 register volatile u32 data; 981 /* 982 * chip registers may NOT be cached. 983 * write 0xffffffff to a read only register area, 984 * and try to read it back. 985 */ 986 data = 0xffffffff; 987 OUTL(np, nc_dstat, data); 988 data = INL(np, nc_dstat); 989 #if 1 990 if (data == 0xffffffff) { 991 #else 992 if ((data & 0xe2f0fffd) != 0x02000080) { 993 #endif 994 printf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", 995 (unsigned) data); 996 return 0x10; 997 } 998 return 0; 999 } 1000 #else 1001 static inline int sym_regtest(struct sym_hcb *np) 1002 { 1003 return 0; 1004 } 1005 #endif 1006 1007 static int sym_snooptest(struct sym_hcb *np) 1008 { 1009 u32 sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat; 1010 int i, err; 1011 1012 err = sym_regtest(np); 1013 if (err) 1014 return err; 1015 restart_test: 1016 /* 1017 * Enable Master Parity Checking as we intend 1018 * to enable it for normal operations. 1019 */ 1020 OUTB(np, nc_ctest4, (np->rv_ctest4 & MPEE)); 1021 /* 1022 * init 1023 */ 1024 pc = SCRIPTZ_BA(np, snooptest); 1025 host_wr = 1; 1026 sym_wr = 2; 1027 /* 1028 * Set memory and register. 1029 */ 1030 np->scratch = cpu_to_scr(host_wr); 1031 OUTL(np, nc_temp, sym_wr); 1032 /* 1033 * Start script (exchange values) 1034 */ 1035 OUTL(np, nc_dsa, np->hcb_ba); 1036 OUTL_DSP(np, pc); 1037 /* 1038 * Wait 'til done (with timeout) 1039 */ 1040 for (i=0; i<SYM_SNOOP_TIMEOUT; i++) 1041 if (INB(np, nc_istat) & (INTF|SIP|DIP)) 1042 break; 1043 if (i>=SYM_SNOOP_TIMEOUT) { 1044 printf ("CACHE TEST FAILED: timeout.\n"); 1045 return (0x20); 1046 } 1047 /* 1048 * Check for fatal DMA errors. 1049 */ 1050 dstat = INB(np, nc_dstat); 1051 #if 1 /* Band aiding for broken hardwares that fail PCI parity */ 1052 if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) { 1053 printf ("%s: PCI DATA PARITY ERROR DETECTED - " 1054 "DISABLING MASTER DATA PARITY CHECKING.\n", 1055 sym_name(np)); 1056 np->rv_ctest4 &= ~MPEE; 1057 goto restart_test; 1058 } 1059 #endif 1060 if (dstat & (MDPE|BF|IID)) { 1061 printf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat); 1062 return (0x80); 1063 } 1064 /* 1065 * Save termination position. 1066 */ 1067 pc = INL(np, nc_dsp); 1068 /* 1069 * Read memory and register. 1070 */ 1071 host_rd = scr_to_cpu(np->scratch); 1072 sym_rd = INL(np, nc_scratcha); 1073 sym_bk = INL(np, nc_temp); 1074 /* 1075 * Check termination position. 1076 */ 1077 if (pc != SCRIPTZ_BA(np, snoopend)+8) { 1078 printf ("CACHE TEST FAILED: script execution failed.\n"); 1079 printf ("start=%08lx, pc=%08lx, end=%08lx\n", 1080 (u_long) SCRIPTZ_BA(np, snooptest), (u_long) pc, 1081 (u_long) SCRIPTZ_BA(np, snoopend) +8); 1082 return (0x40); 1083 } 1084 /* 1085 * Show results. 1086 */ 1087 if (host_wr != sym_rd) { 1088 printf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n", 1089 (int) host_wr, (int) sym_rd); 1090 err |= 1; 1091 } 1092 if (host_rd != sym_wr) { 1093 printf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n", 1094 (int) sym_wr, (int) host_rd); 1095 err |= 2; 1096 } 1097 if (sym_bk != sym_wr) { 1098 printf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n", 1099 (int) sym_wr, (int) sym_bk); 1100 err |= 4; 1101 } 1102 1103 return err; 1104 } 1105 1106 /* 1107 * log message for real hard errors 1108 * 1109 * sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sx/s3/s4) @ name (dsp:dbc). 1110 * reg: r0 r1 r2 r3 r4 r5 r6 ..... rf. 1111 * 1112 * exception register: 1113 * ds: dstat 1114 * si: sist 1115 * 1116 * SCSI bus lines: 1117 * so: control lines as driven by chip. 1118 * si: control lines as seen by chip. 1119 * sd: scsi data lines as seen by chip. 1120 * 1121 * wide/fastmode: 1122 * sx: sxfer (see the manual) 1123 * s3: scntl3 (see the manual) 1124 * s4: scntl4 (see the manual) 1125 * 1126 * current script command: 1127 * dsp: script address (relative to start of script). 1128 * dbc: first word of script command. 1129 * 1130 * First 24 register of the chip: 1131 * r0..rf 1132 */ 1133 static void sym_log_hard_error(struct Scsi_Host *shost, u_short sist, u_char dstat) 1134 { 1135 struct sym_hcb *np = sym_get_hcb(shost); 1136 u32 dsp; 1137 int script_ofs; 1138 int script_size; 1139 char *script_name; 1140 u_char *script_base; 1141 int i; 1142 1143 dsp = INL(np, nc_dsp); 1144 1145 if (dsp > np->scripta_ba && 1146 dsp <= np->scripta_ba + np->scripta_sz) { 1147 script_ofs = dsp - np->scripta_ba; 1148 script_size = np->scripta_sz; 1149 script_base = (u_char *) np->scripta0; 1150 script_name = "scripta"; 1151 } 1152 else if (np->scriptb_ba < dsp && 1153 dsp <= np->scriptb_ba + np->scriptb_sz) { 1154 script_ofs = dsp - np->scriptb_ba; 1155 script_size = np->scriptb_sz; 1156 script_base = (u_char *) np->scriptb0; 1157 script_name = "scriptb"; 1158 } else { 1159 script_ofs = dsp; 1160 script_size = 0; 1161 script_base = NULL; 1162 script_name = "mem"; 1163 } 1164 1165 printf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x/%x) @ (%s %x:%08x).\n", 1166 sym_name(np), (unsigned)INB(np, nc_sdid)&0x0f, dstat, sist, 1167 (unsigned)INB(np, nc_socl), (unsigned)INB(np, nc_sbcl), 1168 (unsigned)INB(np, nc_sbdl), (unsigned)INB(np, nc_sxfer), 1169 (unsigned)INB(np, nc_scntl3), 1170 (np->features & FE_C10) ? (unsigned)INB(np, nc_scntl4) : 0, 1171 script_name, script_ofs, (unsigned)INL(np, nc_dbc)); 1172 1173 if (((script_ofs & 3) == 0) && 1174 (unsigned)script_ofs < script_size) { 1175 printf ("%s: script cmd = %08x\n", sym_name(np), 1176 scr_to_cpu((int) *(u32 *)(script_base + script_ofs))); 1177 } 1178 1179 printf("%s: regdump:", sym_name(np)); 1180 for (i = 0; i < 24; i++) 1181 printf(" %02x", (unsigned)INB_OFF(np, i)); 1182 printf(".\n"); 1183 1184 /* 1185 * PCI BUS error. 1186 */ 1187 if (dstat & (MDPE|BF)) 1188 sym_log_bus_error(shost); 1189 } 1190 1191 void sym_dump_registers(struct Scsi_Host *shost) 1192 { 1193 struct sym_hcb *np = sym_get_hcb(shost); 1194 u_short sist; 1195 u_char dstat; 1196 1197 sist = INW(np, nc_sist); 1198 dstat = INB(np, nc_dstat); 1199 sym_log_hard_error(shost, sist, dstat); 1200 } 1201 1202 static struct sym_chip sym_dev_table[] = { 1203 {PCI_DEVICE_ID_NCR_53C810, 0x0f, "810", 4, 8, 4, 64, 1204 FE_ERL} 1205 , 1206 #ifdef SYM_DEBUG_GENERIC_SUPPORT 1207 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1, 1208 FE_BOF} 1209 , 1210 #else 1211 {PCI_DEVICE_ID_NCR_53C810, 0xff, "810a", 4, 8, 4, 1, 1212 FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF} 1213 , 1214 #endif 1215 {PCI_DEVICE_ID_NCR_53C815, 0xff, "815", 4, 8, 4, 64, 1216 FE_BOF|FE_ERL} 1217 , 1218 {PCI_DEVICE_ID_NCR_53C825, 0x0f, "825", 6, 8, 4, 64, 1219 FE_WIDE|FE_BOF|FE_ERL|FE_DIFF} 1220 , 1221 {PCI_DEVICE_ID_NCR_53C825, 0xff, "825a", 6, 8, 4, 2, 1222 FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF} 1223 , 1224 {PCI_DEVICE_ID_NCR_53C860, 0xff, "860", 4, 8, 5, 1, 1225 FE_ULTRA|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN} 1226 , 1227 {PCI_DEVICE_ID_NCR_53C875, 0x01, "875", 6, 16, 5, 2, 1228 FE_WIDE|FE_ULTRA|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| 1229 FE_RAM|FE_DIFF|FE_VARCLK} 1230 , 1231 {PCI_DEVICE_ID_NCR_53C875, 0xff, "875", 6, 16, 5, 2, 1232 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| 1233 FE_RAM|FE_DIFF|FE_VARCLK} 1234 , 1235 {PCI_DEVICE_ID_NCR_53C875J, 0xff, "875J", 6, 16, 5, 2, 1236 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| 1237 FE_RAM|FE_DIFF|FE_VARCLK} 1238 , 1239 {PCI_DEVICE_ID_NCR_53C885, 0xff, "885", 6, 16, 5, 2, 1240 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| 1241 FE_RAM|FE_DIFF|FE_VARCLK} 1242 , 1243 #ifdef SYM_DEBUG_GENERIC_SUPPORT 1244 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2, 1245 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS| 1246 FE_RAM|FE_LCKFRQ} 1247 , 1248 #else 1249 {PCI_DEVICE_ID_NCR_53C895, 0xff, "895", 6, 31, 7, 2, 1250 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| 1251 FE_RAM|FE_LCKFRQ} 1252 , 1253 #endif 1254 {PCI_DEVICE_ID_NCR_53C896, 0xff, "896", 6, 31, 7, 4, 1255 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| 1256 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ} 1257 , 1258 {PCI_DEVICE_ID_LSI_53C895A, 0xff, "895a", 6, 31, 7, 4, 1259 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| 1260 FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ} 1261 , 1262 {PCI_DEVICE_ID_LSI_53C875A, 0xff, "875a", 6, 31, 7, 4, 1263 FE_WIDE|FE_ULTRA|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| 1264 FE_RAM|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ} 1265 , 1266 {PCI_DEVICE_ID_LSI_53C1010_33, 0x00, "1010-33", 6, 31, 7, 8, 1267 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN| 1268 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC| 1269 FE_C10} 1270 , 1271 {PCI_DEVICE_ID_LSI_53C1010_33, 0xff, "1010-33", 6, 31, 7, 8, 1272 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN| 1273 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC| 1274 FE_C10|FE_U3EN} 1275 , 1276 {PCI_DEVICE_ID_LSI_53C1010_66, 0xff, "1010-66", 6, 31, 7, 8, 1277 FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN| 1278 FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC| 1279 FE_C10|FE_U3EN} 1280 , 1281 {PCI_DEVICE_ID_LSI_53C1510, 0xff, "1510d", 6, 31, 7, 4, 1282 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN| 1283 FE_RAM|FE_IO256|FE_LEDC} 1284 }; 1285 1286 #define sym_num_devs (ARRAY_SIZE(sym_dev_table)) 1287 1288 /* 1289 * Look up the chip table. 1290 * 1291 * Return a pointer to the chip entry if found, 1292 * zero otherwise. 1293 */ 1294 struct sym_chip * 1295 sym_lookup_chip_table (u_short device_id, u_char revision) 1296 { 1297 struct sym_chip *chip; 1298 int i; 1299 1300 for (i = 0; i < sym_num_devs; i++) { 1301 chip = &sym_dev_table[i]; 1302 if (device_id != chip->device_id) 1303 continue; 1304 if (revision > chip->revision_id) 1305 continue; 1306 return chip; 1307 } 1308 1309 return NULL; 1310 } 1311 1312 #if SYM_CONF_DMA_ADDRESSING_MODE == 2 1313 /* 1314 * Lookup the 64 bit DMA segments map. 1315 * This is only used if the direct mapping 1316 * has been unsuccessful. 1317 */ 1318 int sym_lookup_dmap(struct sym_hcb *np, u32 h, int s) 1319 { 1320 int i; 1321 1322 if (!use_dac(np)) 1323 goto weird; 1324 1325 /* Look up existing mappings */ 1326 for (i = SYM_DMAP_SIZE-1; i > 0; i--) { 1327 if (h == np->dmap_bah[i]) 1328 return i; 1329 } 1330 /* If direct mapping is free, get it */ 1331 if (!np->dmap_bah[s]) 1332 goto new; 1333 /* Collision -> lookup free mappings */ 1334 for (s = SYM_DMAP_SIZE-1; s > 0; s--) { 1335 if (!np->dmap_bah[s]) 1336 goto new; 1337 } 1338 weird: 1339 panic("sym: ran out of 64 bit DMA segment registers"); 1340 return -1; 1341 new: 1342 np->dmap_bah[s] = h; 1343 np->dmap_dirty = 1; 1344 return s; 1345 } 1346 1347 /* 1348 * Update IO registers scratch C..R so they will be 1349 * in sync. with queued CCB expectations. 1350 */ 1351 static void sym_update_dmap_regs(struct sym_hcb *np) 1352 { 1353 int o, i; 1354 1355 if (!np->dmap_dirty) 1356 return; 1357 o = offsetof(struct sym_reg, nc_scrx[0]); 1358 for (i = 0; i < SYM_DMAP_SIZE; i++) { 1359 OUTL_OFF(np, o, np->dmap_bah[i]); 1360 o += 4; 1361 } 1362 np->dmap_dirty = 0; 1363 } 1364 #endif 1365 1366 /* Enforce all the fiddly SPI rules and the chip limitations */ 1367 static void sym_check_goals(struct sym_hcb *np, struct scsi_target *starget, 1368 struct sym_trans *goal) 1369 { 1370 if (!spi_support_wide(starget)) 1371 goal->width = 0; 1372 1373 if (!spi_support_sync(starget)) { 1374 goal->iu = 0; 1375 goal->dt = 0; 1376 goal->qas = 0; 1377 goal->offset = 0; 1378 return; 1379 } 1380 1381 if (spi_support_dt(starget)) { 1382 if (spi_support_dt_only(starget)) 1383 goal->dt = 1; 1384 1385 if (goal->offset == 0) 1386 goal->dt = 0; 1387 } else { 1388 goal->dt = 0; 1389 } 1390 1391 /* Some targets fail to properly negotiate DT in SE mode */ 1392 if ((np->scsi_mode != SMODE_LVD) || !(np->features & FE_U3EN)) 1393 goal->dt = 0; 1394 1395 if (goal->dt) { 1396 /* all DT transfers must be wide */ 1397 goal->width = 1; 1398 if (goal->offset > np->maxoffs_dt) 1399 goal->offset = np->maxoffs_dt; 1400 if (goal->period < np->minsync_dt) 1401 goal->period = np->minsync_dt; 1402 if (goal->period > np->maxsync_dt) 1403 goal->period = np->maxsync_dt; 1404 } else { 1405 goal->iu = goal->qas = 0; 1406 if (goal->offset > np->maxoffs) 1407 goal->offset = np->maxoffs; 1408 if (goal->period < np->minsync) 1409 goal->period = np->minsync; 1410 if (goal->period > np->maxsync) 1411 goal->period = np->maxsync; 1412 } 1413 } 1414 1415 /* 1416 * Prepare the next negotiation message if needed. 1417 * 1418 * Fill in the part of message buffer that contains the 1419 * negotiation and the nego_status field of the CCB. 1420 * Returns the size of the message in bytes. 1421 */ 1422 static int sym_prepare_nego(struct sym_hcb *np, struct sym_ccb *cp, u_char *msgptr) 1423 { 1424 struct sym_tcb *tp = &np->target[cp->target]; 1425 struct scsi_target *starget = tp->starget; 1426 struct sym_trans *goal = &tp->tgoal; 1427 int msglen = 0; 1428 int nego; 1429 1430 sym_check_goals(np, starget, goal); 1431 1432 /* 1433 * Many devices implement PPR in a buggy way, so only use it if we 1434 * really want to. 1435 */ 1436 if (goal->renego == NS_PPR || (goal->offset && 1437 (goal->iu || goal->dt || goal->qas || (goal->period < 0xa)))) { 1438 nego = NS_PPR; 1439 } else if (goal->renego == NS_WIDE || goal->width) { 1440 nego = NS_WIDE; 1441 } else if (goal->renego == NS_SYNC || goal->offset) { 1442 nego = NS_SYNC; 1443 } else { 1444 goal->check_nego = 0; 1445 nego = 0; 1446 } 1447 1448 switch (nego) { 1449 case NS_SYNC: 1450 msglen += spi_populate_sync_msg(msgptr + msglen, goal->period, 1451 goal->offset); 1452 break; 1453 case NS_WIDE: 1454 msglen += spi_populate_width_msg(msgptr + msglen, goal->width); 1455 break; 1456 case NS_PPR: 1457 msglen += spi_populate_ppr_msg(msgptr + msglen, goal->period, 1458 goal->offset, goal->width, 1459 (goal->iu ? PPR_OPT_IU : 0) | 1460 (goal->dt ? PPR_OPT_DT : 0) | 1461 (goal->qas ? PPR_OPT_QAS : 0)); 1462 break; 1463 } 1464 1465 cp->nego_status = nego; 1466 1467 if (nego) { 1468 tp->nego_cp = cp; /* Keep track a nego will be performed */ 1469 if (DEBUG_FLAGS & DEBUG_NEGO) { 1470 sym_print_nego_msg(np, cp->target, 1471 nego == NS_SYNC ? "sync msgout" : 1472 nego == NS_WIDE ? "wide msgout" : 1473 "ppr msgout", msgptr); 1474 } 1475 } 1476 1477 return msglen; 1478 } 1479 1480 /* 1481 * Insert a job into the start queue. 1482 */ 1483 void sym_put_start_queue(struct sym_hcb *np, struct sym_ccb *cp) 1484 { 1485 u_short qidx; 1486 1487 #ifdef SYM_CONF_IARB_SUPPORT 1488 /* 1489 * If the previously queued CCB is not yet done, 1490 * set the IARB hint. The SCRIPTS will go with IARB 1491 * for this job when starting the previous one. 1492 * We leave devices a chance to win arbitration by 1493 * not using more than 'iarb_max' consecutive 1494 * immediate arbitrations. 1495 */ 1496 if (np->last_cp && np->iarb_count < np->iarb_max) { 1497 np->last_cp->host_flags |= HF_HINT_IARB; 1498 ++np->iarb_count; 1499 } 1500 else 1501 np->iarb_count = 0; 1502 np->last_cp = cp; 1503 #endif 1504 1505 #if SYM_CONF_DMA_ADDRESSING_MODE == 2 1506 /* 1507 * Make SCRIPTS aware of the 64 bit DMA 1508 * segment registers not being up-to-date. 1509 */ 1510 if (np->dmap_dirty) 1511 cp->host_xflags |= HX_DMAP_DIRTY; 1512 #endif 1513 1514 /* 1515 * Insert first the idle task and then our job. 1516 * The MBs should ensure proper ordering. 1517 */ 1518 qidx = np->squeueput + 2; 1519 if (qidx >= MAX_QUEUE*2) qidx = 0; 1520 1521 np->squeue [qidx] = cpu_to_scr(np->idletask_ba); 1522 MEMORY_WRITE_BARRIER(); 1523 np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba); 1524 1525 np->squeueput = qidx; 1526 1527 if (DEBUG_FLAGS & DEBUG_QUEUE) 1528 scmd_printk(KERN_DEBUG, cp->cmd, "queuepos=%d\n", 1529 np->squeueput); 1530 1531 /* 1532 * Script processor may be waiting for reselect. 1533 * Wake it up. 1534 */ 1535 MEMORY_WRITE_BARRIER(); 1536 OUTB(np, nc_istat, SIGP|np->istat_sem); 1537 } 1538 1539 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 1540 /* 1541 * Start next ready-to-start CCBs. 1542 */ 1543 void sym_start_next_ccbs(struct sym_hcb *np, struct sym_lcb *lp, int maxn) 1544 { 1545 SYM_QUEHEAD *qp; 1546 struct sym_ccb *cp; 1547 1548 /* 1549 * Paranoia, as usual. :-) 1550 */ 1551 assert(!lp->started_tags || !lp->started_no_tag); 1552 1553 /* 1554 * Try to start as many commands as asked by caller. 1555 * Prevent from having both tagged and untagged 1556 * commands queued to the device at the same time. 1557 */ 1558 while (maxn--) { 1559 qp = sym_remque_head(&lp->waiting_ccbq); 1560 if (!qp) 1561 break; 1562 cp = sym_que_entry(qp, struct sym_ccb, link2_ccbq); 1563 if (cp->tag != NO_TAG) { 1564 if (lp->started_no_tag || 1565 lp->started_tags >= lp->started_max) { 1566 sym_insque_head(qp, &lp->waiting_ccbq); 1567 break; 1568 } 1569 lp->itlq_tbl[cp->tag] = cpu_to_scr(cp->ccb_ba); 1570 lp->head.resel_sa = 1571 cpu_to_scr(SCRIPTA_BA(np, resel_tag)); 1572 ++lp->started_tags; 1573 } else { 1574 if (lp->started_no_tag || lp->started_tags) { 1575 sym_insque_head(qp, &lp->waiting_ccbq); 1576 break; 1577 } 1578 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba); 1579 lp->head.resel_sa = 1580 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag)); 1581 ++lp->started_no_tag; 1582 } 1583 cp->started = 1; 1584 sym_insque_tail(qp, &lp->started_ccbq); 1585 sym_put_start_queue(np, cp); 1586 } 1587 } 1588 #endif /* SYM_OPT_HANDLE_DEVICE_QUEUEING */ 1589 1590 /* 1591 * The chip may have completed jobs. Look at the DONE QUEUE. 1592 * 1593 * On paper, memory read barriers may be needed here to 1594 * prevent out of order LOADs by the CPU from having 1595 * prefetched stale data prior to DMA having occurred. 1596 */ 1597 static int sym_wakeup_done (struct sym_hcb *np) 1598 { 1599 struct sym_ccb *cp; 1600 int i, n; 1601 u32 dsa; 1602 1603 n = 0; 1604 i = np->dqueueget; 1605 1606 /* MEMORY_READ_BARRIER(); */ 1607 while (1) { 1608 dsa = scr_to_cpu(np->dqueue[i]); 1609 if (!dsa) 1610 break; 1611 np->dqueue[i] = 0; 1612 if ((i = i+2) >= MAX_QUEUE*2) 1613 i = 0; 1614 1615 cp = sym_ccb_from_dsa(np, dsa); 1616 if (cp) { 1617 MEMORY_READ_BARRIER(); 1618 sym_complete_ok (np, cp); 1619 ++n; 1620 } 1621 else 1622 printf ("%s: bad DSA (%x) in done queue.\n", 1623 sym_name(np), (u_int) dsa); 1624 } 1625 np->dqueueget = i; 1626 1627 return n; 1628 } 1629 1630 /* 1631 * Complete all CCBs queued to the COMP queue. 1632 * 1633 * These CCBs are assumed: 1634 * - Not to be referenced either by devices or 1635 * SCRIPTS-related queues and datas. 1636 * - To have to be completed with an error condition 1637 * or requeued. 1638 * 1639 * The device queue freeze count is incremented 1640 * for each CCB that does not prevent this. 1641 * This function is called when all CCBs involved 1642 * in error handling/recovery have been reaped. 1643 */ 1644 static void sym_flush_comp_queue(struct sym_hcb *np, int cam_status) 1645 { 1646 SYM_QUEHEAD *qp; 1647 struct sym_ccb *cp; 1648 1649 while ((qp = sym_remque_head(&np->comp_ccbq)) != NULL) { 1650 struct scsi_cmnd *cmd; 1651 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); 1652 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq); 1653 /* Leave quiet CCBs waiting for resources */ 1654 if (cp->host_status == HS_WAIT) 1655 continue; 1656 cmd = cp->cmd; 1657 if (cam_status) 1658 sym_set_cam_status(cmd, cam_status); 1659 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 1660 if (sym_get_cam_status(cmd) == DID_SOFT_ERROR) { 1661 struct sym_tcb *tp = &np->target[cp->target]; 1662 struct sym_lcb *lp = sym_lp(tp, cp->lun); 1663 if (lp) { 1664 sym_remque(&cp->link2_ccbq); 1665 sym_insque_tail(&cp->link2_ccbq, 1666 &lp->waiting_ccbq); 1667 if (cp->started) { 1668 if (cp->tag != NO_TAG) 1669 --lp->started_tags; 1670 else 1671 --lp->started_no_tag; 1672 } 1673 } 1674 cp->started = 0; 1675 continue; 1676 } 1677 #endif 1678 sym_free_ccb(np, cp); 1679 sym_xpt_done(np, cmd); 1680 } 1681 } 1682 1683 /* 1684 * Complete all active CCBs with error. 1685 * Used on CHIP/SCSI RESET. 1686 */ 1687 static void sym_flush_busy_queue (struct sym_hcb *np, int cam_status) 1688 { 1689 /* 1690 * Move all active CCBs to the COMP queue 1691 * and flush this queue. 1692 */ 1693 sym_que_splice(&np->busy_ccbq, &np->comp_ccbq); 1694 sym_que_init(&np->busy_ccbq); 1695 sym_flush_comp_queue(np, cam_status); 1696 } 1697 1698 /* 1699 * Start chip. 1700 * 1701 * 'reason' means: 1702 * 0: initialisation. 1703 * 1: SCSI BUS RESET delivered or received. 1704 * 2: SCSI BUS MODE changed. 1705 */ 1706 void sym_start_up(struct Scsi_Host *shost, int reason) 1707 { 1708 struct sym_data *sym_data = shost_priv(shost); 1709 struct pci_dev *pdev = sym_data->pdev; 1710 struct sym_hcb *np = sym_data->ncb; 1711 int i; 1712 u32 phys; 1713 1714 /* 1715 * Reset chip if asked, otherwise just clear fifos. 1716 */ 1717 if (reason == 1) 1718 sym_soft_reset(np); 1719 else { 1720 OUTB(np, nc_stest3, TE|CSF); 1721 OUTONB(np, nc_ctest3, CLF); 1722 } 1723 1724 /* 1725 * Clear Start Queue 1726 */ 1727 phys = np->squeue_ba; 1728 for (i = 0; i < MAX_QUEUE*2; i += 2) { 1729 np->squeue[i] = cpu_to_scr(np->idletask_ba); 1730 np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4); 1731 } 1732 np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys); 1733 1734 /* 1735 * Start at first entry. 1736 */ 1737 np->squeueput = 0; 1738 1739 /* 1740 * Clear Done Queue 1741 */ 1742 phys = np->dqueue_ba; 1743 for (i = 0; i < MAX_QUEUE*2; i += 2) { 1744 np->dqueue[i] = 0; 1745 np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4); 1746 } 1747 np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys); 1748 1749 /* 1750 * Start at first entry. 1751 */ 1752 np->dqueueget = 0; 1753 1754 /* 1755 * Install patches in scripts. 1756 * This also let point to first position the start 1757 * and done queue pointers used from SCRIPTS. 1758 */ 1759 np->fw_patch(shost); 1760 1761 /* 1762 * Wakeup all pending jobs. 1763 */ 1764 sym_flush_busy_queue(np, DID_RESET); 1765 1766 /* 1767 * Init chip. 1768 */ 1769 OUTB(np, nc_istat, 0x00); /* Remove Reset, abort */ 1770 INB(np, nc_mbox1); 1771 udelay(2000); /* The 895 needs time for the bus mode to settle */ 1772 1773 OUTB(np, nc_scntl0, np->rv_scntl0 | 0xc0); 1774 /* full arb., ena parity, par->ATN */ 1775 OUTB(np, nc_scntl1, 0x00); /* odd parity, and remove CRST!! */ 1776 1777 sym_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ 1778 1779 OUTB(np, nc_scid , RRE|np->myaddr); /* Adapter SCSI address */ 1780 OUTW(np, nc_respid, 1ul<<np->myaddr); /* Id to respond to */ 1781 OUTB(np, nc_istat , SIGP ); /* Signal Process */ 1782 OUTB(np, nc_dmode , np->rv_dmode); /* Burst length, dma mode */ 1783 OUTB(np, nc_ctest5, np->rv_ctest5); /* Large fifo + large burst */ 1784 1785 OUTB(np, nc_dcntl , NOCOM|np->rv_dcntl); /* Protect SFBR */ 1786 OUTB(np, nc_ctest3, np->rv_ctest3); /* Write and invalidate */ 1787 OUTB(np, nc_ctest4, np->rv_ctest4); /* Master parity checking */ 1788 1789 /* Extended Sreq/Sack filtering not supported on the C10 */ 1790 if (np->features & FE_C10) 1791 OUTB(np, nc_stest2, np->rv_stest2); 1792 else 1793 OUTB(np, nc_stest2, EXT|np->rv_stest2); 1794 1795 OUTB(np, nc_stest3, TE); /* TolerANT enable */ 1796 OUTB(np, nc_stime0, 0x0c); /* HTH disabled STO 0.25 sec */ 1797 1798 /* 1799 * For now, disable AIP generation on C1010-66. 1800 */ 1801 if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_66) 1802 OUTB(np, nc_aipcntl1, DISAIP); 1803 1804 /* 1805 * C10101 rev. 0 errata. 1806 * Errant SGE's when in narrow. Write bits 4 & 5 of 1807 * STEST1 register to disable SGE. We probably should do 1808 * that from SCRIPTS for each selection/reselection, but 1809 * I just don't want. :) 1810 */ 1811 if (pdev->device == PCI_DEVICE_ID_LSI_53C1010_33 && 1812 pdev->revision < 1) 1813 OUTB(np, nc_stest1, INB(np, nc_stest1) | 0x30); 1814 1815 /* 1816 * DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2. 1817 * Disable overlapped arbitration for some dual function devices, 1818 * regardless revision id (kind of post-chip-design feature. ;-)) 1819 */ 1820 if (pdev->device == PCI_DEVICE_ID_NCR_53C875) 1821 OUTB(np, nc_ctest0, (1<<5)); 1822 else if (pdev->device == PCI_DEVICE_ID_NCR_53C896) 1823 np->rv_ccntl0 |= DPR; 1824 1825 /* 1826 * Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing 1827 * and/or hardware phase mismatch, since only such chips 1828 * seem to support those IO registers. 1829 */ 1830 if (np->features & (FE_DAC|FE_NOPM)) { 1831 OUTB(np, nc_ccntl0, np->rv_ccntl0); 1832 OUTB(np, nc_ccntl1, np->rv_ccntl1); 1833 } 1834 1835 #if SYM_CONF_DMA_ADDRESSING_MODE == 2 1836 /* 1837 * Set up scratch C and DRS IO registers to map the 32 bit 1838 * DMA address range our data structures are located in. 1839 */ 1840 if (use_dac(np)) { 1841 np->dmap_bah[0] = 0; /* ??? */ 1842 OUTL(np, nc_scrx[0], np->dmap_bah[0]); 1843 OUTL(np, nc_drs, np->dmap_bah[0]); 1844 } 1845 #endif 1846 1847 /* 1848 * If phase mismatch handled by scripts (895A/896/1010), 1849 * set PM jump addresses. 1850 */ 1851 if (np->features & FE_NOPM) { 1852 OUTL(np, nc_pmjad1, SCRIPTB_BA(np, pm_handle)); 1853 OUTL(np, nc_pmjad2, SCRIPTB_BA(np, pm_handle)); 1854 } 1855 1856 /* 1857 * Enable GPIO0 pin for writing if LED support from SCRIPTS. 1858 * Also set GPIO5 and clear GPIO6 if hardware LED control. 1859 */ 1860 if (np->features & FE_LED0) 1861 OUTB(np, nc_gpcntl, INB(np, nc_gpcntl) & ~0x01); 1862 else if (np->features & FE_LEDC) 1863 OUTB(np, nc_gpcntl, (INB(np, nc_gpcntl) & ~0x41) | 0x20); 1864 1865 /* 1866 * enable ints 1867 */ 1868 OUTW(np, nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR); 1869 OUTB(np, nc_dien , MDPE|BF|SSI|SIR|IID); 1870 1871 /* 1872 * For 895/6 enable SBMC interrupt and save current SCSI bus mode. 1873 * Try to eat the spurious SBMC interrupt that may occur when 1874 * we reset the chip but not the SCSI BUS (at initialization). 1875 */ 1876 if (np->features & (FE_ULTRA2|FE_ULTRA3)) { 1877 OUTONW(np, nc_sien, SBMC); 1878 if (reason == 0) { 1879 INB(np, nc_mbox1); 1880 mdelay(100); 1881 INW(np, nc_sist); 1882 } 1883 np->scsi_mode = INB(np, nc_stest4) & SMODE; 1884 } 1885 1886 /* 1887 * Fill in target structure. 1888 * Reinitialize usrsync. 1889 * Reinitialize usrwide. 1890 * Prepare sync negotiation according to actual SCSI bus mode. 1891 */ 1892 for (i=0;i<SYM_CONF_MAX_TARGET;i++) { 1893 struct sym_tcb *tp = &np->target[i]; 1894 1895 tp->to_reset = 0; 1896 tp->head.sval = 0; 1897 tp->head.wval = np->rv_scntl3; 1898 tp->head.uval = 0; 1899 } 1900 1901 /* 1902 * Download SCSI SCRIPTS to on-chip RAM if present, 1903 * and start script processor. 1904 * We do the download preferently from the CPU. 1905 * For platforms that may not support PCI memory mapping, 1906 * we use simple SCRIPTS that performs MEMORY MOVEs. 1907 */ 1908 phys = SCRIPTA_BA(np, init); 1909 if (np->ram_ba) { 1910 if (sym_verbose >= 2) 1911 printf("%s: Downloading SCSI SCRIPTS.\n", sym_name(np)); 1912 memcpy_toio(np->s.ramaddr, np->scripta0, np->scripta_sz); 1913 if (np->features & FE_RAM8K) { 1914 memcpy_toio(np->s.ramaddr + 4096, np->scriptb0, np->scriptb_sz); 1915 phys = scr_to_cpu(np->scr_ram_seg); 1916 OUTL(np, nc_mmws, phys); 1917 OUTL(np, nc_mmrs, phys); 1918 OUTL(np, nc_sfs, phys); 1919 phys = SCRIPTB_BA(np, start64); 1920 } 1921 } 1922 1923 np->istat_sem = 0; 1924 1925 OUTL(np, nc_dsa, np->hcb_ba); 1926 OUTL_DSP(np, phys); 1927 1928 /* 1929 * Notify the XPT about the RESET condition. 1930 */ 1931 if (reason != 0) 1932 sym_xpt_async_bus_reset(np); 1933 } 1934 1935 /* 1936 * Switch trans mode for current job and its target. 1937 */ 1938 static void sym_settrans(struct sym_hcb *np, int target, u_char opts, u_char ofs, 1939 u_char per, u_char wide, u_char div, u_char fak) 1940 { 1941 SYM_QUEHEAD *qp; 1942 u_char sval, wval, uval; 1943 struct sym_tcb *tp = &np->target[target]; 1944 1945 assert(target == (INB(np, nc_sdid) & 0x0f)); 1946 1947 sval = tp->head.sval; 1948 wval = tp->head.wval; 1949 uval = tp->head.uval; 1950 1951 #if 0 1952 printf("XXXX sval=%x wval=%x uval=%x (%x)\n", 1953 sval, wval, uval, np->rv_scntl3); 1954 #endif 1955 /* 1956 * Set the offset. 1957 */ 1958 if (!(np->features & FE_C10)) 1959 sval = (sval & ~0x1f) | ofs; 1960 else 1961 sval = (sval & ~0x3f) | ofs; 1962 1963 /* 1964 * Set the sync divisor and extra clock factor. 1965 */ 1966 if (ofs != 0) { 1967 wval = (wval & ~0x70) | ((div+1) << 4); 1968 if (!(np->features & FE_C10)) 1969 sval = (sval & ~0xe0) | (fak << 5); 1970 else { 1971 uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT); 1972 if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT); 1973 if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT); 1974 } 1975 } 1976 1977 /* 1978 * Set the bus width. 1979 */ 1980 wval = wval & ~EWS; 1981 if (wide != 0) 1982 wval |= EWS; 1983 1984 /* 1985 * Set misc. ultra enable bits. 1986 */ 1987 if (np->features & FE_C10) { 1988 uval = uval & ~(U3EN|AIPCKEN); 1989 if (opts) { 1990 assert(np->features & FE_U3EN); 1991 uval |= U3EN; 1992 } 1993 } else { 1994 wval = wval & ~ULTRA; 1995 if (per <= 12) wval |= ULTRA; 1996 } 1997 1998 /* 1999 * Stop there if sync parameters are unchanged. 2000 */ 2001 if (tp->head.sval == sval && 2002 tp->head.wval == wval && 2003 tp->head.uval == uval) 2004 return; 2005 tp->head.sval = sval; 2006 tp->head.wval = wval; 2007 tp->head.uval = uval; 2008 2009 /* 2010 * Disable extended Sreq/Sack filtering if per < 50. 2011 * Not supported on the C1010. 2012 */ 2013 if (per < 50 && !(np->features & FE_C10)) 2014 OUTOFFB(np, nc_stest2, EXT); 2015 2016 /* 2017 * set actual value and sync_status 2018 */ 2019 OUTB(np, nc_sxfer, tp->head.sval); 2020 OUTB(np, nc_scntl3, tp->head.wval); 2021 2022 if (np->features & FE_C10) { 2023 OUTB(np, nc_scntl4, tp->head.uval); 2024 } 2025 2026 /* 2027 * patch ALL busy ccbs of this target. 2028 */ 2029 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { 2030 struct sym_ccb *cp; 2031 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); 2032 if (cp->target != target) 2033 continue; 2034 cp->phys.select.sel_scntl3 = tp->head.wval; 2035 cp->phys.select.sel_sxfer = tp->head.sval; 2036 if (np->features & FE_C10) { 2037 cp->phys.select.sel_scntl4 = tp->head.uval; 2038 } 2039 } 2040 } 2041 2042 static void sym_announce_transfer_rate(struct sym_tcb *tp) 2043 { 2044 struct scsi_target *starget = tp->starget; 2045 2046 if (tp->tprint.period != spi_period(starget) || 2047 tp->tprint.offset != spi_offset(starget) || 2048 tp->tprint.width != spi_width(starget) || 2049 tp->tprint.iu != spi_iu(starget) || 2050 tp->tprint.dt != spi_dt(starget) || 2051 tp->tprint.qas != spi_qas(starget) || 2052 !tp->tprint.check_nego) { 2053 tp->tprint.period = spi_period(starget); 2054 tp->tprint.offset = spi_offset(starget); 2055 tp->tprint.width = spi_width(starget); 2056 tp->tprint.iu = spi_iu(starget); 2057 tp->tprint.dt = spi_dt(starget); 2058 tp->tprint.qas = spi_qas(starget); 2059 tp->tprint.check_nego = 1; 2060 2061 spi_display_xfer_agreement(starget); 2062 } 2063 } 2064 2065 /* 2066 * We received a WDTR. 2067 * Let everything be aware of the changes. 2068 */ 2069 static void sym_setwide(struct sym_hcb *np, int target, u_char wide) 2070 { 2071 struct sym_tcb *tp = &np->target[target]; 2072 struct scsi_target *starget = tp->starget; 2073 2074 sym_settrans(np, target, 0, 0, 0, wide, 0, 0); 2075 2076 if (wide) 2077 tp->tgoal.renego = NS_WIDE; 2078 else 2079 tp->tgoal.renego = 0; 2080 tp->tgoal.check_nego = 0; 2081 tp->tgoal.width = wide; 2082 spi_offset(starget) = 0; 2083 spi_period(starget) = 0; 2084 spi_width(starget) = wide; 2085 spi_iu(starget) = 0; 2086 spi_dt(starget) = 0; 2087 spi_qas(starget) = 0; 2088 2089 if (sym_verbose >= 3) 2090 sym_announce_transfer_rate(tp); 2091 } 2092 2093 /* 2094 * We received a SDTR. 2095 * Let everything be aware of the changes. 2096 */ 2097 static void 2098 sym_setsync(struct sym_hcb *np, int target, 2099 u_char ofs, u_char per, u_char div, u_char fak) 2100 { 2101 struct sym_tcb *tp = &np->target[target]; 2102 struct scsi_target *starget = tp->starget; 2103 u_char wide = (tp->head.wval & EWS) ? BUS_16_BIT : BUS_8_BIT; 2104 2105 sym_settrans(np, target, 0, ofs, per, wide, div, fak); 2106 2107 if (wide) 2108 tp->tgoal.renego = NS_WIDE; 2109 else if (ofs) 2110 tp->tgoal.renego = NS_SYNC; 2111 else 2112 tp->tgoal.renego = 0; 2113 spi_period(starget) = per; 2114 spi_offset(starget) = ofs; 2115 spi_iu(starget) = spi_dt(starget) = spi_qas(starget) = 0; 2116 2117 if (!tp->tgoal.dt && !tp->tgoal.iu && !tp->tgoal.qas) { 2118 tp->tgoal.period = per; 2119 tp->tgoal.offset = ofs; 2120 tp->tgoal.check_nego = 0; 2121 } 2122 2123 sym_announce_transfer_rate(tp); 2124 } 2125 2126 /* 2127 * We received a PPR. 2128 * Let everything be aware of the changes. 2129 */ 2130 static void 2131 sym_setpprot(struct sym_hcb *np, int target, u_char opts, u_char ofs, 2132 u_char per, u_char wide, u_char div, u_char fak) 2133 { 2134 struct sym_tcb *tp = &np->target[target]; 2135 struct scsi_target *starget = tp->starget; 2136 2137 sym_settrans(np, target, opts, ofs, per, wide, div, fak); 2138 2139 if (wide || ofs) 2140 tp->tgoal.renego = NS_PPR; 2141 else 2142 tp->tgoal.renego = 0; 2143 spi_width(starget) = tp->tgoal.width = wide; 2144 spi_period(starget) = tp->tgoal.period = per; 2145 spi_offset(starget) = tp->tgoal.offset = ofs; 2146 spi_iu(starget) = tp->tgoal.iu = !!(opts & PPR_OPT_IU); 2147 spi_dt(starget) = tp->tgoal.dt = !!(opts & PPR_OPT_DT); 2148 spi_qas(starget) = tp->tgoal.qas = !!(opts & PPR_OPT_QAS); 2149 tp->tgoal.check_nego = 0; 2150 2151 sym_announce_transfer_rate(tp); 2152 } 2153 2154 /* 2155 * generic recovery from scsi interrupt 2156 * 2157 * The doc says that when the chip gets an SCSI interrupt, 2158 * it tries to stop in an orderly fashion, by completing 2159 * an instruction fetch that had started or by flushing 2160 * the DMA fifo for a write to memory that was executing. 2161 * Such a fashion is not enough to know if the instruction 2162 * that was just before the current DSP value has been 2163 * executed or not. 2164 * 2165 * There are some small SCRIPTS sections that deal with 2166 * the start queue and the done queue that may break any 2167 * assomption from the C code if we are interrupted 2168 * inside, so we reset if this happens. Btw, since these 2169 * SCRIPTS sections are executed while the SCRIPTS hasn't 2170 * started SCSI operations, it is very unlikely to happen. 2171 * 2172 * All the driver data structures are supposed to be 2173 * allocated from the same 4 GB memory window, so there 2174 * is a 1 to 1 relationship between DSA and driver data 2175 * structures. Since we are careful :) to invalidate the 2176 * DSA when we complete a command or when the SCRIPTS 2177 * pushes a DSA into a queue, we can trust it when it 2178 * points to a CCB. 2179 */ 2180 static void sym_recover_scsi_int (struct sym_hcb *np, u_char hsts) 2181 { 2182 u32 dsp = INL(np, nc_dsp); 2183 u32 dsa = INL(np, nc_dsa); 2184 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa); 2185 2186 /* 2187 * If we haven't been interrupted inside the SCRIPTS 2188 * critical pathes, we can safely restart the SCRIPTS 2189 * and trust the DSA value if it matches a CCB. 2190 */ 2191 if ((!(dsp > SCRIPTA_BA(np, getjob_begin) && 2192 dsp < SCRIPTA_BA(np, getjob_end) + 1)) && 2193 (!(dsp > SCRIPTA_BA(np, ungetjob) && 2194 dsp < SCRIPTA_BA(np, reselect) + 1)) && 2195 (!(dsp > SCRIPTB_BA(np, sel_for_abort) && 2196 dsp < SCRIPTB_BA(np, sel_for_abort_1) + 1)) && 2197 (!(dsp > SCRIPTA_BA(np, done) && 2198 dsp < SCRIPTA_BA(np, done_end) + 1))) { 2199 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */ 2200 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */ 2201 /* 2202 * If we have a CCB, let the SCRIPTS call us back for 2203 * the handling of the error with SCRATCHA filled with 2204 * STARTPOS. This way, we will be able to freeze the 2205 * device queue and requeue awaiting IOs. 2206 */ 2207 if (cp) { 2208 cp->host_status = hsts; 2209 OUTL_DSP(np, SCRIPTA_BA(np, complete_error)); 2210 } 2211 /* 2212 * Otherwise just restart the SCRIPTS. 2213 */ 2214 else { 2215 OUTL(np, nc_dsa, 0xffffff); 2216 OUTL_DSP(np, SCRIPTA_BA(np, start)); 2217 } 2218 } 2219 else 2220 goto reset_all; 2221 2222 return; 2223 2224 reset_all: 2225 sym_start_reset(np); 2226 } 2227 2228 /* 2229 * chip exception handler for selection timeout 2230 */ 2231 static void sym_int_sto (struct sym_hcb *np) 2232 { 2233 u32 dsp = INL(np, nc_dsp); 2234 2235 if (DEBUG_FLAGS & DEBUG_TINY) printf ("T"); 2236 2237 if (dsp == SCRIPTA_BA(np, wf_sel_done) + 8) 2238 sym_recover_scsi_int(np, HS_SEL_TIMEOUT); 2239 else 2240 sym_start_reset(np); 2241 } 2242 2243 /* 2244 * chip exception handler for unexpected disconnect 2245 */ 2246 static void sym_int_udc (struct sym_hcb *np) 2247 { 2248 printf ("%s: unexpected disconnect\n", sym_name(np)); 2249 sym_recover_scsi_int(np, HS_UNEXPECTED); 2250 } 2251 2252 /* 2253 * chip exception handler for SCSI bus mode change 2254 * 2255 * spi2-r12 11.2.3 says a transceiver mode change must 2256 * generate a reset event and a device that detects a reset 2257 * event shall initiate a hard reset. It says also that a 2258 * device that detects a mode change shall set data transfer 2259 * mode to eight bit asynchronous, etc... 2260 * So, just reinitializing all except chip should be enough. 2261 */ 2262 static void sym_int_sbmc(struct Scsi_Host *shost) 2263 { 2264 struct sym_hcb *np = sym_get_hcb(shost); 2265 u_char scsi_mode = INB(np, nc_stest4) & SMODE; 2266 2267 /* 2268 * Notify user. 2269 */ 2270 printf("%s: SCSI BUS mode change from %s to %s.\n", sym_name(np), 2271 sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode)); 2272 2273 /* 2274 * Should suspend command processing for a few seconds and 2275 * reinitialize all except the chip. 2276 */ 2277 sym_start_up(shost, 2); 2278 } 2279 2280 /* 2281 * chip exception handler for SCSI parity error. 2282 * 2283 * When the chip detects a SCSI parity error and is 2284 * currently executing a (CH)MOV instruction, it does 2285 * not interrupt immediately, but tries to finish the 2286 * transfer of the current scatter entry before 2287 * interrupting. The following situations may occur: 2288 * 2289 * - The complete scatter entry has been transferred 2290 * without the device having changed phase. 2291 * The chip will then interrupt with the DSP pointing 2292 * to the instruction that follows the MOV. 2293 * 2294 * - A phase mismatch occurs before the MOV finished 2295 * and phase errors are to be handled by the C code. 2296 * The chip will then interrupt with both PAR and MA 2297 * conditions set. 2298 * 2299 * - A phase mismatch occurs before the MOV finished and 2300 * phase errors are to be handled by SCRIPTS. 2301 * The chip will load the DSP with the phase mismatch 2302 * JUMP address and interrupt the host processor. 2303 */ 2304 static void sym_int_par (struct sym_hcb *np, u_short sist) 2305 { 2306 u_char hsts = INB(np, HS_PRT); 2307 u32 dsp = INL(np, nc_dsp); 2308 u32 dbc = INL(np, nc_dbc); 2309 u32 dsa = INL(np, nc_dsa); 2310 u_char sbcl = INB(np, nc_sbcl); 2311 u_char cmd = dbc >> 24; 2312 int phase = cmd & 7; 2313 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa); 2314 2315 printf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n", 2316 sym_name(np), hsts, dbc, sbcl); 2317 2318 /* 2319 * Check that the chip is connected to the SCSI BUS. 2320 */ 2321 if (!(INB(np, nc_scntl1) & ISCON)) { 2322 sym_recover_scsi_int(np, HS_UNEXPECTED); 2323 return; 2324 } 2325 2326 /* 2327 * If the nexus is not clearly identified, reset the bus. 2328 * We will try to do better later. 2329 */ 2330 if (!cp) 2331 goto reset_all; 2332 2333 /* 2334 * Check instruction was a MOV, direction was INPUT and 2335 * ATN is asserted. 2336 */ 2337 if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8)) 2338 goto reset_all; 2339 2340 /* 2341 * Keep track of the parity error. 2342 */ 2343 OUTONB(np, HF_PRT, HF_EXT_ERR); 2344 cp->xerr_status |= XE_PARITY_ERR; 2345 2346 /* 2347 * Prepare the message to send to the device. 2348 */ 2349 np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR; 2350 2351 /* 2352 * If the old phase was DATA IN phase, we have to deal with 2353 * the 3 situations described above. 2354 * For other input phases (MSG IN and STATUS), the device 2355 * must resend the whole thing that failed parity checking 2356 * or signal error. So, jumping to dispatcher should be OK. 2357 */ 2358 if (phase == 1 || phase == 5) { 2359 /* Phase mismatch handled by SCRIPTS */ 2360 if (dsp == SCRIPTB_BA(np, pm_handle)) 2361 OUTL_DSP(np, dsp); 2362 /* Phase mismatch handled by the C code */ 2363 else if (sist & MA) 2364 sym_int_ma (np); 2365 /* No phase mismatch occurred */ 2366 else { 2367 sym_set_script_dp (np, cp, dsp); 2368 OUTL_DSP(np, SCRIPTA_BA(np, dispatch)); 2369 } 2370 } 2371 else if (phase == 7) /* We definitely cannot handle parity errors */ 2372 #if 1 /* in message-in phase due to the relection */ 2373 goto reset_all; /* path and various message anticipations. */ 2374 #else 2375 OUTL_DSP(np, SCRIPTA_BA(np, clrack)); 2376 #endif 2377 else 2378 OUTL_DSP(np, SCRIPTA_BA(np, dispatch)); 2379 return; 2380 2381 reset_all: 2382 sym_start_reset(np); 2383 return; 2384 } 2385 2386 /* 2387 * chip exception handler for phase errors. 2388 * 2389 * We have to construct a new transfer descriptor, 2390 * to transfer the rest of the current block. 2391 */ 2392 static void sym_int_ma (struct sym_hcb *np) 2393 { 2394 u32 dbc; 2395 u32 rest; 2396 u32 dsp; 2397 u32 dsa; 2398 u32 nxtdsp; 2399 u32 *vdsp; 2400 u32 oadr, olen; 2401 u32 *tblp; 2402 u32 newcmd; 2403 u_int delta; 2404 u_char cmd; 2405 u_char hflags, hflags0; 2406 struct sym_pmc *pm; 2407 struct sym_ccb *cp; 2408 2409 dsp = INL(np, nc_dsp); 2410 dbc = INL(np, nc_dbc); 2411 dsa = INL(np, nc_dsa); 2412 2413 cmd = dbc >> 24; 2414 rest = dbc & 0xffffff; 2415 delta = 0; 2416 2417 /* 2418 * locate matching cp if any. 2419 */ 2420 cp = sym_ccb_from_dsa(np, dsa); 2421 2422 /* 2423 * Donnot take into account dma fifo and various buffers in 2424 * INPUT phase since the chip flushes everything before 2425 * raising the MA interrupt for interrupted INPUT phases. 2426 * For DATA IN phase, we will check for the SWIDE later. 2427 */ 2428 if ((cmd & 7) != 1 && (cmd & 7) != 5) { 2429 u_char ss0, ss2; 2430 2431 if (np->features & FE_DFBC) 2432 delta = INW(np, nc_dfbc); 2433 else { 2434 u32 dfifo; 2435 2436 /* 2437 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership. 2438 */ 2439 dfifo = INL(np, nc_dfifo); 2440 2441 /* 2442 * Calculate remaining bytes in DMA fifo. 2443 * (CTEST5 = dfifo >> 16) 2444 */ 2445 if (dfifo & (DFS << 16)) 2446 delta = ((((dfifo >> 8) & 0x300) | 2447 (dfifo & 0xff)) - rest) & 0x3ff; 2448 else 2449 delta = ((dfifo & 0xff) - rest) & 0x7f; 2450 } 2451 2452 /* 2453 * The data in the dma fifo has not been transfered to 2454 * the target -> add the amount to the rest 2455 * and clear the data. 2456 * Check the sstat2 register in case of wide transfer. 2457 */ 2458 rest += delta; 2459 ss0 = INB(np, nc_sstat0); 2460 if (ss0 & OLF) rest++; 2461 if (!(np->features & FE_C10)) 2462 if (ss0 & ORF) rest++; 2463 if (cp && (cp->phys.select.sel_scntl3 & EWS)) { 2464 ss2 = INB(np, nc_sstat2); 2465 if (ss2 & OLF1) rest++; 2466 if (!(np->features & FE_C10)) 2467 if (ss2 & ORF1) rest++; 2468 } 2469 2470 /* 2471 * Clear fifos. 2472 */ 2473 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* dma fifo */ 2474 OUTB(np, nc_stest3, TE|CSF); /* scsi fifo */ 2475 } 2476 2477 /* 2478 * log the information 2479 */ 2480 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) 2481 printf ("P%x%x RL=%d D=%d ", cmd&7, INB(np, nc_sbcl)&7, 2482 (unsigned) rest, (unsigned) delta); 2483 2484 /* 2485 * try to find the interrupted script command, 2486 * and the address at which to continue. 2487 */ 2488 vdsp = NULL; 2489 nxtdsp = 0; 2490 if (dsp > np->scripta_ba && 2491 dsp <= np->scripta_ba + np->scripta_sz) { 2492 vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8)); 2493 nxtdsp = dsp; 2494 } 2495 else if (dsp > np->scriptb_ba && 2496 dsp <= np->scriptb_ba + np->scriptb_sz) { 2497 vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8)); 2498 nxtdsp = dsp; 2499 } 2500 2501 /* 2502 * log the information 2503 */ 2504 if (DEBUG_FLAGS & DEBUG_PHASE) { 2505 printf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ", 2506 cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd); 2507 } 2508 2509 if (!vdsp) { 2510 printf ("%s: interrupted SCRIPT address not found.\n", 2511 sym_name (np)); 2512 goto reset_all; 2513 } 2514 2515 if (!cp) { 2516 printf ("%s: SCSI phase error fixup: CCB already dequeued.\n", 2517 sym_name (np)); 2518 goto reset_all; 2519 } 2520 2521 /* 2522 * get old startaddress and old length. 2523 */ 2524 oadr = scr_to_cpu(vdsp[1]); 2525 2526 if (cmd & 0x10) { /* Table indirect */ 2527 tblp = (u32 *) ((char*) &cp->phys + oadr); 2528 olen = scr_to_cpu(tblp[0]); 2529 oadr = scr_to_cpu(tblp[1]); 2530 } else { 2531 tblp = (u32 *) 0; 2532 olen = scr_to_cpu(vdsp[0]) & 0xffffff; 2533 } 2534 2535 if (DEBUG_FLAGS & DEBUG_PHASE) { 2536 printf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n", 2537 (unsigned) (scr_to_cpu(vdsp[0]) >> 24), 2538 tblp, 2539 (unsigned) olen, 2540 (unsigned) oadr); 2541 } 2542 2543 /* 2544 * check cmd against assumed interrupted script command. 2545 * If dt data phase, the MOVE instruction hasn't bit 4 of 2546 * the phase. 2547 */ 2548 if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) { 2549 sym_print_addr(cp->cmd, 2550 "internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n", 2551 cmd, scr_to_cpu(vdsp[0]) >> 24); 2552 2553 goto reset_all; 2554 } 2555 2556 /* 2557 * if old phase not dataphase, leave here. 2558 */ 2559 if (cmd & 2) { 2560 sym_print_addr(cp->cmd, 2561 "phase change %x-%x %d@%08x resid=%d.\n", 2562 cmd&7, INB(np, nc_sbcl)&7, (unsigned)olen, 2563 (unsigned)oadr, (unsigned)rest); 2564 goto unexpected_phase; 2565 } 2566 2567 /* 2568 * Choose the correct PM save area. 2569 * 2570 * Look at the PM_SAVE SCRIPT if you want to understand 2571 * this stuff. The equivalent code is implemented in 2572 * SCRIPTS for the 895A, 896 and 1010 that are able to 2573 * handle PM from the SCRIPTS processor. 2574 */ 2575 hflags0 = INB(np, HF_PRT); 2576 hflags = hflags0; 2577 2578 if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) { 2579 if (hflags & HF_IN_PM0) 2580 nxtdsp = scr_to_cpu(cp->phys.pm0.ret); 2581 else if (hflags & HF_IN_PM1) 2582 nxtdsp = scr_to_cpu(cp->phys.pm1.ret); 2583 2584 if (hflags & HF_DP_SAVED) 2585 hflags ^= HF_ACT_PM; 2586 } 2587 2588 if (!(hflags & HF_ACT_PM)) { 2589 pm = &cp->phys.pm0; 2590 newcmd = SCRIPTA_BA(np, pm0_data); 2591 } 2592 else { 2593 pm = &cp->phys.pm1; 2594 newcmd = SCRIPTA_BA(np, pm1_data); 2595 } 2596 2597 hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED); 2598 if (hflags != hflags0) 2599 OUTB(np, HF_PRT, hflags); 2600 2601 /* 2602 * fillin the phase mismatch context 2603 */ 2604 pm->sg.addr = cpu_to_scr(oadr + olen - rest); 2605 pm->sg.size = cpu_to_scr(rest); 2606 pm->ret = cpu_to_scr(nxtdsp); 2607 2608 /* 2609 * If we have a SWIDE, 2610 * - prepare the address to write the SWIDE from SCRIPTS, 2611 * - compute the SCRIPTS address to restart from, 2612 * - move current data pointer context by one byte. 2613 */ 2614 nxtdsp = SCRIPTA_BA(np, dispatch); 2615 if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) && 2616 (INB(np, nc_scntl2) & WSR)) { 2617 u32 tmp; 2618 2619 /* 2620 * Set up the table indirect for the MOVE 2621 * of the residual byte and adjust the data 2622 * pointer context. 2623 */ 2624 tmp = scr_to_cpu(pm->sg.addr); 2625 cp->phys.wresid.addr = cpu_to_scr(tmp); 2626 pm->sg.addr = cpu_to_scr(tmp + 1); 2627 tmp = scr_to_cpu(pm->sg.size); 2628 cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1); 2629 pm->sg.size = cpu_to_scr(tmp - 1); 2630 2631 /* 2632 * If only the residual byte is to be moved, 2633 * no PM context is needed. 2634 */ 2635 if ((tmp&0xffffff) == 1) 2636 newcmd = pm->ret; 2637 2638 /* 2639 * Prepare the address of SCRIPTS that will 2640 * move the residual byte to memory. 2641 */ 2642 nxtdsp = SCRIPTB_BA(np, wsr_ma_helper); 2643 } 2644 2645 if (DEBUG_FLAGS & DEBUG_PHASE) { 2646 sym_print_addr(cp->cmd, "PM %x %x %x / %x %x %x.\n", 2647 hflags0, hflags, newcmd, 2648 (unsigned)scr_to_cpu(pm->sg.addr), 2649 (unsigned)scr_to_cpu(pm->sg.size), 2650 (unsigned)scr_to_cpu(pm->ret)); 2651 } 2652 2653 /* 2654 * Restart the SCRIPTS processor. 2655 */ 2656 sym_set_script_dp (np, cp, newcmd); 2657 OUTL_DSP(np, nxtdsp); 2658 return; 2659 2660 /* 2661 * Unexpected phase changes that occurs when the current phase 2662 * is not a DATA IN or DATA OUT phase are due to error conditions. 2663 * Such event may only happen when the SCRIPTS is using a 2664 * multibyte SCSI MOVE. 2665 * 2666 * Phase change Some possible cause 2667 * 2668 * COMMAND --> MSG IN SCSI parity error detected by target. 2669 * COMMAND --> STATUS Bad command or refused by target. 2670 * MSG OUT --> MSG IN Message rejected by target. 2671 * MSG OUT --> COMMAND Bogus target that discards extended 2672 * negotiation messages. 2673 * 2674 * The code below does not care of the new phase and so 2675 * trusts the target. Why to annoy it ? 2676 * If the interrupted phase is COMMAND phase, we restart at 2677 * dispatcher. 2678 * If a target does not get all the messages after selection, 2679 * the code assumes blindly that the target discards extended 2680 * messages and clears the negotiation status. 2681 * If the target does not want all our response to negotiation, 2682 * we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids 2683 * bloat for such a should_not_happen situation). 2684 * In all other situation, we reset the BUS. 2685 * Are these assumptions reasonnable ? (Wait and see ...) 2686 */ 2687 unexpected_phase: 2688 dsp -= 8; 2689 nxtdsp = 0; 2690 2691 switch (cmd & 7) { 2692 case 2: /* COMMAND phase */ 2693 nxtdsp = SCRIPTA_BA(np, dispatch); 2694 break; 2695 #if 0 2696 case 3: /* STATUS phase */ 2697 nxtdsp = SCRIPTA_BA(np, dispatch); 2698 break; 2699 #endif 2700 case 6: /* MSG OUT phase */ 2701 /* 2702 * If the device may want to use untagged when we want 2703 * tagged, we prepare an IDENTIFY without disc. granted, 2704 * since we will not be able to handle reselect. 2705 * Otherwise, we just don't care. 2706 */ 2707 if (dsp == SCRIPTA_BA(np, send_ident)) { 2708 if (cp->tag != NO_TAG && olen - rest <= 3) { 2709 cp->host_status = HS_BUSY; 2710 np->msgout[0] = IDENTIFY(0, cp->lun); 2711 nxtdsp = SCRIPTB_BA(np, ident_break_atn); 2712 } 2713 else 2714 nxtdsp = SCRIPTB_BA(np, ident_break); 2715 } 2716 else if (dsp == SCRIPTB_BA(np, send_wdtr) || 2717 dsp == SCRIPTB_BA(np, send_sdtr) || 2718 dsp == SCRIPTB_BA(np, send_ppr)) { 2719 nxtdsp = SCRIPTB_BA(np, nego_bad_phase); 2720 if (dsp == SCRIPTB_BA(np, send_ppr)) { 2721 struct scsi_device *dev = cp->cmd->device; 2722 dev->ppr = 0; 2723 } 2724 } 2725 break; 2726 #if 0 2727 case 7: /* MSG IN phase */ 2728 nxtdsp = SCRIPTA_BA(np, clrack); 2729 break; 2730 #endif 2731 } 2732 2733 if (nxtdsp) { 2734 OUTL_DSP(np, nxtdsp); 2735 return; 2736 } 2737 2738 reset_all: 2739 sym_start_reset(np); 2740 } 2741 2742 /* 2743 * chip interrupt handler 2744 * 2745 * In normal situations, interrupt conditions occur one at 2746 * a time. But when something bad happens on the SCSI BUS, 2747 * the chip may raise several interrupt flags before 2748 * stopping and interrupting the CPU. The additionnal 2749 * interrupt flags are stacked in some extra registers 2750 * after the SIP and/or DIP flag has been raised in the 2751 * ISTAT. After the CPU has read the interrupt condition 2752 * flag from SIST or DSTAT, the chip unstacks the other 2753 * interrupt flags and sets the corresponding bits in 2754 * SIST or DSTAT. Since the chip starts stacking once the 2755 * SIP or DIP flag is set, there is a small window of time 2756 * where the stacking does not occur. 2757 * 2758 * Typically, multiple interrupt conditions may happen in 2759 * the following situations: 2760 * 2761 * - SCSI parity error + Phase mismatch (PAR|MA) 2762 * When an parity error is detected in input phase 2763 * and the device switches to msg-in phase inside a 2764 * block MOV. 2765 * - SCSI parity error + Unexpected disconnect (PAR|UDC) 2766 * When a stupid device does not want to handle the 2767 * recovery of an SCSI parity error. 2768 * - Some combinations of STO, PAR, UDC, ... 2769 * When using non compliant SCSI stuff, when user is 2770 * doing non compliant hot tampering on the BUS, when 2771 * something really bad happens to a device, etc ... 2772 * 2773 * The heuristic suggested by SYMBIOS to handle 2774 * multiple interrupts is to try unstacking all 2775 * interrupts conditions and to handle them on some 2776 * priority based on error severity. 2777 * This will work when the unstacking has been 2778 * successful, but we cannot be 100 % sure of that, 2779 * since the CPU may have been faster to unstack than 2780 * the chip is able to stack. Hmmm ... But it seems that 2781 * such a situation is very unlikely to happen. 2782 * 2783 * If this happen, for example STO caught by the CPU 2784 * then UDC happenning before the CPU have restarted 2785 * the SCRIPTS, the driver may wrongly complete the 2786 * same command on UDC, since the SCRIPTS didn't restart 2787 * and the DSA still points to the same command. 2788 * We avoid this situation by setting the DSA to an 2789 * invalid value when the CCB is completed and before 2790 * restarting the SCRIPTS. 2791 * 2792 * Another issue is that we need some section of our 2793 * recovery procedures to be somehow uninterruptible but 2794 * the SCRIPTS processor does not provides such a 2795 * feature. For this reason, we handle recovery preferently 2796 * from the C code and check against some SCRIPTS critical 2797 * sections from the C code. 2798 * 2799 * Hopefully, the interrupt handling of the driver is now 2800 * able to resist to weird BUS error conditions, but donnot 2801 * ask me for any guarantee that it will never fail. :-) 2802 * Use at your own decision and risk. 2803 */ 2804 2805 irqreturn_t sym_interrupt(struct Scsi_Host *shost) 2806 { 2807 struct sym_data *sym_data = shost_priv(shost); 2808 struct sym_hcb *np = sym_data->ncb; 2809 struct pci_dev *pdev = sym_data->pdev; 2810 u_char istat, istatc; 2811 u_char dstat; 2812 u_short sist; 2813 2814 /* 2815 * interrupt on the fly ? 2816 * (SCRIPTS may still be running) 2817 * 2818 * A `dummy read' is needed to ensure that the 2819 * clear of the INTF flag reaches the device 2820 * and that posted writes are flushed to memory 2821 * before the scanning of the DONE queue. 2822 * Note that SCRIPTS also (dummy) read to memory 2823 * prior to deliver the INTF interrupt condition. 2824 */ 2825 istat = INB(np, nc_istat); 2826 if (istat & INTF) { 2827 OUTB(np, nc_istat, (istat & SIGP) | INTF | np->istat_sem); 2828 istat |= INB(np, nc_istat); /* DUMMY READ */ 2829 if (DEBUG_FLAGS & DEBUG_TINY) printf ("F "); 2830 sym_wakeup_done(np); 2831 } 2832 2833 if (!(istat & (SIP|DIP))) 2834 return (istat & INTF) ? IRQ_HANDLED : IRQ_NONE; 2835 2836 #if 0 /* We should never get this one */ 2837 if (istat & CABRT) 2838 OUTB(np, nc_istat, CABRT); 2839 #endif 2840 2841 /* 2842 * PAR and MA interrupts may occur at the same time, 2843 * and we need to know of both in order to handle 2844 * this situation properly. We try to unstack SCSI 2845 * interrupts for that reason. BTW, I dislike a LOT 2846 * such a loop inside the interrupt routine. 2847 * Even if DMA interrupt stacking is very unlikely to 2848 * happen, we also try unstacking these ones, since 2849 * this has no performance impact. 2850 */ 2851 sist = 0; 2852 dstat = 0; 2853 istatc = istat; 2854 do { 2855 if (istatc & SIP) 2856 sist |= INW(np, nc_sist); 2857 if (istatc & DIP) 2858 dstat |= INB(np, nc_dstat); 2859 istatc = INB(np, nc_istat); 2860 istat |= istatc; 2861 2862 /* Prevent deadlock waiting on a condition that may 2863 * never clear. */ 2864 if (unlikely(sist == 0xffff && dstat == 0xff)) { 2865 if (pci_channel_offline(pdev)) 2866 return IRQ_NONE; 2867 } 2868 } while (istatc & (SIP|DIP)); 2869 2870 if (DEBUG_FLAGS & DEBUG_TINY) 2871 printf ("<%d|%x:%x|%x:%x>", 2872 (int)INB(np, nc_scr0), 2873 dstat,sist, 2874 (unsigned)INL(np, nc_dsp), 2875 (unsigned)INL(np, nc_dbc)); 2876 /* 2877 * On paper, a memory read barrier may be needed here to 2878 * prevent out of order LOADs by the CPU from having 2879 * prefetched stale data prior to DMA having occurred. 2880 * And since we are paranoid ... :) 2881 */ 2882 MEMORY_READ_BARRIER(); 2883 2884 /* 2885 * First, interrupts we want to service cleanly. 2886 * 2887 * Phase mismatch (MA) is the most frequent interrupt 2888 * for chip earlier than the 896 and so we have to service 2889 * it as quickly as possible. 2890 * A SCSI parity error (PAR) may be combined with a phase 2891 * mismatch condition (MA). 2892 * Programmed interrupts (SIR) are used to call the C code 2893 * from SCRIPTS. 2894 * The single step interrupt (SSI) is not used in this 2895 * driver. 2896 */ 2897 if (!(sist & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) && 2898 !(dstat & (MDPE|BF|ABRT|IID))) { 2899 if (sist & PAR) sym_int_par (np, sist); 2900 else if (sist & MA) sym_int_ma (np); 2901 else if (dstat & SIR) sym_int_sir(np); 2902 else if (dstat & SSI) OUTONB_STD(); 2903 else goto unknown_int; 2904 return IRQ_HANDLED; 2905 } 2906 2907 /* 2908 * Now, interrupts that donnot happen in normal 2909 * situations and that we may need to recover from. 2910 * 2911 * On SCSI RESET (RST), we reset everything. 2912 * On SCSI BUS MODE CHANGE (SBMC), we complete all 2913 * active CCBs with RESET status, prepare all devices 2914 * for negotiating again and restart the SCRIPTS. 2915 * On STO and UDC, we complete the CCB with the corres- 2916 * ponding status and restart the SCRIPTS. 2917 */ 2918 if (sist & RST) { 2919 printf("%s: SCSI BUS reset detected.\n", sym_name(np)); 2920 sym_start_up(shost, 1); 2921 return IRQ_HANDLED; 2922 } 2923 2924 OUTB(np, nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */ 2925 OUTB(np, nc_stest3, TE|CSF); /* clear scsi fifo */ 2926 2927 if (!(sist & (GEN|HTH|SGE)) && 2928 !(dstat & (MDPE|BF|ABRT|IID))) { 2929 if (sist & SBMC) sym_int_sbmc(shost); 2930 else if (sist & STO) sym_int_sto (np); 2931 else if (sist & UDC) sym_int_udc (np); 2932 else goto unknown_int; 2933 return IRQ_HANDLED; 2934 } 2935 2936 /* 2937 * Now, interrupts we are not able to recover cleanly. 2938 * 2939 * Log message for hard errors. 2940 * Reset everything. 2941 */ 2942 2943 sym_log_hard_error(shost, sist, dstat); 2944 2945 if ((sist & (GEN|HTH|SGE)) || 2946 (dstat & (MDPE|BF|ABRT|IID))) { 2947 sym_start_reset(np); 2948 return IRQ_HANDLED; 2949 } 2950 2951 unknown_int: 2952 /* 2953 * We just miss the cause of the interrupt. :( 2954 * Print a message. The timeout will do the real work. 2955 */ 2956 printf( "%s: unknown interrupt(s) ignored, " 2957 "ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n", 2958 sym_name(np), istat, dstat, sist); 2959 return IRQ_NONE; 2960 } 2961 2962 /* 2963 * Dequeue from the START queue all CCBs that match 2964 * a given target/lun/task condition (-1 means all), 2965 * and move them from the BUSY queue to the COMP queue 2966 * with DID_SOFT_ERROR status condition. 2967 * This function is used during error handling/recovery. 2968 * It is called with SCRIPTS not running. 2969 */ 2970 static int 2971 sym_dequeue_from_squeue(struct sym_hcb *np, int i, int target, int lun, int task) 2972 { 2973 int j; 2974 struct sym_ccb *cp; 2975 2976 /* 2977 * Make sure the starting index is within range. 2978 */ 2979 assert((i >= 0) && (i < 2*MAX_QUEUE)); 2980 2981 /* 2982 * Walk until end of START queue and dequeue every job 2983 * that matches the target/lun/task condition. 2984 */ 2985 j = i; 2986 while (i != np->squeueput) { 2987 cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i])); 2988 assert(cp); 2989 #ifdef SYM_CONF_IARB_SUPPORT 2990 /* Forget hints for IARB, they may be no longer relevant */ 2991 cp->host_flags &= ~HF_HINT_IARB; 2992 #endif 2993 if ((target == -1 || cp->target == target) && 2994 (lun == -1 || cp->lun == lun) && 2995 (task == -1 || cp->tag == task)) { 2996 sym_set_cam_status(cp->cmd, DID_SOFT_ERROR); 2997 sym_remque(&cp->link_ccbq); 2998 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq); 2999 } 3000 else { 3001 if (i != j) 3002 np->squeue[j] = np->squeue[i]; 3003 if ((j += 2) >= MAX_QUEUE*2) j = 0; 3004 } 3005 if ((i += 2) >= MAX_QUEUE*2) i = 0; 3006 } 3007 if (i != j) /* Copy back the idle task if needed */ 3008 np->squeue[j] = np->squeue[i]; 3009 np->squeueput = j; /* Update our current start queue pointer */ 3010 3011 return (i - j) / 2; 3012 } 3013 3014 /* 3015 * chip handler for bad SCSI status condition 3016 * 3017 * In case of bad SCSI status, we unqueue all the tasks 3018 * currently queued to the controller but not yet started 3019 * and then restart the SCRIPTS processor immediately. 3020 * 3021 * QUEUE FULL and BUSY conditions are handled the same way. 3022 * Basically all the not yet started tasks are requeued in 3023 * device queue and the queue is frozen until a completion. 3024 * 3025 * For CHECK CONDITION and COMMAND TERMINATED status, we use 3026 * the CCB of the failed command to prepare a REQUEST SENSE 3027 * SCSI command and queue it to the controller queue. 3028 * 3029 * SCRATCHA is assumed to have been loaded with STARTPOS 3030 * before the SCRIPTS called the C code. 3031 */ 3032 static void sym_sir_bad_scsi_status(struct sym_hcb *np, int num, struct sym_ccb *cp) 3033 { 3034 u32 startp; 3035 u_char s_status = cp->ssss_status; 3036 u_char h_flags = cp->host_flags; 3037 int msglen; 3038 int i; 3039 3040 /* 3041 * Compute the index of the next job to start from SCRIPTS. 3042 */ 3043 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4; 3044 3045 /* 3046 * The last CCB queued used for IARB hint may be 3047 * no longer relevant. Forget it. 3048 */ 3049 #ifdef SYM_CONF_IARB_SUPPORT 3050 if (np->last_cp) 3051 np->last_cp = 0; 3052 #endif 3053 3054 /* 3055 * Now deal with the SCSI status. 3056 */ 3057 switch(s_status) { 3058 case S_BUSY: 3059 case S_QUEUE_FULL: 3060 if (sym_verbose >= 2) { 3061 sym_print_addr(cp->cmd, "%s\n", 3062 s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n"); 3063 } 3064 default: /* S_INT, S_INT_COND_MET, S_CONFLICT */ 3065 sym_complete_error (np, cp); 3066 break; 3067 case S_TERMINATED: 3068 case S_CHECK_COND: 3069 /* 3070 * If we get an SCSI error when requesting sense, give up. 3071 */ 3072 if (h_flags & HF_SENSE) { 3073 sym_complete_error (np, cp); 3074 break; 3075 } 3076 3077 /* 3078 * Dequeue all queued CCBs for that device not yet started, 3079 * and restart the SCRIPTS processor immediately. 3080 */ 3081 sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1); 3082 OUTL_DSP(np, SCRIPTA_BA(np, start)); 3083 3084 /* 3085 * Save some info of the actual IO. 3086 * Compute the data residual. 3087 */ 3088 cp->sv_scsi_status = cp->ssss_status; 3089 cp->sv_xerr_status = cp->xerr_status; 3090 cp->sv_resid = sym_compute_residual(np, cp); 3091 3092 /* 3093 * Prepare all needed data structures for 3094 * requesting sense data. 3095 */ 3096 3097 cp->scsi_smsg2[0] = IDENTIFY(0, cp->lun); 3098 msglen = 1; 3099 3100 /* 3101 * If we are currently using anything different from 3102 * async. 8 bit data transfers with that target, 3103 * start a negotiation, since the device may want 3104 * to report us a UNIT ATTENTION condition due to 3105 * a cause we currently ignore, and we donnot want 3106 * to be stuck with WIDE and/or SYNC data transfer. 3107 * 3108 * cp->nego_status is filled by sym_prepare_nego(). 3109 */ 3110 cp->nego_status = 0; 3111 msglen += sym_prepare_nego(np, cp, &cp->scsi_smsg2[msglen]); 3112 /* 3113 * Message table indirect structure. 3114 */ 3115 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg2); 3116 cp->phys.smsg.size = cpu_to_scr(msglen); 3117 3118 /* 3119 * sense command 3120 */ 3121 cp->phys.cmd.addr = CCB_BA(cp, sensecmd); 3122 cp->phys.cmd.size = cpu_to_scr(6); 3123 3124 /* 3125 * patch requested size into sense command 3126 */ 3127 cp->sensecmd[0] = REQUEST_SENSE; 3128 cp->sensecmd[1] = 0; 3129 if (cp->cmd->device->scsi_level <= SCSI_2 && cp->lun <= 7) 3130 cp->sensecmd[1] = cp->lun << 5; 3131 cp->sensecmd[4] = SYM_SNS_BBUF_LEN; 3132 cp->data_len = SYM_SNS_BBUF_LEN; 3133 3134 /* 3135 * sense data 3136 */ 3137 memset(cp->sns_bbuf, 0, SYM_SNS_BBUF_LEN); 3138 cp->phys.sense.addr = CCB_BA(cp, sns_bbuf); 3139 cp->phys.sense.size = cpu_to_scr(SYM_SNS_BBUF_LEN); 3140 3141 /* 3142 * requeue the command. 3143 */ 3144 startp = SCRIPTB_BA(np, sdata_in); 3145 3146 cp->phys.head.savep = cpu_to_scr(startp); 3147 cp->phys.head.lastp = cpu_to_scr(startp); 3148 cp->startp = cpu_to_scr(startp); 3149 cp->goalp = cpu_to_scr(startp + 16); 3150 3151 cp->host_xflags = 0; 3152 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; 3153 cp->ssss_status = S_ILLEGAL; 3154 cp->host_flags = (HF_SENSE|HF_DATA_IN); 3155 cp->xerr_status = 0; 3156 cp->extra_bytes = 0; 3157 3158 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select)); 3159 3160 /* 3161 * Requeue the command. 3162 */ 3163 sym_put_start_queue(np, cp); 3164 3165 /* 3166 * Give back to upper layer everything we have dequeued. 3167 */ 3168 sym_flush_comp_queue(np, 0); 3169 break; 3170 } 3171 } 3172 3173 /* 3174 * After a device has accepted some management message 3175 * as BUS DEVICE RESET, ABORT TASK, etc ..., or when 3176 * a device signals a UNIT ATTENTION condition, some 3177 * tasks are thrown away by the device. We are required 3178 * to reflect that on our tasks list since the device 3179 * will never complete these tasks. 3180 * 3181 * This function move from the BUSY queue to the COMP 3182 * queue all disconnected CCBs for a given target that 3183 * match the following criteria: 3184 * - lun=-1 means any logical UNIT otherwise a given one. 3185 * - task=-1 means any task, otherwise a given one. 3186 */ 3187 int sym_clear_tasks(struct sym_hcb *np, int cam_status, int target, int lun, int task) 3188 { 3189 SYM_QUEHEAD qtmp, *qp; 3190 int i = 0; 3191 struct sym_ccb *cp; 3192 3193 /* 3194 * Move the entire BUSY queue to our temporary queue. 3195 */ 3196 sym_que_init(&qtmp); 3197 sym_que_splice(&np->busy_ccbq, &qtmp); 3198 sym_que_init(&np->busy_ccbq); 3199 3200 /* 3201 * Put all CCBs that matches our criteria into 3202 * the COMP queue and put back other ones into 3203 * the BUSY queue. 3204 */ 3205 while ((qp = sym_remque_head(&qtmp)) != NULL) { 3206 struct scsi_cmnd *cmd; 3207 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); 3208 cmd = cp->cmd; 3209 if (cp->host_status != HS_DISCONNECT || 3210 cp->target != target || 3211 (lun != -1 && cp->lun != lun) || 3212 (task != -1 && 3213 (cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) { 3214 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq); 3215 continue; 3216 } 3217 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq); 3218 3219 /* Preserve the software timeout condition */ 3220 if (sym_get_cam_status(cmd) != DID_TIME_OUT) 3221 sym_set_cam_status(cmd, cam_status); 3222 ++i; 3223 #if 0 3224 printf("XXXX TASK @%p CLEARED\n", cp); 3225 #endif 3226 } 3227 return i; 3228 } 3229 3230 /* 3231 * chip handler for TASKS recovery 3232 * 3233 * We cannot safely abort a command, while the SCRIPTS 3234 * processor is running, since we just would be in race 3235 * with it. 3236 * 3237 * As long as we have tasks to abort, we keep the SEM 3238 * bit set in the ISTAT. When this bit is set, the 3239 * SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED) 3240 * each time it enters the scheduler. 3241 * 3242 * If we have to reset a target, clear tasks of a unit, 3243 * or to perform the abort of a disconnected job, we 3244 * restart the SCRIPTS for selecting the target. Once 3245 * selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED). 3246 * If it loses arbitration, the SCRIPTS will interrupt again 3247 * the next time it will enter its scheduler, and so on ... 3248 * 3249 * On SIR_TARGET_SELECTED, we scan for the more 3250 * appropriate thing to do: 3251 * 3252 * - If nothing, we just sent a M_ABORT message to the 3253 * target to get rid of the useless SCSI bus ownership. 3254 * According to the specs, no tasks shall be affected. 3255 * - If the target is to be reset, we send it a M_RESET 3256 * message. 3257 * - If a logical UNIT is to be cleared , we send the 3258 * IDENTIFY(lun) + M_ABORT. 3259 * - If an untagged task is to be aborted, we send the 3260 * IDENTIFY(lun) + M_ABORT. 3261 * - If a tagged task is to be aborted, we send the 3262 * IDENTIFY(lun) + task attributes + M_ABORT_TAG. 3263 * 3264 * Once our 'kiss of death' :) message has been accepted 3265 * by the target, the SCRIPTS interrupts again 3266 * (SIR_ABORT_SENT). On this interrupt, we complete 3267 * all the CCBs that should have been aborted by the 3268 * target according to our message. 3269 */ 3270 static void sym_sir_task_recovery(struct sym_hcb *np, int num) 3271 { 3272 SYM_QUEHEAD *qp; 3273 struct sym_ccb *cp; 3274 struct sym_tcb *tp = NULL; /* gcc isn't quite smart enough yet */ 3275 struct scsi_target *starget; 3276 int target=-1, lun=-1, task; 3277 int i, k; 3278 3279 switch(num) { 3280 /* 3281 * The SCRIPTS processor stopped before starting 3282 * the next command in order to allow us to perform 3283 * some task recovery. 3284 */ 3285 case SIR_SCRIPT_STOPPED: 3286 /* 3287 * Do we have any target to reset or unit to clear ? 3288 */ 3289 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) { 3290 tp = &np->target[i]; 3291 if (tp->to_reset || 3292 (tp->lun0p && tp->lun0p->to_clear)) { 3293 target = i; 3294 break; 3295 } 3296 if (!tp->lunmp) 3297 continue; 3298 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) { 3299 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) { 3300 target = i; 3301 break; 3302 } 3303 } 3304 if (target != -1) 3305 break; 3306 } 3307 3308 /* 3309 * If not, walk the busy queue for any 3310 * disconnected CCB to be aborted. 3311 */ 3312 if (target == -1) { 3313 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { 3314 cp = sym_que_entry(qp,struct sym_ccb,link_ccbq); 3315 if (cp->host_status != HS_DISCONNECT) 3316 continue; 3317 if (cp->to_abort) { 3318 target = cp->target; 3319 break; 3320 } 3321 } 3322 } 3323 3324 /* 3325 * If some target is to be selected, 3326 * prepare and start the selection. 3327 */ 3328 if (target != -1) { 3329 tp = &np->target[target]; 3330 np->abrt_sel.sel_id = target; 3331 np->abrt_sel.sel_scntl3 = tp->head.wval; 3332 np->abrt_sel.sel_sxfer = tp->head.sval; 3333 OUTL(np, nc_dsa, np->hcb_ba); 3334 OUTL_DSP(np, SCRIPTB_BA(np, sel_for_abort)); 3335 return; 3336 } 3337 3338 /* 3339 * Now look for a CCB to abort that haven't started yet. 3340 * Btw, the SCRIPTS processor is still stopped, so 3341 * we are not in race. 3342 */ 3343 i = 0; 3344 cp = NULL; 3345 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { 3346 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); 3347 if (cp->host_status != HS_BUSY && 3348 cp->host_status != HS_NEGOTIATE) 3349 continue; 3350 if (!cp->to_abort) 3351 continue; 3352 #ifdef SYM_CONF_IARB_SUPPORT 3353 /* 3354 * If we are using IMMEDIATE ARBITRATION, we donnot 3355 * want to cancel the last queued CCB, since the 3356 * SCRIPTS may have anticipated the selection. 3357 */ 3358 if (cp == np->last_cp) { 3359 cp->to_abort = 0; 3360 continue; 3361 } 3362 #endif 3363 i = 1; /* Means we have found some */ 3364 break; 3365 } 3366 if (!i) { 3367 /* 3368 * We are done, so we donnot need 3369 * to synchronize with the SCRIPTS anylonger. 3370 * Remove the SEM flag from the ISTAT. 3371 */ 3372 np->istat_sem = 0; 3373 OUTB(np, nc_istat, SIGP); 3374 break; 3375 } 3376 /* 3377 * Compute index of next position in the start 3378 * queue the SCRIPTS intends to start and dequeue 3379 * all CCBs for that device that haven't been started. 3380 */ 3381 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4; 3382 i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1); 3383 3384 /* 3385 * Make sure at least our IO to abort has been dequeued. 3386 */ 3387 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING 3388 assert(i && sym_get_cam_status(cp->cmd) == DID_SOFT_ERROR); 3389 #else 3390 sym_remque(&cp->link_ccbq); 3391 sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq); 3392 #endif 3393 /* 3394 * Keep track in cam status of the reason of the abort. 3395 */ 3396 if (cp->to_abort == 2) 3397 sym_set_cam_status(cp->cmd, DID_TIME_OUT); 3398 else 3399 sym_set_cam_status(cp->cmd, DID_ABORT); 3400 3401 /* 3402 * Complete with error everything that we have dequeued. 3403 */ 3404 sym_flush_comp_queue(np, 0); 3405 break; 3406 /* 3407 * The SCRIPTS processor has selected a target 3408 * we may have some manual recovery to perform for. 3409 */ 3410 case SIR_TARGET_SELECTED: 3411 target = INB(np, nc_sdid) & 0xf; 3412 tp = &np->target[target]; 3413 3414 np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg)); 3415 3416 /* 3417 * If the target is to be reset, prepare a 3418 * M_RESET message and clear the to_reset flag 3419 * since we donnot expect this operation to fail. 3420 */ 3421 if (tp->to_reset) { 3422 np->abrt_msg[0] = M_RESET; 3423 np->abrt_tbl.size = 1; 3424 tp->to_reset = 0; 3425 break; 3426 } 3427 3428 /* 3429 * Otherwise, look for some logical unit to be cleared. 3430 */ 3431 if (tp->lun0p && tp->lun0p->to_clear) 3432 lun = 0; 3433 else if (tp->lunmp) { 3434 for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) { 3435 if (tp->lunmp[k] && tp->lunmp[k]->to_clear) { 3436 lun = k; 3437 break; 3438 } 3439 } 3440 } 3441 3442 /* 3443 * If a logical unit is to be cleared, prepare 3444 * an IDENTIFY(lun) + ABORT MESSAGE. 3445 */ 3446 if (lun != -1) { 3447 struct sym_lcb *lp = sym_lp(tp, lun); 3448 lp->to_clear = 0; /* We don't expect to fail here */ 3449 np->abrt_msg[0] = IDENTIFY(0, lun); 3450 np->abrt_msg[1] = M_ABORT; 3451 np->abrt_tbl.size = 2; 3452 break; 3453 } 3454 3455 /* 3456 * Otherwise, look for some disconnected job to 3457 * abort for this target. 3458 */ 3459 i = 0; 3460 cp = NULL; 3461 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { 3462 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); 3463 if (cp->host_status != HS_DISCONNECT) 3464 continue; 3465 if (cp->target != target) 3466 continue; 3467 if (!cp->to_abort) 3468 continue; 3469 i = 1; /* Means we have some */ 3470 break; 3471 } 3472 3473 /* 3474 * If we have none, probably since the device has 3475 * completed the command before we won abitration, 3476 * send a M_ABORT message without IDENTIFY. 3477 * According to the specs, the device must just 3478 * disconnect the BUS and not abort any task. 3479 */ 3480 if (!i) { 3481 np->abrt_msg[0] = M_ABORT; 3482 np->abrt_tbl.size = 1; 3483 break; 3484 } 3485 3486 /* 3487 * We have some task to abort. 3488 * Set the IDENTIFY(lun) 3489 */ 3490 np->abrt_msg[0] = IDENTIFY(0, cp->lun); 3491 3492 /* 3493 * If we want to abort an untagged command, we 3494 * will send a IDENTIFY + M_ABORT. 3495 * Otherwise (tagged command), we will send 3496 * a IDENTITFY + task attributes + ABORT TAG. 3497 */ 3498 if (cp->tag == NO_TAG) { 3499 np->abrt_msg[1] = M_ABORT; 3500 np->abrt_tbl.size = 2; 3501 } else { 3502 np->abrt_msg[1] = cp->scsi_smsg[1]; 3503 np->abrt_msg[2] = cp->scsi_smsg[2]; 3504 np->abrt_msg[3] = M_ABORT_TAG; 3505 np->abrt_tbl.size = 4; 3506 } 3507 /* 3508 * Keep track of software timeout condition, since the 3509 * peripheral driver may not count retries on abort 3510 * conditions not due to timeout. 3511 */ 3512 if (cp->to_abort == 2) 3513 sym_set_cam_status(cp->cmd, DID_TIME_OUT); 3514 cp->to_abort = 0; /* We donnot expect to fail here */ 3515 break; 3516 3517 /* 3518 * The target has accepted our message and switched 3519 * to BUS FREE phase as we expected. 3520 */ 3521 case SIR_ABORT_SENT: 3522 target = INB(np, nc_sdid) & 0xf; 3523 tp = &np->target[target]; 3524 starget = tp->starget; 3525 3526 /* 3527 ** If we didn't abort anything, leave here. 3528 */ 3529 if (np->abrt_msg[0] == M_ABORT) 3530 break; 3531 3532 /* 3533 * If we sent a M_RESET, then a hardware reset has 3534 * been performed by the target. 3535 * - Reset everything to async 8 bit 3536 * - Tell ourself to negotiate next time :-) 3537 * - Prepare to clear all disconnected CCBs for 3538 * this target from our task list (lun=task=-1) 3539 */ 3540 lun = -1; 3541 task = -1; 3542 if (np->abrt_msg[0] == M_RESET) { 3543 tp->head.sval = 0; 3544 tp->head.wval = np->rv_scntl3; 3545 tp->head.uval = 0; 3546 spi_period(starget) = 0; 3547 spi_offset(starget) = 0; 3548 spi_width(starget) = 0; 3549 spi_iu(starget) = 0; 3550 spi_dt(starget) = 0; 3551 spi_qas(starget) = 0; 3552 tp->tgoal.check_nego = 1; 3553 tp->tgoal.renego = 0; 3554 } 3555 3556 /* 3557 * Otherwise, check for the LUN and TASK(s) 3558 * concerned by the cancelation. 3559 * If it is not ABORT_TAG then it is CLEAR_QUEUE 3560 * or an ABORT message :-) 3561 */ 3562 else { 3563 lun = np->abrt_msg[0] & 0x3f; 3564 if (np->abrt_msg[1] == M_ABORT_TAG) 3565 task = np->abrt_msg[2]; 3566 } 3567 3568 /* 3569 * Complete all the CCBs the device should have 3570 * aborted due to our 'kiss of death' message. 3571 */ 3572 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4; 3573 sym_dequeue_from_squeue(np, i, target, lun, -1); 3574 sym_clear_tasks(np, DID_ABORT, target, lun, task); 3575 sym_flush_comp_queue(np, 0); 3576 3577 /* 3578 * If we sent a BDR, make upper layer aware of that. 3579 */ 3580 if (np->abrt_msg[0] == M_RESET) 3581 starget_printk(KERN_NOTICE, starget, 3582 "has been reset\n"); 3583 break; 3584 } 3585 3586 /* 3587 * Print to the log the message we intend to send. 3588 */ 3589 if (num == SIR_TARGET_SELECTED) { 3590 dev_info(&tp->starget->dev, "control msgout:"); 3591 sym_printl_hex(np->abrt_msg, np->abrt_tbl.size); 3592 np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size); 3593 } 3594 3595 /* 3596 * Let the SCRIPTS processor continue. 3597 */ 3598 OUTONB_STD(); 3599 } 3600 3601 /* 3602 * Gerard's alchemy:) that deals with with the data 3603 * pointer for both MDP and the residual calculation. 3604 * 3605 * I didn't want to bloat the code by more than 200 3606 * lines for the handling of both MDP and the residual. 3607 * This has been achieved by using a data pointer 3608 * representation consisting in an index in the data 3609 * array (dp_sg) and a negative offset (dp_ofs) that 3610 * have the following meaning: 3611 * 3612 * - dp_sg = SYM_CONF_MAX_SG 3613 * we are at the end of the data script. 3614 * - dp_sg < SYM_CONF_MAX_SG 3615 * dp_sg points to the next entry of the scatter array 3616 * we want to transfer. 3617 * - dp_ofs < 0 3618 * dp_ofs represents the residual of bytes of the 3619 * previous entry scatter entry we will send first. 3620 * - dp_ofs = 0 3621 * no residual to send first. 3622 * 3623 * The function sym_evaluate_dp() accepts an arbitray 3624 * offset (basically from the MDP message) and returns 3625 * the corresponding values of dp_sg and dp_ofs. 3626 */ 3627 3628 static int sym_evaluate_dp(struct sym_hcb *np, struct sym_ccb *cp, u32 scr, int *ofs) 3629 { 3630 u32 dp_scr; 3631 int dp_ofs, dp_sg, dp_sgmin; 3632 int tmp; 3633 struct sym_pmc *pm; 3634 3635 /* 3636 * Compute the resulted data pointer in term of a script 3637 * address within some DATA script and a signed byte offset. 3638 */ 3639 dp_scr = scr; 3640 dp_ofs = *ofs; 3641 if (dp_scr == SCRIPTA_BA(np, pm0_data)) 3642 pm = &cp->phys.pm0; 3643 else if (dp_scr == SCRIPTA_BA(np, pm1_data)) 3644 pm = &cp->phys.pm1; 3645 else 3646 pm = NULL; 3647 3648 if (pm) { 3649 dp_scr = scr_to_cpu(pm->ret); 3650 dp_ofs -= scr_to_cpu(pm->sg.size) & 0x00ffffff; 3651 } 3652 3653 /* 3654 * If we are auto-sensing, then we are done. 3655 */ 3656 if (cp->host_flags & HF_SENSE) { 3657 *ofs = dp_ofs; 3658 return 0; 3659 } 3660 3661 /* 3662 * Deduce the index of the sg entry. 3663 * Keep track of the index of the first valid entry. 3664 * If result is dp_sg = SYM_CONF_MAX_SG, then we are at the 3665 * end of the data. 3666 */ 3667 tmp = scr_to_cpu(cp->goalp); 3668 dp_sg = SYM_CONF_MAX_SG; 3669 if (dp_scr != tmp) 3670 dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4); 3671 dp_sgmin = SYM_CONF_MAX_SG - cp->segments; 3672 3673 /* 3674 * Move to the sg entry the data pointer belongs to. 3675 * 3676 * If we are inside the data area, we expect result to be: 3677 * 3678 * Either, 3679 * dp_ofs = 0 and dp_sg is the index of the sg entry 3680 * the data pointer belongs to (or the end of the data) 3681 * Or, 3682 * dp_ofs < 0 and dp_sg is the index of the sg entry 3683 * the data pointer belongs to + 1. 3684 */ 3685 if (dp_ofs < 0) { 3686 int n; 3687 while (dp_sg > dp_sgmin) { 3688 --dp_sg; 3689 tmp = scr_to_cpu(cp->phys.data[dp_sg].size); 3690 n = dp_ofs + (tmp & 0xffffff); 3691 if (n > 0) { 3692 ++dp_sg; 3693 break; 3694 } 3695 dp_ofs = n; 3696 } 3697 } 3698 else if (dp_ofs > 0) { 3699 while (dp_sg < SYM_CONF_MAX_SG) { 3700 tmp = scr_to_cpu(cp->phys.data[dp_sg].size); 3701 dp_ofs -= (tmp & 0xffffff); 3702 ++dp_sg; 3703 if (dp_ofs <= 0) 3704 break; 3705 } 3706 } 3707 3708 /* 3709 * Make sure the data pointer is inside the data area. 3710 * If not, return some error. 3711 */ 3712 if (dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0)) 3713 goto out_err; 3714 else if (dp_sg > SYM_CONF_MAX_SG || 3715 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0)) 3716 goto out_err; 3717 3718 /* 3719 * Save the extreme pointer if needed. 3720 */ 3721 if (dp_sg > cp->ext_sg || 3722 (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) { 3723 cp->ext_sg = dp_sg; 3724 cp->ext_ofs = dp_ofs; 3725 } 3726 3727 /* 3728 * Return data. 3729 */ 3730 *ofs = dp_ofs; 3731 return dp_sg; 3732 3733 out_err: 3734 return -1; 3735 } 3736 3737 /* 3738 * chip handler for MODIFY DATA POINTER MESSAGE 3739 * 3740 * We also call this function on IGNORE WIDE RESIDUE 3741 * messages that do not match a SWIDE full condition. 3742 * Btw, we assume in that situation that such a message 3743 * is equivalent to a MODIFY DATA POINTER (offset=-1). 3744 */ 3745 3746 static void sym_modify_dp(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp, int ofs) 3747 { 3748 int dp_ofs = ofs; 3749 u32 dp_scr = sym_get_script_dp (np, cp); 3750 u32 dp_ret; 3751 u32 tmp; 3752 u_char hflags; 3753 int dp_sg; 3754 struct sym_pmc *pm; 3755 3756 /* 3757 * Not supported for auto-sense. 3758 */ 3759 if (cp->host_flags & HF_SENSE) 3760 goto out_reject; 3761 3762 /* 3763 * Apply our alchemy:) (see comments in sym_evaluate_dp()), 3764 * to the resulted data pointer. 3765 */ 3766 dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs); 3767 if (dp_sg < 0) 3768 goto out_reject; 3769 3770 /* 3771 * And our alchemy:) allows to easily calculate the data 3772 * script address we want to return for the next data phase. 3773 */ 3774 dp_ret = cpu_to_scr(cp->goalp); 3775 dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4); 3776 3777 /* 3778 * If offset / scatter entry is zero we donnot need 3779 * a context for the new current data pointer. 3780 */ 3781 if (dp_ofs == 0) { 3782 dp_scr = dp_ret; 3783 goto out_ok; 3784 } 3785 3786 /* 3787 * Get a context for the new current data pointer. 3788 */ 3789 hflags = INB(np, HF_PRT); 3790 3791 if (hflags & HF_DP_SAVED) 3792 hflags ^= HF_ACT_PM; 3793 3794 if (!(hflags & HF_ACT_PM)) { 3795 pm = &cp->phys.pm0; 3796 dp_scr = SCRIPTA_BA(np, pm0_data); 3797 } 3798 else { 3799 pm = &cp->phys.pm1; 3800 dp_scr = SCRIPTA_BA(np, pm1_data); 3801 } 3802 3803 hflags &= ~(HF_DP_SAVED); 3804 3805 OUTB(np, HF_PRT, hflags); 3806 3807 /* 3808 * Set up the new current data pointer. 3809 * ofs < 0 there, and for the next data phase, we 3810 * want to transfer part of the data of the sg entry 3811 * corresponding to index dp_sg-1 prior to returning 3812 * to the main data script. 3813 */ 3814 pm->ret = cpu_to_scr(dp_ret); 3815 tmp = scr_to_cpu(cp->phys.data[dp_sg-1].addr); 3816 tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs; 3817 pm->sg.addr = cpu_to_scr(tmp); 3818 pm->sg.size = cpu_to_scr(-dp_ofs); 3819 3820 out_ok: 3821 sym_set_script_dp (np, cp, dp_scr); 3822 OUTL_DSP(np, SCRIPTA_BA(np, clrack)); 3823 return; 3824 3825 out_reject: 3826 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); 3827 } 3828 3829 3830 /* 3831 * chip calculation of the data residual. 3832 * 3833 * As I used to say, the requirement of data residual 3834 * in SCSI is broken, useless and cannot be achieved 3835 * without huge complexity. 3836 * But most OSes and even the official CAM require it. 3837 * When stupidity happens to be so widely spread inside 3838 * a community, it gets hard to convince. 3839 * 3840 * Anyway, I don't care, since I am not going to use 3841 * any software that considers this data residual as 3842 * a relevant information. :) 3843 */ 3844 3845 int sym_compute_residual(struct sym_hcb *np, struct sym_ccb *cp) 3846 { 3847 int dp_sg, dp_sgmin, resid = 0; 3848 int dp_ofs = 0; 3849 3850 /* 3851 * Check for some data lost or just thrown away. 3852 * We are not required to be quite accurate in this 3853 * situation. Btw, if we are odd for output and the 3854 * device claims some more data, it may well happen 3855 * than our residual be zero. :-) 3856 */ 3857 if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) { 3858 if (cp->xerr_status & XE_EXTRA_DATA) 3859 resid -= cp->extra_bytes; 3860 if (cp->xerr_status & XE_SODL_UNRUN) 3861 ++resid; 3862 if (cp->xerr_status & XE_SWIDE_OVRUN) 3863 --resid; 3864 } 3865 3866 /* 3867 * If all data has been transferred, 3868 * there is no residual. 3869 */ 3870 if (cp->phys.head.lastp == cp->goalp) 3871 return resid; 3872 3873 /* 3874 * If no data transfer occurs, or if the data 3875 * pointer is weird, return full residual. 3876 */ 3877 if (cp->startp == cp->phys.head.lastp || 3878 sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp), 3879 &dp_ofs) < 0) { 3880 return cp->data_len - cp->odd_byte_adjustment; 3881 } 3882 3883 /* 3884 * If we were auto-sensing, then we are done. 3885 */ 3886 if (cp->host_flags & HF_SENSE) { 3887 return -dp_ofs; 3888 } 3889 3890 /* 3891 * We are now full comfortable in the computation 3892 * of the data residual (2's complement). 3893 */ 3894 dp_sgmin = SYM_CONF_MAX_SG - cp->segments; 3895 resid = -cp->ext_ofs; 3896 for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) { 3897 u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size); 3898 resid += (tmp & 0xffffff); 3899 } 3900 3901 resid -= cp->odd_byte_adjustment; 3902 3903 /* 3904 * Hopefully, the result is not too wrong. 3905 */ 3906 return resid; 3907 } 3908 3909 /* 3910 * Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER. 3911 * 3912 * When we try to negotiate, we append the negotiation message 3913 * to the identify and (maybe) simple tag message. 3914 * The host status field is set to HS_NEGOTIATE to mark this 3915 * situation. 3916 * 3917 * If the target doesn't answer this message immediately 3918 * (as required by the standard), the SIR_NEGO_FAILED interrupt 3919 * will be raised eventually. 3920 * The handler removes the HS_NEGOTIATE status, and sets the 3921 * negotiated value to the default (async / nowide). 3922 * 3923 * If we receive a matching answer immediately, we check it 3924 * for validity, and set the values. 3925 * 3926 * If we receive a Reject message immediately, we assume the 3927 * negotiation has failed, and fall back to standard values. 3928 * 3929 * If we receive a negotiation message while not in HS_NEGOTIATE 3930 * state, it's a target initiated negotiation. We prepare a 3931 * (hopefully) valid answer, set our parameters, and send back 3932 * this answer to the target. 3933 * 3934 * If the target doesn't fetch the answer (no message out phase), 3935 * we assume the negotiation has failed, and fall back to default 3936 * settings (SIR_NEGO_PROTO interrupt). 3937 * 3938 * When we set the values, we adjust them in all ccbs belonging 3939 * to this target, in the controller's register, and in the "phys" 3940 * field of the controller's struct sym_hcb. 3941 */ 3942 3943 /* 3944 * chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message. 3945 */ 3946 static int 3947 sym_sync_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp) 3948 { 3949 int target = cp->target; 3950 u_char chg, ofs, per, fak, div; 3951 3952 if (DEBUG_FLAGS & DEBUG_NEGO) { 3953 sym_print_nego_msg(np, target, "sync msgin", np->msgin); 3954 } 3955 3956 /* 3957 * Get requested values. 3958 */ 3959 chg = 0; 3960 per = np->msgin[3]; 3961 ofs = np->msgin[4]; 3962 3963 /* 3964 * Check values against our limits. 3965 */ 3966 if (ofs) { 3967 if (ofs > np->maxoffs) 3968 {chg = 1; ofs = np->maxoffs;} 3969 } 3970 3971 if (ofs) { 3972 if (per < np->minsync) 3973 {chg = 1; per = np->minsync;} 3974 } 3975 3976 /* 3977 * Get new chip synchronous parameters value. 3978 */ 3979 div = fak = 0; 3980 if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0) 3981 goto reject_it; 3982 3983 if (DEBUG_FLAGS & DEBUG_NEGO) { 3984 sym_print_addr(cp->cmd, 3985 "sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n", 3986 ofs, per, div, fak, chg); 3987 } 3988 3989 /* 3990 * If it was an answer we want to change, 3991 * then it isn't acceptable. Reject it. 3992 */ 3993 if (!req && chg) 3994 goto reject_it; 3995 3996 /* 3997 * Apply new values. 3998 */ 3999 sym_setsync (np, target, ofs, per, div, fak); 4000 4001 /* 4002 * It was an answer. We are done. 4003 */ 4004 if (!req) 4005 return 0; 4006 4007 /* 4008 * It was a request. Prepare an answer message. 4009 */ 4010 spi_populate_sync_msg(np->msgout, per, ofs); 4011 4012 if (DEBUG_FLAGS & DEBUG_NEGO) { 4013 sym_print_nego_msg(np, target, "sync msgout", np->msgout); 4014 } 4015 4016 np->msgin [0] = M_NOOP; 4017 4018 return 0; 4019 4020 reject_it: 4021 sym_setsync (np, target, 0, 0, 0, 0); 4022 return -1; 4023 } 4024 4025 static void sym_sync_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) 4026 { 4027 int req = 1; 4028 int result; 4029 4030 /* 4031 * Request or answer ? 4032 */ 4033 if (INB(np, HS_PRT) == HS_NEGOTIATE) { 4034 OUTB(np, HS_PRT, HS_BUSY); 4035 if (cp->nego_status && cp->nego_status != NS_SYNC) 4036 goto reject_it; 4037 req = 0; 4038 } 4039 4040 /* 4041 * Check and apply new values. 4042 */ 4043 result = sym_sync_nego_check(np, req, cp); 4044 if (result) /* Not acceptable, reject it */ 4045 goto reject_it; 4046 if (req) { /* Was a request, send response. */ 4047 cp->nego_status = NS_SYNC; 4048 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp)); 4049 } 4050 else /* Was a response, we are done. */ 4051 OUTL_DSP(np, SCRIPTA_BA(np, clrack)); 4052 return; 4053 4054 reject_it: 4055 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); 4056 } 4057 4058 /* 4059 * chip handler for PARALLEL PROTOCOL REQUEST (PPR) message. 4060 */ 4061 static int 4062 sym_ppr_nego_check(struct sym_hcb *np, int req, int target) 4063 { 4064 struct sym_tcb *tp = &np->target[target]; 4065 unsigned char fak, div; 4066 int dt, chg = 0; 4067 4068 unsigned char per = np->msgin[3]; 4069 unsigned char ofs = np->msgin[5]; 4070 unsigned char wide = np->msgin[6]; 4071 unsigned char opts = np->msgin[7] & PPR_OPT_MASK; 4072 4073 if (DEBUG_FLAGS & DEBUG_NEGO) { 4074 sym_print_nego_msg(np, target, "ppr msgin", np->msgin); 4075 } 4076 4077 /* 4078 * Check values against our limits. 4079 */ 4080 if (wide > np->maxwide) { 4081 chg = 1; 4082 wide = np->maxwide; 4083 } 4084 if (!wide || !(np->features & FE_U3EN)) 4085 opts = 0; 4086 4087 if (opts != (np->msgin[7] & PPR_OPT_MASK)) 4088 chg = 1; 4089 4090 dt = opts & PPR_OPT_DT; 4091 4092 if (ofs) { 4093 unsigned char maxoffs = dt ? np->maxoffs_dt : np->maxoffs; 4094 if (ofs > maxoffs) { 4095 chg = 1; 4096 ofs = maxoffs; 4097 } 4098 } 4099 4100 if (ofs) { 4101 unsigned char minsync = dt ? np->minsync_dt : np->minsync; 4102 if (per < minsync) { 4103 chg = 1; 4104 per = minsync; 4105 } 4106 } 4107 4108 /* 4109 * Get new chip synchronous parameters value. 4110 */ 4111 div = fak = 0; 4112 if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0) 4113 goto reject_it; 4114 4115 /* 4116 * If it was an answer we want to change, 4117 * then it isn't acceptable. Reject it. 4118 */ 4119 if (!req && chg) 4120 goto reject_it; 4121 4122 /* 4123 * Apply new values. 4124 */ 4125 sym_setpprot(np, target, opts, ofs, per, wide, div, fak); 4126 4127 /* 4128 * It was an answer. We are done. 4129 */ 4130 if (!req) 4131 return 0; 4132 4133 /* 4134 * It was a request. Prepare an answer message. 4135 */ 4136 spi_populate_ppr_msg(np->msgout, per, ofs, wide, opts); 4137 4138 if (DEBUG_FLAGS & DEBUG_NEGO) { 4139 sym_print_nego_msg(np, target, "ppr msgout", np->msgout); 4140 } 4141 4142 np->msgin [0] = M_NOOP; 4143 4144 return 0; 4145 4146 reject_it: 4147 sym_setpprot (np, target, 0, 0, 0, 0, 0, 0); 4148 /* 4149 * If it is a device response that should result in 4150 * ST, we may want to try a legacy negotiation later. 4151 */ 4152 if (!req && !opts) { 4153 tp->tgoal.period = per; 4154 tp->tgoal.offset = ofs; 4155 tp->tgoal.width = wide; 4156 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0; 4157 tp->tgoal.check_nego = 1; 4158 } 4159 return -1; 4160 } 4161 4162 static void sym_ppr_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) 4163 { 4164 int req = 1; 4165 int result; 4166 4167 /* 4168 * Request or answer ? 4169 */ 4170 if (INB(np, HS_PRT) == HS_NEGOTIATE) { 4171 OUTB(np, HS_PRT, HS_BUSY); 4172 if (cp->nego_status && cp->nego_status != NS_PPR) 4173 goto reject_it; 4174 req = 0; 4175 } 4176 4177 /* 4178 * Check and apply new values. 4179 */ 4180 result = sym_ppr_nego_check(np, req, cp->target); 4181 if (result) /* Not acceptable, reject it */ 4182 goto reject_it; 4183 if (req) { /* Was a request, send response. */ 4184 cp->nego_status = NS_PPR; 4185 OUTL_DSP(np, SCRIPTB_BA(np, ppr_resp)); 4186 } 4187 else /* Was a response, we are done. */ 4188 OUTL_DSP(np, SCRIPTA_BA(np, clrack)); 4189 return; 4190 4191 reject_it: 4192 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); 4193 } 4194 4195 /* 4196 * chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message. 4197 */ 4198 static int 4199 sym_wide_nego_check(struct sym_hcb *np, int req, struct sym_ccb *cp) 4200 { 4201 int target = cp->target; 4202 u_char chg, wide; 4203 4204 if (DEBUG_FLAGS & DEBUG_NEGO) { 4205 sym_print_nego_msg(np, target, "wide msgin", np->msgin); 4206 } 4207 4208 /* 4209 * Get requested values. 4210 */ 4211 chg = 0; 4212 wide = np->msgin[3]; 4213 4214 /* 4215 * Check values against our limits. 4216 */ 4217 if (wide > np->maxwide) { 4218 chg = 1; 4219 wide = np->maxwide; 4220 } 4221 4222 if (DEBUG_FLAGS & DEBUG_NEGO) { 4223 sym_print_addr(cp->cmd, "wdtr: wide=%d chg=%d.\n", 4224 wide, chg); 4225 } 4226 4227 /* 4228 * If it was an answer we want to change, 4229 * then it isn't acceptable. Reject it. 4230 */ 4231 if (!req && chg) 4232 goto reject_it; 4233 4234 /* 4235 * Apply new values. 4236 */ 4237 sym_setwide (np, target, wide); 4238 4239 /* 4240 * It was an answer. We are done. 4241 */ 4242 if (!req) 4243 return 0; 4244 4245 /* 4246 * It was a request. Prepare an answer message. 4247 */ 4248 spi_populate_width_msg(np->msgout, wide); 4249 4250 np->msgin [0] = M_NOOP; 4251 4252 if (DEBUG_FLAGS & DEBUG_NEGO) { 4253 sym_print_nego_msg(np, target, "wide msgout", np->msgout); 4254 } 4255 4256 return 0; 4257 4258 reject_it: 4259 return -1; 4260 } 4261 4262 static void sym_wide_nego(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) 4263 { 4264 int req = 1; 4265 int result; 4266 4267 /* 4268 * Request or answer ? 4269 */ 4270 if (INB(np, HS_PRT) == HS_NEGOTIATE) { 4271 OUTB(np, HS_PRT, HS_BUSY); 4272 if (cp->nego_status && cp->nego_status != NS_WIDE) 4273 goto reject_it; 4274 req = 0; 4275 } 4276 4277 /* 4278 * Check and apply new values. 4279 */ 4280 result = sym_wide_nego_check(np, req, cp); 4281 if (result) /* Not acceptable, reject it */ 4282 goto reject_it; 4283 if (req) { /* Was a request, send response. */ 4284 cp->nego_status = NS_WIDE; 4285 OUTL_DSP(np, SCRIPTB_BA(np, wdtr_resp)); 4286 } else { /* Was a response. */ 4287 /* 4288 * Negotiate for SYNC immediately after WIDE response. 4289 * This allows to negotiate for both WIDE and SYNC on 4290 * a single SCSI command (Suggested by Justin Gibbs). 4291 */ 4292 if (tp->tgoal.offset) { 4293 spi_populate_sync_msg(np->msgout, tp->tgoal.period, 4294 tp->tgoal.offset); 4295 4296 if (DEBUG_FLAGS & DEBUG_NEGO) { 4297 sym_print_nego_msg(np, cp->target, 4298 "sync msgout", np->msgout); 4299 } 4300 4301 cp->nego_status = NS_SYNC; 4302 OUTB(np, HS_PRT, HS_NEGOTIATE); 4303 OUTL_DSP(np, SCRIPTB_BA(np, sdtr_resp)); 4304 return; 4305 } else 4306 OUTL_DSP(np, SCRIPTA_BA(np, clrack)); 4307 } 4308 4309 return; 4310 4311 reject_it: 4312 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); 4313 } 4314 4315 /* 4316 * Reset DT, SYNC or WIDE to default settings. 4317 * 4318 * Called when a negotiation does not succeed either 4319 * on rejection or on protocol error. 4320 * 4321 * A target that understands a PPR message should never 4322 * reject it, and messing with it is very unlikely. 4323 * So, if a PPR makes problems, we may just want to 4324 * try a legacy negotiation later. 4325 */ 4326 static void sym_nego_default(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) 4327 { 4328 switch (cp->nego_status) { 4329 case NS_PPR: 4330 #if 0 4331 sym_setpprot (np, cp->target, 0, 0, 0, 0, 0, 0); 4332 #else 4333 if (tp->tgoal.period < np->minsync) 4334 tp->tgoal.period = np->minsync; 4335 if (tp->tgoal.offset > np->maxoffs) 4336 tp->tgoal.offset = np->maxoffs; 4337 tp->tgoal.iu = tp->tgoal.dt = tp->tgoal.qas = 0; 4338 tp->tgoal.check_nego = 1; 4339 #endif 4340 break; 4341 case NS_SYNC: 4342 sym_setsync (np, cp->target, 0, 0, 0, 0); 4343 break; 4344 case NS_WIDE: 4345 sym_setwide (np, cp->target, 0); 4346 break; 4347 } 4348 np->msgin [0] = M_NOOP; 4349 np->msgout[0] = M_NOOP; 4350 cp->nego_status = 0; 4351 } 4352 4353 /* 4354 * chip handler for MESSAGE REJECT received in response to 4355 * PPR, WIDE or SYNCHRONOUS negotiation. 4356 */ 4357 static void sym_nego_rejected(struct sym_hcb *np, struct sym_tcb *tp, struct sym_ccb *cp) 4358 { 4359 sym_nego_default(np, tp, cp); 4360 OUTB(np, HS_PRT, HS_BUSY); 4361 } 4362 4363 /* 4364 * chip exception handler for programmed interrupts. 4365 */ 4366 static void sym_int_sir(struct sym_hcb *np) 4367 { 4368 u_char num = INB(np, nc_dsps); 4369 u32 dsa = INL(np, nc_dsa); 4370 struct sym_ccb *cp = sym_ccb_from_dsa(np, dsa); 4371 u_char target = INB(np, nc_sdid) & 0x0f; 4372 struct sym_tcb *tp = &np->target[target]; 4373 int tmp; 4374 4375 if (DEBUG_FLAGS & DEBUG_TINY) printf ("I#%d", num); 4376 4377 switch (num) { 4378 #if SYM_CONF_DMA_ADDRESSING_MODE == 2 4379 /* 4380 * SCRIPTS tell us that we may have to update 4381 * 64 bit DMA segment registers. 4382 */ 4383 case SIR_DMAP_DIRTY: 4384 sym_update_dmap_regs(np); 4385 goto out; 4386 #endif 4387 /* 4388 * Command has been completed with error condition 4389 * or has been auto-sensed. 4390 */ 4391 case SIR_COMPLETE_ERROR: 4392 sym_complete_error(np, cp); 4393 return; 4394 /* 4395 * The C code is currently trying to recover from something. 4396 * Typically, user want to abort some command. 4397 */ 4398 case SIR_SCRIPT_STOPPED: 4399 case SIR_TARGET_SELECTED: 4400 case SIR_ABORT_SENT: 4401 sym_sir_task_recovery(np, num); 4402 return; 4403 /* 4404 * The device didn't go to MSG OUT phase after having 4405 * been selected with ATN. We do not want to handle that. 4406 */ 4407 case SIR_SEL_ATN_NO_MSG_OUT: 4408 scmd_printk(KERN_WARNING, cp->cmd, 4409 "No MSG OUT phase after selection with ATN\n"); 4410 goto out_stuck; 4411 /* 4412 * The device didn't switch to MSG IN phase after 4413 * having reselected the initiator. 4414 */ 4415 case SIR_RESEL_NO_MSG_IN: 4416 scmd_printk(KERN_WARNING, cp->cmd, 4417 "No MSG IN phase after reselection\n"); 4418 goto out_stuck; 4419 /* 4420 * After reselection, the device sent a message that wasn't 4421 * an IDENTIFY. 4422 */ 4423 case SIR_RESEL_NO_IDENTIFY: 4424 scmd_printk(KERN_WARNING, cp->cmd, 4425 "No IDENTIFY after reselection\n"); 4426 goto out_stuck; 4427 /* 4428 * The device reselected a LUN we do not know about. 4429 */ 4430 case SIR_RESEL_BAD_LUN: 4431 np->msgout[0] = M_RESET; 4432 goto out; 4433 /* 4434 * The device reselected for an untagged nexus and we 4435 * haven't any. 4436 */ 4437 case SIR_RESEL_BAD_I_T_L: 4438 np->msgout[0] = M_ABORT; 4439 goto out; 4440 /* 4441 * The device reselected for a tagged nexus that we do not have. 4442 */ 4443 case SIR_RESEL_BAD_I_T_L_Q: 4444 np->msgout[0] = M_ABORT_TAG; 4445 goto out; 4446 /* 4447 * The SCRIPTS let us know that the device has grabbed 4448 * our message and will abort the job. 4449 */ 4450 case SIR_RESEL_ABORTED: 4451 np->lastmsg = np->msgout[0]; 4452 np->msgout[0] = M_NOOP; 4453 scmd_printk(KERN_WARNING, cp->cmd, 4454 "message %x sent on bad reselection\n", np->lastmsg); 4455 goto out; 4456 /* 4457 * The SCRIPTS let us know that a message has been 4458 * successfully sent to the device. 4459 */ 4460 case SIR_MSG_OUT_DONE: 4461 np->lastmsg = np->msgout[0]; 4462 np->msgout[0] = M_NOOP; 4463 /* Should we really care of that */ 4464 if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) { 4465 if (cp) { 4466 cp->xerr_status &= ~XE_PARITY_ERR; 4467 if (!cp->xerr_status) 4468 OUTOFFB(np, HF_PRT, HF_EXT_ERR); 4469 } 4470 } 4471 goto out; 4472 /* 4473 * The device didn't send a GOOD SCSI status. 4474 * We may have some work to do prior to allow 4475 * the SCRIPTS processor to continue. 4476 */ 4477 case SIR_BAD_SCSI_STATUS: 4478 if (!cp) 4479 goto out; 4480 sym_sir_bad_scsi_status(np, num, cp); 4481 return; 4482 /* 4483 * We are asked by the SCRIPTS to prepare a 4484 * REJECT message. 4485 */ 4486 case SIR_REJECT_TO_SEND: 4487 sym_print_msg(cp, "M_REJECT to send for ", np->msgin); 4488 np->msgout[0] = M_REJECT; 4489 goto out; 4490 /* 4491 * We have been ODD at the end of a DATA IN 4492 * transfer and the device didn't send a 4493 * IGNORE WIDE RESIDUE message. 4494 * It is a data overrun condition. 4495 */ 4496 case SIR_SWIDE_OVERRUN: 4497 if (cp) { 4498 OUTONB(np, HF_PRT, HF_EXT_ERR); 4499 cp->xerr_status |= XE_SWIDE_OVRUN; 4500 } 4501 goto out; 4502 /* 4503 * We have been ODD at the end of a DATA OUT 4504 * transfer. 4505 * It is a data underrun condition. 4506 */ 4507 case SIR_SODL_UNDERRUN: 4508 if (cp) { 4509 OUTONB(np, HF_PRT, HF_EXT_ERR); 4510 cp->xerr_status |= XE_SODL_UNRUN; 4511 } 4512 goto out; 4513 /* 4514 * The device wants us to tranfer more data than 4515 * expected or in the wrong direction. 4516 * The number of extra bytes is in scratcha. 4517 * It is a data overrun condition. 4518 */ 4519 case SIR_DATA_OVERRUN: 4520 if (cp) { 4521 OUTONB(np, HF_PRT, HF_EXT_ERR); 4522 cp->xerr_status |= XE_EXTRA_DATA; 4523 cp->extra_bytes += INL(np, nc_scratcha); 4524 } 4525 goto out; 4526 /* 4527 * The device switched to an illegal phase (4/5). 4528 */ 4529 case SIR_BAD_PHASE: 4530 if (cp) { 4531 OUTONB(np, HF_PRT, HF_EXT_ERR); 4532 cp->xerr_status |= XE_BAD_PHASE; 4533 } 4534 goto out; 4535 /* 4536 * We received a message. 4537 */ 4538 case SIR_MSG_RECEIVED: 4539 if (!cp) 4540 goto out_stuck; 4541 switch (np->msgin [0]) { 4542 /* 4543 * We received an extended message. 4544 * We handle MODIFY DATA POINTER, SDTR, WDTR 4545 * and reject all other extended messages. 4546 */ 4547 case M_EXTENDED: 4548 switch (np->msgin [2]) { 4549 case M_X_MODIFY_DP: 4550 if (DEBUG_FLAGS & DEBUG_POINTER) 4551 sym_print_msg(cp, NULL, np->msgin); 4552 tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) + 4553 (np->msgin[5]<<8) + (np->msgin[6]); 4554 sym_modify_dp(np, tp, cp, tmp); 4555 return; 4556 case M_X_SYNC_REQ: 4557 sym_sync_nego(np, tp, cp); 4558 return; 4559 case M_X_PPR_REQ: 4560 sym_ppr_nego(np, tp, cp); 4561 return; 4562 case M_X_WIDE_REQ: 4563 sym_wide_nego(np, tp, cp); 4564 return; 4565 default: 4566 goto out_reject; 4567 } 4568 break; 4569 /* 4570 * We received a 1/2 byte message not handled from SCRIPTS. 4571 * We are only expecting MESSAGE REJECT and IGNORE WIDE 4572 * RESIDUE messages that haven't been anticipated by 4573 * SCRIPTS on SWIDE full condition. Unanticipated IGNORE 4574 * WIDE RESIDUE messages are aliased as MODIFY DP (-1). 4575 */ 4576 case M_IGN_RESIDUE: 4577 if (DEBUG_FLAGS & DEBUG_POINTER) 4578 sym_print_msg(cp, NULL, np->msgin); 4579 if (cp->host_flags & HF_SENSE) 4580 OUTL_DSP(np, SCRIPTA_BA(np, clrack)); 4581 else 4582 sym_modify_dp(np, tp, cp, -1); 4583 return; 4584 case M_REJECT: 4585 if (INB(np, HS_PRT) == HS_NEGOTIATE) 4586 sym_nego_rejected(np, tp, cp); 4587 else { 4588 sym_print_addr(cp->cmd, 4589 "M_REJECT received (%x:%x).\n", 4590 scr_to_cpu(np->lastmsg), np->msgout[0]); 4591 } 4592 goto out_clrack; 4593 break; 4594 default: 4595 goto out_reject; 4596 } 4597 break; 4598 /* 4599 * We received an unknown message. 4600 * Ignore all MSG IN phases and reject it. 4601 */ 4602 case SIR_MSG_WEIRD: 4603 sym_print_msg(cp, "WEIRD message received", np->msgin); 4604 OUTL_DSP(np, SCRIPTB_BA(np, msg_weird)); 4605 return; 4606 /* 4607 * Negotiation failed. 4608 * Target does not send us the reply. 4609 * Remove the HS_NEGOTIATE status. 4610 */ 4611 case SIR_NEGO_FAILED: 4612 OUTB(np, HS_PRT, HS_BUSY); 4613 /* 4614 * Negotiation failed. 4615 * Target does not want answer message. 4616 */ 4617 case SIR_NEGO_PROTO: 4618 sym_nego_default(np, tp, cp); 4619 goto out; 4620 } 4621 4622 out: 4623 OUTONB_STD(); 4624 return; 4625 out_reject: 4626 OUTL_DSP(np, SCRIPTB_BA(np, msg_bad)); 4627 return; 4628 out_clrack: 4629 OUTL_DSP(np, SCRIPTA_BA(np, clrack)); 4630 return; 4631 out_stuck: 4632 return; 4633 } 4634 4635 /* 4636 * Acquire a control block 4637 */ 4638 struct sym_ccb *sym_get_ccb (struct sym_hcb *np, struct scsi_cmnd *cmd, u_char tag_order) 4639 { 4640 u_char tn = cmd->device->id; 4641 u_char ln = cmd->device->lun; 4642 struct sym_tcb *tp = &np->target[tn]; 4643 struct sym_lcb *lp = sym_lp(tp, ln); 4644 u_short tag = NO_TAG; 4645 SYM_QUEHEAD *qp; 4646 struct sym_ccb *cp = NULL; 4647 4648 /* 4649 * Look for a free CCB 4650 */ 4651 if (sym_que_empty(&np->free_ccbq)) 4652 sym_alloc_ccb(np); 4653 qp = sym_remque_head(&np->free_ccbq); 4654 if (!qp) 4655 goto out; 4656 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); 4657 4658 { 4659 /* 4660 * If we have been asked for a tagged command. 4661 */ 4662 if (tag_order) { 4663 /* 4664 * Debugging purpose. 4665 */ 4666 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING 4667 if (lp->busy_itl != 0) 4668 goto out_free; 4669 #endif 4670 /* 4671 * Allocate resources for tags if not yet. 4672 */ 4673 if (!lp->cb_tags) { 4674 sym_alloc_lcb_tags(np, tn, ln); 4675 if (!lp->cb_tags) 4676 goto out_free; 4677 } 4678 /* 4679 * Get a tag for this SCSI IO and set up 4680 * the CCB bus address for reselection, 4681 * and count it for this LUN. 4682 * Toggle reselect path to tagged. 4683 */ 4684 if (lp->busy_itlq < SYM_CONF_MAX_TASK) { 4685 tag = lp->cb_tags[lp->ia_tag]; 4686 if (++lp->ia_tag == SYM_CONF_MAX_TASK) 4687 lp->ia_tag = 0; 4688 ++lp->busy_itlq; 4689 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING 4690 lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba); 4691 lp->head.resel_sa = 4692 cpu_to_scr(SCRIPTA_BA(np, resel_tag)); 4693 #endif 4694 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING 4695 cp->tags_si = lp->tags_si; 4696 ++lp->tags_sum[cp->tags_si]; 4697 ++lp->tags_since; 4698 #endif 4699 } 4700 else 4701 goto out_free; 4702 } 4703 /* 4704 * This command will not be tagged. 4705 * If we already have either a tagged or untagged 4706 * one, refuse to overlap this untagged one. 4707 */ 4708 else { 4709 /* 4710 * Debugging purpose. 4711 */ 4712 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING 4713 if (lp->busy_itl != 0 || lp->busy_itlq != 0) 4714 goto out_free; 4715 #endif 4716 /* 4717 * Count this nexus for this LUN. 4718 * Set up the CCB bus address for reselection. 4719 * Toggle reselect path to untagged. 4720 */ 4721 ++lp->busy_itl; 4722 #ifndef SYM_OPT_HANDLE_DEVICE_QUEUEING 4723 if (lp->busy_itl == 1) { 4724 lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba); 4725 lp->head.resel_sa = 4726 cpu_to_scr(SCRIPTA_BA(np, resel_no_tag)); 4727 } 4728 else 4729 goto out_free; 4730 #endif 4731 } 4732 } 4733 /* 4734 * Put the CCB into the busy queue. 4735 */ 4736 sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq); 4737 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 4738 if (lp) { 4739 sym_remque(&cp->link2_ccbq); 4740 sym_insque_tail(&cp->link2_ccbq, &lp->waiting_ccbq); 4741 } 4742 4743 #endif 4744 cp->to_abort = 0; 4745 cp->odd_byte_adjustment = 0; 4746 cp->tag = tag; 4747 cp->order = tag_order; 4748 cp->target = tn; 4749 cp->lun = ln; 4750 4751 if (DEBUG_FLAGS & DEBUG_TAGS) { 4752 sym_print_addr(cmd, "ccb @%p using tag %d.\n", cp, tag); 4753 } 4754 4755 out: 4756 return cp; 4757 out_free: 4758 sym_insque_head(&cp->link_ccbq, &np->free_ccbq); 4759 return NULL; 4760 } 4761 4762 /* 4763 * Release one control block 4764 */ 4765 void sym_free_ccb (struct sym_hcb *np, struct sym_ccb *cp) 4766 { 4767 struct sym_tcb *tp = &np->target[cp->target]; 4768 struct sym_lcb *lp = sym_lp(tp, cp->lun); 4769 4770 if (DEBUG_FLAGS & DEBUG_TAGS) { 4771 sym_print_addr(cp->cmd, "ccb @%p freeing tag %d.\n", 4772 cp, cp->tag); 4773 } 4774 4775 /* 4776 * If LCB available, 4777 */ 4778 if (lp) { 4779 /* 4780 * If tagged, release the tag, set the relect path 4781 */ 4782 if (cp->tag != NO_TAG) { 4783 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING 4784 --lp->tags_sum[cp->tags_si]; 4785 #endif 4786 /* 4787 * Free the tag value. 4788 */ 4789 lp->cb_tags[lp->if_tag] = cp->tag; 4790 if (++lp->if_tag == SYM_CONF_MAX_TASK) 4791 lp->if_tag = 0; 4792 /* 4793 * Make the reselect path invalid, 4794 * and uncount this CCB. 4795 */ 4796 lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba); 4797 --lp->busy_itlq; 4798 } else { /* Untagged */ 4799 /* 4800 * Make the reselect path invalid, 4801 * and uncount this CCB. 4802 */ 4803 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba); 4804 --lp->busy_itl; 4805 } 4806 /* 4807 * If no JOB active, make the LUN reselect path invalid. 4808 */ 4809 if (lp->busy_itlq == 0 && lp->busy_itl == 0) 4810 lp->head.resel_sa = 4811 cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun)); 4812 } 4813 4814 /* 4815 * We donnot queue more than 1 ccb per target 4816 * with negotiation at any time. If this ccb was 4817 * used for negotiation, clear this info in the tcb. 4818 */ 4819 if (cp == tp->nego_cp) 4820 tp->nego_cp = NULL; 4821 4822 #ifdef SYM_CONF_IARB_SUPPORT 4823 /* 4824 * If we just complete the last queued CCB, 4825 * clear this info that is no longer relevant. 4826 */ 4827 if (cp == np->last_cp) 4828 np->last_cp = 0; 4829 #endif 4830 4831 /* 4832 * Make this CCB available. 4833 */ 4834 cp->cmd = NULL; 4835 cp->host_status = HS_IDLE; 4836 sym_remque(&cp->link_ccbq); 4837 sym_insque_head(&cp->link_ccbq, &np->free_ccbq); 4838 4839 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 4840 if (lp) { 4841 sym_remque(&cp->link2_ccbq); 4842 sym_insque_tail(&cp->link2_ccbq, &np->dummy_ccbq); 4843 if (cp->started) { 4844 if (cp->tag != NO_TAG) 4845 --lp->started_tags; 4846 else 4847 --lp->started_no_tag; 4848 } 4849 } 4850 cp->started = 0; 4851 #endif 4852 } 4853 4854 /* 4855 * Allocate a CCB from memory and initialize its fixed part. 4856 */ 4857 static struct sym_ccb *sym_alloc_ccb(struct sym_hcb *np) 4858 { 4859 struct sym_ccb *cp = NULL; 4860 int hcode; 4861 4862 /* 4863 * Prevent from allocating more CCBs than we can 4864 * queue to the controller. 4865 */ 4866 if (np->actccbs >= SYM_CONF_MAX_START) 4867 return NULL; 4868 4869 /* 4870 * Allocate memory for this CCB. 4871 */ 4872 cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB"); 4873 if (!cp) 4874 goto out_free; 4875 4876 /* 4877 * Count it. 4878 */ 4879 np->actccbs++; 4880 4881 /* 4882 * Compute the bus address of this ccb. 4883 */ 4884 cp->ccb_ba = vtobus(cp); 4885 4886 /* 4887 * Insert this ccb into the hashed list. 4888 */ 4889 hcode = CCB_HASH_CODE(cp->ccb_ba); 4890 cp->link_ccbh = np->ccbh[hcode]; 4891 np->ccbh[hcode] = cp; 4892 4893 /* 4894 * Initialyze the start and restart actions. 4895 */ 4896 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, idle)); 4897 cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l)); 4898 4899 /* 4900 * Initilialyze some other fields. 4901 */ 4902 cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2])); 4903 4904 /* 4905 * Chain into free ccb queue. 4906 */ 4907 sym_insque_head(&cp->link_ccbq, &np->free_ccbq); 4908 4909 /* 4910 * Chain into optionnal lists. 4911 */ 4912 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 4913 sym_insque_head(&cp->link2_ccbq, &np->dummy_ccbq); 4914 #endif 4915 return cp; 4916 out_free: 4917 if (cp) 4918 sym_mfree_dma(cp, sizeof(*cp), "CCB"); 4919 return NULL; 4920 } 4921 4922 /* 4923 * Look up a CCB from a DSA value. 4924 */ 4925 static struct sym_ccb *sym_ccb_from_dsa(struct sym_hcb *np, u32 dsa) 4926 { 4927 int hcode; 4928 struct sym_ccb *cp; 4929 4930 hcode = CCB_HASH_CODE(dsa); 4931 cp = np->ccbh[hcode]; 4932 while (cp) { 4933 if (cp->ccb_ba == dsa) 4934 break; 4935 cp = cp->link_ccbh; 4936 } 4937 4938 return cp; 4939 } 4940 4941 /* 4942 * Target control block initialisation. 4943 * Nothing important to do at the moment. 4944 */ 4945 static void sym_init_tcb (struct sym_hcb *np, u_char tn) 4946 { 4947 #if 0 /* Hmmm... this checking looks paranoid. */ 4948 /* 4949 * Check some alignments required by the chip. 4950 */ 4951 assert (((offsetof(struct sym_reg, nc_sxfer) ^ 4952 offsetof(struct sym_tcb, head.sval)) &3) == 0); 4953 assert (((offsetof(struct sym_reg, nc_scntl3) ^ 4954 offsetof(struct sym_tcb, head.wval)) &3) == 0); 4955 #endif 4956 } 4957 4958 /* 4959 * Lun control block allocation and initialization. 4960 */ 4961 struct sym_lcb *sym_alloc_lcb (struct sym_hcb *np, u_char tn, u_char ln) 4962 { 4963 struct sym_tcb *tp = &np->target[tn]; 4964 struct sym_lcb *lp = NULL; 4965 4966 /* 4967 * Initialize the target control block if not yet. 4968 */ 4969 sym_init_tcb (np, tn); 4970 4971 /* 4972 * Allocate the LCB bus address array. 4973 * Compute the bus address of this table. 4974 */ 4975 if (ln && !tp->luntbl) { 4976 int i; 4977 4978 tp->luntbl = sym_calloc_dma(256, "LUNTBL"); 4979 if (!tp->luntbl) 4980 goto fail; 4981 for (i = 0 ; i < 64 ; i++) 4982 tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa)); 4983 tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl)); 4984 } 4985 4986 /* 4987 * Allocate the table of pointers for LUN(s) > 0, if needed. 4988 */ 4989 if (ln && !tp->lunmp) { 4990 tp->lunmp = kcalloc(SYM_CONF_MAX_LUN, sizeof(struct sym_lcb *), 4991 GFP_KERNEL); 4992 if (!tp->lunmp) 4993 goto fail; 4994 } 4995 4996 /* 4997 * Allocate the lcb. 4998 * Make it available to the chip. 4999 */ 5000 lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB"); 5001 if (!lp) 5002 goto fail; 5003 if (ln) { 5004 tp->lunmp[ln] = lp; 5005 tp->luntbl[ln] = cpu_to_scr(vtobus(lp)); 5006 } 5007 else { 5008 tp->lun0p = lp; 5009 tp->head.lun0_sa = cpu_to_scr(vtobus(lp)); 5010 } 5011 5012 /* 5013 * Let the itl task point to error handling. 5014 */ 5015 lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba); 5016 5017 /* 5018 * Set the reselect pattern to our default. :) 5019 */ 5020 lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun)); 5021 5022 /* 5023 * Set user capabilities. 5024 */ 5025 lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED); 5026 5027 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 5028 /* 5029 * Initialize device queueing. 5030 */ 5031 sym_que_init(&lp->waiting_ccbq); 5032 sym_que_init(&lp->started_ccbq); 5033 lp->started_max = SYM_CONF_MAX_TASK; 5034 lp->started_limit = SYM_CONF_MAX_TASK; 5035 #endif 5036 5037 fail: 5038 return lp; 5039 } 5040 5041 /* 5042 * Allocate LCB resources for tagged command queuing. 5043 */ 5044 static void sym_alloc_lcb_tags (struct sym_hcb *np, u_char tn, u_char ln) 5045 { 5046 struct sym_tcb *tp = &np->target[tn]; 5047 struct sym_lcb *lp = sym_lp(tp, ln); 5048 int i; 5049 5050 /* 5051 * Allocate the task table and and the tag allocation 5052 * circular buffer. We want both or none. 5053 */ 5054 lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL"); 5055 if (!lp->itlq_tbl) 5056 goto fail; 5057 lp->cb_tags = kcalloc(SYM_CONF_MAX_TASK, 1, GFP_ATOMIC); 5058 if (!lp->cb_tags) { 5059 sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL"); 5060 lp->itlq_tbl = NULL; 5061 goto fail; 5062 } 5063 5064 /* 5065 * Initialize the task table with invalid entries. 5066 */ 5067 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++) 5068 lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba); 5069 5070 /* 5071 * Fill up the tag buffer with tag numbers. 5072 */ 5073 for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++) 5074 lp->cb_tags[i] = i; 5075 5076 /* 5077 * Make the task table available to SCRIPTS, 5078 * And accept tagged commands now. 5079 */ 5080 lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl)); 5081 5082 return; 5083 fail: 5084 return; 5085 } 5086 5087 /* 5088 * Queue a SCSI IO to the controller. 5089 */ 5090 int sym_queue_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, struct sym_ccb *cp) 5091 { 5092 struct scsi_device *sdev = cmd->device; 5093 struct sym_tcb *tp; 5094 struct sym_lcb *lp; 5095 u_char *msgptr; 5096 u_int msglen; 5097 int can_disconnect; 5098 5099 /* 5100 * Keep track of the IO in our CCB. 5101 */ 5102 cp->cmd = cmd; 5103 5104 /* 5105 * Retrieve the target descriptor. 5106 */ 5107 tp = &np->target[cp->target]; 5108 5109 /* 5110 * Retrieve the lun descriptor. 5111 */ 5112 lp = sym_lp(tp, sdev->lun); 5113 5114 can_disconnect = (cp->tag != NO_TAG) || 5115 (lp && (lp->curr_flags & SYM_DISC_ENABLED)); 5116 5117 msgptr = cp->scsi_smsg; 5118 msglen = 0; 5119 msgptr[msglen++] = IDENTIFY(can_disconnect, sdev->lun); 5120 5121 /* 5122 * Build the tag message if present. 5123 */ 5124 if (cp->tag != NO_TAG) { 5125 u_char order = cp->order; 5126 5127 switch(order) { 5128 case M_ORDERED_TAG: 5129 break; 5130 case M_HEAD_TAG: 5131 break; 5132 default: 5133 order = M_SIMPLE_TAG; 5134 } 5135 #ifdef SYM_OPT_LIMIT_COMMAND_REORDERING 5136 /* 5137 * Avoid too much reordering of SCSI commands. 5138 * The algorithm tries to prevent completion of any 5139 * tagged command from being delayed against more 5140 * than 3 times the max number of queued commands. 5141 */ 5142 if (lp && lp->tags_since > 3*SYM_CONF_MAX_TAG) { 5143 lp->tags_si = !(lp->tags_si); 5144 if (lp->tags_sum[lp->tags_si]) { 5145 order = M_ORDERED_TAG; 5146 if ((DEBUG_FLAGS & DEBUG_TAGS)||sym_verbose>1) { 5147 sym_print_addr(cmd, 5148 "ordered tag forced.\n"); 5149 } 5150 } 5151 lp->tags_since = 0; 5152 } 5153 #endif 5154 msgptr[msglen++] = order; 5155 5156 /* 5157 * For less than 128 tags, actual tags are numbered 5158 * 1,3,5,..2*MAXTAGS+1,since we may have to deal 5159 * with devices that have problems with #TAG 0 or too 5160 * great #TAG numbers. For more tags (up to 256), 5161 * we use directly our tag number. 5162 */ 5163 #if SYM_CONF_MAX_TASK > (512/4) 5164 msgptr[msglen++] = cp->tag; 5165 #else 5166 msgptr[msglen++] = (cp->tag << 1) + 1; 5167 #endif 5168 } 5169 5170 /* 5171 * Build a negotiation message if needed. 5172 * (nego_status is filled by sym_prepare_nego()) 5173 * 5174 * Always negotiate on INQUIRY and REQUEST SENSE. 5175 * 5176 */ 5177 cp->nego_status = 0; 5178 if ((tp->tgoal.check_nego || 5179 cmd->cmnd[0] == INQUIRY || cmd->cmnd[0] == REQUEST_SENSE) && 5180 !tp->nego_cp && lp) { 5181 msglen += sym_prepare_nego(np, cp, msgptr + msglen); 5182 } 5183 5184 /* 5185 * Startqueue 5186 */ 5187 cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA(np, select)); 5188 cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA(np, resel_dsa)); 5189 5190 /* 5191 * select 5192 */ 5193 cp->phys.select.sel_id = cp->target; 5194 cp->phys.select.sel_scntl3 = tp->head.wval; 5195 cp->phys.select.sel_sxfer = tp->head.sval; 5196 cp->phys.select.sel_scntl4 = tp->head.uval; 5197 5198 /* 5199 * message 5200 */ 5201 cp->phys.smsg.addr = CCB_BA(cp, scsi_smsg); 5202 cp->phys.smsg.size = cpu_to_scr(msglen); 5203 5204 /* 5205 * status 5206 */ 5207 cp->host_xflags = 0; 5208 cp->host_status = cp->nego_status ? HS_NEGOTIATE : HS_BUSY; 5209 cp->ssss_status = S_ILLEGAL; 5210 cp->xerr_status = 0; 5211 cp->host_flags = 0; 5212 cp->extra_bytes = 0; 5213 5214 /* 5215 * extreme data pointer. 5216 * shall be positive, so -1 is lower than lowest.:) 5217 */ 5218 cp->ext_sg = -1; 5219 cp->ext_ofs = 0; 5220 5221 /* 5222 * Build the CDB and DATA descriptor block 5223 * and start the IO. 5224 */ 5225 return sym_setup_data_and_start(np, cmd, cp); 5226 } 5227 5228 /* 5229 * Reset a SCSI target (all LUNs of this target). 5230 */ 5231 int sym_reset_scsi_target(struct sym_hcb *np, int target) 5232 { 5233 struct sym_tcb *tp; 5234 5235 if (target == np->myaddr || (u_int)target >= SYM_CONF_MAX_TARGET) 5236 return -1; 5237 5238 tp = &np->target[target]; 5239 tp->to_reset = 1; 5240 5241 np->istat_sem = SEM; 5242 OUTB(np, nc_istat, SIGP|SEM); 5243 5244 return 0; 5245 } 5246 5247 /* 5248 * Abort a SCSI IO. 5249 */ 5250 static int sym_abort_ccb(struct sym_hcb *np, struct sym_ccb *cp, int timed_out) 5251 { 5252 /* 5253 * Check that the IO is active. 5254 */ 5255 if (!cp || !cp->host_status || cp->host_status == HS_WAIT) 5256 return -1; 5257 5258 /* 5259 * If a previous abort didn't succeed in time, 5260 * perform a BUS reset. 5261 */ 5262 if (cp->to_abort) { 5263 sym_reset_scsi_bus(np, 1); 5264 return 0; 5265 } 5266 5267 /* 5268 * Mark the CCB for abort and allow time for. 5269 */ 5270 cp->to_abort = timed_out ? 2 : 1; 5271 5272 /* 5273 * Tell the SCRIPTS processor to stop and synchronize with us. 5274 */ 5275 np->istat_sem = SEM; 5276 OUTB(np, nc_istat, SIGP|SEM); 5277 return 0; 5278 } 5279 5280 int sym_abort_scsiio(struct sym_hcb *np, struct scsi_cmnd *cmd, int timed_out) 5281 { 5282 struct sym_ccb *cp; 5283 SYM_QUEHEAD *qp; 5284 5285 /* 5286 * Look up our CCB control block. 5287 */ 5288 cp = NULL; 5289 FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) { 5290 struct sym_ccb *cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq); 5291 if (cp2->cmd == cmd) { 5292 cp = cp2; 5293 break; 5294 } 5295 } 5296 5297 return sym_abort_ccb(np, cp, timed_out); 5298 } 5299 5300 /* 5301 * Complete execution of a SCSI command with extended 5302 * error, SCSI status error, or having been auto-sensed. 5303 * 5304 * The SCRIPTS processor is not running there, so we 5305 * can safely access IO registers and remove JOBs from 5306 * the START queue. 5307 * SCRATCHA is assumed to have been loaded with STARTPOS 5308 * before the SCRIPTS called the C code. 5309 */ 5310 void sym_complete_error(struct sym_hcb *np, struct sym_ccb *cp) 5311 { 5312 struct scsi_device *sdev; 5313 struct scsi_cmnd *cmd; 5314 struct sym_tcb *tp; 5315 struct sym_lcb *lp; 5316 int resid; 5317 int i; 5318 5319 /* 5320 * Paranoid check. :) 5321 */ 5322 if (!cp || !cp->cmd) 5323 return; 5324 5325 cmd = cp->cmd; 5326 sdev = cmd->device; 5327 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) { 5328 dev_info(&sdev->sdev_gendev, "CCB=%p STAT=%x/%x/%x\n", cp, 5329 cp->host_status, cp->ssss_status, cp->host_flags); 5330 } 5331 5332 /* 5333 * Get target and lun pointers. 5334 */ 5335 tp = &np->target[cp->target]; 5336 lp = sym_lp(tp, sdev->lun); 5337 5338 /* 5339 * Check for extended errors. 5340 */ 5341 if (cp->xerr_status) { 5342 if (sym_verbose) 5343 sym_print_xerr(cmd, cp->xerr_status); 5344 if (cp->host_status == HS_COMPLETE) 5345 cp->host_status = HS_COMP_ERR; 5346 } 5347 5348 /* 5349 * Calculate the residual. 5350 */ 5351 resid = sym_compute_residual(np, cp); 5352 5353 if (!SYM_SETUP_RESIDUAL_SUPPORT) {/* If user does not want residuals */ 5354 resid = 0; /* throw them away. :) */ 5355 cp->sv_resid = 0; 5356 } 5357 #ifdef DEBUG_2_0_X 5358 if (resid) 5359 printf("XXXX RESID= %d - 0x%x\n", resid, resid); 5360 #endif 5361 5362 /* 5363 * Dequeue all queued CCBs for that device 5364 * not yet started by SCRIPTS. 5365 */ 5366 i = (INL(np, nc_scratcha) - np->squeue_ba) / 4; 5367 i = sym_dequeue_from_squeue(np, i, cp->target, sdev->lun, -1); 5368 5369 /* 5370 * Restart the SCRIPTS processor. 5371 */ 5372 OUTL_DSP(np, SCRIPTA_BA(np, start)); 5373 5374 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 5375 if (cp->host_status == HS_COMPLETE && 5376 cp->ssss_status == S_QUEUE_FULL) { 5377 if (!lp || lp->started_tags - i < 2) 5378 goto weirdness; 5379 /* 5380 * Decrease queue depth as needed. 5381 */ 5382 lp->started_max = lp->started_tags - i - 1; 5383 lp->num_sgood = 0; 5384 5385 if (sym_verbose >= 2) { 5386 sym_print_addr(cmd, " queue depth is now %d\n", 5387 lp->started_max); 5388 } 5389 5390 /* 5391 * Repair the CCB. 5392 */ 5393 cp->host_status = HS_BUSY; 5394 cp->ssss_status = S_ILLEGAL; 5395 5396 /* 5397 * Let's requeue it to device. 5398 */ 5399 sym_set_cam_status(cmd, DID_SOFT_ERROR); 5400 goto finish; 5401 } 5402 weirdness: 5403 #endif 5404 /* 5405 * Build result in CAM ccb. 5406 */ 5407 sym_set_cam_result_error(np, cp, resid); 5408 5409 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 5410 finish: 5411 #endif 5412 /* 5413 * Add this one to the COMP queue. 5414 */ 5415 sym_remque(&cp->link_ccbq); 5416 sym_insque_head(&cp->link_ccbq, &np->comp_ccbq); 5417 5418 /* 5419 * Complete all those commands with either error 5420 * or requeue condition. 5421 */ 5422 sym_flush_comp_queue(np, 0); 5423 5424 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 5425 /* 5426 * Donnot start more than 1 command after an error. 5427 */ 5428 sym_start_next_ccbs(np, lp, 1); 5429 #endif 5430 } 5431 5432 /* 5433 * Complete execution of a successful SCSI command. 5434 * 5435 * Only successful commands go to the DONE queue, 5436 * since we need to have the SCRIPTS processor 5437 * stopped on any error condition. 5438 * The SCRIPTS processor is running while we are 5439 * completing successful commands. 5440 */ 5441 void sym_complete_ok (struct sym_hcb *np, struct sym_ccb *cp) 5442 { 5443 struct sym_tcb *tp; 5444 struct sym_lcb *lp; 5445 struct scsi_cmnd *cmd; 5446 int resid; 5447 5448 /* 5449 * Paranoid check. :) 5450 */ 5451 if (!cp || !cp->cmd) 5452 return; 5453 assert (cp->host_status == HS_COMPLETE); 5454 5455 /* 5456 * Get user command. 5457 */ 5458 cmd = cp->cmd; 5459 5460 /* 5461 * Get target and lun pointers. 5462 */ 5463 tp = &np->target[cp->target]; 5464 lp = sym_lp(tp, cp->lun); 5465 5466 /* 5467 * If all data have been transferred, given than no 5468 * extended error did occur, there is no residual. 5469 */ 5470 resid = 0; 5471 if (cp->phys.head.lastp != cp->goalp) 5472 resid = sym_compute_residual(np, cp); 5473 5474 /* 5475 * Wrong transfer residuals may be worse than just always 5476 * returning zero. User can disable this feature in 5477 * sym53c8xx.h. Residual support is enabled by default. 5478 */ 5479 if (!SYM_SETUP_RESIDUAL_SUPPORT) 5480 resid = 0; 5481 #ifdef DEBUG_2_0_X 5482 if (resid) 5483 printf("XXXX RESID= %d - 0x%x\n", resid, resid); 5484 #endif 5485 5486 /* 5487 * Build result in CAM ccb. 5488 */ 5489 sym_set_cam_result_ok(cp, cmd, resid); 5490 5491 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 5492 /* 5493 * If max number of started ccbs had been reduced, 5494 * increase it if 200 good status received. 5495 */ 5496 if (lp && lp->started_max < lp->started_limit) { 5497 ++lp->num_sgood; 5498 if (lp->num_sgood >= 200) { 5499 lp->num_sgood = 0; 5500 ++lp->started_max; 5501 if (sym_verbose >= 2) { 5502 sym_print_addr(cmd, " queue depth is now %d\n", 5503 lp->started_max); 5504 } 5505 } 5506 } 5507 #endif 5508 5509 /* 5510 * Free our CCB. 5511 */ 5512 sym_free_ccb (np, cp); 5513 5514 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 5515 /* 5516 * Requeue a couple of awaiting scsi commands. 5517 */ 5518 if (!sym_que_empty(&lp->waiting_ccbq)) 5519 sym_start_next_ccbs(np, lp, 2); 5520 #endif 5521 /* 5522 * Complete the command. 5523 */ 5524 sym_xpt_done(np, cmd); 5525 } 5526 5527 /* 5528 * Soft-attach the controller. 5529 */ 5530 int sym_hcb_attach(struct Scsi_Host *shost, struct sym_fw *fw, struct sym_nvram *nvram) 5531 { 5532 struct sym_hcb *np = sym_get_hcb(shost); 5533 int i; 5534 5535 /* 5536 * Get some info about the firmware. 5537 */ 5538 np->scripta_sz = fw->a_size; 5539 np->scriptb_sz = fw->b_size; 5540 np->scriptz_sz = fw->z_size; 5541 np->fw_setup = fw->setup; 5542 np->fw_patch = fw->patch; 5543 np->fw_name = fw->name; 5544 5545 /* 5546 * Save setting of some IO registers, so we will 5547 * be able to probe specific implementations. 5548 */ 5549 sym_save_initial_setting (np); 5550 5551 /* 5552 * Reset the chip now, since it has been reported 5553 * that SCSI clock calibration may not work properly 5554 * if the chip is currently active. 5555 */ 5556 sym_chip_reset(np); 5557 5558 /* 5559 * Prepare controller and devices settings, according 5560 * to chip features, user set-up and driver set-up. 5561 */ 5562 sym_prepare_setting(shost, np, nvram); 5563 5564 /* 5565 * Check the PCI clock frequency. 5566 * Must be performed after prepare_setting since it destroys 5567 * STEST1 that is used to probe for the clock doubler. 5568 */ 5569 i = sym_getpciclock(np); 5570 if (i > 37000 && !(np->features & FE_66MHZ)) 5571 printf("%s: PCI BUS clock seems too high: %u KHz.\n", 5572 sym_name(np), i); 5573 5574 /* 5575 * Allocate the start queue. 5576 */ 5577 np->squeue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE"); 5578 if (!np->squeue) 5579 goto attach_failed; 5580 np->squeue_ba = vtobus(np->squeue); 5581 5582 /* 5583 * Allocate the done queue. 5584 */ 5585 np->dqueue = sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE"); 5586 if (!np->dqueue) 5587 goto attach_failed; 5588 np->dqueue_ba = vtobus(np->dqueue); 5589 5590 /* 5591 * Allocate the target bus address array. 5592 */ 5593 np->targtbl = sym_calloc_dma(256, "TARGTBL"); 5594 if (!np->targtbl) 5595 goto attach_failed; 5596 np->targtbl_ba = vtobus(np->targtbl); 5597 5598 /* 5599 * Allocate SCRIPTS areas. 5600 */ 5601 np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0"); 5602 np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0"); 5603 np->scriptz0 = sym_calloc_dma(np->scriptz_sz, "SCRIPTZ0"); 5604 if (!np->scripta0 || !np->scriptb0 || !np->scriptz0) 5605 goto attach_failed; 5606 5607 /* 5608 * Allocate the array of lists of CCBs hashed by DSA. 5609 */ 5610 np->ccbh = kcalloc(CCB_HASH_SIZE, sizeof(struct sym_ccb **), GFP_KERNEL); 5611 if (!np->ccbh) 5612 goto attach_failed; 5613 5614 /* 5615 * Initialyze the CCB free and busy queues. 5616 */ 5617 sym_que_init(&np->free_ccbq); 5618 sym_que_init(&np->busy_ccbq); 5619 sym_que_init(&np->comp_ccbq); 5620 5621 /* 5622 * Initialization for optional handling 5623 * of device queueing. 5624 */ 5625 #ifdef SYM_OPT_HANDLE_DEVICE_QUEUEING 5626 sym_que_init(&np->dummy_ccbq); 5627 #endif 5628 /* 5629 * Allocate some CCB. We need at least ONE. 5630 */ 5631 if (!sym_alloc_ccb(np)) 5632 goto attach_failed; 5633 5634 /* 5635 * Calculate BUS addresses where we are going 5636 * to load the SCRIPTS. 5637 */ 5638 np->scripta_ba = vtobus(np->scripta0); 5639 np->scriptb_ba = vtobus(np->scriptb0); 5640 np->scriptz_ba = vtobus(np->scriptz0); 5641 5642 if (np->ram_ba) { 5643 np->scripta_ba = np->ram_ba; 5644 if (np->features & FE_RAM8K) { 5645 np->scriptb_ba = np->scripta_ba + 4096; 5646 #if 0 /* May get useful for 64 BIT PCI addressing */ 5647 np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32); 5648 #endif 5649 } 5650 } 5651 5652 /* 5653 * Copy scripts to controller instance. 5654 */ 5655 memcpy(np->scripta0, fw->a_base, np->scripta_sz); 5656 memcpy(np->scriptb0, fw->b_base, np->scriptb_sz); 5657 memcpy(np->scriptz0, fw->z_base, np->scriptz_sz); 5658 5659 /* 5660 * Setup variable parts in scripts and compute 5661 * scripts bus addresses used from the C code. 5662 */ 5663 np->fw_setup(np, fw); 5664 5665 /* 5666 * Bind SCRIPTS with physical addresses usable by the 5667 * SCRIPTS processor (as seen from the BUS = BUS addresses). 5668 */ 5669 sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz); 5670 sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz); 5671 sym_fw_bind_script(np, (u32 *) np->scriptz0, np->scriptz_sz); 5672 5673 #ifdef SYM_CONF_IARB_SUPPORT 5674 /* 5675 * If user wants IARB to be set when we win arbitration 5676 * and have other jobs, compute the max number of consecutive 5677 * settings of IARB hints before we leave devices a chance to 5678 * arbitrate for reselection. 5679 */ 5680 #ifdef SYM_SETUP_IARB_MAX 5681 np->iarb_max = SYM_SETUP_IARB_MAX; 5682 #else 5683 np->iarb_max = 4; 5684 #endif 5685 #endif 5686 5687 /* 5688 * Prepare the idle and invalid task actions. 5689 */ 5690 np->idletask.start = cpu_to_scr(SCRIPTA_BA(np, idle)); 5691 np->idletask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l)); 5692 np->idletask_ba = vtobus(&np->idletask); 5693 5694 np->notask.start = cpu_to_scr(SCRIPTA_BA(np, idle)); 5695 np->notask.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l)); 5696 np->notask_ba = vtobus(&np->notask); 5697 5698 np->bad_itl.start = cpu_to_scr(SCRIPTA_BA(np, idle)); 5699 np->bad_itl.restart = cpu_to_scr(SCRIPTB_BA(np, bad_i_t_l)); 5700 np->bad_itl_ba = vtobus(&np->bad_itl); 5701 5702 np->bad_itlq.start = cpu_to_scr(SCRIPTA_BA(np, idle)); 5703 np->bad_itlq.restart = cpu_to_scr(SCRIPTB_BA(np,bad_i_t_l_q)); 5704 np->bad_itlq_ba = vtobus(&np->bad_itlq); 5705 5706 /* 5707 * Allocate and prepare the lun JUMP table that is used 5708 * for a target prior the probing of devices (bad lun table). 5709 * A private table will be allocated for the target on the 5710 * first INQUIRY response received. 5711 */ 5712 np->badluntbl = sym_calloc_dma(256, "BADLUNTBL"); 5713 if (!np->badluntbl) 5714 goto attach_failed; 5715 5716 np->badlun_sa = cpu_to_scr(SCRIPTB_BA(np, resel_bad_lun)); 5717 for (i = 0 ; i < 64 ; i++) /* 64 luns/target, no less */ 5718 np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa)); 5719 5720 /* 5721 * Prepare the bus address array that contains the bus 5722 * address of each target control block. 5723 * For now, assume all logical units are wrong. :) 5724 */ 5725 for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) { 5726 np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i])); 5727 np->target[i].head.luntbl_sa = 5728 cpu_to_scr(vtobus(np->badluntbl)); 5729 np->target[i].head.lun0_sa = 5730 cpu_to_scr(vtobus(&np->badlun_sa)); 5731 } 5732 5733 /* 5734 * Now check the cache handling of the pci chipset. 5735 */ 5736 if (sym_snooptest (np)) { 5737 printf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np)); 5738 goto attach_failed; 5739 } 5740 5741 /* 5742 * Sigh! we are done. 5743 */ 5744 return 0; 5745 5746 attach_failed: 5747 return -ENXIO; 5748 } 5749 5750 /* 5751 * Free everything that has been allocated for this device. 5752 */ 5753 void sym_hcb_free(struct sym_hcb *np) 5754 { 5755 SYM_QUEHEAD *qp; 5756 struct sym_ccb *cp; 5757 struct sym_tcb *tp; 5758 int target; 5759 5760 if (np->scriptz0) 5761 sym_mfree_dma(np->scriptz0, np->scriptz_sz, "SCRIPTZ0"); 5762 if (np->scriptb0) 5763 sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0"); 5764 if (np->scripta0) 5765 sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0"); 5766 if (np->squeue) 5767 sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE"); 5768 if (np->dqueue) 5769 sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE"); 5770 5771 if (np->actccbs) { 5772 while ((qp = sym_remque_head(&np->free_ccbq)) != NULL) { 5773 cp = sym_que_entry(qp, struct sym_ccb, link_ccbq); 5774 sym_mfree_dma(cp, sizeof(*cp), "CCB"); 5775 } 5776 } 5777 kfree(np->ccbh); 5778 5779 if (np->badluntbl) 5780 sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL"); 5781 5782 for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) { 5783 tp = &np->target[target]; 5784 if (tp->luntbl) 5785 sym_mfree_dma(tp->luntbl, 256, "LUNTBL"); 5786 #if SYM_CONF_MAX_LUN > 1 5787 kfree(tp->lunmp); 5788 #endif 5789 } 5790 if (np->targtbl) 5791 sym_mfree_dma(np->targtbl, 256, "TARGTBL"); 5792 } 5793