1 /* 2 * Device driver for the SYMBIOS/LSILOGIC 53C8XX and 53C1010 family 3 * of PCI-SCSI IO processors. 4 * 5 * Copyright (C) 1999-2001 Gerard Roudier <groudier@free.fr> 6 * 7 * This driver is derived from the Linux sym53c8xx driver. 8 * Copyright (C) 1998-2000 Gerard Roudier 9 * 10 * The sym53c8xx driver is derived from the ncr53c8xx driver that had been 11 * a port of the FreeBSD ncr driver to Linux-1.2.13. 12 * 13 * The original ncr driver has been written for 386bsd and FreeBSD by 14 * Wolfgang Stanglmeier <wolf@cologne.de> 15 * Stefan Esser <se@mi.Uni-Koeln.de> 16 * Copyright (C) 1994 Wolfgang Stanglmeier 17 * 18 * Other major contributions: 19 * 20 * NVRAM detection and reading. 21 * Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk> 22 * 23 *----------------------------------------------------------------------------- 24 * 25 * This program is free software; you can redistribute it and/or modify 26 * it under the terms of the GNU General Public License as published by 27 * the Free Software Foundation; either version 2 of the License, or 28 * (at your option) any later version. 29 * 30 * This program is distributed in the hope that it will be useful, 31 * but WITHOUT ANY WARRANTY; without even the implied warranty of 32 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 33 * GNU General Public License for more details. 34 * 35 * You should have received a copy of the GNU General Public License 36 * along with this program; if not, write to the Free Software 37 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 38 */ 39 40 #ifndef SYM_GLUE_H 41 #define SYM_GLUE_H 42 43 #include <linux/config.h> 44 #include <linux/delay.h> 45 #include <linux/ioport.h> 46 #include <linux/pci.h> 47 #include <linux/string.h> 48 #include <linux/timer.h> 49 #include <linux/types.h> 50 51 #include <asm/io.h> 52 #ifdef __sparc__ 53 # include <asm/irq.h> 54 #endif 55 56 #include <scsi/scsi.h> 57 #include <scsi/scsi_cmnd.h> 58 #include <scsi/scsi_device.h> 59 #include <scsi/scsi_transport_spi.h> 60 #include <scsi/scsi_host.h> 61 62 #include "sym53c8xx.h" 63 #include "sym_defs.h" 64 #include "sym_misc.h" 65 66 /* 67 * Configuration addendum for Linux. 68 */ 69 #define SYM_CONF_TIMER_INTERVAL ((HZ+1)/2) 70 71 #define SYM_OPT_HANDLE_DEVICE_QUEUEING 72 #define SYM_OPT_LIMIT_COMMAND_REORDERING 73 74 /* 75 * Print a message with severity. 76 */ 77 #define printf_emerg(args...) printk(KERN_EMERG args) 78 #define printf_alert(args...) printk(KERN_ALERT args) 79 #define printf_crit(args...) printk(KERN_CRIT args) 80 #define printf_err(args...) printk(KERN_ERR args) 81 #define printf_warning(args...) printk(KERN_WARNING args) 82 #define printf_notice(args...) printk(KERN_NOTICE args) 83 #define printf_info(args...) printk(KERN_INFO args) 84 #define printf_debug(args...) printk(KERN_DEBUG args) 85 #define printf(args...) printk(args) 86 87 /* 88 * A 'read barrier' flushes any data that have been prefetched 89 * by the processor due to out of order execution. Such a barrier 90 * must notably be inserted prior to looking at data that have 91 * been DMAed, assuming that program does memory READs in proper 92 * order and that the device ensured proper ordering of WRITEs. 93 * 94 * A 'write barrier' prevents any previous WRITEs to pass further 95 * WRITEs. Such barriers must be inserted each time another agent 96 * relies on ordering of WRITEs. 97 * 98 * Note that, due to posting of PCI memory writes, we also must 99 * insert dummy PCI read transactions when some ordering involving 100 * both directions over the PCI does matter. PCI transactions are 101 * fully ordered in each direction. 102 */ 103 104 #define MEMORY_READ_BARRIER() rmb() 105 #define MEMORY_WRITE_BARRIER() wmb() 106 107 /* 108 * IO functions definition for big/little endian CPU support. 109 * For now, PCI chips are only supported in little endian addressing mode, 110 */ 111 112 #ifdef __BIG_ENDIAN 113 114 #define readw_l2b readw 115 #define readl_l2b readl 116 #define writew_b2l writew 117 #define writel_b2l writel 118 119 #else /* little endian */ 120 121 #define readw_raw readw 122 #define readl_raw readl 123 #define writew_raw writew 124 #define writel_raw writel 125 126 #endif /* endian */ 127 128 #ifdef SYM_CONF_CHIP_BIG_ENDIAN 129 #error "Chips in BIG ENDIAN addressing mode are not (yet) supported" 130 #endif 131 132 /* 133 * If the CPU and the chip use same endian-ness addressing, 134 * no byte reordering is needed for script patching. 135 * Macro cpu_to_scr() is to be used for script patching. 136 * Macro scr_to_cpu() is to be used for getting a DWORD 137 * from the script. 138 */ 139 140 #define cpu_to_scr(dw) cpu_to_le32(dw) 141 #define scr_to_cpu(dw) le32_to_cpu(dw) 142 143 /* 144 * These ones are used as return code from 145 * error recovery handlers under Linux. 146 */ 147 #define SCSI_SUCCESS SUCCESS 148 #define SCSI_FAILED FAILED 149 150 /* 151 * System specific target data structure. 152 * None for now, under Linux. 153 */ 154 /* #define SYM_HAVE_STCB */ 155 156 /* 157 * System specific lun data structure. 158 */ 159 #define SYM_HAVE_SLCB 160 struct sym_slcb { 161 u_short reqtags; /* Number of tags requested by user */ 162 u_short scdev_depth; /* Queue depth set in select_queue_depth() */ 163 }; 164 165 /* 166 * System specific command data structure. 167 * Not needed under Linux. 168 */ 169 /* struct sym_sccb */ 170 171 /* 172 * System specific host data structure. 173 */ 174 struct sym_shcb { 175 /* 176 * Chip and controller indentification. 177 */ 178 int unit; 179 char inst_name[16]; 180 char chip_name[8]; 181 struct pci_dev *device; 182 183 struct Scsi_Host *host; 184 185 void __iomem * ioaddr; /* MMIO kernel io address */ 186 void __iomem * ramaddr; /* RAM kernel io address */ 187 u_short io_ws; /* IO window size */ 188 int irq; /* IRQ number */ 189 190 struct timer_list timer; /* Timer handler link header */ 191 u_long lasttime; 192 u_long settle_time; /* Resetting the SCSI BUS */ 193 u_char settle_time_valid; 194 }; 195 196 /* 197 * Return the name of the controller. 198 */ 199 #define sym_name(np) (np)->s.inst_name 200 201 struct sym_nvram; 202 203 /* 204 * The IO macros require a struct called 's' and are abused in sym_nvram.c 205 */ 206 struct sym_device { 207 struct pci_dev *pdev; 208 unsigned long mmio_base; 209 unsigned long ram_base; 210 struct { 211 void __iomem *ioaddr; 212 void __iomem *ramaddr; 213 } s; 214 struct sym_chip chip; 215 struct sym_nvram *nvram; 216 u_short device_id; 217 u_char host_id; 218 }; 219 220 /* 221 * Driver host data structure. 222 */ 223 struct host_data { 224 struct sym_hcb *ncb; 225 }; 226 227 static inline struct sym_hcb * sym_get_hcb(struct Scsi_Host *host) 228 { 229 return ((struct host_data *)host->hostdata)->ncb; 230 } 231 232 #include "sym_fw.h" 233 #include "sym_hipd.h" 234 235 /* 236 * Set the status field of a CAM CCB. 237 */ 238 static __inline void 239 sym_set_cam_status(struct scsi_cmnd *cmd, int status) 240 { 241 cmd->result &= ~(0xff << 16); 242 cmd->result |= (status << 16); 243 } 244 245 /* 246 * Get the status field of a CAM CCB. 247 */ 248 static __inline int 249 sym_get_cam_status(struct scsi_cmnd *cmd) 250 { 251 return host_byte(cmd->result); 252 } 253 254 /* 255 * Build CAM result for a successful IO and for a failed IO. 256 */ 257 static __inline void sym_set_cam_result_ok(struct sym_ccb *cp, struct scsi_cmnd *cmd, int resid) 258 { 259 cmd->resid = resid; 260 cmd->result = (((DID_OK) << 16) + ((cp->ssss_status) & 0x7f)); 261 } 262 void sym_set_cam_result_error(struct sym_hcb *np, struct sym_ccb *cp, int resid); 263 264 void sym_xpt_done(struct sym_hcb *np, struct scsi_cmnd *ccb); 265 #define sym_print_addr(cmd, arg...) dev_info(&cmd->device->sdev_gendev , ## arg) 266 void sym_xpt_async_bus_reset(struct sym_hcb *np); 267 void sym_xpt_async_sent_bdr(struct sym_hcb *np, int target); 268 int sym_setup_data_and_start (struct sym_hcb *np, struct scsi_cmnd *csio, struct sym_ccb *cp); 269 void sym_log_bus_error(struct sym_hcb *np); 270 271 #endif /* SYM_GLUE_H */ 272