1 /* 2 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl) 3 * 4 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net) 5 * 6 * VME support added by Sam Creasey 7 * 8 * TODO: modify this driver to support multiple Sun3 SCSI VME boards 9 * 10 * Adapted from mac_scsinew.c: 11 */ 12 /* 13 * Generic Macintosh NCR5380 driver 14 * 15 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov> 16 * 17 * derived in part from: 18 */ 19 /* 20 * Generic Generic NCR5380 driver 21 * 22 * Copyright 1995, Russell King 23 */ 24 25 #include <linux/types.h> 26 #include <linux/delay.h> 27 #include <linux/module.h> 28 #include <linux/ioport.h> 29 #include <linux/init.h> 30 #include <linux/blkdev.h> 31 #include <linux/platform_device.h> 32 33 #include <asm/io.h> 34 #include <asm/dvma.h> 35 36 #include <scsi/scsi_host.h> 37 #include "sun3_scsi.h" 38 39 /* Definitions for the core NCR5380 driver. */ 40 41 #define REAL_DMA 42 /* #define SUPPORT_TAGS */ 43 /* minimum number of bytes to do dma on */ 44 #define DMA_MIN_SIZE 129 45 46 /* #define MAX_TAGS 32 */ 47 48 #define NCR5380_implementation_fields /* none */ 49 50 #define NCR5380_read(reg) sun3scsi_read(reg) 51 #define NCR5380_write(reg, value) sun3scsi_write(reg, value) 52 53 #define NCR5380_queue_command sun3scsi_queue_command 54 #define NCR5380_bus_reset sun3scsi_bus_reset 55 #define NCR5380_abort sun3scsi_abort 56 #define NCR5380_info sun3scsi_info 57 58 #define NCR5380_dma_read_setup(instance, data, count) \ 59 sun3scsi_dma_setup(data, count, 0) 60 #define NCR5380_dma_write_setup(instance, data, count) \ 61 sun3scsi_dma_setup(data, count, 1) 62 #define NCR5380_dma_residual(instance) \ 63 sun3scsi_dma_residual(instance) 64 #define NCR5380_dma_xfer_len(instance, cmd, phase) \ 65 sun3scsi_dma_xfer_len(cmd->SCp.this_residual, cmd, !((phase) & SR_IO)) 66 67 #define NCR5380_acquire_dma_irq(instance) (1) 68 #define NCR5380_release_dma_irq(instance) 69 70 #include "NCR5380.h" 71 72 73 extern int sun3_map_test(unsigned long, char *); 74 75 static int setup_can_queue = -1; 76 module_param(setup_can_queue, int, 0); 77 static int setup_cmd_per_lun = -1; 78 module_param(setup_cmd_per_lun, int, 0); 79 static int setup_sg_tablesize = -1; 80 module_param(setup_sg_tablesize, int, 0); 81 #ifdef SUPPORT_TAGS 82 static int setup_use_tagged_queuing = -1; 83 module_param(setup_use_tagged_queuing, int, 0); 84 #endif 85 static int setup_hostid = -1; 86 module_param(setup_hostid, int, 0); 87 88 /* ms to wait after hitting dma regs */ 89 #define SUN3_DMA_DELAY 10 90 91 /* dvma buffer to allocate -- 32k should hopefully be more than sufficient */ 92 #define SUN3_DVMA_BUFSIZE 0xe000 93 94 static struct scsi_cmnd *sun3_dma_setup_done; 95 static unsigned char *sun3_scsi_regp; 96 static volatile struct sun3_dma_regs *dregs; 97 static struct sun3_udc_regs *udc_regs; 98 static unsigned char *sun3_dma_orig_addr; 99 static unsigned long sun3_dma_orig_count; 100 static int sun3_dma_active; 101 static unsigned long last_residual; 102 static struct Scsi_Host *default_instance; 103 104 /* 105 * NCR 5380 register access functions 106 */ 107 108 static inline unsigned char sun3scsi_read(int reg) 109 { 110 return in_8(sun3_scsi_regp + reg); 111 } 112 113 static inline void sun3scsi_write(int reg, int value) 114 { 115 out_8(sun3_scsi_regp + reg, value); 116 } 117 118 #ifndef SUN3_SCSI_VME 119 /* dma controller register access functions */ 120 121 static inline unsigned short sun3_udc_read(unsigned char reg) 122 { 123 unsigned short ret; 124 125 dregs->udc_addr = UDC_CSR; 126 udelay(SUN3_DMA_DELAY); 127 ret = dregs->udc_data; 128 udelay(SUN3_DMA_DELAY); 129 130 return ret; 131 } 132 133 static inline void sun3_udc_write(unsigned short val, unsigned char reg) 134 { 135 dregs->udc_addr = reg; 136 udelay(SUN3_DMA_DELAY); 137 dregs->udc_data = val; 138 udelay(SUN3_DMA_DELAY); 139 } 140 #endif 141 142 // safe bits for the CSR 143 #define CSR_GOOD 0x060f 144 145 static irqreturn_t scsi_sun3_intr(int irq, void *dummy) 146 { 147 unsigned short csr = dregs->csr; 148 int handled = 0; 149 150 #ifdef SUN3_SCSI_VME 151 dregs->csr &= ~CSR_DMA_ENABLE; 152 #endif 153 154 if(csr & ~CSR_GOOD) { 155 if(csr & CSR_DMA_BUSERR) { 156 printk("scsi%d: bus error in dma\n", default_instance->host_no); 157 } 158 159 if(csr & CSR_DMA_CONFLICT) { 160 printk("scsi%d: dma conflict\n", default_instance->host_no); 161 } 162 handled = 1; 163 } 164 165 if(csr & (CSR_SDB_INT | CSR_DMA_INT)) { 166 NCR5380_intr(irq, dummy); 167 handled = 1; 168 } 169 170 return IRQ_RETVAL(handled); 171 } 172 173 /* 174 * Debug stuff - to be called on NMI, or sysrq key. Use at your own risk; 175 * reentering NCR5380_print_status seems to have ugly side effects 176 */ 177 178 /* this doesn't seem to get used at all -- sam */ 179 #if 0 180 void sun3_sun3_debug (void) 181 { 182 unsigned long flags; 183 184 if (default_instance) { 185 local_irq_save(flags); 186 NCR5380_print_status(default_instance); 187 local_irq_restore(flags); 188 } 189 } 190 #endif 191 192 193 /* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */ 194 static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag) 195 { 196 void *addr; 197 198 if(sun3_dma_orig_addr != NULL) 199 dvma_unmap(sun3_dma_orig_addr); 200 201 #ifdef SUN3_SCSI_VME 202 addr = (void *)dvma_map_vme((unsigned long) data, count); 203 #else 204 addr = (void *)dvma_map((unsigned long) data, count); 205 #endif 206 207 sun3_dma_orig_addr = addr; 208 sun3_dma_orig_count = count; 209 210 #ifndef SUN3_SCSI_VME 211 dregs->fifo_count = 0; 212 sun3_udc_write(UDC_RESET, UDC_CSR); 213 214 /* reset fifo */ 215 dregs->csr &= ~CSR_FIFO; 216 dregs->csr |= CSR_FIFO; 217 #endif 218 219 /* set direction */ 220 if(write_flag) 221 dregs->csr |= CSR_SEND; 222 else 223 dregs->csr &= ~CSR_SEND; 224 225 #ifdef SUN3_SCSI_VME 226 dregs->csr |= CSR_PACK_ENABLE; 227 228 dregs->dma_addr_hi = ((unsigned long)addr >> 16); 229 dregs->dma_addr_lo = ((unsigned long)addr & 0xffff); 230 231 dregs->dma_count_hi = 0; 232 dregs->dma_count_lo = 0; 233 dregs->fifo_count_hi = 0; 234 dregs->fifo_count = 0; 235 #else 236 /* byte count for fifo */ 237 dregs->fifo_count = count; 238 239 sun3_udc_write(UDC_RESET, UDC_CSR); 240 241 /* reset fifo */ 242 dregs->csr &= ~CSR_FIFO; 243 dregs->csr |= CSR_FIFO; 244 245 if(dregs->fifo_count != count) { 246 printk("scsi%d: fifo_mismatch %04x not %04x\n", 247 default_instance->host_no, dregs->fifo_count, 248 (unsigned int) count); 249 NCR5380_dprint(NDEBUG_DMA, default_instance); 250 } 251 252 /* setup udc */ 253 udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8); 254 udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff); 255 udc_regs->count = count/2; /* count in words */ 256 udc_regs->mode_hi = UDC_MODE_HIWORD; 257 if(write_flag) { 258 if(count & 1) 259 udc_regs->count++; 260 udc_regs->mode_lo = UDC_MODE_LSEND; 261 udc_regs->rsel = UDC_RSEL_SEND; 262 } else { 263 udc_regs->mode_lo = UDC_MODE_LRECV; 264 udc_regs->rsel = UDC_RSEL_RECV; 265 } 266 267 /* announce location of regs block */ 268 sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8), 269 UDC_CHN_HI); 270 271 sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO); 272 273 /* set dma master on */ 274 sun3_udc_write(0xd, UDC_MODE); 275 276 /* interrupt enable */ 277 sun3_udc_write(UDC_INT_ENABLE, UDC_CSR); 278 #endif 279 280 return count; 281 282 } 283 284 #ifndef SUN3_SCSI_VME 285 static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance) 286 { 287 unsigned short resid; 288 289 dregs->udc_addr = 0x32; 290 udelay(SUN3_DMA_DELAY); 291 resid = dregs->udc_data; 292 udelay(SUN3_DMA_DELAY); 293 resid *= 2; 294 295 return (unsigned long) resid; 296 } 297 #endif 298 299 static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance) 300 { 301 return last_residual; 302 } 303 304 static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted, 305 struct scsi_cmnd *cmd, 306 int write_flag) 307 { 308 if (cmd->request->cmd_type == REQ_TYPE_FS) 309 return wanted; 310 else 311 return 0; 312 } 313 314 static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data) 315 { 316 #ifdef SUN3_SCSI_VME 317 unsigned short csr; 318 319 csr = dregs->csr; 320 321 dregs->dma_count_hi = (sun3_dma_orig_count >> 16); 322 dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff); 323 324 dregs->fifo_count_hi = (sun3_dma_orig_count >> 16); 325 dregs->fifo_count = (sun3_dma_orig_count & 0xffff); 326 327 /* if(!(csr & CSR_DMA_ENABLE)) 328 * dregs->csr |= CSR_DMA_ENABLE; 329 */ 330 #else 331 sun3_udc_write(UDC_CHN_START, UDC_CSR); 332 #endif 333 334 return 0; 335 } 336 337 /* clean up after our dma is done */ 338 static int sun3scsi_dma_finish(int write_flag) 339 { 340 unsigned short __maybe_unused count; 341 unsigned short fifo; 342 int ret = 0; 343 344 sun3_dma_active = 0; 345 346 #ifdef SUN3_SCSI_VME 347 dregs->csr &= ~CSR_DMA_ENABLE; 348 349 fifo = dregs->fifo_count; 350 if (write_flag) { 351 if ((fifo > 0) && (fifo < sun3_dma_orig_count)) 352 fifo++; 353 } 354 355 last_residual = fifo; 356 /* empty bytes from the fifo which didn't make it */ 357 if ((!write_flag) && (dregs->csr & CSR_LEFT)) { 358 unsigned char *vaddr; 359 360 vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr); 361 362 vaddr += (sun3_dma_orig_count - fifo); 363 vaddr--; 364 365 switch (dregs->csr & CSR_LEFT) { 366 case CSR_LEFT_3: 367 *vaddr = (dregs->bpack_lo & 0xff00) >> 8; 368 vaddr--; 369 370 case CSR_LEFT_2: 371 *vaddr = (dregs->bpack_hi & 0x00ff); 372 vaddr--; 373 374 case CSR_LEFT_1: 375 *vaddr = (dregs->bpack_hi & 0xff00) >> 8; 376 break; 377 } 378 } 379 #else 380 // check to empty the fifo on a read 381 if(!write_flag) { 382 int tmo = 20000; /* .2 sec */ 383 384 while(1) { 385 if(dregs->csr & CSR_FIFO_EMPTY) 386 break; 387 388 if(--tmo <= 0) { 389 printk("sun3scsi: fifo failed to empty!\n"); 390 return 1; 391 } 392 udelay(10); 393 } 394 } 395 396 count = sun3scsi_dma_count(default_instance); 397 398 fifo = dregs->fifo_count; 399 last_residual = fifo; 400 401 /* empty bytes from the fifo which didn't make it */ 402 if((!write_flag) && (count - fifo) == 2) { 403 unsigned short data; 404 unsigned char *vaddr; 405 406 data = dregs->fifo_data; 407 vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr); 408 409 vaddr += (sun3_dma_orig_count - fifo); 410 411 vaddr[-2] = (data & 0xff00) >> 8; 412 vaddr[-1] = (data & 0xff); 413 } 414 #endif 415 416 dvma_unmap(sun3_dma_orig_addr); 417 sun3_dma_orig_addr = NULL; 418 419 #ifdef SUN3_SCSI_VME 420 dregs->dma_addr_hi = 0; 421 dregs->dma_addr_lo = 0; 422 dregs->dma_count_hi = 0; 423 dregs->dma_count_lo = 0; 424 425 dregs->fifo_count = 0; 426 dregs->fifo_count_hi = 0; 427 428 dregs->csr &= ~CSR_SEND; 429 /* dregs->csr |= CSR_DMA_ENABLE; */ 430 #else 431 sun3_udc_write(UDC_RESET, UDC_CSR); 432 dregs->fifo_count = 0; 433 dregs->csr &= ~CSR_SEND; 434 435 /* reset fifo */ 436 dregs->csr &= ~CSR_FIFO; 437 dregs->csr |= CSR_FIFO; 438 #endif 439 440 sun3_dma_setup_done = NULL; 441 442 return ret; 443 444 } 445 446 #include "atari_NCR5380.c" 447 448 #ifdef SUN3_SCSI_VME 449 #define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI" 450 #define DRV_MODULE_NAME "sun3_scsi_vme" 451 #else 452 #define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI" 453 #define DRV_MODULE_NAME "sun3_scsi" 454 #endif 455 456 #define PFX DRV_MODULE_NAME ": " 457 458 static struct scsi_host_template sun3_scsi_template = { 459 .module = THIS_MODULE, 460 .proc_name = DRV_MODULE_NAME, 461 .name = SUN3_SCSI_NAME, 462 .info = sun3scsi_info, 463 .queuecommand = sun3scsi_queue_command, 464 .eh_abort_handler = sun3scsi_abort, 465 .eh_bus_reset_handler = sun3scsi_bus_reset, 466 .can_queue = 16, 467 .this_id = 7, 468 .sg_tablesize = SG_NONE, 469 .cmd_per_lun = 2, 470 .use_clustering = DISABLE_CLUSTERING, 471 .cmd_size = NCR5380_CMD_SIZE, 472 }; 473 474 static int __init sun3_scsi_probe(struct platform_device *pdev) 475 { 476 struct Scsi_Host *instance; 477 int error; 478 struct resource *irq, *mem; 479 unsigned char *ioaddr; 480 int host_flags = 0; 481 #ifdef SUN3_SCSI_VME 482 int i; 483 #endif 484 485 if (setup_can_queue > 0) 486 sun3_scsi_template.can_queue = setup_can_queue; 487 if (setup_cmd_per_lun > 0) 488 sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun; 489 if (setup_sg_tablesize >= 0) 490 sun3_scsi_template.sg_tablesize = setup_sg_tablesize; 491 if (setup_hostid >= 0) 492 sun3_scsi_template.this_id = setup_hostid & 7; 493 494 #ifdef SUN3_SCSI_VME 495 ioaddr = NULL; 496 for (i = 0; i < 2; i++) { 497 unsigned char x; 498 499 irq = platform_get_resource(pdev, IORESOURCE_IRQ, i); 500 mem = platform_get_resource(pdev, IORESOURCE_MEM, i); 501 if (!irq || !mem) 502 break; 503 504 ioaddr = sun3_ioremap(mem->start, resource_size(mem), 505 SUN3_PAGE_TYPE_VME16); 506 dregs = (struct sun3_dma_regs *)(ioaddr + 8); 507 508 if (sun3_map_test((unsigned long)dregs, &x)) { 509 unsigned short oldcsr; 510 511 oldcsr = dregs->csr; 512 dregs->csr = 0; 513 udelay(SUN3_DMA_DELAY); 514 if (dregs->csr == 0x1400) 515 break; 516 517 dregs->csr = oldcsr; 518 } 519 520 iounmap(ioaddr); 521 ioaddr = NULL; 522 } 523 if (!ioaddr) 524 return -ENODEV; 525 #else 526 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 527 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 528 if (!irq || !mem) 529 return -ENODEV; 530 531 ioaddr = ioremap(mem->start, resource_size(mem)); 532 dregs = (struct sun3_dma_regs *)(ioaddr + 8); 533 534 udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs)); 535 if (!udc_regs) { 536 pr_err(PFX "couldn't allocate DVMA memory!\n"); 537 iounmap(ioaddr); 538 return -ENOMEM; 539 } 540 #endif 541 542 sun3_scsi_regp = ioaddr; 543 544 instance = scsi_host_alloc(&sun3_scsi_template, 545 sizeof(struct NCR5380_hostdata)); 546 if (!instance) { 547 error = -ENOMEM; 548 goto fail_alloc; 549 } 550 default_instance = instance; 551 552 instance->io_port = (unsigned long)ioaddr; 553 instance->irq = irq->start; 554 555 #ifdef SUPPORT_TAGS 556 host_flags |= setup_use_tagged_queuing > 0 ? FLAG_TAGGED_QUEUING : 0; 557 #endif 558 559 error = NCR5380_init(instance, host_flags); 560 if (error) 561 goto fail_init; 562 563 error = request_irq(instance->irq, scsi_sun3_intr, 0, 564 "NCR5380", instance); 565 if (error) { 566 #ifdef REAL_DMA 567 pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n", 568 instance->host_no, instance->irq); 569 goto fail_irq; 570 #else 571 pr_warn(PFX "scsi%d: IRQ %d not free, interrupts disabled\n", 572 instance->host_no, instance->irq); 573 instance->irq = NO_IRQ; 574 #endif 575 } 576 577 dregs->csr = 0; 578 udelay(SUN3_DMA_DELAY); 579 dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; 580 udelay(SUN3_DMA_DELAY); 581 dregs->fifo_count = 0; 582 #ifdef SUN3_SCSI_VME 583 dregs->fifo_count_hi = 0; 584 dregs->dma_addr_hi = 0; 585 dregs->dma_addr_lo = 0; 586 dregs->dma_count_hi = 0; 587 dregs->dma_count_lo = 0; 588 589 dregs->ivect = VME_DATA24 | (instance->irq & 0xff); 590 #endif 591 592 NCR5380_maybe_reset_bus(instance); 593 594 error = scsi_add_host(instance, NULL); 595 if (error) 596 goto fail_host; 597 598 platform_set_drvdata(pdev, instance); 599 600 scsi_scan_host(instance); 601 return 0; 602 603 fail_host: 604 if (instance->irq != NO_IRQ) 605 free_irq(instance->irq, instance); 606 fail_irq: 607 NCR5380_exit(instance); 608 fail_init: 609 scsi_host_put(instance); 610 fail_alloc: 611 if (udc_regs) 612 dvma_free(udc_regs); 613 iounmap(sun3_scsi_regp); 614 return error; 615 } 616 617 static int __exit sun3_scsi_remove(struct platform_device *pdev) 618 { 619 struct Scsi_Host *instance = platform_get_drvdata(pdev); 620 621 scsi_remove_host(instance); 622 if (instance->irq != NO_IRQ) 623 free_irq(instance->irq, instance); 624 NCR5380_exit(instance); 625 scsi_host_put(instance); 626 if (udc_regs) 627 dvma_free(udc_regs); 628 iounmap(sun3_scsi_regp); 629 return 0; 630 } 631 632 static struct platform_driver sun3_scsi_driver = { 633 .remove = __exit_p(sun3_scsi_remove), 634 .driver = { 635 .name = DRV_MODULE_NAME, 636 }, 637 }; 638 639 module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe); 640 641 MODULE_ALIAS("platform:" DRV_MODULE_NAME); 642 MODULE_LICENSE("GPL"); 643