1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright 2014 Cisco Systems, Inc. All rights reserved. */ 3 4 #ifndef _CQ_DESC_H_ 5 #define _CQ_DESC_H_ 6 7 /* 8 * Completion queue descriptor types 9 */ 10 enum cq_desc_types { 11 CQ_DESC_TYPE_WQ_ENET = 0, 12 CQ_DESC_TYPE_DESC_COPY = 1, 13 CQ_DESC_TYPE_WQ_EXCH = 2, 14 CQ_DESC_TYPE_RQ_ENET = 3, 15 CQ_DESC_TYPE_RQ_FCP = 4, 16 }; 17 18 /* Completion queue descriptor: 16B 19 * 20 * All completion queues have this basic layout. The 21 * type_specific area is unique for each completion 22 * queue type. 23 */ 24 struct cq_desc { 25 __le16 completed_index; 26 __le16 q_number; 27 u8 type_specific[11]; 28 u8 type_color; 29 }; 30 31 #define CQ_DESC_TYPE_BITS 4 32 #define CQ_DESC_TYPE_MASK ((1 << CQ_DESC_TYPE_BITS) - 1) 33 #define CQ_DESC_COLOR_MASK 1 34 #define CQ_DESC_COLOR_SHIFT 7 35 #define CQ_DESC_Q_NUM_BITS 10 36 #define CQ_DESC_Q_NUM_MASK ((1 << CQ_DESC_Q_NUM_BITS) - 1) 37 #define CQ_DESC_COMP_NDX_BITS 12 38 #define CQ_DESC_COMP_NDX_MASK ((1 << CQ_DESC_COMP_NDX_BITS) - 1) 39 40 static inline void cq_desc_dec(const struct cq_desc *desc_arg, 41 u8 *type, u8 *color, u16 *q_number, u16 *completed_index) 42 { 43 const struct cq_desc *desc = desc_arg; 44 const u8 type_color = desc->type_color; 45 46 *color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK; 47 48 /* 49 * Make sure color bit is read from desc *before* other fields 50 * are read from desc. Hardware guarantees color bit is last 51 * bit (byte) written. Adding the rmb() prevents the compiler 52 * and/or CPU from reordering the reads which would potentially 53 * result in reading stale values. 54 */ 55 rmb(); 56 57 *type = type_color & CQ_DESC_TYPE_MASK; 58 *q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK; 59 *completed_index = le16_to_cpu(desc->completed_index) & 60 CQ_DESC_COMP_NDX_MASK; 61 } 62 63 #endif /* _CQ_DESC_H_ */ 64