1 /* 2 * driver for Microsemi PQI-based storage controllers 3 * Copyright (c) 2016-2017 Microsemi Corporation 4 * Copyright (c) 2016 PMC-Sierra, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; version 2 of the License. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13 * NON INFRINGEMENT. See the GNU General Public License for more details. 14 * 15 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 16 * 17 */ 18 19 #include <linux/module.h> 20 #include <linux/kernel.h> 21 #include <linux/pci.h> 22 #include <linux/delay.h> 23 #include <linux/interrupt.h> 24 #include <linux/sched.h> 25 #include <linux/rtc.h> 26 #include <linux/bcd.h> 27 #include <linux/reboot.h> 28 #include <linux/cciss_ioctl.h> 29 #include <linux/blk-mq-pci.h> 30 #include <scsi/scsi_host.h> 31 #include <scsi/scsi_cmnd.h> 32 #include <scsi/scsi_device.h> 33 #include <scsi/scsi_eh.h> 34 #include <scsi/scsi_transport_sas.h> 35 #include <asm/unaligned.h> 36 #include "smartpqi.h" 37 #include "smartpqi_sis.h" 38 39 #if !defined(BUILD_TIMESTAMP) 40 #define BUILD_TIMESTAMP 41 #endif 42 43 #define DRIVER_VERSION "1.2.4-070" 44 #define DRIVER_MAJOR 1 45 #define DRIVER_MINOR 2 46 #define DRIVER_RELEASE 4 47 #define DRIVER_REVISION 70 48 49 #define DRIVER_NAME "Microsemi PQI Driver (v" \ 50 DRIVER_VERSION BUILD_TIMESTAMP ")" 51 #define DRIVER_NAME_SHORT "smartpqi" 52 53 #define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor)) 54 55 MODULE_AUTHOR("Microsemi"); 56 MODULE_DESCRIPTION("Driver for Microsemi Smart Family Controller version " 57 DRIVER_VERSION); 58 MODULE_SUPPORTED_DEVICE("Microsemi Smart Family Controllers"); 59 MODULE_VERSION(DRIVER_VERSION); 60 MODULE_LICENSE("GPL"); 61 62 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info); 63 static void pqi_ctrl_offline_worker(struct work_struct *work); 64 static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info); 65 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info); 66 static void pqi_scan_start(struct Scsi_Host *shost); 67 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 68 struct pqi_queue_group *queue_group, enum pqi_io_path path, 69 struct pqi_io_request *io_request); 70 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 71 struct pqi_iu_header *request, unsigned int flags, 72 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs); 73 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 74 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 75 unsigned int cdb_length, struct pqi_queue_group *queue_group, 76 struct pqi_encryption_info *encryption_info, bool raid_bypass); 77 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info); 78 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info); 79 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info); 80 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info, 81 u32 bytes_requested); 82 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info); 83 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info); 84 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 85 struct pqi_scsi_dev *device, unsigned long timeout_secs); 86 87 /* for flags argument to pqi_submit_raid_request_synchronous() */ 88 #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1 89 90 static struct scsi_transport_template *pqi_sas_transport_template; 91 92 static atomic_t pqi_controller_count = ATOMIC_INIT(0); 93 94 enum pqi_lockup_action { 95 NONE, 96 REBOOT, 97 PANIC 98 }; 99 100 static enum pqi_lockup_action pqi_lockup_action = NONE; 101 102 static struct { 103 enum pqi_lockup_action action; 104 char *name; 105 } pqi_lockup_actions[] = { 106 { 107 .action = NONE, 108 .name = "none", 109 }, 110 { 111 .action = REBOOT, 112 .name = "reboot", 113 }, 114 { 115 .action = PANIC, 116 .name = "panic", 117 }, 118 }; 119 120 static unsigned int pqi_supported_event_types[] = { 121 PQI_EVENT_TYPE_HOTPLUG, 122 PQI_EVENT_TYPE_HARDWARE, 123 PQI_EVENT_TYPE_PHYSICAL_DEVICE, 124 PQI_EVENT_TYPE_LOGICAL_DEVICE, 125 PQI_EVENT_TYPE_OFA, 126 PQI_EVENT_TYPE_AIO_STATE_CHANGE, 127 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE, 128 }; 129 130 static int pqi_disable_device_id_wildcards; 131 module_param_named(disable_device_id_wildcards, 132 pqi_disable_device_id_wildcards, int, 0644); 133 MODULE_PARM_DESC(disable_device_id_wildcards, 134 "Disable device ID wildcards."); 135 136 static int pqi_disable_heartbeat; 137 module_param_named(disable_heartbeat, 138 pqi_disable_heartbeat, int, 0644); 139 MODULE_PARM_DESC(disable_heartbeat, 140 "Disable heartbeat."); 141 142 static int pqi_disable_ctrl_shutdown; 143 module_param_named(disable_ctrl_shutdown, 144 pqi_disable_ctrl_shutdown, int, 0644); 145 MODULE_PARM_DESC(disable_ctrl_shutdown, 146 "Disable controller shutdown when controller locked up."); 147 148 static char *pqi_lockup_action_param; 149 module_param_named(lockup_action, 150 pqi_lockup_action_param, charp, 0644); 151 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n" 152 "\t\tSupported: none, reboot, panic\n" 153 "\t\tDefault: none"); 154 155 static char *raid_levels[] = { 156 "RAID-0", 157 "RAID-4", 158 "RAID-1(1+0)", 159 "RAID-5", 160 "RAID-5+1", 161 "RAID-ADG", 162 "RAID-1(ADM)", 163 }; 164 165 static char *pqi_raid_level_to_string(u8 raid_level) 166 { 167 if (raid_level < ARRAY_SIZE(raid_levels)) 168 return raid_levels[raid_level]; 169 170 return "RAID UNKNOWN"; 171 } 172 173 #define SA_RAID_0 0 174 #define SA_RAID_4 1 175 #define SA_RAID_1 2 /* also used for RAID 10 */ 176 #define SA_RAID_5 3 /* also used for RAID 50 */ 177 #define SA_RAID_51 4 178 #define SA_RAID_6 5 /* also used for RAID 60 */ 179 #define SA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 180 #define SA_RAID_MAX SA_RAID_ADM 181 #define SA_RAID_UNKNOWN 0xff 182 183 static inline void pqi_scsi_done(struct scsi_cmnd *scmd) 184 { 185 pqi_prep_for_scsi_done(scmd); 186 scmd->scsi_done(scmd); 187 } 188 189 static inline void pqi_disable_write_same(struct scsi_device *sdev) 190 { 191 sdev->no_write_same = 1; 192 } 193 194 static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2) 195 { 196 return memcmp(scsi3addr1, scsi3addr2, 8) == 0; 197 } 198 199 static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device) 200 { 201 return !device->is_physical_device; 202 } 203 204 static inline bool pqi_is_external_raid_addr(u8 *scsi3addr) 205 { 206 return scsi3addr[2] != 0; 207 } 208 209 static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info) 210 { 211 if (ctrl_info->controller_online) 212 if (!sis_is_firmware_running(ctrl_info)) 213 pqi_take_ctrl_offline(ctrl_info); 214 } 215 216 static inline bool pqi_is_hba_lunid(u8 *scsi3addr) 217 { 218 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID); 219 } 220 221 static inline enum pqi_ctrl_mode pqi_get_ctrl_mode( 222 struct pqi_ctrl_info *ctrl_info) 223 { 224 return sis_read_driver_scratch(ctrl_info); 225 } 226 227 static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info, 228 enum pqi_ctrl_mode mode) 229 { 230 sis_write_driver_scratch(ctrl_info, mode); 231 } 232 233 static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info) 234 { 235 ctrl_info->block_requests = true; 236 scsi_block_requests(ctrl_info->scsi_host); 237 } 238 239 static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info) 240 { 241 ctrl_info->block_requests = false; 242 wake_up_all(&ctrl_info->block_requests_wait); 243 pqi_retry_raid_bypass_requests(ctrl_info); 244 scsi_unblock_requests(ctrl_info->scsi_host); 245 } 246 247 static unsigned long pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info, 248 unsigned long timeout_msecs) 249 { 250 unsigned long remaining_msecs; 251 252 if (!pqi_ctrl_blocked(ctrl_info)) 253 return timeout_msecs; 254 255 atomic_inc(&ctrl_info->num_blocked_threads); 256 257 if (timeout_msecs == NO_TIMEOUT) { 258 wait_event(ctrl_info->block_requests_wait, 259 !pqi_ctrl_blocked(ctrl_info)); 260 remaining_msecs = timeout_msecs; 261 } else { 262 unsigned long remaining_jiffies; 263 264 remaining_jiffies = 265 wait_event_timeout(ctrl_info->block_requests_wait, 266 !pqi_ctrl_blocked(ctrl_info), 267 msecs_to_jiffies(timeout_msecs)); 268 remaining_msecs = jiffies_to_msecs(remaining_jiffies); 269 } 270 271 atomic_dec(&ctrl_info->num_blocked_threads); 272 273 return remaining_msecs; 274 } 275 276 static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info) 277 { 278 while (atomic_read(&ctrl_info->num_busy_threads) > 279 atomic_read(&ctrl_info->num_blocked_threads)) 280 usleep_range(1000, 2000); 281 } 282 283 static inline bool pqi_device_offline(struct pqi_scsi_dev *device) 284 { 285 return device->device_offline; 286 } 287 288 static inline void pqi_device_reset_start(struct pqi_scsi_dev *device) 289 { 290 device->in_reset = true; 291 } 292 293 static inline void pqi_device_reset_done(struct pqi_scsi_dev *device) 294 { 295 device->in_reset = false; 296 } 297 298 static inline bool pqi_device_in_reset(struct pqi_scsi_dev *device) 299 { 300 return device->in_reset; 301 } 302 303 static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info) 304 { 305 ctrl_info->in_ofa = true; 306 } 307 308 static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info) 309 { 310 ctrl_info->in_ofa = false; 311 } 312 313 static inline bool pqi_ctrl_in_ofa(struct pqi_ctrl_info *ctrl_info) 314 { 315 return ctrl_info->in_ofa; 316 } 317 318 static inline void pqi_device_remove_start(struct pqi_scsi_dev *device) 319 { 320 device->in_remove = true; 321 } 322 323 static inline bool pqi_device_in_remove(struct pqi_ctrl_info *ctrl_info, 324 struct pqi_scsi_dev *device) 325 { 326 return device->in_remove && !ctrl_info->in_shutdown; 327 } 328 329 static inline void pqi_schedule_rescan_worker_with_delay( 330 struct pqi_ctrl_info *ctrl_info, unsigned long delay) 331 { 332 if (pqi_ctrl_offline(ctrl_info)) 333 return; 334 if (pqi_ctrl_in_ofa(ctrl_info)) 335 return; 336 337 schedule_delayed_work(&ctrl_info->rescan_work, delay); 338 } 339 340 static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info) 341 { 342 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0); 343 } 344 345 #define PQI_RESCAN_WORK_DELAY (10 * PQI_HZ) 346 347 static inline void pqi_schedule_rescan_worker_delayed( 348 struct pqi_ctrl_info *ctrl_info) 349 { 350 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY); 351 } 352 353 static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info) 354 { 355 cancel_delayed_work_sync(&ctrl_info->rescan_work); 356 } 357 358 static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info) 359 { 360 if (!ctrl_info->heartbeat_counter) 361 return 0; 362 363 return readl(ctrl_info->heartbeat_counter); 364 } 365 366 static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info) 367 { 368 if (!ctrl_info->soft_reset_status) 369 return 0; 370 371 return readb(ctrl_info->soft_reset_status); 372 } 373 374 static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info, 375 u8 clear) 376 { 377 u8 status; 378 379 if (!ctrl_info->soft_reset_status) 380 return; 381 382 status = pqi_read_soft_reset_status(ctrl_info); 383 status &= ~clear; 384 writeb(status, ctrl_info->soft_reset_status); 385 } 386 387 static int pqi_map_single(struct pci_dev *pci_dev, 388 struct pqi_sg_descriptor *sg_descriptor, void *buffer, 389 size_t buffer_length, enum dma_data_direction data_direction) 390 { 391 dma_addr_t bus_address; 392 393 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE) 394 return 0; 395 396 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length, 397 data_direction); 398 if (dma_mapping_error(&pci_dev->dev, bus_address)) 399 return -ENOMEM; 400 401 put_unaligned_le64((u64)bus_address, &sg_descriptor->address); 402 put_unaligned_le32(buffer_length, &sg_descriptor->length); 403 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 404 405 return 0; 406 } 407 408 static void pqi_pci_unmap(struct pci_dev *pci_dev, 409 struct pqi_sg_descriptor *descriptors, int num_descriptors, 410 enum dma_data_direction data_direction) 411 { 412 int i; 413 414 if (data_direction == DMA_NONE) 415 return; 416 417 for (i = 0; i < num_descriptors; i++) 418 dma_unmap_single(&pci_dev->dev, 419 (dma_addr_t)get_unaligned_le64(&descriptors[i].address), 420 get_unaligned_le32(&descriptors[i].length), 421 data_direction); 422 } 423 424 static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info, 425 struct pqi_raid_path_request *request, u8 cmd, 426 u8 *scsi3addr, void *buffer, size_t buffer_length, 427 u16 vpd_page, enum dma_data_direction *dir) 428 { 429 u8 *cdb; 430 size_t cdb_length = buffer_length; 431 432 memset(request, 0, sizeof(*request)); 433 434 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 435 put_unaligned_le16(offsetof(struct pqi_raid_path_request, 436 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH, 437 &request->header.iu_length); 438 put_unaligned_le32(buffer_length, &request->buffer_length); 439 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number)); 440 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 441 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 442 443 cdb = request->cdb; 444 445 switch (cmd) { 446 case INQUIRY: 447 request->data_direction = SOP_READ_FLAG; 448 cdb[0] = INQUIRY; 449 if (vpd_page & VPD_PAGE) { 450 cdb[1] = 0x1; 451 cdb[2] = (u8)vpd_page; 452 } 453 cdb[4] = (u8)cdb_length; 454 break; 455 case CISS_REPORT_LOG: 456 case CISS_REPORT_PHYS: 457 request->data_direction = SOP_READ_FLAG; 458 cdb[0] = cmd; 459 if (cmd == CISS_REPORT_PHYS) 460 cdb[1] = CISS_REPORT_PHYS_EXTENDED; 461 else 462 cdb[1] = CISS_REPORT_LOG_EXTENDED; 463 put_unaligned_be32(cdb_length, &cdb[6]); 464 break; 465 case CISS_GET_RAID_MAP: 466 request->data_direction = SOP_READ_FLAG; 467 cdb[0] = CISS_READ; 468 cdb[1] = CISS_GET_RAID_MAP; 469 put_unaligned_be32(cdb_length, &cdb[6]); 470 break; 471 case SA_FLUSH_CACHE: 472 request->data_direction = SOP_WRITE_FLAG; 473 cdb[0] = BMIC_WRITE; 474 cdb[6] = BMIC_FLUSH_CACHE; 475 put_unaligned_be16(cdb_length, &cdb[7]); 476 break; 477 case BMIC_SENSE_DIAG_OPTIONS: 478 cdb_length = 0; 479 /* fall through */ 480 case BMIC_IDENTIFY_CONTROLLER: 481 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 482 request->data_direction = SOP_READ_FLAG; 483 cdb[0] = BMIC_READ; 484 cdb[6] = cmd; 485 put_unaligned_be16(cdb_length, &cdb[7]); 486 break; 487 case BMIC_SET_DIAG_OPTIONS: 488 cdb_length = 0; 489 /* fall through */ 490 case BMIC_WRITE_HOST_WELLNESS: 491 request->data_direction = SOP_WRITE_FLAG; 492 cdb[0] = BMIC_WRITE; 493 cdb[6] = cmd; 494 put_unaligned_be16(cdb_length, &cdb[7]); 495 break; 496 case BMIC_CSMI_PASSTHRU: 497 request->data_direction = SOP_BIDIRECTIONAL; 498 cdb[0] = BMIC_WRITE; 499 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU; 500 cdb[6] = cmd; 501 put_unaligned_be16(cdb_length, &cdb[7]); 502 break; 503 default: 504 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", 505 cmd); 506 break; 507 } 508 509 switch (request->data_direction) { 510 case SOP_READ_FLAG: 511 *dir = DMA_FROM_DEVICE; 512 break; 513 case SOP_WRITE_FLAG: 514 *dir = DMA_TO_DEVICE; 515 break; 516 case SOP_NO_DIRECTION_FLAG: 517 *dir = DMA_NONE; 518 break; 519 default: 520 *dir = DMA_BIDIRECTIONAL; 521 break; 522 } 523 524 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0], 525 buffer, buffer_length, *dir); 526 } 527 528 static inline void pqi_reinit_io_request(struct pqi_io_request *io_request) 529 { 530 io_request->scmd = NULL; 531 io_request->status = 0; 532 io_request->error_info = NULL; 533 io_request->raid_bypass = false; 534 } 535 536 static struct pqi_io_request *pqi_alloc_io_request( 537 struct pqi_ctrl_info *ctrl_info) 538 { 539 struct pqi_io_request *io_request; 540 u16 i = ctrl_info->next_io_request_slot; /* benignly racy */ 541 542 while (1) { 543 io_request = &ctrl_info->io_request_pool[i]; 544 if (atomic_inc_return(&io_request->refcount) == 1) 545 break; 546 atomic_dec(&io_request->refcount); 547 i = (i + 1) % ctrl_info->max_io_slots; 548 } 549 550 /* benignly racy */ 551 ctrl_info->next_io_request_slot = (i + 1) % ctrl_info->max_io_slots; 552 553 pqi_reinit_io_request(io_request); 554 555 return io_request; 556 } 557 558 static void pqi_free_io_request(struct pqi_io_request *io_request) 559 { 560 atomic_dec(&io_request->refcount); 561 } 562 563 static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd, 564 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page, 565 struct pqi_raid_error_info *error_info, 566 unsigned long timeout_msecs) 567 { 568 int rc; 569 enum dma_data_direction dir; 570 struct pqi_raid_path_request request; 571 572 rc = pqi_build_raid_path_request(ctrl_info, &request, 573 cmd, scsi3addr, buffer, 574 buffer_length, vpd_page, &dir); 575 if (rc) 576 return rc; 577 578 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 579 0, error_info, timeout_msecs); 580 581 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 582 return rc; 583 } 584 585 /* Helper functions for pqi_send_scsi_raid_request */ 586 587 static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info, 588 u8 cmd, void *buffer, size_t buffer_length) 589 { 590 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 591 buffer, buffer_length, 0, NULL, NO_TIMEOUT); 592 } 593 594 static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info, 595 u8 cmd, void *buffer, size_t buffer_length, 596 struct pqi_raid_error_info *error_info) 597 { 598 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 599 buffer, buffer_length, 0, error_info, NO_TIMEOUT); 600 } 601 602 603 static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info, 604 struct bmic_identify_controller *buffer) 605 { 606 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER, 607 buffer, sizeof(*buffer)); 608 } 609 610 static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info, 611 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length) 612 { 613 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr, 614 buffer, buffer_length, vpd_page, NULL, NO_TIMEOUT); 615 } 616 617 static bool pqi_vpd_page_supported(struct pqi_ctrl_info *ctrl_info, 618 u8 *scsi3addr, u16 vpd_page) 619 { 620 int rc; 621 int i; 622 int pages; 623 unsigned char *buf, bufsize; 624 625 buf = kzalloc(256, GFP_KERNEL); 626 if (!buf) 627 return false; 628 629 /* Get the size of the page list first */ 630 rc = pqi_scsi_inquiry(ctrl_info, scsi3addr, 631 VPD_PAGE | SCSI_VPD_SUPPORTED_PAGES, 632 buf, SCSI_VPD_HEADER_SZ); 633 if (rc != 0) 634 goto exit_unsupported; 635 636 pages = buf[3]; 637 if ((pages + SCSI_VPD_HEADER_SZ) <= 255) 638 bufsize = pages + SCSI_VPD_HEADER_SZ; 639 else 640 bufsize = 255; 641 642 /* Get the whole VPD page list */ 643 rc = pqi_scsi_inquiry(ctrl_info, scsi3addr, 644 VPD_PAGE | SCSI_VPD_SUPPORTED_PAGES, 645 buf, bufsize); 646 if (rc != 0) 647 goto exit_unsupported; 648 649 pages = buf[3]; 650 for (i = 1; i <= pages; i++) 651 if (buf[3 + i] == vpd_page) 652 goto exit_supported; 653 654 exit_unsupported: 655 kfree(buf); 656 return false; 657 658 exit_supported: 659 kfree(buf); 660 return true; 661 } 662 663 static int pqi_get_device_id(struct pqi_ctrl_info *ctrl_info, 664 u8 *scsi3addr, u8 *device_id, int buflen) 665 { 666 int rc; 667 unsigned char *buf; 668 669 if (!pqi_vpd_page_supported(ctrl_info, scsi3addr, SCSI_VPD_DEVICE_ID)) 670 return 1; /* function not supported */ 671 672 buf = kzalloc(64, GFP_KERNEL); 673 if (!buf) 674 return -ENOMEM; 675 676 rc = pqi_scsi_inquiry(ctrl_info, scsi3addr, 677 VPD_PAGE | SCSI_VPD_DEVICE_ID, 678 buf, 64); 679 if (rc == 0) { 680 if (buflen > 16) 681 buflen = 16; 682 memcpy(device_id, &buf[SCSI_VPD_DEVICE_ID_IDX], buflen); 683 } 684 685 kfree(buf); 686 687 return rc; 688 } 689 690 static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info, 691 struct pqi_scsi_dev *device, 692 struct bmic_identify_physical_device *buffer, 693 size_t buffer_length) 694 { 695 int rc; 696 enum dma_data_direction dir; 697 u16 bmic_device_index; 698 struct pqi_raid_path_request request; 699 700 rc = pqi_build_raid_path_request(ctrl_info, &request, 701 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer, 702 buffer_length, 0, &dir); 703 if (rc) 704 return rc; 705 706 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr); 707 request.cdb[2] = (u8)bmic_device_index; 708 request.cdb[9] = (u8)(bmic_device_index >> 8); 709 710 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 711 0, NULL, NO_TIMEOUT); 712 713 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 714 return rc; 715 } 716 717 static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info, 718 enum bmic_flush_cache_shutdown_event shutdown_event) 719 { 720 int rc; 721 struct bmic_flush_cache *flush_cache; 722 723 /* 724 * Don't bother trying to flush the cache if the controller is 725 * locked up. 726 */ 727 if (pqi_ctrl_offline(ctrl_info)) 728 return -ENXIO; 729 730 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL); 731 if (!flush_cache) 732 return -ENOMEM; 733 734 flush_cache->shutdown_event = shutdown_event; 735 736 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache, 737 sizeof(*flush_cache)); 738 739 kfree(flush_cache); 740 741 return rc; 742 } 743 744 int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info, 745 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length, 746 struct pqi_raid_error_info *error_info) 747 { 748 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU, 749 buffer, buffer_length, error_info); 750 } 751 752 #define PQI_FETCH_PTRAID_DATA (1UL<<31) 753 754 static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info) 755 { 756 int rc; 757 struct bmic_diag_options *diag; 758 759 diag = kzalloc(sizeof(*diag), GFP_KERNEL); 760 if (!diag) 761 return -ENOMEM; 762 763 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS, 764 diag, sizeof(*diag)); 765 if (rc) 766 goto out; 767 768 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA); 769 770 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS, 771 diag, sizeof(*diag)); 772 out: 773 kfree(diag); 774 775 return rc; 776 } 777 778 static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info, 779 void *buffer, size_t buffer_length) 780 { 781 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS, 782 buffer, buffer_length); 783 } 784 785 #pragma pack(1) 786 787 struct bmic_host_wellness_driver_version { 788 u8 start_tag[4]; 789 u8 driver_version_tag[2]; 790 __le16 driver_version_length; 791 char driver_version[32]; 792 u8 dont_write_tag[2]; 793 u8 end_tag[2]; 794 }; 795 796 #pragma pack() 797 798 static int pqi_write_driver_version_to_host_wellness( 799 struct pqi_ctrl_info *ctrl_info) 800 { 801 int rc; 802 struct bmic_host_wellness_driver_version *buffer; 803 size_t buffer_length; 804 805 buffer_length = sizeof(*buffer); 806 807 buffer = kmalloc(buffer_length, GFP_KERNEL); 808 if (!buffer) 809 return -ENOMEM; 810 811 buffer->start_tag[0] = '<'; 812 buffer->start_tag[1] = 'H'; 813 buffer->start_tag[2] = 'W'; 814 buffer->start_tag[3] = '>'; 815 buffer->driver_version_tag[0] = 'D'; 816 buffer->driver_version_tag[1] = 'V'; 817 put_unaligned_le16(sizeof(buffer->driver_version), 818 &buffer->driver_version_length); 819 strncpy(buffer->driver_version, "Linux " DRIVER_VERSION, 820 sizeof(buffer->driver_version) - 1); 821 buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0'; 822 buffer->dont_write_tag[0] = 'D'; 823 buffer->dont_write_tag[1] = 'W'; 824 buffer->end_tag[0] = 'Z'; 825 buffer->end_tag[1] = 'Z'; 826 827 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 828 829 kfree(buffer); 830 831 return rc; 832 } 833 834 #pragma pack(1) 835 836 struct bmic_host_wellness_time { 837 u8 start_tag[4]; 838 u8 time_tag[2]; 839 __le16 time_length; 840 u8 time[8]; 841 u8 dont_write_tag[2]; 842 u8 end_tag[2]; 843 }; 844 845 #pragma pack() 846 847 static int pqi_write_current_time_to_host_wellness( 848 struct pqi_ctrl_info *ctrl_info) 849 { 850 int rc; 851 struct bmic_host_wellness_time *buffer; 852 size_t buffer_length; 853 time64_t local_time; 854 unsigned int year; 855 struct tm tm; 856 857 buffer_length = sizeof(*buffer); 858 859 buffer = kmalloc(buffer_length, GFP_KERNEL); 860 if (!buffer) 861 return -ENOMEM; 862 863 buffer->start_tag[0] = '<'; 864 buffer->start_tag[1] = 'H'; 865 buffer->start_tag[2] = 'W'; 866 buffer->start_tag[3] = '>'; 867 buffer->time_tag[0] = 'T'; 868 buffer->time_tag[1] = 'D'; 869 put_unaligned_le16(sizeof(buffer->time), 870 &buffer->time_length); 871 872 local_time = ktime_get_real_seconds(); 873 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm); 874 year = tm.tm_year + 1900; 875 876 buffer->time[0] = bin2bcd(tm.tm_hour); 877 buffer->time[1] = bin2bcd(tm.tm_min); 878 buffer->time[2] = bin2bcd(tm.tm_sec); 879 buffer->time[3] = 0; 880 buffer->time[4] = bin2bcd(tm.tm_mon + 1); 881 buffer->time[5] = bin2bcd(tm.tm_mday); 882 buffer->time[6] = bin2bcd(year / 100); 883 buffer->time[7] = bin2bcd(year % 100); 884 885 buffer->dont_write_tag[0] = 'D'; 886 buffer->dont_write_tag[1] = 'W'; 887 buffer->end_tag[0] = 'Z'; 888 buffer->end_tag[1] = 'Z'; 889 890 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 891 892 kfree(buffer); 893 894 return rc; 895 } 896 897 #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * PQI_HZ) 898 899 static void pqi_update_time_worker(struct work_struct *work) 900 { 901 int rc; 902 struct pqi_ctrl_info *ctrl_info; 903 904 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 905 update_time_work); 906 907 if (pqi_ctrl_offline(ctrl_info)) 908 return; 909 910 rc = pqi_write_current_time_to_host_wellness(ctrl_info); 911 if (rc) 912 dev_warn(&ctrl_info->pci_dev->dev, 913 "error updating time on controller\n"); 914 915 schedule_delayed_work(&ctrl_info->update_time_work, 916 PQI_UPDATE_TIME_WORK_INTERVAL); 917 } 918 919 static inline void pqi_schedule_update_time_worker( 920 struct pqi_ctrl_info *ctrl_info) 921 { 922 schedule_delayed_work(&ctrl_info->update_time_work, 0); 923 } 924 925 static inline void pqi_cancel_update_time_worker( 926 struct pqi_ctrl_info *ctrl_info) 927 { 928 cancel_delayed_work_sync(&ctrl_info->update_time_work); 929 } 930 931 static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, 932 void *buffer, size_t buffer_length) 933 { 934 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer, 935 buffer_length); 936 } 937 938 static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, 939 void **buffer) 940 { 941 int rc; 942 size_t lun_list_length; 943 size_t lun_data_length; 944 size_t new_lun_list_length; 945 void *lun_data = NULL; 946 struct report_lun_header *report_lun_header; 947 948 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL); 949 if (!report_lun_header) { 950 rc = -ENOMEM; 951 goto out; 952 } 953 954 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header, 955 sizeof(*report_lun_header)); 956 if (rc) 957 goto out; 958 959 lun_list_length = get_unaligned_be32(&report_lun_header->list_length); 960 961 again: 962 lun_data_length = sizeof(struct report_lun_header) + lun_list_length; 963 964 lun_data = kmalloc(lun_data_length, GFP_KERNEL); 965 if (!lun_data) { 966 rc = -ENOMEM; 967 goto out; 968 } 969 970 if (lun_list_length == 0) { 971 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header)); 972 goto out; 973 } 974 975 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length); 976 if (rc) 977 goto out; 978 979 new_lun_list_length = get_unaligned_be32( 980 &((struct report_lun_header *)lun_data)->list_length); 981 982 if (new_lun_list_length > lun_list_length) { 983 lun_list_length = new_lun_list_length; 984 kfree(lun_data); 985 goto again; 986 } 987 988 out: 989 kfree(report_lun_header); 990 991 if (rc) { 992 kfree(lun_data); 993 lun_data = NULL; 994 } 995 996 *buffer = lun_data; 997 998 return rc; 999 } 1000 1001 static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info, 1002 void **buffer) 1003 { 1004 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS, 1005 buffer); 1006 } 1007 1008 static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info, 1009 void **buffer) 1010 { 1011 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer); 1012 } 1013 1014 static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info, 1015 struct report_phys_lun_extended **physdev_list, 1016 struct report_log_lun_extended **logdev_list) 1017 { 1018 int rc; 1019 size_t logdev_list_length; 1020 size_t logdev_data_length; 1021 struct report_log_lun_extended *internal_logdev_list; 1022 struct report_log_lun_extended *logdev_data; 1023 struct report_lun_header report_lun_header; 1024 1025 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list); 1026 if (rc) 1027 dev_err(&ctrl_info->pci_dev->dev, 1028 "report physical LUNs failed\n"); 1029 1030 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list); 1031 if (rc) 1032 dev_err(&ctrl_info->pci_dev->dev, 1033 "report logical LUNs failed\n"); 1034 1035 /* 1036 * Tack the controller itself onto the end of the logical device list. 1037 */ 1038 1039 logdev_data = *logdev_list; 1040 1041 if (logdev_data) { 1042 logdev_list_length = 1043 get_unaligned_be32(&logdev_data->header.list_length); 1044 } else { 1045 memset(&report_lun_header, 0, sizeof(report_lun_header)); 1046 logdev_data = 1047 (struct report_log_lun_extended *)&report_lun_header; 1048 logdev_list_length = 0; 1049 } 1050 1051 logdev_data_length = sizeof(struct report_lun_header) + 1052 logdev_list_length; 1053 1054 internal_logdev_list = kmalloc(logdev_data_length + 1055 sizeof(struct report_log_lun_extended), GFP_KERNEL); 1056 if (!internal_logdev_list) { 1057 kfree(*logdev_list); 1058 *logdev_list = NULL; 1059 return -ENOMEM; 1060 } 1061 1062 memcpy(internal_logdev_list, logdev_data, logdev_data_length); 1063 memset((u8 *)internal_logdev_list + logdev_data_length, 0, 1064 sizeof(struct report_log_lun_extended_entry)); 1065 put_unaligned_be32(logdev_list_length + 1066 sizeof(struct report_log_lun_extended_entry), 1067 &internal_logdev_list->header.list_length); 1068 1069 kfree(*logdev_list); 1070 *logdev_list = internal_logdev_list; 1071 1072 return 0; 1073 } 1074 1075 static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device, 1076 int bus, int target, int lun) 1077 { 1078 device->bus = bus; 1079 device->target = target; 1080 device->lun = lun; 1081 } 1082 1083 static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device) 1084 { 1085 u8 *scsi3addr; 1086 u32 lunid; 1087 int bus; 1088 int target; 1089 int lun; 1090 1091 scsi3addr = device->scsi3addr; 1092 lunid = get_unaligned_le32(scsi3addr); 1093 1094 if (pqi_is_hba_lunid(scsi3addr)) { 1095 /* The specified device is the controller. */ 1096 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff); 1097 device->target_lun_valid = true; 1098 return; 1099 } 1100 1101 if (pqi_is_logical_device(device)) { 1102 if (device->is_external_raid_device) { 1103 bus = PQI_EXTERNAL_RAID_VOLUME_BUS; 1104 target = (lunid >> 16) & 0x3fff; 1105 lun = lunid & 0xff; 1106 } else { 1107 bus = PQI_RAID_VOLUME_BUS; 1108 target = 0; 1109 lun = lunid & 0x3fff; 1110 } 1111 pqi_set_bus_target_lun(device, bus, target, lun); 1112 device->target_lun_valid = true; 1113 return; 1114 } 1115 1116 /* 1117 * Defer target and LUN assignment for non-controller physical devices 1118 * because the SAS transport layer will make these assignments later. 1119 */ 1120 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0); 1121 } 1122 1123 static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info, 1124 struct pqi_scsi_dev *device) 1125 { 1126 int rc; 1127 u8 raid_level; 1128 u8 *buffer; 1129 1130 raid_level = SA_RAID_UNKNOWN; 1131 1132 buffer = kmalloc(64, GFP_KERNEL); 1133 if (buffer) { 1134 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1135 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64); 1136 if (rc == 0) { 1137 raid_level = buffer[8]; 1138 if (raid_level > SA_RAID_MAX) 1139 raid_level = SA_RAID_UNKNOWN; 1140 } 1141 kfree(buffer); 1142 } 1143 1144 device->raid_level = raid_level; 1145 } 1146 1147 static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info, 1148 struct pqi_scsi_dev *device, struct raid_map *raid_map) 1149 { 1150 char *err_msg; 1151 u32 raid_map_size; 1152 u32 r5or6_blocks_per_row; 1153 1154 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1155 1156 if (raid_map_size < offsetof(struct raid_map, disk_data)) { 1157 err_msg = "RAID map too small"; 1158 goto bad_raid_map; 1159 } 1160 1161 if (device->raid_level == SA_RAID_1) { 1162 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) { 1163 err_msg = "invalid RAID-1 map"; 1164 goto bad_raid_map; 1165 } 1166 } else if (device->raid_level == SA_RAID_ADM) { 1167 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) { 1168 err_msg = "invalid RAID-1(ADM) map"; 1169 goto bad_raid_map; 1170 } 1171 } else if ((device->raid_level == SA_RAID_5 || 1172 device->raid_level == SA_RAID_6) && 1173 get_unaligned_le16(&raid_map->layout_map_count) > 1) { 1174 /* RAID 50/60 */ 1175 r5or6_blocks_per_row = 1176 get_unaligned_le16(&raid_map->strip_size) * 1177 get_unaligned_le16(&raid_map->data_disks_per_row); 1178 if (r5or6_blocks_per_row == 0) { 1179 err_msg = "invalid RAID-5 or RAID-6 map"; 1180 goto bad_raid_map; 1181 } 1182 } 1183 1184 return 0; 1185 1186 bad_raid_map: 1187 dev_warn(&ctrl_info->pci_dev->dev, 1188 "logical device %08x%08x %s\n", 1189 *((u32 *)&device->scsi3addr), 1190 *((u32 *)&device->scsi3addr[4]), err_msg); 1191 1192 return -EINVAL; 1193 } 1194 1195 static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info, 1196 struct pqi_scsi_dev *device) 1197 { 1198 int rc; 1199 u32 raid_map_size; 1200 struct raid_map *raid_map; 1201 1202 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL); 1203 if (!raid_map) 1204 return -ENOMEM; 1205 1206 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1207 device->scsi3addr, raid_map, sizeof(*raid_map), 1208 0, NULL, NO_TIMEOUT); 1209 1210 if (rc) 1211 goto error; 1212 1213 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1214 1215 if (raid_map_size > sizeof(*raid_map)) { 1216 1217 kfree(raid_map); 1218 1219 raid_map = kmalloc(raid_map_size, GFP_KERNEL); 1220 if (!raid_map) 1221 return -ENOMEM; 1222 1223 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1224 device->scsi3addr, raid_map, raid_map_size, 1225 0, NULL, NO_TIMEOUT); 1226 if (rc) 1227 goto error; 1228 1229 if (get_unaligned_le32(&raid_map->structure_size) 1230 != raid_map_size) { 1231 dev_warn(&ctrl_info->pci_dev->dev, 1232 "Requested %d bytes, received %d bytes", 1233 raid_map_size, 1234 get_unaligned_le32(&raid_map->structure_size)); 1235 goto error; 1236 } 1237 } 1238 1239 rc = pqi_validate_raid_map(ctrl_info, device, raid_map); 1240 if (rc) 1241 goto error; 1242 1243 device->raid_map = raid_map; 1244 1245 return 0; 1246 1247 error: 1248 kfree(raid_map); 1249 1250 return rc; 1251 } 1252 1253 static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info, 1254 struct pqi_scsi_dev *device) 1255 { 1256 int rc; 1257 u8 *buffer; 1258 u8 bypass_status; 1259 1260 buffer = kmalloc(64, GFP_KERNEL); 1261 if (!buffer) 1262 return; 1263 1264 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1265 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64); 1266 if (rc) 1267 goto out; 1268 1269 #define RAID_BYPASS_STATUS 4 1270 #define RAID_BYPASS_CONFIGURED 0x1 1271 #define RAID_BYPASS_ENABLED 0x2 1272 1273 bypass_status = buffer[RAID_BYPASS_STATUS]; 1274 device->raid_bypass_configured = 1275 (bypass_status & RAID_BYPASS_CONFIGURED) != 0; 1276 if (device->raid_bypass_configured && 1277 (bypass_status & RAID_BYPASS_ENABLED) && 1278 pqi_get_raid_map(ctrl_info, device) == 0) 1279 device->raid_bypass_enabled = true; 1280 1281 out: 1282 kfree(buffer); 1283 } 1284 1285 /* 1286 * Use vendor-specific VPD to determine online/offline status of a volume. 1287 */ 1288 1289 static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info, 1290 struct pqi_scsi_dev *device) 1291 { 1292 int rc; 1293 size_t page_length; 1294 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE; 1295 bool volume_offline = true; 1296 u32 volume_flags; 1297 struct ciss_vpd_logical_volume_status *vpd; 1298 1299 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL); 1300 if (!vpd) 1301 goto no_buffer; 1302 1303 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1304 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd)); 1305 if (rc) 1306 goto out; 1307 1308 if (vpd->page_code != CISS_VPD_LV_STATUS) 1309 goto out; 1310 1311 page_length = offsetof(struct ciss_vpd_logical_volume_status, 1312 volume_status) + vpd->page_length; 1313 if (page_length < sizeof(*vpd)) 1314 goto out; 1315 1316 volume_status = vpd->volume_status; 1317 volume_flags = get_unaligned_be32(&vpd->flags); 1318 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0; 1319 1320 out: 1321 kfree(vpd); 1322 no_buffer: 1323 device->volume_status = volume_status; 1324 device->volume_offline = volume_offline; 1325 } 1326 1327 #define PQI_INQUIRY_PAGE0_RETRIES 3 1328 1329 static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info, 1330 struct pqi_scsi_dev *device) 1331 { 1332 int rc; 1333 u8 *buffer; 1334 unsigned int retries; 1335 1336 if (device->is_expander_smp_device) 1337 return 0; 1338 1339 buffer = kmalloc(64, GFP_KERNEL); 1340 if (!buffer) 1341 return -ENOMEM; 1342 1343 /* Send an inquiry to the device to see what it is. */ 1344 for (retries = 0;;) { 1345 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, 1346 buffer, 64); 1347 if (rc == 0) 1348 break; 1349 if (pqi_is_logical_device(device) || 1350 rc != PQI_CMD_STATUS_ABORTED || 1351 ++retries > PQI_INQUIRY_PAGE0_RETRIES) 1352 goto out; 1353 } 1354 1355 scsi_sanitize_inquiry_string(&buffer[8], 8); 1356 scsi_sanitize_inquiry_string(&buffer[16], 16); 1357 1358 device->devtype = buffer[0] & 0x1f; 1359 memcpy(device->vendor, &buffer[8], sizeof(device->vendor)); 1360 memcpy(device->model, &buffer[16], sizeof(device->model)); 1361 1362 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) { 1363 if (device->is_external_raid_device) { 1364 device->raid_level = SA_RAID_UNKNOWN; 1365 device->volume_status = CISS_LV_OK; 1366 device->volume_offline = false; 1367 } else { 1368 pqi_get_raid_level(ctrl_info, device); 1369 pqi_get_raid_bypass_status(ctrl_info, device); 1370 pqi_get_volume_status(ctrl_info, device); 1371 } 1372 } 1373 1374 if (pqi_get_device_id(ctrl_info, device->scsi3addr, 1375 device->unique_id, sizeof(device->unique_id)) < 0) 1376 dev_warn(&ctrl_info->pci_dev->dev, 1377 "Can't get device id for scsi %d:%d:%d:%d\n", 1378 ctrl_info->scsi_host->host_no, 1379 device->bus, device->target, 1380 device->lun); 1381 1382 out: 1383 kfree(buffer); 1384 1385 return rc; 1386 } 1387 1388 static void pqi_get_physical_disk_info(struct pqi_ctrl_info *ctrl_info, 1389 struct pqi_scsi_dev *device, 1390 struct bmic_identify_physical_device *id_phys) 1391 { 1392 int rc; 1393 1394 memset(id_phys, 0, sizeof(*id_phys)); 1395 1396 rc = pqi_identify_physical_device(ctrl_info, device, 1397 id_phys, sizeof(*id_phys)); 1398 if (rc) { 1399 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH; 1400 return; 1401 } 1402 1403 device->queue_depth = 1404 get_unaligned_le16(&id_phys->current_queue_depth_limit); 1405 device->device_type = id_phys->device_type; 1406 device->active_path_index = id_phys->active_path_number; 1407 device->path_map = id_phys->redundant_path_present_map; 1408 memcpy(&device->box, 1409 &id_phys->alternate_paths_phys_box_on_port, 1410 sizeof(device->box)); 1411 memcpy(&device->phys_connector, 1412 &id_phys->alternate_paths_phys_connector, 1413 sizeof(device->phys_connector)); 1414 device->bay = id_phys->phys_bay_in_box; 1415 } 1416 1417 static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info, 1418 struct pqi_scsi_dev *device) 1419 { 1420 char *status; 1421 static const char unknown_state_str[] = 1422 "Volume is in an unknown state (%u)"; 1423 char unknown_state_buffer[sizeof(unknown_state_str) + 10]; 1424 1425 switch (device->volume_status) { 1426 case CISS_LV_OK: 1427 status = "Volume online"; 1428 break; 1429 case CISS_LV_FAILED: 1430 status = "Volume failed"; 1431 break; 1432 case CISS_LV_NOT_CONFIGURED: 1433 status = "Volume not configured"; 1434 break; 1435 case CISS_LV_DEGRADED: 1436 status = "Volume degraded"; 1437 break; 1438 case CISS_LV_READY_FOR_RECOVERY: 1439 status = "Volume ready for recovery operation"; 1440 break; 1441 case CISS_LV_UNDERGOING_RECOVERY: 1442 status = "Volume undergoing recovery"; 1443 break; 1444 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED: 1445 status = "Wrong physical drive was replaced"; 1446 break; 1447 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM: 1448 status = "A physical drive not properly connected"; 1449 break; 1450 case CISS_LV_HARDWARE_OVERHEATING: 1451 status = "Hardware is overheating"; 1452 break; 1453 case CISS_LV_HARDWARE_HAS_OVERHEATED: 1454 status = "Hardware has overheated"; 1455 break; 1456 case CISS_LV_UNDERGOING_EXPANSION: 1457 status = "Volume undergoing expansion"; 1458 break; 1459 case CISS_LV_NOT_AVAILABLE: 1460 status = "Volume waiting for transforming volume"; 1461 break; 1462 case CISS_LV_QUEUED_FOR_EXPANSION: 1463 status = "Volume queued for expansion"; 1464 break; 1465 case CISS_LV_DISABLED_SCSI_ID_CONFLICT: 1466 status = "Volume disabled due to SCSI ID conflict"; 1467 break; 1468 case CISS_LV_EJECTED: 1469 status = "Volume has been ejected"; 1470 break; 1471 case CISS_LV_UNDERGOING_ERASE: 1472 status = "Volume undergoing background erase"; 1473 break; 1474 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD: 1475 status = "Volume ready for predictive spare rebuild"; 1476 break; 1477 case CISS_LV_UNDERGOING_RPI: 1478 status = "Volume undergoing rapid parity initialization"; 1479 break; 1480 case CISS_LV_PENDING_RPI: 1481 status = "Volume queued for rapid parity initialization"; 1482 break; 1483 case CISS_LV_ENCRYPTED_NO_KEY: 1484 status = "Encrypted volume inaccessible - key not present"; 1485 break; 1486 case CISS_LV_UNDERGOING_ENCRYPTION: 1487 status = "Volume undergoing encryption process"; 1488 break; 1489 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING: 1490 status = "Volume undergoing encryption re-keying process"; 1491 break; 1492 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1493 status = "Volume encrypted but encryption is disabled"; 1494 break; 1495 case CISS_LV_PENDING_ENCRYPTION: 1496 status = "Volume pending migration to encrypted state"; 1497 break; 1498 case CISS_LV_PENDING_ENCRYPTION_REKEYING: 1499 status = "Volume pending encryption rekeying"; 1500 break; 1501 case CISS_LV_NOT_SUPPORTED: 1502 status = "Volume not supported on this controller"; 1503 break; 1504 case CISS_LV_STATUS_UNAVAILABLE: 1505 status = "Volume status not available"; 1506 break; 1507 default: 1508 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer), 1509 unknown_state_str, device->volume_status); 1510 status = unknown_state_buffer; 1511 break; 1512 } 1513 1514 dev_info(&ctrl_info->pci_dev->dev, 1515 "scsi %d:%d:%d:%d %s\n", 1516 ctrl_info->scsi_host->host_no, 1517 device->bus, device->target, device->lun, status); 1518 } 1519 1520 static void pqi_rescan_worker(struct work_struct *work) 1521 { 1522 struct pqi_ctrl_info *ctrl_info; 1523 1524 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1525 rescan_work); 1526 1527 pqi_scan_scsi_devices(ctrl_info); 1528 } 1529 1530 static int pqi_add_device(struct pqi_ctrl_info *ctrl_info, 1531 struct pqi_scsi_dev *device) 1532 { 1533 int rc; 1534 1535 if (pqi_is_logical_device(device)) 1536 rc = scsi_add_device(ctrl_info->scsi_host, device->bus, 1537 device->target, device->lun); 1538 else 1539 rc = pqi_add_sas_device(ctrl_info->sas_host, device); 1540 1541 return rc; 1542 } 1543 1544 #define PQI_PENDING_IO_TIMEOUT_SECS 20 1545 1546 static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info, 1547 struct pqi_scsi_dev *device) 1548 { 1549 int rc; 1550 1551 pqi_device_remove_start(device); 1552 1553 rc = pqi_device_wait_for_pending_io(ctrl_info, device, 1554 PQI_PENDING_IO_TIMEOUT_SECS); 1555 if (rc) 1556 dev_err(&ctrl_info->pci_dev->dev, 1557 "scsi %d:%d:%d:%d removing device with %d outstanding commands\n", 1558 ctrl_info->scsi_host->host_no, device->bus, 1559 device->target, device->lun, 1560 atomic_read(&device->scsi_cmds_outstanding)); 1561 1562 if (pqi_is_logical_device(device)) 1563 scsi_remove_device(device->sdev); 1564 else 1565 pqi_remove_sas_device(device); 1566 } 1567 1568 /* Assumes the SCSI device list lock is held. */ 1569 1570 static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info, 1571 int bus, int target, int lun) 1572 { 1573 struct pqi_scsi_dev *device; 1574 1575 list_for_each_entry(device, &ctrl_info->scsi_device_list, 1576 scsi_device_list_entry) 1577 if (device->bus == bus && device->target == target && 1578 device->lun == lun) 1579 return device; 1580 1581 return NULL; 1582 } 1583 1584 static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1, 1585 struct pqi_scsi_dev *dev2) 1586 { 1587 if (dev1->is_physical_device != dev2->is_physical_device) 1588 return false; 1589 1590 if (dev1->is_physical_device) 1591 return dev1->wwid == dev2->wwid; 1592 1593 return memcmp(dev1->volume_id, dev2->volume_id, 1594 sizeof(dev1->volume_id)) == 0; 1595 } 1596 1597 enum pqi_find_result { 1598 DEVICE_NOT_FOUND, 1599 DEVICE_CHANGED, 1600 DEVICE_SAME, 1601 }; 1602 1603 static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info, 1604 struct pqi_scsi_dev *device_to_find, 1605 struct pqi_scsi_dev **matching_device) 1606 { 1607 struct pqi_scsi_dev *device; 1608 1609 list_for_each_entry(device, &ctrl_info->scsi_device_list, 1610 scsi_device_list_entry) { 1611 if (pqi_scsi3addr_equal(device_to_find->scsi3addr, 1612 device->scsi3addr)) { 1613 *matching_device = device; 1614 if (pqi_device_equal(device_to_find, device)) { 1615 if (device_to_find->volume_offline) 1616 return DEVICE_CHANGED; 1617 return DEVICE_SAME; 1618 } 1619 return DEVICE_CHANGED; 1620 } 1621 } 1622 1623 return DEVICE_NOT_FOUND; 1624 } 1625 1626 static inline const char *pqi_device_type(struct pqi_scsi_dev *device) 1627 { 1628 if (device->is_expander_smp_device) 1629 return "Enclosure SMP "; 1630 1631 return scsi_device_type(device->devtype); 1632 } 1633 1634 #define PQI_DEV_INFO_BUFFER_LENGTH 128 1635 1636 static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info, 1637 char *action, struct pqi_scsi_dev *device) 1638 { 1639 ssize_t count; 1640 char buffer[PQI_DEV_INFO_BUFFER_LENGTH]; 1641 1642 count = snprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH, 1643 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus); 1644 1645 if (device->target_lun_valid) 1646 count += snprintf(buffer + count, 1647 PQI_DEV_INFO_BUFFER_LENGTH - count, 1648 "%d:%d", 1649 device->target, 1650 device->lun); 1651 else 1652 count += snprintf(buffer + count, 1653 PQI_DEV_INFO_BUFFER_LENGTH - count, 1654 "-:-"); 1655 1656 if (pqi_is_logical_device(device)) 1657 count += snprintf(buffer + count, 1658 PQI_DEV_INFO_BUFFER_LENGTH - count, 1659 " %08x%08x", 1660 *((u32 *)&device->scsi3addr), 1661 *((u32 *)&device->scsi3addr[4])); 1662 else 1663 count += snprintf(buffer + count, 1664 PQI_DEV_INFO_BUFFER_LENGTH - count, 1665 " %016llx", device->sas_address); 1666 1667 count += snprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count, 1668 " %s %.8s %.16s ", 1669 pqi_device_type(device), 1670 device->vendor, 1671 device->model); 1672 1673 if (pqi_is_logical_device(device)) { 1674 if (device->devtype == TYPE_DISK) 1675 count += snprintf(buffer + count, 1676 PQI_DEV_INFO_BUFFER_LENGTH - count, 1677 "SSDSmartPathCap%c En%c %-12s", 1678 device->raid_bypass_configured ? '+' : '-', 1679 device->raid_bypass_enabled ? '+' : '-', 1680 pqi_raid_level_to_string(device->raid_level)); 1681 } else { 1682 count += snprintf(buffer + count, 1683 PQI_DEV_INFO_BUFFER_LENGTH - count, 1684 "AIO%c", device->aio_enabled ? '+' : '-'); 1685 if (device->devtype == TYPE_DISK || 1686 device->devtype == TYPE_ZBC) 1687 count += snprintf(buffer + count, 1688 PQI_DEV_INFO_BUFFER_LENGTH - count, 1689 " qd=%-6d", device->queue_depth); 1690 } 1691 1692 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer); 1693 } 1694 1695 /* Assumes the SCSI device list lock is held. */ 1696 1697 static void pqi_scsi_update_device(struct pqi_scsi_dev *existing_device, 1698 struct pqi_scsi_dev *new_device) 1699 { 1700 existing_device->devtype = new_device->devtype; 1701 existing_device->device_type = new_device->device_type; 1702 existing_device->bus = new_device->bus; 1703 if (new_device->target_lun_valid) { 1704 existing_device->target = new_device->target; 1705 existing_device->lun = new_device->lun; 1706 existing_device->target_lun_valid = true; 1707 } 1708 1709 /* By definition, the scsi3addr and wwid fields are already the same. */ 1710 1711 existing_device->is_physical_device = new_device->is_physical_device; 1712 existing_device->is_external_raid_device = 1713 new_device->is_external_raid_device; 1714 existing_device->is_expander_smp_device = 1715 new_device->is_expander_smp_device; 1716 existing_device->aio_enabled = new_device->aio_enabled; 1717 memcpy(existing_device->vendor, new_device->vendor, 1718 sizeof(existing_device->vendor)); 1719 memcpy(existing_device->model, new_device->model, 1720 sizeof(existing_device->model)); 1721 existing_device->sas_address = new_device->sas_address; 1722 existing_device->raid_level = new_device->raid_level; 1723 existing_device->queue_depth = new_device->queue_depth; 1724 existing_device->aio_handle = new_device->aio_handle; 1725 existing_device->volume_status = new_device->volume_status; 1726 existing_device->active_path_index = new_device->active_path_index; 1727 existing_device->path_map = new_device->path_map; 1728 existing_device->bay = new_device->bay; 1729 memcpy(existing_device->box, new_device->box, 1730 sizeof(existing_device->box)); 1731 memcpy(existing_device->phys_connector, new_device->phys_connector, 1732 sizeof(existing_device->phys_connector)); 1733 existing_device->offload_to_mirror = 0; 1734 kfree(existing_device->raid_map); 1735 existing_device->raid_map = new_device->raid_map; 1736 existing_device->raid_bypass_configured = 1737 new_device->raid_bypass_configured; 1738 existing_device->raid_bypass_enabled = 1739 new_device->raid_bypass_enabled; 1740 existing_device->device_offline = false; 1741 1742 /* To prevent this from being freed later. */ 1743 new_device->raid_map = NULL; 1744 } 1745 1746 static inline void pqi_free_device(struct pqi_scsi_dev *device) 1747 { 1748 if (device) { 1749 kfree(device->raid_map); 1750 kfree(device); 1751 } 1752 } 1753 1754 /* 1755 * Called when exposing a new device to the OS fails in order to re-adjust 1756 * our internal SCSI device list to match the SCSI ML's view. 1757 */ 1758 1759 static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info, 1760 struct pqi_scsi_dev *device) 1761 { 1762 unsigned long flags; 1763 1764 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 1765 list_del(&device->scsi_device_list_entry); 1766 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 1767 1768 /* Allow the device structure to be freed later. */ 1769 device->keep_device = false; 1770 } 1771 1772 static inline bool pqi_is_device_added(struct pqi_scsi_dev *device) 1773 { 1774 if (device->is_expander_smp_device) 1775 return device->sas_port != NULL; 1776 1777 return device->sdev != NULL; 1778 } 1779 1780 static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info, 1781 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices) 1782 { 1783 int rc; 1784 unsigned int i; 1785 unsigned long flags; 1786 enum pqi_find_result find_result; 1787 struct pqi_scsi_dev *device; 1788 struct pqi_scsi_dev *next; 1789 struct pqi_scsi_dev *matching_device; 1790 LIST_HEAD(add_list); 1791 LIST_HEAD(delete_list); 1792 1793 /* 1794 * The idea here is to do as little work as possible while holding the 1795 * spinlock. That's why we go to great pains to defer anything other 1796 * than updating the internal device list until after we release the 1797 * spinlock. 1798 */ 1799 1800 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 1801 1802 /* Assume that all devices in the existing list have gone away. */ 1803 list_for_each_entry(device, &ctrl_info->scsi_device_list, 1804 scsi_device_list_entry) 1805 device->device_gone = true; 1806 1807 for (i = 0; i < num_new_devices; i++) { 1808 device = new_device_list[i]; 1809 1810 find_result = pqi_scsi_find_entry(ctrl_info, device, 1811 &matching_device); 1812 1813 switch (find_result) { 1814 case DEVICE_SAME: 1815 /* 1816 * The newly found device is already in the existing 1817 * device list. 1818 */ 1819 device->new_device = false; 1820 matching_device->device_gone = false; 1821 pqi_scsi_update_device(matching_device, device); 1822 break; 1823 case DEVICE_NOT_FOUND: 1824 /* 1825 * The newly found device is NOT in the existing device 1826 * list. 1827 */ 1828 device->new_device = true; 1829 break; 1830 case DEVICE_CHANGED: 1831 /* 1832 * The original device has gone away and we need to add 1833 * the new device. 1834 */ 1835 device->new_device = true; 1836 break; 1837 } 1838 } 1839 1840 /* Process all devices that have gone away. */ 1841 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list, 1842 scsi_device_list_entry) { 1843 if (device->device_gone) { 1844 list_del(&device->scsi_device_list_entry); 1845 list_add_tail(&device->delete_list_entry, &delete_list); 1846 } 1847 } 1848 1849 /* Process all new devices. */ 1850 for (i = 0; i < num_new_devices; i++) { 1851 device = new_device_list[i]; 1852 if (!device->new_device) 1853 continue; 1854 if (device->volume_offline) 1855 continue; 1856 list_add_tail(&device->scsi_device_list_entry, 1857 &ctrl_info->scsi_device_list); 1858 list_add_tail(&device->add_list_entry, &add_list); 1859 /* To prevent this device structure from being freed later. */ 1860 device->keep_device = true; 1861 } 1862 1863 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 1864 1865 if (pqi_ctrl_in_ofa(ctrl_info)) 1866 pqi_ctrl_ofa_done(ctrl_info); 1867 1868 /* Remove all devices that have gone away. */ 1869 list_for_each_entry_safe(device, next, &delete_list, 1870 delete_list_entry) { 1871 if (device->volume_offline) { 1872 pqi_dev_info(ctrl_info, "offline", device); 1873 pqi_show_volume_status(ctrl_info, device); 1874 } else { 1875 pqi_dev_info(ctrl_info, "removed", device); 1876 } 1877 if (pqi_is_device_added(device)) 1878 pqi_remove_device(ctrl_info, device); 1879 list_del(&device->delete_list_entry); 1880 pqi_free_device(device); 1881 } 1882 1883 /* 1884 * Notify the SCSI ML if the queue depth of any existing device has 1885 * changed. 1886 */ 1887 list_for_each_entry(device, &ctrl_info->scsi_device_list, 1888 scsi_device_list_entry) { 1889 if (device->sdev && device->queue_depth != 1890 device->advertised_queue_depth) { 1891 device->advertised_queue_depth = device->queue_depth; 1892 scsi_change_queue_depth(device->sdev, 1893 device->advertised_queue_depth); 1894 } 1895 } 1896 1897 /* Expose any new devices. */ 1898 list_for_each_entry_safe(device, next, &add_list, add_list_entry) { 1899 if (!pqi_is_device_added(device)) { 1900 pqi_dev_info(ctrl_info, "added", device); 1901 rc = pqi_add_device(ctrl_info, device); 1902 if (rc) { 1903 dev_warn(&ctrl_info->pci_dev->dev, 1904 "scsi %d:%d:%d:%d addition failed, device not added\n", 1905 ctrl_info->scsi_host->host_no, 1906 device->bus, device->target, 1907 device->lun); 1908 pqi_fixup_botched_add(ctrl_info, device); 1909 } 1910 } 1911 } 1912 } 1913 1914 static bool pqi_is_supported_device(struct pqi_scsi_dev *device) 1915 { 1916 bool is_supported; 1917 1918 if (device->is_expander_smp_device) 1919 return true; 1920 1921 is_supported = false; 1922 1923 switch (device->devtype) { 1924 case TYPE_DISK: 1925 case TYPE_ZBC: 1926 case TYPE_TAPE: 1927 case TYPE_MEDIUM_CHANGER: 1928 case TYPE_ENCLOSURE: 1929 is_supported = true; 1930 break; 1931 case TYPE_RAID: 1932 /* 1933 * Only support the HBA controller itself as a RAID 1934 * controller. If it's a RAID controller other than 1935 * the HBA itself (an external RAID controller, for 1936 * example), we don't support it. 1937 */ 1938 if (pqi_is_hba_lunid(device->scsi3addr)) 1939 is_supported = true; 1940 break; 1941 } 1942 1943 return is_supported; 1944 } 1945 1946 static inline bool pqi_skip_device(u8 *scsi3addr) 1947 { 1948 /* Ignore all masked devices. */ 1949 if (MASKED_DEVICE(scsi3addr)) 1950 return true; 1951 1952 return false; 1953 } 1954 1955 static inline bool pqi_is_device_with_sas_address(struct pqi_scsi_dev *device) 1956 { 1957 if (!device->is_physical_device) 1958 return false; 1959 1960 if (device->is_expander_smp_device) 1961 return true; 1962 1963 switch (device->devtype) { 1964 case TYPE_DISK: 1965 case TYPE_ZBC: 1966 case TYPE_ENCLOSURE: 1967 return true; 1968 } 1969 1970 return false; 1971 } 1972 1973 static inline bool pqi_expose_device(struct pqi_scsi_dev *device) 1974 { 1975 return !device->is_physical_device || 1976 !pqi_skip_device(device->scsi3addr); 1977 } 1978 1979 static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info) 1980 { 1981 int i; 1982 int rc; 1983 LIST_HEAD(new_device_list_head); 1984 struct report_phys_lun_extended *physdev_list = NULL; 1985 struct report_log_lun_extended *logdev_list = NULL; 1986 struct report_phys_lun_extended_entry *phys_lun_ext_entry; 1987 struct report_log_lun_extended_entry *log_lun_ext_entry; 1988 struct bmic_identify_physical_device *id_phys = NULL; 1989 u32 num_physicals; 1990 u32 num_logicals; 1991 struct pqi_scsi_dev **new_device_list = NULL; 1992 struct pqi_scsi_dev *device; 1993 struct pqi_scsi_dev *next; 1994 unsigned int num_new_devices; 1995 unsigned int num_valid_devices; 1996 bool is_physical_device; 1997 u8 *scsi3addr; 1998 static char *out_of_memory_msg = 1999 "failed to allocate memory, device discovery stopped"; 2000 2001 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list); 2002 if (rc) 2003 goto out; 2004 2005 if (physdev_list) 2006 num_physicals = 2007 get_unaligned_be32(&physdev_list->header.list_length) 2008 / sizeof(physdev_list->lun_entries[0]); 2009 else 2010 num_physicals = 0; 2011 2012 if (logdev_list) 2013 num_logicals = 2014 get_unaligned_be32(&logdev_list->header.list_length) 2015 / sizeof(logdev_list->lun_entries[0]); 2016 else 2017 num_logicals = 0; 2018 2019 if (num_physicals) { 2020 /* 2021 * We need this buffer for calls to pqi_get_physical_disk_info() 2022 * below. We allocate it here instead of inside 2023 * pqi_get_physical_disk_info() because it's a fairly large 2024 * buffer. 2025 */ 2026 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL); 2027 if (!id_phys) { 2028 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2029 out_of_memory_msg); 2030 rc = -ENOMEM; 2031 goto out; 2032 } 2033 } 2034 2035 num_new_devices = num_physicals + num_logicals; 2036 2037 new_device_list = kmalloc_array(num_new_devices, 2038 sizeof(*new_device_list), 2039 GFP_KERNEL); 2040 if (!new_device_list) { 2041 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg); 2042 rc = -ENOMEM; 2043 goto out; 2044 } 2045 2046 for (i = 0; i < num_new_devices; i++) { 2047 device = kzalloc(sizeof(*device), GFP_KERNEL); 2048 if (!device) { 2049 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2050 out_of_memory_msg); 2051 rc = -ENOMEM; 2052 goto out; 2053 } 2054 list_add_tail(&device->new_device_list_entry, 2055 &new_device_list_head); 2056 } 2057 2058 device = NULL; 2059 num_valid_devices = 0; 2060 2061 for (i = 0; i < num_new_devices; i++) { 2062 2063 if (i < num_physicals) { 2064 is_physical_device = true; 2065 phys_lun_ext_entry = &physdev_list->lun_entries[i]; 2066 log_lun_ext_entry = NULL; 2067 scsi3addr = phys_lun_ext_entry->lunid; 2068 } else { 2069 is_physical_device = false; 2070 phys_lun_ext_entry = NULL; 2071 log_lun_ext_entry = 2072 &logdev_list->lun_entries[i - num_physicals]; 2073 scsi3addr = log_lun_ext_entry->lunid; 2074 } 2075 2076 if (is_physical_device && pqi_skip_device(scsi3addr)) 2077 continue; 2078 2079 if (device) 2080 device = list_next_entry(device, new_device_list_entry); 2081 else 2082 device = list_first_entry(&new_device_list_head, 2083 struct pqi_scsi_dev, new_device_list_entry); 2084 2085 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 2086 device->is_physical_device = is_physical_device; 2087 if (is_physical_device) { 2088 if (phys_lun_ext_entry->device_type == 2089 SA_EXPANDER_SMP_DEVICE) 2090 device->is_expander_smp_device = true; 2091 } else { 2092 device->is_external_raid_device = 2093 pqi_is_external_raid_addr(scsi3addr); 2094 } 2095 2096 /* Gather information about the device. */ 2097 rc = pqi_get_device_info(ctrl_info, device); 2098 if (rc == -ENOMEM) { 2099 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2100 out_of_memory_msg); 2101 goto out; 2102 } 2103 if (rc) { 2104 if (device->is_physical_device) 2105 dev_warn(&ctrl_info->pci_dev->dev, 2106 "obtaining device info failed, skipping physical device %016llx\n", 2107 get_unaligned_be64( 2108 &phys_lun_ext_entry->wwid)); 2109 else 2110 dev_warn(&ctrl_info->pci_dev->dev, 2111 "obtaining device info failed, skipping logical device %08x%08x\n", 2112 *((u32 *)&device->scsi3addr), 2113 *((u32 *)&device->scsi3addr[4])); 2114 rc = 0; 2115 continue; 2116 } 2117 2118 if (!pqi_is_supported_device(device)) 2119 continue; 2120 2121 pqi_assign_bus_target_lun(device); 2122 2123 if (device->is_physical_device) { 2124 device->wwid = phys_lun_ext_entry->wwid; 2125 if ((phys_lun_ext_entry->device_flags & 2126 REPORT_PHYS_LUN_DEV_FLAG_AIO_ENABLED) && 2127 phys_lun_ext_entry->aio_handle) { 2128 device->aio_enabled = true; 2129 device->aio_handle = 2130 phys_lun_ext_entry->aio_handle; 2131 } 2132 if (device->devtype == TYPE_DISK || 2133 device->devtype == TYPE_ZBC) { 2134 pqi_get_physical_disk_info(ctrl_info, 2135 device, id_phys); 2136 } 2137 } else { 2138 memcpy(device->volume_id, log_lun_ext_entry->volume_id, 2139 sizeof(device->volume_id)); 2140 } 2141 2142 if (pqi_is_device_with_sas_address(device)) 2143 device->sas_address = get_unaligned_be64(&device->wwid); 2144 2145 new_device_list[num_valid_devices++] = device; 2146 } 2147 2148 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices); 2149 2150 out: 2151 list_for_each_entry_safe(device, next, &new_device_list_head, 2152 new_device_list_entry) { 2153 if (device->keep_device) 2154 continue; 2155 list_del(&device->new_device_list_entry); 2156 pqi_free_device(device); 2157 } 2158 2159 kfree(new_device_list); 2160 kfree(physdev_list); 2161 kfree(logdev_list); 2162 kfree(id_phys); 2163 2164 return rc; 2165 } 2166 2167 static void pqi_remove_all_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2168 { 2169 unsigned long flags; 2170 struct pqi_scsi_dev *device; 2171 2172 while (1) { 2173 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2174 2175 device = list_first_entry_or_null(&ctrl_info->scsi_device_list, 2176 struct pqi_scsi_dev, scsi_device_list_entry); 2177 if (device) 2178 list_del(&device->scsi_device_list_entry); 2179 2180 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, 2181 flags); 2182 2183 if (!device) 2184 break; 2185 2186 if (pqi_is_device_added(device)) 2187 pqi_remove_device(ctrl_info, device); 2188 pqi_free_device(device); 2189 } 2190 } 2191 2192 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2193 { 2194 int rc; 2195 2196 if (pqi_ctrl_offline(ctrl_info)) 2197 return -ENXIO; 2198 2199 mutex_lock(&ctrl_info->scan_mutex); 2200 2201 rc = pqi_update_scsi_devices(ctrl_info); 2202 if (rc) 2203 pqi_schedule_rescan_worker_delayed(ctrl_info); 2204 2205 mutex_unlock(&ctrl_info->scan_mutex); 2206 2207 return rc; 2208 } 2209 2210 static void pqi_scan_start(struct Scsi_Host *shost) 2211 { 2212 struct pqi_ctrl_info *ctrl_info; 2213 2214 ctrl_info = shost_to_hba(shost); 2215 if (pqi_ctrl_in_ofa(ctrl_info)) 2216 return; 2217 2218 pqi_scan_scsi_devices(ctrl_info); 2219 } 2220 2221 /* Returns TRUE if scan is finished. */ 2222 2223 static int pqi_scan_finished(struct Scsi_Host *shost, 2224 unsigned long elapsed_time) 2225 { 2226 struct pqi_ctrl_info *ctrl_info; 2227 2228 ctrl_info = shost_priv(shost); 2229 2230 return !mutex_is_locked(&ctrl_info->scan_mutex); 2231 } 2232 2233 static void pqi_wait_until_scan_finished(struct pqi_ctrl_info *ctrl_info) 2234 { 2235 mutex_lock(&ctrl_info->scan_mutex); 2236 mutex_unlock(&ctrl_info->scan_mutex); 2237 } 2238 2239 static void pqi_wait_until_lun_reset_finished(struct pqi_ctrl_info *ctrl_info) 2240 { 2241 mutex_lock(&ctrl_info->lun_reset_mutex); 2242 mutex_unlock(&ctrl_info->lun_reset_mutex); 2243 } 2244 2245 static void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info) 2246 { 2247 mutex_lock(&ctrl_info->ofa_mutex); 2248 mutex_unlock(&ctrl_info->ofa_mutex); 2249 } 2250 2251 static inline void pqi_set_encryption_info( 2252 struct pqi_encryption_info *encryption_info, struct raid_map *raid_map, 2253 u64 first_block) 2254 { 2255 u32 volume_blk_size; 2256 2257 /* 2258 * Set the encryption tweak values based on logical block address. 2259 * If the block size is 512, the tweak value is equal to the LBA. 2260 * For other block sizes, tweak value is (LBA * block size) / 512. 2261 */ 2262 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size); 2263 if (volume_blk_size != 512) 2264 first_block = (first_block * volume_blk_size) / 512; 2265 2266 encryption_info->data_encryption_key_index = 2267 get_unaligned_le16(&raid_map->data_encryption_key_index); 2268 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block); 2269 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block); 2270 } 2271 2272 /* 2273 * Attempt to perform RAID bypass mapping for a logical volume I/O. 2274 */ 2275 2276 #define PQI_RAID_BYPASS_INELIGIBLE 1 2277 2278 static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 2279 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 2280 struct pqi_queue_group *queue_group) 2281 { 2282 struct raid_map *raid_map; 2283 bool is_write = false; 2284 u32 map_index; 2285 u64 first_block; 2286 u64 last_block; 2287 u32 block_cnt; 2288 u32 blocks_per_row; 2289 u64 first_row; 2290 u64 last_row; 2291 u32 first_row_offset; 2292 u32 last_row_offset; 2293 u32 first_column; 2294 u32 last_column; 2295 u64 r0_first_row; 2296 u64 r0_last_row; 2297 u32 r5or6_blocks_per_row; 2298 u64 r5or6_first_row; 2299 u64 r5or6_last_row; 2300 u32 r5or6_first_row_offset; 2301 u32 r5or6_last_row_offset; 2302 u32 r5or6_first_column; 2303 u32 r5or6_last_column; 2304 u16 data_disks_per_row; 2305 u32 total_disks_per_row; 2306 u16 layout_map_count; 2307 u32 stripesize; 2308 u16 strip_size; 2309 u32 first_group; 2310 u32 last_group; 2311 u32 current_group; 2312 u32 map_row; 2313 u32 aio_handle; 2314 u64 disk_block; 2315 u32 disk_block_cnt; 2316 u8 cdb[16]; 2317 u8 cdb_length; 2318 int offload_to_mirror; 2319 struct pqi_encryption_info *encryption_info_ptr; 2320 struct pqi_encryption_info encryption_info; 2321 #if BITS_PER_LONG == 32 2322 u64 tmpdiv; 2323 #endif 2324 2325 /* Check for valid opcode, get LBA and block count. */ 2326 switch (scmd->cmnd[0]) { 2327 case WRITE_6: 2328 is_write = true; 2329 /* fall through */ 2330 case READ_6: 2331 first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) | 2332 (scmd->cmnd[2] << 8) | scmd->cmnd[3]); 2333 block_cnt = (u32)scmd->cmnd[4]; 2334 if (block_cnt == 0) 2335 block_cnt = 256; 2336 break; 2337 case WRITE_10: 2338 is_write = true; 2339 /* fall through */ 2340 case READ_10: 2341 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2342 block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]); 2343 break; 2344 case WRITE_12: 2345 is_write = true; 2346 /* fall through */ 2347 case READ_12: 2348 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2349 block_cnt = get_unaligned_be32(&scmd->cmnd[6]); 2350 break; 2351 case WRITE_16: 2352 is_write = true; 2353 /* fall through */ 2354 case READ_16: 2355 first_block = get_unaligned_be64(&scmd->cmnd[2]); 2356 block_cnt = get_unaligned_be32(&scmd->cmnd[10]); 2357 break; 2358 default: 2359 /* Process via normal I/O path. */ 2360 return PQI_RAID_BYPASS_INELIGIBLE; 2361 } 2362 2363 /* Check for write to non-RAID-0. */ 2364 if (is_write && device->raid_level != SA_RAID_0) 2365 return PQI_RAID_BYPASS_INELIGIBLE; 2366 2367 if (unlikely(block_cnt == 0)) 2368 return PQI_RAID_BYPASS_INELIGIBLE; 2369 2370 last_block = first_block + block_cnt - 1; 2371 raid_map = device->raid_map; 2372 2373 /* Check for invalid block or wraparound. */ 2374 if (last_block >= get_unaligned_le64(&raid_map->volume_blk_cnt) || 2375 last_block < first_block) 2376 return PQI_RAID_BYPASS_INELIGIBLE; 2377 2378 data_disks_per_row = get_unaligned_le16(&raid_map->data_disks_per_row); 2379 strip_size = get_unaligned_le16(&raid_map->strip_size); 2380 layout_map_count = get_unaligned_le16(&raid_map->layout_map_count); 2381 2382 /* Calculate stripe information for the request. */ 2383 blocks_per_row = data_disks_per_row * strip_size; 2384 #if BITS_PER_LONG == 32 2385 tmpdiv = first_block; 2386 do_div(tmpdiv, blocks_per_row); 2387 first_row = tmpdiv; 2388 tmpdiv = last_block; 2389 do_div(tmpdiv, blocks_per_row); 2390 last_row = tmpdiv; 2391 first_row_offset = (u32)(first_block - (first_row * blocks_per_row)); 2392 last_row_offset = (u32)(last_block - (last_row * blocks_per_row)); 2393 tmpdiv = first_row_offset; 2394 do_div(tmpdiv, strip_size); 2395 first_column = tmpdiv; 2396 tmpdiv = last_row_offset; 2397 do_div(tmpdiv, strip_size); 2398 last_column = tmpdiv; 2399 #else 2400 first_row = first_block / blocks_per_row; 2401 last_row = last_block / blocks_per_row; 2402 first_row_offset = (u32)(first_block - (first_row * blocks_per_row)); 2403 last_row_offset = (u32)(last_block - (last_row * blocks_per_row)); 2404 first_column = first_row_offset / strip_size; 2405 last_column = last_row_offset / strip_size; 2406 #endif 2407 2408 /* If this isn't a single row/column then give to the controller. */ 2409 if (first_row != last_row || first_column != last_column) 2410 return PQI_RAID_BYPASS_INELIGIBLE; 2411 2412 /* Proceeding with driver mapping. */ 2413 total_disks_per_row = data_disks_per_row + 2414 get_unaligned_le16(&raid_map->metadata_disks_per_row); 2415 map_row = ((u32)(first_row >> raid_map->parity_rotation_shift)) % 2416 get_unaligned_le16(&raid_map->row_cnt); 2417 map_index = (map_row * total_disks_per_row) + first_column; 2418 2419 /* RAID 1 */ 2420 if (device->raid_level == SA_RAID_1) { 2421 if (device->offload_to_mirror) 2422 map_index += data_disks_per_row; 2423 device->offload_to_mirror = !device->offload_to_mirror; 2424 } else if (device->raid_level == SA_RAID_ADM) { 2425 /* RAID ADM */ 2426 /* 2427 * Handles N-way mirrors (R1-ADM) and R10 with # of drives 2428 * divisible by 3. 2429 */ 2430 offload_to_mirror = device->offload_to_mirror; 2431 if (offload_to_mirror == 0) { 2432 /* use physical disk in the first mirrored group. */ 2433 map_index %= data_disks_per_row; 2434 } else { 2435 do { 2436 /* 2437 * Determine mirror group that map_index 2438 * indicates. 2439 */ 2440 current_group = map_index / data_disks_per_row; 2441 2442 if (offload_to_mirror != current_group) { 2443 if (current_group < 2444 layout_map_count - 1) { 2445 /* 2446 * Select raid index from 2447 * next group. 2448 */ 2449 map_index += data_disks_per_row; 2450 current_group++; 2451 } else { 2452 /* 2453 * Select raid index from first 2454 * group. 2455 */ 2456 map_index %= data_disks_per_row; 2457 current_group = 0; 2458 } 2459 } 2460 } while (offload_to_mirror != current_group); 2461 } 2462 2463 /* Set mirror group to use next time. */ 2464 offload_to_mirror = 2465 (offload_to_mirror >= layout_map_count - 1) ? 2466 0 : offload_to_mirror + 1; 2467 WARN_ON(offload_to_mirror >= layout_map_count); 2468 device->offload_to_mirror = offload_to_mirror; 2469 /* 2470 * Avoid direct use of device->offload_to_mirror within this 2471 * function since multiple threads might simultaneously 2472 * increment it beyond the range of device->layout_map_count -1. 2473 */ 2474 } else if ((device->raid_level == SA_RAID_5 || 2475 device->raid_level == SA_RAID_6) && layout_map_count > 1) { 2476 /* RAID 50/60 */ 2477 /* Verify first and last block are in same RAID group */ 2478 r5or6_blocks_per_row = strip_size * data_disks_per_row; 2479 stripesize = r5or6_blocks_per_row * layout_map_count; 2480 #if BITS_PER_LONG == 32 2481 tmpdiv = first_block; 2482 first_group = do_div(tmpdiv, stripesize); 2483 tmpdiv = first_group; 2484 do_div(tmpdiv, r5or6_blocks_per_row); 2485 first_group = tmpdiv; 2486 tmpdiv = last_block; 2487 last_group = do_div(tmpdiv, stripesize); 2488 tmpdiv = last_group; 2489 do_div(tmpdiv, r5or6_blocks_per_row); 2490 last_group = tmpdiv; 2491 #else 2492 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 2493 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 2494 #endif 2495 if (first_group != last_group) 2496 return PQI_RAID_BYPASS_INELIGIBLE; 2497 2498 /* Verify request is in a single row of RAID 5/6 */ 2499 #if BITS_PER_LONG == 32 2500 tmpdiv = first_block; 2501 do_div(tmpdiv, stripesize); 2502 first_row = r5or6_first_row = r0_first_row = tmpdiv; 2503 tmpdiv = last_block; 2504 do_div(tmpdiv, stripesize); 2505 r5or6_last_row = r0_last_row = tmpdiv; 2506 #else 2507 first_row = r5or6_first_row = r0_first_row = 2508 first_block / stripesize; 2509 r5or6_last_row = r0_last_row = last_block / stripesize; 2510 #endif 2511 if (r5or6_first_row != r5or6_last_row) 2512 return PQI_RAID_BYPASS_INELIGIBLE; 2513 2514 /* Verify request is in a single column */ 2515 #if BITS_PER_LONG == 32 2516 tmpdiv = first_block; 2517 first_row_offset = do_div(tmpdiv, stripesize); 2518 tmpdiv = first_row_offset; 2519 first_row_offset = (u32)do_div(tmpdiv, r5or6_blocks_per_row); 2520 r5or6_first_row_offset = first_row_offset; 2521 tmpdiv = last_block; 2522 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 2523 tmpdiv = r5or6_last_row_offset; 2524 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 2525 tmpdiv = r5or6_first_row_offset; 2526 do_div(tmpdiv, strip_size); 2527 first_column = r5or6_first_column = tmpdiv; 2528 tmpdiv = r5or6_last_row_offset; 2529 do_div(tmpdiv, strip_size); 2530 r5or6_last_column = tmpdiv; 2531 #else 2532 first_row_offset = r5or6_first_row_offset = 2533 (u32)((first_block % stripesize) % 2534 r5or6_blocks_per_row); 2535 2536 r5or6_last_row_offset = 2537 (u32)((last_block % stripesize) % 2538 r5or6_blocks_per_row); 2539 2540 first_column = r5or6_first_row_offset / strip_size; 2541 r5or6_first_column = first_column; 2542 r5or6_last_column = r5or6_last_row_offset / strip_size; 2543 #endif 2544 if (r5or6_first_column != r5or6_last_column) 2545 return PQI_RAID_BYPASS_INELIGIBLE; 2546 2547 /* Request is eligible */ 2548 map_row = 2549 ((u32)(first_row >> raid_map->parity_rotation_shift)) % 2550 get_unaligned_le16(&raid_map->row_cnt); 2551 2552 map_index = (first_group * 2553 (get_unaligned_le16(&raid_map->row_cnt) * 2554 total_disks_per_row)) + 2555 (map_row * total_disks_per_row) + first_column; 2556 } 2557 2558 aio_handle = raid_map->disk_data[map_index].aio_handle; 2559 disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) + 2560 first_row * strip_size + 2561 (first_row_offset - first_column * strip_size); 2562 disk_block_cnt = block_cnt; 2563 2564 /* Handle differing logical/physical block sizes. */ 2565 if (raid_map->phys_blk_shift) { 2566 disk_block <<= raid_map->phys_blk_shift; 2567 disk_block_cnt <<= raid_map->phys_blk_shift; 2568 } 2569 2570 if (unlikely(disk_block_cnt > 0xffff)) 2571 return PQI_RAID_BYPASS_INELIGIBLE; 2572 2573 /* Build the new CDB for the physical disk I/O. */ 2574 if (disk_block > 0xffffffff) { 2575 cdb[0] = is_write ? WRITE_16 : READ_16; 2576 cdb[1] = 0; 2577 put_unaligned_be64(disk_block, &cdb[2]); 2578 put_unaligned_be32(disk_block_cnt, &cdb[10]); 2579 cdb[14] = 0; 2580 cdb[15] = 0; 2581 cdb_length = 16; 2582 } else { 2583 cdb[0] = is_write ? WRITE_10 : READ_10; 2584 cdb[1] = 0; 2585 put_unaligned_be32((u32)disk_block, &cdb[2]); 2586 cdb[6] = 0; 2587 put_unaligned_be16((u16)disk_block_cnt, &cdb[7]); 2588 cdb[9] = 0; 2589 cdb_length = 10; 2590 } 2591 2592 if (get_unaligned_le16(&raid_map->flags) & 2593 RAID_MAP_ENCRYPTION_ENABLED) { 2594 pqi_set_encryption_info(&encryption_info, raid_map, 2595 first_block); 2596 encryption_info_ptr = &encryption_info; 2597 } else { 2598 encryption_info_ptr = NULL; 2599 } 2600 2601 return pqi_aio_submit_io(ctrl_info, scmd, aio_handle, 2602 cdb, cdb_length, queue_group, encryption_info_ptr, true); 2603 } 2604 2605 #define PQI_STATUS_IDLE 0x0 2606 2607 #define PQI_CREATE_ADMIN_QUEUE_PAIR 1 2608 #define PQI_DELETE_ADMIN_QUEUE_PAIR 2 2609 2610 #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0 2611 #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1 2612 #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2 2613 #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3 2614 #define PQI_DEVICE_STATE_ERROR 0x4 2615 2616 #define PQI_MODE_READY_TIMEOUT_SECS 30 2617 #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1 2618 2619 static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info) 2620 { 2621 struct pqi_device_registers __iomem *pqi_registers; 2622 unsigned long timeout; 2623 u64 signature; 2624 u8 status; 2625 2626 pqi_registers = ctrl_info->pqi_registers; 2627 timeout = (PQI_MODE_READY_TIMEOUT_SECS * PQI_HZ) + jiffies; 2628 2629 while (1) { 2630 signature = readq(&pqi_registers->signature); 2631 if (memcmp(&signature, PQI_DEVICE_SIGNATURE, 2632 sizeof(signature)) == 0) 2633 break; 2634 if (time_after(jiffies, timeout)) { 2635 dev_err(&ctrl_info->pci_dev->dev, 2636 "timed out waiting for PQI signature\n"); 2637 return -ETIMEDOUT; 2638 } 2639 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 2640 } 2641 2642 while (1) { 2643 status = readb(&pqi_registers->function_and_status_code); 2644 if (status == PQI_STATUS_IDLE) 2645 break; 2646 if (time_after(jiffies, timeout)) { 2647 dev_err(&ctrl_info->pci_dev->dev, 2648 "timed out waiting for PQI IDLE\n"); 2649 return -ETIMEDOUT; 2650 } 2651 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 2652 } 2653 2654 while (1) { 2655 if (readl(&pqi_registers->device_status) == 2656 PQI_DEVICE_STATE_ALL_REGISTERS_READY) 2657 break; 2658 if (time_after(jiffies, timeout)) { 2659 dev_err(&ctrl_info->pci_dev->dev, 2660 "timed out waiting for PQI all registers ready\n"); 2661 return -ETIMEDOUT; 2662 } 2663 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 2664 } 2665 2666 return 0; 2667 } 2668 2669 static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request) 2670 { 2671 struct pqi_scsi_dev *device; 2672 2673 device = io_request->scmd->device->hostdata; 2674 device->raid_bypass_enabled = false; 2675 device->aio_enabled = false; 2676 } 2677 2678 static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path) 2679 { 2680 struct pqi_ctrl_info *ctrl_info; 2681 struct pqi_scsi_dev *device; 2682 2683 device = sdev->hostdata; 2684 if (device->device_offline) 2685 return; 2686 2687 device->device_offline = true; 2688 ctrl_info = shost_to_hba(sdev->host); 2689 pqi_schedule_rescan_worker(ctrl_info); 2690 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n", 2691 path, ctrl_info->scsi_host->host_no, device->bus, 2692 device->target, device->lun); 2693 } 2694 2695 static void pqi_process_raid_io_error(struct pqi_io_request *io_request) 2696 { 2697 u8 scsi_status; 2698 u8 host_byte; 2699 struct scsi_cmnd *scmd; 2700 struct pqi_raid_error_info *error_info; 2701 size_t sense_data_length; 2702 int residual_count; 2703 int xfer_count; 2704 struct scsi_sense_hdr sshdr; 2705 2706 scmd = io_request->scmd; 2707 if (!scmd) 2708 return; 2709 2710 error_info = io_request->error_info; 2711 scsi_status = error_info->status; 2712 host_byte = DID_OK; 2713 2714 switch (error_info->data_out_result) { 2715 case PQI_DATA_IN_OUT_GOOD: 2716 break; 2717 case PQI_DATA_IN_OUT_UNDERFLOW: 2718 xfer_count = 2719 get_unaligned_le32(&error_info->data_out_transferred); 2720 residual_count = scsi_bufflen(scmd) - xfer_count; 2721 scsi_set_resid(scmd, residual_count); 2722 if (xfer_count < scmd->underflow) 2723 host_byte = DID_SOFT_ERROR; 2724 break; 2725 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 2726 case PQI_DATA_IN_OUT_ABORTED: 2727 host_byte = DID_ABORT; 2728 break; 2729 case PQI_DATA_IN_OUT_TIMEOUT: 2730 host_byte = DID_TIME_OUT; 2731 break; 2732 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 2733 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 2734 case PQI_DATA_IN_OUT_BUFFER_ERROR: 2735 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 2736 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 2737 case PQI_DATA_IN_OUT_ERROR: 2738 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 2739 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 2740 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 2741 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 2742 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 2743 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 2744 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 2745 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 2746 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 2747 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 2748 default: 2749 host_byte = DID_ERROR; 2750 break; 2751 } 2752 2753 sense_data_length = get_unaligned_le16(&error_info->sense_data_length); 2754 if (sense_data_length == 0) 2755 sense_data_length = 2756 get_unaligned_le16(&error_info->response_data_length); 2757 if (sense_data_length) { 2758 if (sense_data_length > sizeof(error_info->data)) 2759 sense_data_length = sizeof(error_info->data); 2760 2761 if (scsi_status == SAM_STAT_CHECK_CONDITION && 2762 scsi_normalize_sense(error_info->data, 2763 sense_data_length, &sshdr) && 2764 sshdr.sense_key == HARDWARE_ERROR && 2765 sshdr.asc == 0x3e && 2766 sshdr.ascq == 0x1) { 2767 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host); 2768 struct pqi_scsi_dev *device = scmd->device->hostdata; 2769 2770 if (printk_ratelimit()) 2771 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n", 2772 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 2773 pqi_take_device_offline(scmd->device, "RAID"); 2774 host_byte = DID_NO_CONNECT; 2775 } 2776 2777 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 2778 sense_data_length = SCSI_SENSE_BUFFERSIZE; 2779 memcpy(scmd->sense_buffer, error_info->data, 2780 sense_data_length); 2781 } 2782 2783 scmd->result = scsi_status; 2784 set_host_byte(scmd, host_byte); 2785 } 2786 2787 static void pqi_process_aio_io_error(struct pqi_io_request *io_request) 2788 { 2789 u8 scsi_status; 2790 u8 host_byte; 2791 struct scsi_cmnd *scmd; 2792 struct pqi_aio_error_info *error_info; 2793 size_t sense_data_length; 2794 int residual_count; 2795 int xfer_count; 2796 bool device_offline; 2797 2798 scmd = io_request->scmd; 2799 error_info = io_request->error_info; 2800 host_byte = DID_OK; 2801 sense_data_length = 0; 2802 device_offline = false; 2803 2804 switch (error_info->service_response) { 2805 case PQI_AIO_SERV_RESPONSE_COMPLETE: 2806 scsi_status = error_info->status; 2807 break; 2808 case PQI_AIO_SERV_RESPONSE_FAILURE: 2809 switch (error_info->status) { 2810 case PQI_AIO_STATUS_IO_ABORTED: 2811 scsi_status = SAM_STAT_TASK_ABORTED; 2812 break; 2813 case PQI_AIO_STATUS_UNDERRUN: 2814 scsi_status = SAM_STAT_GOOD; 2815 residual_count = get_unaligned_le32( 2816 &error_info->residual_count); 2817 scsi_set_resid(scmd, residual_count); 2818 xfer_count = scsi_bufflen(scmd) - residual_count; 2819 if (xfer_count < scmd->underflow) 2820 host_byte = DID_SOFT_ERROR; 2821 break; 2822 case PQI_AIO_STATUS_OVERRUN: 2823 scsi_status = SAM_STAT_GOOD; 2824 break; 2825 case PQI_AIO_STATUS_AIO_PATH_DISABLED: 2826 pqi_aio_path_disabled(io_request); 2827 scsi_status = SAM_STAT_GOOD; 2828 io_request->status = -EAGAIN; 2829 break; 2830 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE: 2831 case PQI_AIO_STATUS_INVALID_DEVICE: 2832 if (!io_request->raid_bypass) { 2833 device_offline = true; 2834 pqi_take_device_offline(scmd->device, "AIO"); 2835 host_byte = DID_NO_CONNECT; 2836 } 2837 scsi_status = SAM_STAT_CHECK_CONDITION; 2838 break; 2839 case PQI_AIO_STATUS_IO_ERROR: 2840 default: 2841 scsi_status = SAM_STAT_CHECK_CONDITION; 2842 break; 2843 } 2844 break; 2845 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE: 2846 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED: 2847 scsi_status = SAM_STAT_GOOD; 2848 break; 2849 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED: 2850 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN: 2851 default: 2852 scsi_status = SAM_STAT_CHECK_CONDITION; 2853 break; 2854 } 2855 2856 if (error_info->data_present) { 2857 sense_data_length = 2858 get_unaligned_le16(&error_info->data_length); 2859 if (sense_data_length) { 2860 if (sense_data_length > sizeof(error_info->data)) 2861 sense_data_length = sizeof(error_info->data); 2862 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 2863 sense_data_length = SCSI_SENSE_BUFFERSIZE; 2864 memcpy(scmd->sense_buffer, error_info->data, 2865 sense_data_length); 2866 } 2867 } 2868 2869 if (device_offline && sense_data_length == 0) 2870 scsi_build_sense_buffer(0, scmd->sense_buffer, HARDWARE_ERROR, 2871 0x3e, 0x1); 2872 2873 scmd->result = scsi_status; 2874 set_host_byte(scmd, host_byte); 2875 } 2876 2877 static void pqi_process_io_error(unsigned int iu_type, 2878 struct pqi_io_request *io_request) 2879 { 2880 switch (iu_type) { 2881 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 2882 pqi_process_raid_io_error(io_request); 2883 break; 2884 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 2885 pqi_process_aio_io_error(io_request); 2886 break; 2887 } 2888 } 2889 2890 static int pqi_interpret_task_management_response( 2891 struct pqi_task_management_response *response) 2892 { 2893 int rc; 2894 2895 switch (response->response_code) { 2896 case SOP_TMF_COMPLETE: 2897 case SOP_TMF_FUNCTION_SUCCEEDED: 2898 rc = 0; 2899 break; 2900 case SOP_TMF_REJECTED: 2901 rc = -EAGAIN; 2902 break; 2903 default: 2904 rc = -EIO; 2905 break; 2906 } 2907 2908 return rc; 2909 } 2910 2911 static unsigned int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, 2912 struct pqi_queue_group *queue_group) 2913 { 2914 unsigned int num_responses; 2915 pqi_index_t oq_pi; 2916 pqi_index_t oq_ci; 2917 struct pqi_io_request *io_request; 2918 struct pqi_io_response *response; 2919 u16 request_id; 2920 2921 num_responses = 0; 2922 oq_ci = queue_group->oq_ci_copy; 2923 2924 while (1) { 2925 oq_pi = readl(queue_group->oq_pi); 2926 if (oq_pi == oq_ci) 2927 break; 2928 2929 num_responses++; 2930 response = queue_group->oq_element_array + 2931 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 2932 2933 request_id = get_unaligned_le16(&response->request_id); 2934 WARN_ON(request_id >= ctrl_info->max_io_slots); 2935 2936 io_request = &ctrl_info->io_request_pool[request_id]; 2937 WARN_ON(atomic_read(&io_request->refcount) == 0); 2938 2939 switch (response->header.iu_type) { 2940 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS: 2941 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS: 2942 if (io_request->scmd) 2943 io_request->scmd->result = 0; 2944 /* fall through */ 2945 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT: 2946 break; 2947 case PQI_RESPONSE_IU_VENDOR_GENERAL: 2948 io_request->status = 2949 get_unaligned_le16( 2950 &((struct pqi_vendor_general_response *) 2951 response)->status); 2952 break; 2953 case PQI_RESPONSE_IU_TASK_MANAGEMENT: 2954 io_request->status = 2955 pqi_interpret_task_management_response( 2956 (void *)response); 2957 break; 2958 case PQI_RESPONSE_IU_AIO_PATH_DISABLED: 2959 pqi_aio_path_disabled(io_request); 2960 io_request->status = -EAGAIN; 2961 break; 2962 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 2963 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 2964 io_request->error_info = ctrl_info->error_buffer + 2965 (get_unaligned_le16(&response->error_index) * 2966 PQI_ERROR_BUFFER_ELEMENT_LENGTH); 2967 pqi_process_io_error(response->header.iu_type, 2968 io_request); 2969 break; 2970 default: 2971 dev_err(&ctrl_info->pci_dev->dev, 2972 "unexpected IU type: 0x%x\n", 2973 response->header.iu_type); 2974 break; 2975 } 2976 2977 io_request->io_complete_callback(io_request, 2978 io_request->context); 2979 2980 /* 2981 * Note that the I/O request structure CANNOT BE TOUCHED after 2982 * returning from the I/O completion callback! 2983 */ 2984 2985 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq; 2986 } 2987 2988 if (num_responses) { 2989 queue_group->oq_ci_copy = oq_ci; 2990 writel(oq_ci, queue_group->oq_ci); 2991 } 2992 2993 return num_responses; 2994 } 2995 2996 static inline unsigned int pqi_num_elements_free(unsigned int pi, 2997 unsigned int ci, unsigned int elements_in_queue) 2998 { 2999 unsigned int num_elements_used; 3000 3001 if (pi >= ci) 3002 num_elements_used = pi - ci; 3003 else 3004 num_elements_used = elements_in_queue - ci + pi; 3005 3006 return elements_in_queue - num_elements_used - 1; 3007 } 3008 3009 static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info, 3010 struct pqi_event_acknowledge_request *iu, size_t iu_length) 3011 { 3012 pqi_index_t iq_pi; 3013 pqi_index_t iq_ci; 3014 unsigned long flags; 3015 void *next_element; 3016 struct pqi_queue_group *queue_group; 3017 3018 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP]; 3019 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id); 3020 3021 while (1) { 3022 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags); 3023 3024 iq_pi = queue_group->iq_pi_copy[RAID_PATH]; 3025 iq_ci = readl(queue_group->iq_ci[RAID_PATH]); 3026 3027 if (pqi_num_elements_free(iq_pi, iq_ci, 3028 ctrl_info->num_elements_per_iq)) 3029 break; 3030 3031 spin_unlock_irqrestore( 3032 &queue_group->submit_lock[RAID_PATH], flags); 3033 3034 if (pqi_ctrl_offline(ctrl_info)) 3035 return; 3036 } 3037 3038 next_element = queue_group->iq_element_array[RAID_PATH] + 3039 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3040 3041 memcpy(next_element, iu, iu_length); 3042 3043 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq; 3044 queue_group->iq_pi_copy[RAID_PATH] = iq_pi; 3045 3046 /* 3047 * This write notifies the controller that an IU is available to be 3048 * processed. 3049 */ 3050 writel(iq_pi, queue_group->iq_pi[RAID_PATH]); 3051 3052 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags); 3053 } 3054 3055 static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info, 3056 struct pqi_event *event) 3057 { 3058 struct pqi_event_acknowledge_request request; 3059 3060 memset(&request, 0, sizeof(request)); 3061 3062 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT; 3063 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 3064 &request.header.iu_length); 3065 request.event_type = event->event_type; 3066 request.event_id = event->event_id; 3067 request.additional_event_id = event->additional_event_id; 3068 3069 pqi_send_event_ack(ctrl_info, &request, sizeof(request)); 3070 } 3071 3072 #define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30 3073 #define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1 3074 3075 static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status( 3076 struct pqi_ctrl_info *ctrl_info) 3077 { 3078 unsigned long timeout; 3079 u8 status; 3080 3081 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * PQI_HZ) + jiffies; 3082 3083 while (1) { 3084 status = pqi_read_soft_reset_status(ctrl_info); 3085 if (status & PQI_SOFT_RESET_INITIATE) 3086 return RESET_INITIATE_DRIVER; 3087 3088 if (status & PQI_SOFT_RESET_ABORT) 3089 return RESET_ABORT; 3090 3091 if (time_after(jiffies, timeout)) { 3092 dev_err(&ctrl_info->pci_dev->dev, 3093 "timed out waiting for soft reset status\n"); 3094 return RESET_TIMEDOUT; 3095 } 3096 3097 if (!sis_is_firmware_running(ctrl_info)) 3098 return RESET_NORESPONSE; 3099 3100 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS); 3101 } 3102 } 3103 3104 static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info, 3105 enum pqi_soft_reset_status reset_status) 3106 { 3107 int rc; 3108 3109 switch (reset_status) { 3110 case RESET_INITIATE_DRIVER: 3111 /* fall through */ 3112 case RESET_TIMEDOUT: 3113 dev_info(&ctrl_info->pci_dev->dev, 3114 "resetting controller %u\n", ctrl_info->ctrl_id); 3115 sis_soft_reset(ctrl_info); 3116 /* fall through */ 3117 case RESET_INITIATE_FIRMWARE: 3118 rc = pqi_ofa_ctrl_restart(ctrl_info); 3119 pqi_ofa_free_host_buffer(ctrl_info); 3120 dev_info(&ctrl_info->pci_dev->dev, 3121 "Online Firmware Activation for controller %u: %s\n", 3122 ctrl_info->ctrl_id, rc == 0 ? "SUCCESS" : "FAILED"); 3123 break; 3124 case RESET_ABORT: 3125 pqi_ofa_ctrl_unquiesce(ctrl_info); 3126 dev_info(&ctrl_info->pci_dev->dev, 3127 "Online Firmware Activation for controller %u: %s\n", 3128 ctrl_info->ctrl_id, "ABORTED"); 3129 break; 3130 case RESET_NORESPONSE: 3131 pqi_ofa_free_host_buffer(ctrl_info); 3132 pqi_take_ctrl_offline(ctrl_info); 3133 break; 3134 } 3135 } 3136 3137 static void pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info, 3138 struct pqi_event *event) 3139 { 3140 u16 event_id; 3141 enum pqi_soft_reset_status status; 3142 3143 event_id = get_unaligned_le16(&event->event_id); 3144 3145 mutex_lock(&ctrl_info->ofa_mutex); 3146 3147 if (event_id == PQI_EVENT_OFA_QUIESCE) { 3148 dev_info(&ctrl_info->pci_dev->dev, 3149 "Received Online Firmware Activation quiesce event for controller %u\n", 3150 ctrl_info->ctrl_id); 3151 pqi_ofa_ctrl_quiesce(ctrl_info); 3152 pqi_acknowledge_event(ctrl_info, event); 3153 if (ctrl_info->soft_reset_handshake_supported) { 3154 status = pqi_poll_for_soft_reset_status(ctrl_info); 3155 pqi_process_soft_reset(ctrl_info, status); 3156 } else { 3157 pqi_process_soft_reset(ctrl_info, 3158 RESET_INITIATE_FIRMWARE); 3159 } 3160 3161 } else if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) { 3162 pqi_acknowledge_event(ctrl_info, event); 3163 pqi_ofa_setup_host_buffer(ctrl_info, 3164 le32_to_cpu(event->ofa_bytes_requested)); 3165 pqi_ofa_host_memory_update(ctrl_info); 3166 } else if (event_id == PQI_EVENT_OFA_CANCELLED) { 3167 pqi_ofa_free_host_buffer(ctrl_info); 3168 pqi_acknowledge_event(ctrl_info, event); 3169 dev_info(&ctrl_info->pci_dev->dev, 3170 "Online Firmware Activation(%u) cancel reason : %u\n", 3171 ctrl_info->ctrl_id, event->ofa_cancel_reason); 3172 } 3173 3174 mutex_unlock(&ctrl_info->ofa_mutex); 3175 } 3176 3177 static void pqi_event_worker(struct work_struct *work) 3178 { 3179 unsigned int i; 3180 struct pqi_ctrl_info *ctrl_info; 3181 struct pqi_event *event; 3182 3183 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work); 3184 3185 pqi_ctrl_busy(ctrl_info); 3186 pqi_wait_if_ctrl_blocked(ctrl_info, NO_TIMEOUT); 3187 if (pqi_ctrl_offline(ctrl_info)) 3188 goto out; 3189 3190 pqi_schedule_rescan_worker_delayed(ctrl_info); 3191 3192 event = ctrl_info->events; 3193 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) { 3194 if (event->pending) { 3195 event->pending = false; 3196 if (event->event_type == PQI_EVENT_TYPE_OFA) { 3197 pqi_ctrl_unbusy(ctrl_info); 3198 pqi_ofa_process_event(ctrl_info, event); 3199 return; 3200 } 3201 pqi_acknowledge_event(ctrl_info, event); 3202 } 3203 event++; 3204 } 3205 3206 out: 3207 pqi_ctrl_unbusy(ctrl_info); 3208 } 3209 3210 #define PQI_HEARTBEAT_TIMER_INTERVAL (10 * PQI_HZ) 3211 3212 static void pqi_heartbeat_timer_handler(struct timer_list *t) 3213 { 3214 int num_interrupts; 3215 u32 heartbeat_count; 3216 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t, 3217 heartbeat_timer); 3218 3219 pqi_check_ctrl_health(ctrl_info); 3220 if (pqi_ctrl_offline(ctrl_info)) 3221 return; 3222 3223 num_interrupts = atomic_read(&ctrl_info->num_interrupts); 3224 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info); 3225 3226 if (num_interrupts == ctrl_info->previous_num_interrupts) { 3227 if (heartbeat_count == ctrl_info->previous_heartbeat_count) { 3228 dev_err(&ctrl_info->pci_dev->dev, 3229 "no heartbeat detected - last heartbeat count: %u\n", 3230 heartbeat_count); 3231 pqi_take_ctrl_offline(ctrl_info); 3232 return; 3233 } 3234 } else { 3235 ctrl_info->previous_num_interrupts = num_interrupts; 3236 } 3237 3238 ctrl_info->previous_heartbeat_count = heartbeat_count; 3239 mod_timer(&ctrl_info->heartbeat_timer, 3240 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL); 3241 } 3242 3243 static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3244 { 3245 if (!ctrl_info->heartbeat_counter) 3246 return; 3247 3248 ctrl_info->previous_num_interrupts = 3249 atomic_read(&ctrl_info->num_interrupts); 3250 ctrl_info->previous_heartbeat_count = 3251 pqi_read_heartbeat_counter(ctrl_info); 3252 3253 ctrl_info->heartbeat_timer.expires = 3254 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL; 3255 add_timer(&ctrl_info->heartbeat_timer); 3256 } 3257 3258 static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3259 { 3260 del_timer_sync(&ctrl_info->heartbeat_timer); 3261 } 3262 3263 static inline int pqi_event_type_to_event_index(unsigned int event_type) 3264 { 3265 int index; 3266 3267 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++) 3268 if (event_type == pqi_supported_event_types[index]) 3269 return index; 3270 3271 return -1; 3272 } 3273 3274 static inline bool pqi_is_supported_event(unsigned int event_type) 3275 { 3276 return pqi_event_type_to_event_index(event_type) != -1; 3277 } 3278 3279 static void pqi_ofa_capture_event_payload(struct pqi_event *event, 3280 struct pqi_event_response *response) 3281 { 3282 u16 event_id; 3283 3284 event_id = get_unaligned_le16(&event->event_id); 3285 3286 if (event->event_type == PQI_EVENT_TYPE_OFA) { 3287 if (event_id == PQI_EVENT_OFA_MEMORY_ALLOCATION) { 3288 event->ofa_bytes_requested = 3289 response->data.ofa_memory_allocation.bytes_requested; 3290 } else if (event_id == PQI_EVENT_OFA_CANCELLED) { 3291 event->ofa_cancel_reason = 3292 response->data.ofa_cancelled.reason; 3293 } 3294 } 3295 } 3296 3297 static unsigned int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info) 3298 { 3299 unsigned int num_events; 3300 pqi_index_t oq_pi; 3301 pqi_index_t oq_ci; 3302 struct pqi_event_queue *event_queue; 3303 struct pqi_event_response *response; 3304 struct pqi_event *event; 3305 int event_index; 3306 3307 event_queue = &ctrl_info->event_queue; 3308 num_events = 0; 3309 oq_ci = event_queue->oq_ci_copy; 3310 3311 while (1) { 3312 oq_pi = readl(event_queue->oq_pi); 3313 if (oq_pi == oq_ci) 3314 break; 3315 3316 num_events++; 3317 response = event_queue->oq_element_array + 3318 (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH); 3319 3320 event_index = 3321 pqi_event_type_to_event_index(response->event_type); 3322 3323 if (event_index >= 0) { 3324 if (response->request_acknowlege) { 3325 event = &ctrl_info->events[event_index]; 3326 event->pending = true; 3327 event->event_type = response->event_type; 3328 event->event_id = response->event_id; 3329 event->additional_event_id = 3330 response->additional_event_id; 3331 pqi_ofa_capture_event_payload(event, response); 3332 } 3333 } 3334 3335 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS; 3336 } 3337 3338 if (num_events) { 3339 event_queue->oq_ci_copy = oq_ci; 3340 writel(oq_ci, event_queue->oq_ci); 3341 schedule_work(&ctrl_info->event_work); 3342 } 3343 3344 return num_events; 3345 } 3346 3347 #define PQI_LEGACY_INTX_MASK 0x1 3348 3349 static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info, 3350 bool enable_intx) 3351 { 3352 u32 intx_mask; 3353 struct pqi_device_registers __iomem *pqi_registers; 3354 volatile void __iomem *register_addr; 3355 3356 pqi_registers = ctrl_info->pqi_registers; 3357 3358 if (enable_intx) 3359 register_addr = &pqi_registers->legacy_intx_mask_clear; 3360 else 3361 register_addr = &pqi_registers->legacy_intx_mask_set; 3362 3363 intx_mask = readl(register_addr); 3364 intx_mask |= PQI_LEGACY_INTX_MASK; 3365 writel(intx_mask, register_addr); 3366 } 3367 3368 static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info, 3369 enum pqi_irq_mode new_mode) 3370 { 3371 switch (ctrl_info->irq_mode) { 3372 case IRQ_MODE_MSIX: 3373 switch (new_mode) { 3374 case IRQ_MODE_MSIX: 3375 break; 3376 case IRQ_MODE_INTX: 3377 pqi_configure_legacy_intx(ctrl_info, true); 3378 sis_enable_intx(ctrl_info); 3379 break; 3380 case IRQ_MODE_NONE: 3381 break; 3382 } 3383 break; 3384 case IRQ_MODE_INTX: 3385 switch (new_mode) { 3386 case IRQ_MODE_MSIX: 3387 pqi_configure_legacy_intx(ctrl_info, false); 3388 sis_enable_msix(ctrl_info); 3389 break; 3390 case IRQ_MODE_INTX: 3391 break; 3392 case IRQ_MODE_NONE: 3393 pqi_configure_legacy_intx(ctrl_info, false); 3394 break; 3395 } 3396 break; 3397 case IRQ_MODE_NONE: 3398 switch (new_mode) { 3399 case IRQ_MODE_MSIX: 3400 sis_enable_msix(ctrl_info); 3401 break; 3402 case IRQ_MODE_INTX: 3403 pqi_configure_legacy_intx(ctrl_info, true); 3404 sis_enable_intx(ctrl_info); 3405 break; 3406 case IRQ_MODE_NONE: 3407 break; 3408 } 3409 break; 3410 } 3411 3412 ctrl_info->irq_mode = new_mode; 3413 } 3414 3415 #define PQI_LEGACY_INTX_PENDING 0x1 3416 3417 static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info) 3418 { 3419 bool valid_irq; 3420 u32 intx_status; 3421 3422 switch (ctrl_info->irq_mode) { 3423 case IRQ_MODE_MSIX: 3424 valid_irq = true; 3425 break; 3426 case IRQ_MODE_INTX: 3427 intx_status = 3428 readl(&ctrl_info->pqi_registers->legacy_intx_status); 3429 if (intx_status & PQI_LEGACY_INTX_PENDING) 3430 valid_irq = true; 3431 else 3432 valid_irq = false; 3433 break; 3434 case IRQ_MODE_NONE: 3435 default: 3436 valid_irq = false; 3437 break; 3438 } 3439 3440 return valid_irq; 3441 } 3442 3443 static irqreturn_t pqi_irq_handler(int irq, void *data) 3444 { 3445 struct pqi_ctrl_info *ctrl_info; 3446 struct pqi_queue_group *queue_group; 3447 unsigned int num_responses_handled; 3448 3449 queue_group = data; 3450 ctrl_info = queue_group->ctrl_info; 3451 3452 if (!pqi_is_valid_irq(ctrl_info)) 3453 return IRQ_NONE; 3454 3455 num_responses_handled = pqi_process_io_intr(ctrl_info, queue_group); 3456 3457 if (irq == ctrl_info->event_irq) 3458 num_responses_handled += pqi_process_event_intr(ctrl_info); 3459 3460 if (num_responses_handled) 3461 atomic_inc(&ctrl_info->num_interrupts); 3462 3463 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL); 3464 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL); 3465 3466 return IRQ_HANDLED; 3467 } 3468 3469 static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info) 3470 { 3471 struct pci_dev *pci_dev = ctrl_info->pci_dev; 3472 int i; 3473 int rc; 3474 3475 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0); 3476 3477 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) { 3478 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0, 3479 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]); 3480 if (rc) { 3481 dev_err(&pci_dev->dev, 3482 "irq %u init failed with error %d\n", 3483 pci_irq_vector(pci_dev, i), rc); 3484 return rc; 3485 } 3486 ctrl_info->num_msix_vectors_initialized++; 3487 } 3488 3489 return 0; 3490 } 3491 3492 static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info) 3493 { 3494 int i; 3495 3496 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++) 3497 free_irq(pci_irq_vector(ctrl_info->pci_dev, i), 3498 &ctrl_info->queue_groups[i]); 3499 3500 ctrl_info->num_msix_vectors_initialized = 0; 3501 } 3502 3503 static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 3504 { 3505 int num_vectors_enabled; 3506 3507 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev, 3508 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups, 3509 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 3510 if (num_vectors_enabled < 0) { 3511 dev_err(&ctrl_info->pci_dev->dev, 3512 "MSI-X init failed with error %d\n", 3513 num_vectors_enabled); 3514 return num_vectors_enabled; 3515 } 3516 3517 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled; 3518 ctrl_info->irq_mode = IRQ_MODE_MSIX; 3519 return 0; 3520 } 3521 3522 static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 3523 { 3524 if (ctrl_info->num_msix_vectors_enabled) { 3525 pci_free_irq_vectors(ctrl_info->pci_dev); 3526 ctrl_info->num_msix_vectors_enabled = 0; 3527 } 3528 } 3529 3530 static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info) 3531 { 3532 unsigned int i; 3533 size_t alloc_length; 3534 size_t element_array_length_per_iq; 3535 size_t element_array_length_per_oq; 3536 void *element_array; 3537 void __iomem *next_queue_index; 3538 void *aligned_pointer; 3539 unsigned int num_inbound_queues; 3540 unsigned int num_outbound_queues; 3541 unsigned int num_queue_indexes; 3542 struct pqi_queue_group *queue_group; 3543 3544 element_array_length_per_iq = 3545 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH * 3546 ctrl_info->num_elements_per_iq; 3547 element_array_length_per_oq = 3548 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH * 3549 ctrl_info->num_elements_per_oq; 3550 num_inbound_queues = ctrl_info->num_queue_groups * 2; 3551 num_outbound_queues = ctrl_info->num_queue_groups; 3552 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1; 3553 3554 aligned_pointer = NULL; 3555 3556 for (i = 0; i < num_inbound_queues; i++) { 3557 aligned_pointer = PTR_ALIGN(aligned_pointer, 3558 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3559 aligned_pointer += element_array_length_per_iq; 3560 } 3561 3562 for (i = 0; i < num_outbound_queues; i++) { 3563 aligned_pointer = PTR_ALIGN(aligned_pointer, 3564 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3565 aligned_pointer += element_array_length_per_oq; 3566 } 3567 3568 aligned_pointer = PTR_ALIGN(aligned_pointer, 3569 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3570 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS * 3571 PQI_EVENT_OQ_ELEMENT_LENGTH; 3572 3573 for (i = 0; i < num_queue_indexes; i++) { 3574 aligned_pointer = PTR_ALIGN(aligned_pointer, 3575 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3576 aligned_pointer += sizeof(pqi_index_t); 3577 } 3578 3579 alloc_length = (size_t)aligned_pointer + 3580 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 3581 3582 alloc_length += PQI_EXTRA_SGL_MEMORY; 3583 3584 ctrl_info->queue_memory_base = 3585 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 3586 &ctrl_info->queue_memory_base_dma_handle, 3587 GFP_KERNEL); 3588 3589 if (!ctrl_info->queue_memory_base) 3590 return -ENOMEM; 3591 3592 ctrl_info->queue_memory_length = alloc_length; 3593 3594 element_array = PTR_ALIGN(ctrl_info->queue_memory_base, 3595 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3596 3597 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3598 queue_group = &ctrl_info->queue_groups[i]; 3599 queue_group->iq_element_array[RAID_PATH] = element_array; 3600 queue_group->iq_element_array_bus_addr[RAID_PATH] = 3601 ctrl_info->queue_memory_base_dma_handle + 3602 (element_array - ctrl_info->queue_memory_base); 3603 element_array += element_array_length_per_iq; 3604 element_array = PTR_ALIGN(element_array, 3605 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3606 queue_group->iq_element_array[AIO_PATH] = element_array; 3607 queue_group->iq_element_array_bus_addr[AIO_PATH] = 3608 ctrl_info->queue_memory_base_dma_handle + 3609 (element_array - ctrl_info->queue_memory_base); 3610 element_array += element_array_length_per_iq; 3611 element_array = PTR_ALIGN(element_array, 3612 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3613 } 3614 3615 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3616 queue_group = &ctrl_info->queue_groups[i]; 3617 queue_group->oq_element_array = element_array; 3618 queue_group->oq_element_array_bus_addr = 3619 ctrl_info->queue_memory_base_dma_handle + 3620 (element_array - ctrl_info->queue_memory_base); 3621 element_array += element_array_length_per_oq; 3622 element_array = PTR_ALIGN(element_array, 3623 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3624 } 3625 3626 ctrl_info->event_queue.oq_element_array = element_array; 3627 ctrl_info->event_queue.oq_element_array_bus_addr = 3628 ctrl_info->queue_memory_base_dma_handle + 3629 (element_array - ctrl_info->queue_memory_base); 3630 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS * 3631 PQI_EVENT_OQ_ELEMENT_LENGTH; 3632 3633 next_queue_index = (void __iomem *)PTR_ALIGN(element_array, 3634 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3635 3636 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3637 queue_group = &ctrl_info->queue_groups[i]; 3638 queue_group->iq_ci[RAID_PATH] = next_queue_index; 3639 queue_group->iq_ci_bus_addr[RAID_PATH] = 3640 ctrl_info->queue_memory_base_dma_handle + 3641 (next_queue_index - 3642 (void __iomem *)ctrl_info->queue_memory_base); 3643 next_queue_index += sizeof(pqi_index_t); 3644 next_queue_index = PTR_ALIGN(next_queue_index, 3645 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3646 queue_group->iq_ci[AIO_PATH] = next_queue_index; 3647 queue_group->iq_ci_bus_addr[AIO_PATH] = 3648 ctrl_info->queue_memory_base_dma_handle + 3649 (next_queue_index - 3650 (void __iomem *)ctrl_info->queue_memory_base); 3651 next_queue_index += sizeof(pqi_index_t); 3652 next_queue_index = PTR_ALIGN(next_queue_index, 3653 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3654 queue_group->oq_pi = next_queue_index; 3655 queue_group->oq_pi_bus_addr = 3656 ctrl_info->queue_memory_base_dma_handle + 3657 (next_queue_index - 3658 (void __iomem *)ctrl_info->queue_memory_base); 3659 next_queue_index += sizeof(pqi_index_t); 3660 next_queue_index = PTR_ALIGN(next_queue_index, 3661 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3662 } 3663 3664 ctrl_info->event_queue.oq_pi = next_queue_index; 3665 ctrl_info->event_queue.oq_pi_bus_addr = 3666 ctrl_info->queue_memory_base_dma_handle + 3667 (next_queue_index - 3668 (void __iomem *)ctrl_info->queue_memory_base); 3669 3670 return 0; 3671 } 3672 3673 static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info) 3674 { 3675 unsigned int i; 3676 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 3677 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 3678 3679 /* 3680 * Initialize the backpointers to the controller structure in 3681 * each operational queue group structure. 3682 */ 3683 for (i = 0; i < ctrl_info->num_queue_groups; i++) 3684 ctrl_info->queue_groups[i].ctrl_info = ctrl_info; 3685 3686 /* 3687 * Assign IDs to all operational queues. Note that the IDs 3688 * assigned to operational IQs are independent of the IDs 3689 * assigned to operational OQs. 3690 */ 3691 ctrl_info->event_queue.oq_id = next_oq_id++; 3692 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3693 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++; 3694 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++; 3695 ctrl_info->queue_groups[i].oq_id = next_oq_id++; 3696 } 3697 3698 /* 3699 * Assign MSI-X table entry indexes to all queues. Note that the 3700 * interrupt for the event queue is shared with the first queue group. 3701 */ 3702 ctrl_info->event_queue.int_msg_num = 0; 3703 for (i = 0; i < ctrl_info->num_queue_groups; i++) 3704 ctrl_info->queue_groups[i].int_msg_num = i; 3705 3706 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3707 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]); 3708 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]); 3709 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]); 3710 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]); 3711 } 3712 } 3713 3714 static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info) 3715 { 3716 size_t alloc_length; 3717 struct pqi_admin_queues_aligned *admin_queues_aligned; 3718 struct pqi_admin_queues *admin_queues; 3719 3720 alloc_length = sizeof(struct pqi_admin_queues_aligned) + 3721 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 3722 3723 ctrl_info->admin_queue_memory_base = 3724 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 3725 &ctrl_info->admin_queue_memory_base_dma_handle, 3726 GFP_KERNEL); 3727 3728 if (!ctrl_info->admin_queue_memory_base) 3729 return -ENOMEM; 3730 3731 ctrl_info->admin_queue_memory_length = alloc_length; 3732 3733 admin_queues = &ctrl_info->admin_queues; 3734 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base, 3735 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3736 admin_queues->iq_element_array = 3737 &admin_queues_aligned->iq_element_array; 3738 admin_queues->oq_element_array = 3739 &admin_queues_aligned->oq_element_array; 3740 admin_queues->iq_ci = &admin_queues_aligned->iq_ci; 3741 admin_queues->oq_pi = 3742 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi; 3743 3744 admin_queues->iq_element_array_bus_addr = 3745 ctrl_info->admin_queue_memory_base_dma_handle + 3746 (admin_queues->iq_element_array - 3747 ctrl_info->admin_queue_memory_base); 3748 admin_queues->oq_element_array_bus_addr = 3749 ctrl_info->admin_queue_memory_base_dma_handle + 3750 (admin_queues->oq_element_array - 3751 ctrl_info->admin_queue_memory_base); 3752 admin_queues->iq_ci_bus_addr = 3753 ctrl_info->admin_queue_memory_base_dma_handle + 3754 ((void *)admin_queues->iq_ci - 3755 ctrl_info->admin_queue_memory_base); 3756 admin_queues->oq_pi_bus_addr = 3757 ctrl_info->admin_queue_memory_base_dma_handle + 3758 ((void __iomem *)admin_queues->oq_pi - 3759 (void __iomem *)ctrl_info->admin_queue_memory_base); 3760 3761 return 0; 3762 } 3763 3764 #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES PQI_HZ 3765 #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1 3766 3767 static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info) 3768 { 3769 struct pqi_device_registers __iomem *pqi_registers; 3770 struct pqi_admin_queues *admin_queues; 3771 unsigned long timeout; 3772 u8 status; 3773 u32 reg; 3774 3775 pqi_registers = ctrl_info->pqi_registers; 3776 admin_queues = &ctrl_info->admin_queues; 3777 3778 writeq((u64)admin_queues->iq_element_array_bus_addr, 3779 &pqi_registers->admin_iq_element_array_addr); 3780 writeq((u64)admin_queues->oq_element_array_bus_addr, 3781 &pqi_registers->admin_oq_element_array_addr); 3782 writeq((u64)admin_queues->iq_ci_bus_addr, 3783 &pqi_registers->admin_iq_ci_addr); 3784 writeq((u64)admin_queues->oq_pi_bus_addr, 3785 &pqi_registers->admin_oq_pi_addr); 3786 3787 reg = PQI_ADMIN_IQ_NUM_ELEMENTS | 3788 (PQI_ADMIN_OQ_NUM_ELEMENTS) << 8 | 3789 (admin_queues->int_msg_num << 16); 3790 writel(reg, &pqi_registers->admin_iq_num_elements); 3791 writel(PQI_CREATE_ADMIN_QUEUE_PAIR, 3792 &pqi_registers->function_and_status_code); 3793 3794 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies; 3795 while (1) { 3796 status = readb(&pqi_registers->function_and_status_code); 3797 if (status == PQI_STATUS_IDLE) 3798 break; 3799 if (time_after(jiffies, timeout)) 3800 return -ETIMEDOUT; 3801 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS); 3802 } 3803 3804 /* 3805 * The offset registers are not initialized to the correct 3806 * offsets until *after* the create admin queue pair command 3807 * completes successfully. 3808 */ 3809 admin_queues->iq_pi = ctrl_info->iomem_base + 3810 PQI_DEVICE_REGISTERS_OFFSET + 3811 readq(&pqi_registers->admin_iq_pi_offset); 3812 admin_queues->oq_ci = ctrl_info->iomem_base + 3813 PQI_DEVICE_REGISTERS_OFFSET + 3814 readq(&pqi_registers->admin_oq_ci_offset); 3815 3816 return 0; 3817 } 3818 3819 static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info, 3820 struct pqi_general_admin_request *request) 3821 { 3822 struct pqi_admin_queues *admin_queues; 3823 void *next_element; 3824 pqi_index_t iq_pi; 3825 3826 admin_queues = &ctrl_info->admin_queues; 3827 iq_pi = admin_queues->iq_pi_copy; 3828 3829 next_element = admin_queues->iq_element_array + 3830 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH); 3831 3832 memcpy(next_element, request, sizeof(*request)); 3833 3834 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS; 3835 admin_queues->iq_pi_copy = iq_pi; 3836 3837 /* 3838 * This write notifies the controller that an IU is available to be 3839 * processed. 3840 */ 3841 writel(iq_pi, admin_queues->iq_pi); 3842 } 3843 3844 #define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60 3845 3846 static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info, 3847 struct pqi_general_admin_response *response) 3848 { 3849 struct pqi_admin_queues *admin_queues; 3850 pqi_index_t oq_pi; 3851 pqi_index_t oq_ci; 3852 unsigned long timeout; 3853 3854 admin_queues = &ctrl_info->admin_queues; 3855 oq_ci = admin_queues->oq_ci_copy; 3856 3857 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * PQI_HZ) + jiffies; 3858 3859 while (1) { 3860 oq_pi = readl(admin_queues->oq_pi); 3861 if (oq_pi != oq_ci) 3862 break; 3863 if (time_after(jiffies, timeout)) { 3864 dev_err(&ctrl_info->pci_dev->dev, 3865 "timed out waiting for admin response\n"); 3866 return -ETIMEDOUT; 3867 } 3868 if (!sis_is_firmware_running(ctrl_info)) 3869 return -ENXIO; 3870 usleep_range(1000, 2000); 3871 } 3872 3873 memcpy(response, admin_queues->oq_element_array + 3874 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response)); 3875 3876 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS; 3877 admin_queues->oq_ci_copy = oq_ci; 3878 writel(oq_ci, admin_queues->oq_ci); 3879 3880 return 0; 3881 } 3882 3883 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 3884 struct pqi_queue_group *queue_group, enum pqi_io_path path, 3885 struct pqi_io_request *io_request) 3886 { 3887 struct pqi_io_request *next; 3888 void *next_element; 3889 pqi_index_t iq_pi; 3890 pqi_index_t iq_ci; 3891 size_t iu_length; 3892 unsigned long flags; 3893 unsigned int num_elements_needed; 3894 unsigned int num_elements_to_end_of_queue; 3895 size_t copy_count; 3896 struct pqi_iu_header *request; 3897 3898 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 3899 3900 if (io_request) { 3901 io_request->queue_group = queue_group; 3902 list_add_tail(&io_request->request_list_entry, 3903 &queue_group->request_list[path]); 3904 } 3905 3906 iq_pi = queue_group->iq_pi_copy[path]; 3907 3908 list_for_each_entry_safe(io_request, next, 3909 &queue_group->request_list[path], request_list_entry) { 3910 3911 request = io_request->iu; 3912 3913 iu_length = get_unaligned_le16(&request->iu_length) + 3914 PQI_REQUEST_HEADER_LENGTH; 3915 num_elements_needed = 3916 DIV_ROUND_UP(iu_length, 3917 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3918 3919 iq_ci = readl(queue_group->iq_ci[path]); 3920 3921 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci, 3922 ctrl_info->num_elements_per_iq)) 3923 break; 3924 3925 put_unaligned_le16(queue_group->oq_id, 3926 &request->response_queue_id); 3927 3928 next_element = queue_group->iq_element_array[path] + 3929 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3930 3931 num_elements_to_end_of_queue = 3932 ctrl_info->num_elements_per_iq - iq_pi; 3933 3934 if (num_elements_needed <= num_elements_to_end_of_queue) { 3935 memcpy(next_element, request, iu_length); 3936 } else { 3937 copy_count = num_elements_to_end_of_queue * 3938 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 3939 memcpy(next_element, request, copy_count); 3940 memcpy(queue_group->iq_element_array[path], 3941 (u8 *)request + copy_count, 3942 iu_length - copy_count); 3943 } 3944 3945 iq_pi = (iq_pi + num_elements_needed) % 3946 ctrl_info->num_elements_per_iq; 3947 3948 list_del(&io_request->request_list_entry); 3949 } 3950 3951 if (iq_pi != queue_group->iq_pi_copy[path]) { 3952 queue_group->iq_pi_copy[path] = iq_pi; 3953 /* 3954 * This write notifies the controller that one or more IUs are 3955 * available to be processed. 3956 */ 3957 writel(iq_pi, queue_group->iq_pi[path]); 3958 } 3959 3960 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 3961 } 3962 3963 #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10 3964 3965 static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info, 3966 struct completion *wait) 3967 { 3968 int rc; 3969 3970 while (1) { 3971 if (wait_for_completion_io_timeout(wait, 3972 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * PQI_HZ)) { 3973 rc = 0; 3974 break; 3975 } 3976 3977 pqi_check_ctrl_health(ctrl_info); 3978 if (pqi_ctrl_offline(ctrl_info)) { 3979 rc = -ENXIO; 3980 break; 3981 } 3982 } 3983 3984 return rc; 3985 } 3986 3987 static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request, 3988 void *context) 3989 { 3990 struct completion *waiting = context; 3991 3992 complete(waiting); 3993 } 3994 3995 static int pqi_process_raid_io_error_synchronous(struct pqi_raid_error_info 3996 *error_info) 3997 { 3998 int rc = -EIO; 3999 4000 switch (error_info->data_out_result) { 4001 case PQI_DATA_IN_OUT_GOOD: 4002 if (error_info->status == SAM_STAT_GOOD) 4003 rc = 0; 4004 break; 4005 case PQI_DATA_IN_OUT_UNDERFLOW: 4006 if (error_info->status == SAM_STAT_GOOD || 4007 error_info->status == SAM_STAT_CHECK_CONDITION) 4008 rc = 0; 4009 break; 4010 case PQI_DATA_IN_OUT_ABORTED: 4011 rc = PQI_CMD_STATUS_ABORTED; 4012 break; 4013 } 4014 4015 return rc; 4016 } 4017 4018 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 4019 struct pqi_iu_header *request, unsigned int flags, 4020 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs) 4021 { 4022 int rc = 0; 4023 struct pqi_io_request *io_request; 4024 unsigned long start_jiffies; 4025 unsigned long msecs_blocked; 4026 size_t iu_length; 4027 DECLARE_COMPLETION_ONSTACK(wait); 4028 4029 /* 4030 * Note that specifying PQI_SYNC_FLAGS_INTERRUPTABLE and a timeout value 4031 * are mutually exclusive. 4032 */ 4033 4034 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) { 4035 if (down_interruptible(&ctrl_info->sync_request_sem)) 4036 return -ERESTARTSYS; 4037 } else { 4038 if (timeout_msecs == NO_TIMEOUT) { 4039 down(&ctrl_info->sync_request_sem); 4040 } else { 4041 start_jiffies = jiffies; 4042 if (down_timeout(&ctrl_info->sync_request_sem, 4043 msecs_to_jiffies(timeout_msecs))) 4044 return -ETIMEDOUT; 4045 msecs_blocked = 4046 jiffies_to_msecs(jiffies - start_jiffies); 4047 if (msecs_blocked >= timeout_msecs) 4048 return -ETIMEDOUT; 4049 timeout_msecs -= msecs_blocked; 4050 } 4051 } 4052 4053 pqi_ctrl_busy(ctrl_info); 4054 timeout_msecs = pqi_wait_if_ctrl_blocked(ctrl_info, timeout_msecs); 4055 if (timeout_msecs == 0) { 4056 pqi_ctrl_unbusy(ctrl_info); 4057 rc = -ETIMEDOUT; 4058 goto out; 4059 } 4060 4061 if (pqi_ctrl_offline(ctrl_info)) { 4062 pqi_ctrl_unbusy(ctrl_info); 4063 rc = -ENXIO; 4064 goto out; 4065 } 4066 4067 io_request = pqi_alloc_io_request(ctrl_info); 4068 4069 put_unaligned_le16(io_request->index, 4070 &(((struct pqi_raid_path_request *)request)->request_id)); 4071 4072 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO) 4073 ((struct pqi_raid_path_request *)request)->error_index = 4074 ((struct pqi_raid_path_request *)request)->request_id; 4075 4076 iu_length = get_unaligned_le16(&request->iu_length) + 4077 PQI_REQUEST_HEADER_LENGTH; 4078 memcpy(io_request->iu, request, iu_length); 4079 4080 io_request->io_complete_callback = pqi_raid_synchronous_complete; 4081 io_request->context = &wait; 4082 4083 pqi_start_io(ctrl_info, 4084 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 4085 io_request); 4086 4087 pqi_ctrl_unbusy(ctrl_info); 4088 4089 if (timeout_msecs == NO_TIMEOUT) { 4090 pqi_wait_for_completion_io(ctrl_info, &wait); 4091 } else { 4092 if (!wait_for_completion_io_timeout(&wait, 4093 msecs_to_jiffies(timeout_msecs))) { 4094 dev_warn(&ctrl_info->pci_dev->dev, 4095 "command timed out\n"); 4096 rc = -ETIMEDOUT; 4097 } 4098 } 4099 4100 if (error_info) { 4101 if (io_request->error_info) 4102 memcpy(error_info, io_request->error_info, 4103 sizeof(*error_info)); 4104 else 4105 memset(error_info, 0, sizeof(*error_info)); 4106 } else if (rc == 0 && io_request->error_info) { 4107 rc = pqi_process_raid_io_error_synchronous( 4108 io_request->error_info); 4109 } 4110 4111 pqi_free_io_request(io_request); 4112 4113 out: 4114 up(&ctrl_info->sync_request_sem); 4115 4116 return rc; 4117 } 4118 4119 static int pqi_validate_admin_response( 4120 struct pqi_general_admin_response *response, u8 expected_function_code) 4121 { 4122 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN) 4123 return -EINVAL; 4124 4125 if (get_unaligned_le16(&response->header.iu_length) != 4126 PQI_GENERAL_ADMIN_IU_LENGTH) 4127 return -EINVAL; 4128 4129 if (response->function_code != expected_function_code) 4130 return -EINVAL; 4131 4132 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) 4133 return -EINVAL; 4134 4135 return 0; 4136 } 4137 4138 static int pqi_submit_admin_request_synchronous( 4139 struct pqi_ctrl_info *ctrl_info, 4140 struct pqi_general_admin_request *request, 4141 struct pqi_general_admin_response *response) 4142 { 4143 int rc; 4144 4145 pqi_submit_admin_request(ctrl_info, request); 4146 4147 rc = pqi_poll_for_admin_response(ctrl_info, response); 4148 4149 if (rc == 0) 4150 rc = pqi_validate_admin_response(response, 4151 request->function_code); 4152 4153 return rc; 4154 } 4155 4156 static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info) 4157 { 4158 int rc; 4159 struct pqi_general_admin_request request; 4160 struct pqi_general_admin_response response; 4161 struct pqi_device_capability *capability; 4162 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor; 4163 4164 capability = kmalloc(sizeof(*capability), GFP_KERNEL); 4165 if (!capability) 4166 return -ENOMEM; 4167 4168 memset(&request, 0, sizeof(request)); 4169 4170 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4171 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4172 &request.header.iu_length); 4173 request.function_code = 4174 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY; 4175 put_unaligned_le32(sizeof(*capability), 4176 &request.data.report_device_capability.buffer_length); 4177 4178 rc = pqi_map_single(ctrl_info->pci_dev, 4179 &request.data.report_device_capability.sg_descriptor, 4180 capability, sizeof(*capability), 4181 DMA_FROM_DEVICE); 4182 if (rc) 4183 goto out; 4184 4185 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4186 &response); 4187 4188 pqi_pci_unmap(ctrl_info->pci_dev, 4189 &request.data.report_device_capability.sg_descriptor, 1, 4190 DMA_FROM_DEVICE); 4191 4192 if (rc) 4193 goto out; 4194 4195 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) { 4196 rc = -EIO; 4197 goto out; 4198 } 4199 4200 ctrl_info->max_inbound_queues = 4201 get_unaligned_le16(&capability->max_inbound_queues); 4202 ctrl_info->max_elements_per_iq = 4203 get_unaligned_le16(&capability->max_elements_per_iq); 4204 ctrl_info->max_iq_element_length = 4205 get_unaligned_le16(&capability->max_iq_element_length) 4206 * 16; 4207 ctrl_info->max_outbound_queues = 4208 get_unaligned_le16(&capability->max_outbound_queues); 4209 ctrl_info->max_elements_per_oq = 4210 get_unaligned_le16(&capability->max_elements_per_oq); 4211 ctrl_info->max_oq_element_length = 4212 get_unaligned_le16(&capability->max_oq_element_length) 4213 * 16; 4214 4215 sop_iu_layer_descriptor = 4216 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP]; 4217 4218 ctrl_info->max_inbound_iu_length_per_firmware = 4219 get_unaligned_le16( 4220 &sop_iu_layer_descriptor->max_inbound_iu_length); 4221 ctrl_info->inbound_spanning_supported = 4222 sop_iu_layer_descriptor->inbound_spanning_supported; 4223 ctrl_info->outbound_spanning_supported = 4224 sop_iu_layer_descriptor->outbound_spanning_supported; 4225 4226 out: 4227 kfree(capability); 4228 4229 return rc; 4230 } 4231 4232 static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info) 4233 { 4234 if (ctrl_info->max_iq_element_length < 4235 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4236 dev_err(&ctrl_info->pci_dev->dev, 4237 "max. inbound queue element length of %d is less than the required length of %d\n", 4238 ctrl_info->max_iq_element_length, 4239 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4240 return -EINVAL; 4241 } 4242 4243 if (ctrl_info->max_oq_element_length < 4244 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) { 4245 dev_err(&ctrl_info->pci_dev->dev, 4246 "max. outbound queue element length of %d is less than the required length of %d\n", 4247 ctrl_info->max_oq_element_length, 4248 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 4249 return -EINVAL; 4250 } 4251 4252 if (ctrl_info->max_inbound_iu_length_per_firmware < 4253 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4254 dev_err(&ctrl_info->pci_dev->dev, 4255 "max. inbound IU length of %u is less than the min. required length of %d\n", 4256 ctrl_info->max_inbound_iu_length_per_firmware, 4257 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4258 return -EINVAL; 4259 } 4260 4261 if (!ctrl_info->inbound_spanning_supported) { 4262 dev_err(&ctrl_info->pci_dev->dev, 4263 "the controller does not support inbound spanning\n"); 4264 return -EINVAL; 4265 } 4266 4267 if (ctrl_info->outbound_spanning_supported) { 4268 dev_err(&ctrl_info->pci_dev->dev, 4269 "the controller supports outbound spanning but this driver does not\n"); 4270 return -EINVAL; 4271 } 4272 4273 return 0; 4274 } 4275 4276 static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info) 4277 { 4278 int rc; 4279 struct pqi_event_queue *event_queue; 4280 struct pqi_general_admin_request request; 4281 struct pqi_general_admin_response response; 4282 4283 event_queue = &ctrl_info->event_queue; 4284 4285 /* 4286 * Create OQ (Outbound Queue - device to host queue) to dedicate 4287 * to events. 4288 */ 4289 memset(&request, 0, sizeof(request)); 4290 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4291 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4292 &request.header.iu_length); 4293 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4294 put_unaligned_le16(event_queue->oq_id, 4295 &request.data.create_operational_oq.queue_id); 4296 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr, 4297 &request.data.create_operational_oq.element_array_addr); 4298 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr, 4299 &request.data.create_operational_oq.pi_addr); 4300 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS, 4301 &request.data.create_operational_oq.num_elements); 4302 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16, 4303 &request.data.create_operational_oq.element_length); 4304 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4305 put_unaligned_le16(event_queue->int_msg_num, 4306 &request.data.create_operational_oq.int_msg_num); 4307 4308 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4309 &response); 4310 if (rc) 4311 return rc; 4312 4313 event_queue->oq_ci = ctrl_info->iomem_base + 4314 PQI_DEVICE_REGISTERS_OFFSET + 4315 get_unaligned_le64( 4316 &response.data.create_operational_oq.oq_ci_offset); 4317 4318 return 0; 4319 } 4320 4321 static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info, 4322 unsigned int group_number) 4323 { 4324 int rc; 4325 struct pqi_queue_group *queue_group; 4326 struct pqi_general_admin_request request; 4327 struct pqi_general_admin_response response; 4328 4329 queue_group = &ctrl_info->queue_groups[group_number]; 4330 4331 /* 4332 * Create IQ (Inbound Queue - host to device queue) for 4333 * RAID path. 4334 */ 4335 memset(&request, 0, sizeof(request)); 4336 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4337 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4338 &request.header.iu_length); 4339 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4340 put_unaligned_le16(queue_group->iq_id[RAID_PATH], 4341 &request.data.create_operational_iq.queue_id); 4342 put_unaligned_le64( 4343 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH], 4344 &request.data.create_operational_iq.element_array_addr); 4345 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH], 4346 &request.data.create_operational_iq.ci_addr); 4347 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4348 &request.data.create_operational_iq.num_elements); 4349 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4350 &request.data.create_operational_iq.element_length); 4351 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4352 4353 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4354 &response); 4355 if (rc) { 4356 dev_err(&ctrl_info->pci_dev->dev, 4357 "error creating inbound RAID queue\n"); 4358 return rc; 4359 } 4360 4361 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base + 4362 PQI_DEVICE_REGISTERS_OFFSET + 4363 get_unaligned_le64( 4364 &response.data.create_operational_iq.iq_pi_offset); 4365 4366 /* 4367 * Create IQ (Inbound Queue - host to device queue) for 4368 * Advanced I/O (AIO) path. 4369 */ 4370 memset(&request, 0, sizeof(request)); 4371 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4372 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4373 &request.header.iu_length); 4374 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4375 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4376 &request.data.create_operational_iq.queue_id); 4377 put_unaligned_le64((u64)queue_group-> 4378 iq_element_array_bus_addr[AIO_PATH], 4379 &request.data.create_operational_iq.element_array_addr); 4380 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH], 4381 &request.data.create_operational_iq.ci_addr); 4382 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4383 &request.data.create_operational_iq.num_elements); 4384 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4385 &request.data.create_operational_iq.element_length); 4386 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4387 4388 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4389 &response); 4390 if (rc) { 4391 dev_err(&ctrl_info->pci_dev->dev, 4392 "error creating inbound AIO queue\n"); 4393 return rc; 4394 } 4395 4396 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base + 4397 PQI_DEVICE_REGISTERS_OFFSET + 4398 get_unaligned_le64( 4399 &response.data.create_operational_iq.iq_pi_offset); 4400 4401 /* 4402 * Designate the 2nd IQ as the AIO path. By default, all IQs are 4403 * assumed to be for RAID path I/O unless we change the queue's 4404 * property. 4405 */ 4406 memset(&request, 0, sizeof(request)); 4407 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4408 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4409 &request.header.iu_length); 4410 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY; 4411 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4412 &request.data.change_operational_iq_properties.queue_id); 4413 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE, 4414 &request.data.change_operational_iq_properties.vendor_specific); 4415 4416 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4417 &response); 4418 if (rc) { 4419 dev_err(&ctrl_info->pci_dev->dev, 4420 "error changing queue property\n"); 4421 return rc; 4422 } 4423 4424 /* 4425 * Create OQ (Outbound Queue - device to host queue). 4426 */ 4427 memset(&request, 0, sizeof(request)); 4428 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4429 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4430 &request.header.iu_length); 4431 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4432 put_unaligned_le16(queue_group->oq_id, 4433 &request.data.create_operational_oq.queue_id); 4434 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr, 4435 &request.data.create_operational_oq.element_array_addr); 4436 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr, 4437 &request.data.create_operational_oq.pi_addr); 4438 put_unaligned_le16(ctrl_info->num_elements_per_oq, 4439 &request.data.create_operational_oq.num_elements); 4440 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16, 4441 &request.data.create_operational_oq.element_length); 4442 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4443 put_unaligned_le16(queue_group->int_msg_num, 4444 &request.data.create_operational_oq.int_msg_num); 4445 4446 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4447 &response); 4448 if (rc) { 4449 dev_err(&ctrl_info->pci_dev->dev, 4450 "error creating outbound queue\n"); 4451 return rc; 4452 } 4453 4454 queue_group->oq_ci = ctrl_info->iomem_base + 4455 PQI_DEVICE_REGISTERS_OFFSET + 4456 get_unaligned_le64( 4457 &response.data.create_operational_oq.oq_ci_offset); 4458 4459 return 0; 4460 } 4461 4462 static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info) 4463 { 4464 int rc; 4465 unsigned int i; 4466 4467 rc = pqi_create_event_queue(ctrl_info); 4468 if (rc) { 4469 dev_err(&ctrl_info->pci_dev->dev, 4470 "error creating event queue\n"); 4471 return rc; 4472 } 4473 4474 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4475 rc = pqi_create_queue_group(ctrl_info, i); 4476 if (rc) { 4477 dev_err(&ctrl_info->pci_dev->dev, 4478 "error creating queue group number %u/%u\n", 4479 i, ctrl_info->num_queue_groups); 4480 return rc; 4481 } 4482 } 4483 4484 return 0; 4485 } 4486 4487 #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \ 4488 (offsetof(struct pqi_event_config, descriptors) + \ 4489 (PQI_MAX_EVENT_DESCRIPTORS * sizeof(struct pqi_event_descriptor))) 4490 4491 static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info, 4492 bool enable_events) 4493 { 4494 int rc; 4495 unsigned int i; 4496 struct pqi_event_config *event_config; 4497 struct pqi_event_descriptor *event_descriptor; 4498 struct pqi_general_management_request request; 4499 4500 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4501 GFP_KERNEL); 4502 if (!event_config) 4503 return -ENOMEM; 4504 4505 memset(&request, 0, sizeof(request)); 4506 4507 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG; 4508 put_unaligned_le16(offsetof(struct pqi_general_management_request, 4509 data.report_event_configuration.sg_descriptors[1]) - 4510 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 4511 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4512 &request.data.report_event_configuration.buffer_length); 4513 4514 rc = pqi_map_single(ctrl_info->pci_dev, 4515 request.data.report_event_configuration.sg_descriptors, 4516 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4517 DMA_FROM_DEVICE); 4518 if (rc) 4519 goto out; 4520 4521 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 4522 0, NULL, NO_TIMEOUT); 4523 4524 pqi_pci_unmap(ctrl_info->pci_dev, 4525 request.data.report_event_configuration.sg_descriptors, 1, 4526 DMA_FROM_DEVICE); 4527 4528 if (rc) 4529 goto out; 4530 4531 for (i = 0; i < event_config->num_event_descriptors; i++) { 4532 event_descriptor = &event_config->descriptors[i]; 4533 if (enable_events && 4534 pqi_is_supported_event(event_descriptor->event_type)) 4535 put_unaligned_le16(ctrl_info->event_queue.oq_id, 4536 &event_descriptor->oq_id); 4537 else 4538 put_unaligned_le16(0, &event_descriptor->oq_id); 4539 } 4540 4541 memset(&request, 0, sizeof(request)); 4542 4543 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG; 4544 put_unaligned_le16(offsetof(struct pqi_general_management_request, 4545 data.report_event_configuration.sg_descriptors[1]) - 4546 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 4547 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4548 &request.data.report_event_configuration.buffer_length); 4549 4550 rc = pqi_map_single(ctrl_info->pci_dev, 4551 request.data.report_event_configuration.sg_descriptors, 4552 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4553 DMA_TO_DEVICE); 4554 if (rc) 4555 goto out; 4556 4557 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, 4558 NULL, NO_TIMEOUT); 4559 4560 pqi_pci_unmap(ctrl_info->pci_dev, 4561 request.data.report_event_configuration.sg_descriptors, 1, 4562 DMA_TO_DEVICE); 4563 4564 out: 4565 kfree(event_config); 4566 4567 return rc; 4568 } 4569 4570 static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info) 4571 { 4572 return pqi_configure_events(ctrl_info, true); 4573 } 4574 4575 static inline int pqi_disable_events(struct pqi_ctrl_info *ctrl_info) 4576 { 4577 return pqi_configure_events(ctrl_info, false); 4578 } 4579 4580 static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info) 4581 { 4582 unsigned int i; 4583 struct device *dev; 4584 size_t sg_chain_buffer_length; 4585 struct pqi_io_request *io_request; 4586 4587 if (!ctrl_info->io_request_pool) 4588 return; 4589 4590 dev = &ctrl_info->pci_dev->dev; 4591 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 4592 io_request = ctrl_info->io_request_pool; 4593 4594 for (i = 0; i < ctrl_info->max_io_slots; i++) { 4595 kfree(io_request->iu); 4596 if (!io_request->sg_chain_buffer) 4597 break; 4598 dma_free_coherent(dev, sg_chain_buffer_length, 4599 io_request->sg_chain_buffer, 4600 io_request->sg_chain_buffer_dma_handle); 4601 io_request++; 4602 } 4603 4604 kfree(ctrl_info->io_request_pool); 4605 ctrl_info->io_request_pool = NULL; 4606 } 4607 4608 static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info) 4609 { 4610 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev, 4611 ctrl_info->error_buffer_length, 4612 &ctrl_info->error_buffer_dma_handle, 4613 GFP_KERNEL); 4614 4615 if (!ctrl_info->error_buffer) 4616 return -ENOMEM; 4617 4618 return 0; 4619 } 4620 4621 static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info) 4622 { 4623 unsigned int i; 4624 void *sg_chain_buffer; 4625 size_t sg_chain_buffer_length; 4626 dma_addr_t sg_chain_buffer_dma_handle; 4627 struct device *dev; 4628 struct pqi_io_request *io_request; 4629 4630 ctrl_info->io_request_pool = 4631 kcalloc(ctrl_info->max_io_slots, 4632 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL); 4633 4634 if (!ctrl_info->io_request_pool) { 4635 dev_err(&ctrl_info->pci_dev->dev, 4636 "failed to allocate I/O request pool\n"); 4637 goto error; 4638 } 4639 4640 dev = &ctrl_info->pci_dev->dev; 4641 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 4642 io_request = ctrl_info->io_request_pool; 4643 4644 for (i = 0; i < ctrl_info->max_io_slots; i++) { 4645 io_request->iu = 4646 kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL); 4647 4648 if (!io_request->iu) { 4649 dev_err(&ctrl_info->pci_dev->dev, 4650 "failed to allocate IU buffers\n"); 4651 goto error; 4652 } 4653 4654 sg_chain_buffer = dma_alloc_coherent(dev, 4655 sg_chain_buffer_length, &sg_chain_buffer_dma_handle, 4656 GFP_KERNEL); 4657 4658 if (!sg_chain_buffer) { 4659 dev_err(&ctrl_info->pci_dev->dev, 4660 "failed to allocate PQI scatter-gather chain buffers\n"); 4661 goto error; 4662 } 4663 4664 io_request->index = i; 4665 io_request->sg_chain_buffer = sg_chain_buffer; 4666 io_request->sg_chain_buffer_dma_handle = 4667 sg_chain_buffer_dma_handle; 4668 io_request++; 4669 } 4670 4671 return 0; 4672 4673 error: 4674 pqi_free_all_io_requests(ctrl_info); 4675 4676 return -ENOMEM; 4677 } 4678 4679 /* 4680 * Calculate required resources that are sized based on max. outstanding 4681 * requests and max. transfer size. 4682 */ 4683 4684 static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info) 4685 { 4686 u32 max_transfer_size; 4687 u32 max_sg_entries; 4688 4689 ctrl_info->scsi_ml_can_queue = 4690 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS; 4691 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests; 4692 4693 ctrl_info->error_buffer_length = 4694 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH; 4695 4696 if (reset_devices) 4697 max_transfer_size = min(ctrl_info->max_transfer_size, 4698 PQI_MAX_TRANSFER_SIZE_KDUMP); 4699 else 4700 max_transfer_size = min(ctrl_info->max_transfer_size, 4701 PQI_MAX_TRANSFER_SIZE); 4702 4703 max_sg_entries = max_transfer_size / PAGE_SIZE; 4704 4705 /* +1 to cover when the buffer is not page-aligned. */ 4706 max_sg_entries++; 4707 4708 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries); 4709 4710 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE; 4711 4712 ctrl_info->sg_chain_buffer_length = 4713 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) + 4714 PQI_EXTRA_SGL_MEMORY; 4715 ctrl_info->sg_tablesize = max_sg_entries; 4716 ctrl_info->max_sectors = max_transfer_size / 512; 4717 } 4718 4719 static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info) 4720 { 4721 int num_queue_groups; 4722 u16 num_elements_per_iq; 4723 u16 num_elements_per_oq; 4724 4725 if (reset_devices) { 4726 num_queue_groups = 1; 4727 } else { 4728 int num_cpus; 4729 int max_queue_groups; 4730 4731 max_queue_groups = min(ctrl_info->max_inbound_queues / 2, 4732 ctrl_info->max_outbound_queues - 1); 4733 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS); 4734 4735 num_cpus = num_online_cpus(); 4736 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors); 4737 num_queue_groups = min(num_queue_groups, max_queue_groups); 4738 } 4739 4740 ctrl_info->num_queue_groups = num_queue_groups; 4741 ctrl_info->max_hw_queue_index = num_queue_groups - 1; 4742 4743 /* 4744 * Make sure that the max. inbound IU length is an even multiple 4745 * of our inbound element length. 4746 */ 4747 ctrl_info->max_inbound_iu_length = 4748 (ctrl_info->max_inbound_iu_length_per_firmware / 4749 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) * 4750 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 4751 4752 num_elements_per_iq = 4753 (ctrl_info->max_inbound_iu_length / 4754 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4755 4756 /* Add one because one element in each queue is unusable. */ 4757 num_elements_per_iq++; 4758 4759 num_elements_per_iq = min(num_elements_per_iq, 4760 ctrl_info->max_elements_per_iq); 4761 4762 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1; 4763 num_elements_per_oq = min(num_elements_per_oq, 4764 ctrl_info->max_elements_per_oq); 4765 4766 ctrl_info->num_elements_per_iq = num_elements_per_iq; 4767 ctrl_info->num_elements_per_oq = num_elements_per_oq; 4768 4769 ctrl_info->max_sg_per_iu = 4770 ((ctrl_info->max_inbound_iu_length - 4771 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 4772 sizeof(struct pqi_sg_descriptor)) + 4773 PQI_MAX_EMBEDDED_SG_DESCRIPTORS; 4774 } 4775 4776 static inline void pqi_set_sg_descriptor( 4777 struct pqi_sg_descriptor *sg_descriptor, struct scatterlist *sg) 4778 { 4779 u64 address = (u64)sg_dma_address(sg); 4780 unsigned int length = sg_dma_len(sg); 4781 4782 put_unaligned_le64(address, &sg_descriptor->address); 4783 put_unaligned_le32(length, &sg_descriptor->length); 4784 put_unaligned_le32(0, &sg_descriptor->flags); 4785 } 4786 4787 static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info, 4788 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd, 4789 struct pqi_io_request *io_request) 4790 { 4791 int i; 4792 u16 iu_length; 4793 int sg_count; 4794 bool chained; 4795 unsigned int num_sg_in_iu; 4796 unsigned int max_sg_per_iu; 4797 struct scatterlist *sg; 4798 struct pqi_sg_descriptor *sg_descriptor; 4799 4800 sg_count = scsi_dma_map(scmd); 4801 if (sg_count < 0) 4802 return sg_count; 4803 4804 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 4805 PQI_REQUEST_HEADER_LENGTH; 4806 4807 if (sg_count == 0) 4808 goto out; 4809 4810 sg = scsi_sglist(scmd); 4811 sg_descriptor = request->sg_descriptors; 4812 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1; 4813 chained = false; 4814 num_sg_in_iu = 0; 4815 i = 0; 4816 4817 while (1) { 4818 pqi_set_sg_descriptor(sg_descriptor, sg); 4819 if (!chained) 4820 num_sg_in_iu++; 4821 i++; 4822 if (i == sg_count) 4823 break; 4824 sg_descriptor++; 4825 if (i == max_sg_per_iu) { 4826 put_unaligned_le64( 4827 (u64)io_request->sg_chain_buffer_dma_handle, 4828 &sg_descriptor->address); 4829 put_unaligned_le32((sg_count - num_sg_in_iu) 4830 * sizeof(*sg_descriptor), 4831 &sg_descriptor->length); 4832 put_unaligned_le32(CISS_SG_CHAIN, 4833 &sg_descriptor->flags); 4834 chained = true; 4835 num_sg_in_iu++; 4836 sg_descriptor = io_request->sg_chain_buffer; 4837 } 4838 sg = sg_next(sg); 4839 } 4840 4841 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 4842 request->partial = chained; 4843 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 4844 4845 out: 4846 put_unaligned_le16(iu_length, &request->header.iu_length); 4847 4848 return 0; 4849 } 4850 4851 static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info, 4852 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd, 4853 struct pqi_io_request *io_request) 4854 { 4855 int i; 4856 u16 iu_length; 4857 int sg_count; 4858 bool chained; 4859 unsigned int num_sg_in_iu; 4860 unsigned int max_sg_per_iu; 4861 struct scatterlist *sg; 4862 struct pqi_sg_descriptor *sg_descriptor; 4863 4864 sg_count = scsi_dma_map(scmd); 4865 if (sg_count < 0) 4866 return sg_count; 4867 4868 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) - 4869 PQI_REQUEST_HEADER_LENGTH; 4870 num_sg_in_iu = 0; 4871 4872 if (sg_count == 0) 4873 goto out; 4874 4875 sg = scsi_sglist(scmd); 4876 sg_descriptor = request->sg_descriptors; 4877 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1; 4878 chained = false; 4879 i = 0; 4880 4881 while (1) { 4882 pqi_set_sg_descriptor(sg_descriptor, sg); 4883 if (!chained) 4884 num_sg_in_iu++; 4885 i++; 4886 if (i == sg_count) 4887 break; 4888 sg_descriptor++; 4889 if (i == max_sg_per_iu) { 4890 put_unaligned_le64( 4891 (u64)io_request->sg_chain_buffer_dma_handle, 4892 &sg_descriptor->address); 4893 put_unaligned_le32((sg_count - num_sg_in_iu) 4894 * sizeof(*sg_descriptor), 4895 &sg_descriptor->length); 4896 put_unaligned_le32(CISS_SG_CHAIN, 4897 &sg_descriptor->flags); 4898 chained = true; 4899 num_sg_in_iu++; 4900 sg_descriptor = io_request->sg_chain_buffer; 4901 } 4902 sg = sg_next(sg); 4903 } 4904 4905 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 4906 request->partial = chained; 4907 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 4908 4909 out: 4910 put_unaligned_le16(iu_length, &request->header.iu_length); 4911 request->num_sg_descriptors = num_sg_in_iu; 4912 4913 return 0; 4914 } 4915 4916 static void pqi_raid_io_complete(struct pqi_io_request *io_request, 4917 void *context) 4918 { 4919 struct scsi_cmnd *scmd; 4920 4921 scmd = io_request->scmd; 4922 pqi_free_io_request(io_request); 4923 scsi_dma_unmap(scmd); 4924 pqi_scsi_done(scmd); 4925 } 4926 4927 static int pqi_raid_submit_scsi_cmd_with_io_request( 4928 struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request, 4929 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 4930 struct pqi_queue_group *queue_group) 4931 { 4932 int rc; 4933 size_t cdb_length; 4934 struct pqi_raid_path_request *request; 4935 4936 io_request->io_complete_callback = pqi_raid_io_complete; 4937 io_request->scmd = scmd; 4938 4939 request = io_request->iu; 4940 memset(request, 0, 4941 offsetof(struct pqi_raid_path_request, sg_descriptors)); 4942 4943 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 4944 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 4945 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 4946 put_unaligned_le16(io_request->index, &request->request_id); 4947 request->error_index = request->request_id; 4948 memcpy(request->lun_number, device->scsi3addr, 4949 sizeof(request->lun_number)); 4950 4951 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb)); 4952 memcpy(request->cdb, scmd->cmnd, cdb_length); 4953 4954 switch (cdb_length) { 4955 case 6: 4956 case 10: 4957 case 12: 4958 case 16: 4959 /* No bytes in the Additional CDB bytes field */ 4960 request->additional_cdb_bytes_usage = 4961 SOP_ADDITIONAL_CDB_BYTES_0; 4962 break; 4963 case 20: 4964 /* 4 bytes in the Additional cdb field */ 4965 request->additional_cdb_bytes_usage = 4966 SOP_ADDITIONAL_CDB_BYTES_4; 4967 break; 4968 case 24: 4969 /* 8 bytes in the Additional cdb field */ 4970 request->additional_cdb_bytes_usage = 4971 SOP_ADDITIONAL_CDB_BYTES_8; 4972 break; 4973 case 28: 4974 /* 12 bytes in the Additional cdb field */ 4975 request->additional_cdb_bytes_usage = 4976 SOP_ADDITIONAL_CDB_BYTES_12; 4977 break; 4978 case 32: 4979 default: 4980 /* 16 bytes in the Additional cdb field */ 4981 request->additional_cdb_bytes_usage = 4982 SOP_ADDITIONAL_CDB_BYTES_16; 4983 break; 4984 } 4985 4986 switch (scmd->sc_data_direction) { 4987 case DMA_TO_DEVICE: 4988 request->data_direction = SOP_READ_FLAG; 4989 break; 4990 case DMA_FROM_DEVICE: 4991 request->data_direction = SOP_WRITE_FLAG; 4992 break; 4993 case DMA_NONE: 4994 request->data_direction = SOP_NO_DIRECTION_FLAG; 4995 break; 4996 case DMA_BIDIRECTIONAL: 4997 request->data_direction = SOP_BIDIRECTIONAL; 4998 break; 4999 default: 5000 dev_err(&ctrl_info->pci_dev->dev, 5001 "unknown data direction: %d\n", 5002 scmd->sc_data_direction); 5003 break; 5004 } 5005 5006 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request); 5007 if (rc) { 5008 pqi_free_io_request(io_request); 5009 return SCSI_MLQUEUE_HOST_BUSY; 5010 } 5011 5012 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request); 5013 5014 return 0; 5015 } 5016 5017 static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5018 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5019 struct pqi_queue_group *queue_group) 5020 { 5021 struct pqi_io_request *io_request; 5022 5023 io_request = pqi_alloc_io_request(ctrl_info); 5024 5025 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request, 5026 device, scmd, queue_group); 5027 } 5028 5029 static inline void pqi_schedule_bypass_retry(struct pqi_ctrl_info *ctrl_info) 5030 { 5031 if (!pqi_ctrl_blocked(ctrl_info)) 5032 schedule_work(&ctrl_info->raid_bypass_retry_work); 5033 } 5034 5035 static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request) 5036 { 5037 struct scsi_cmnd *scmd; 5038 struct pqi_scsi_dev *device; 5039 struct pqi_ctrl_info *ctrl_info; 5040 5041 if (!io_request->raid_bypass) 5042 return false; 5043 5044 scmd = io_request->scmd; 5045 if ((scmd->result & 0xff) == SAM_STAT_GOOD) 5046 return false; 5047 if (host_byte(scmd->result) == DID_NO_CONNECT) 5048 return false; 5049 5050 device = scmd->device->hostdata; 5051 if (pqi_device_offline(device)) 5052 return false; 5053 5054 ctrl_info = shost_to_hba(scmd->device->host); 5055 if (pqi_ctrl_offline(ctrl_info)) 5056 return false; 5057 5058 return true; 5059 } 5060 5061 static inline void pqi_add_to_raid_bypass_retry_list( 5062 struct pqi_ctrl_info *ctrl_info, 5063 struct pqi_io_request *io_request, bool at_head) 5064 { 5065 unsigned long flags; 5066 5067 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags); 5068 if (at_head) 5069 list_add(&io_request->request_list_entry, 5070 &ctrl_info->raid_bypass_retry_list); 5071 else 5072 list_add_tail(&io_request->request_list_entry, 5073 &ctrl_info->raid_bypass_retry_list); 5074 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags); 5075 } 5076 5077 static void pqi_queued_raid_bypass_complete(struct pqi_io_request *io_request, 5078 void *context) 5079 { 5080 struct scsi_cmnd *scmd; 5081 5082 scmd = io_request->scmd; 5083 pqi_free_io_request(io_request); 5084 pqi_scsi_done(scmd); 5085 } 5086 5087 static void pqi_queue_raid_bypass_retry(struct pqi_io_request *io_request) 5088 { 5089 struct scsi_cmnd *scmd; 5090 struct pqi_ctrl_info *ctrl_info; 5091 5092 io_request->io_complete_callback = pqi_queued_raid_bypass_complete; 5093 scmd = io_request->scmd; 5094 scmd->result = 0; 5095 ctrl_info = shost_to_hba(scmd->device->host); 5096 5097 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request, false); 5098 pqi_schedule_bypass_retry(ctrl_info); 5099 } 5100 5101 static int pqi_retry_raid_bypass(struct pqi_io_request *io_request) 5102 { 5103 struct scsi_cmnd *scmd; 5104 struct pqi_scsi_dev *device; 5105 struct pqi_ctrl_info *ctrl_info; 5106 struct pqi_queue_group *queue_group; 5107 5108 scmd = io_request->scmd; 5109 device = scmd->device->hostdata; 5110 if (pqi_device_in_reset(device)) { 5111 pqi_free_io_request(io_request); 5112 set_host_byte(scmd, DID_RESET); 5113 pqi_scsi_done(scmd); 5114 return 0; 5115 } 5116 5117 ctrl_info = shost_to_hba(scmd->device->host); 5118 queue_group = io_request->queue_group; 5119 5120 pqi_reinit_io_request(io_request); 5121 5122 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request, 5123 device, scmd, queue_group); 5124 } 5125 5126 static inline struct pqi_io_request *pqi_next_queued_raid_bypass_request( 5127 struct pqi_ctrl_info *ctrl_info) 5128 { 5129 unsigned long flags; 5130 struct pqi_io_request *io_request; 5131 5132 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags); 5133 io_request = list_first_entry_or_null( 5134 &ctrl_info->raid_bypass_retry_list, 5135 struct pqi_io_request, request_list_entry); 5136 if (io_request) 5137 list_del(&io_request->request_list_entry); 5138 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags); 5139 5140 return io_request; 5141 } 5142 5143 static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info) 5144 { 5145 int rc; 5146 struct pqi_io_request *io_request; 5147 5148 pqi_ctrl_busy(ctrl_info); 5149 5150 while (1) { 5151 if (pqi_ctrl_blocked(ctrl_info)) 5152 break; 5153 io_request = pqi_next_queued_raid_bypass_request(ctrl_info); 5154 if (!io_request) 5155 break; 5156 rc = pqi_retry_raid_bypass(io_request); 5157 if (rc) { 5158 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request, 5159 true); 5160 pqi_schedule_bypass_retry(ctrl_info); 5161 break; 5162 } 5163 } 5164 5165 pqi_ctrl_unbusy(ctrl_info); 5166 } 5167 5168 static void pqi_raid_bypass_retry_worker(struct work_struct *work) 5169 { 5170 struct pqi_ctrl_info *ctrl_info; 5171 5172 ctrl_info = container_of(work, struct pqi_ctrl_info, 5173 raid_bypass_retry_work); 5174 pqi_retry_raid_bypass_requests(ctrl_info); 5175 } 5176 5177 static void pqi_clear_all_queued_raid_bypass_retries( 5178 struct pqi_ctrl_info *ctrl_info) 5179 { 5180 unsigned long flags; 5181 5182 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags); 5183 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list); 5184 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags); 5185 } 5186 5187 static void pqi_aio_io_complete(struct pqi_io_request *io_request, 5188 void *context) 5189 { 5190 struct scsi_cmnd *scmd; 5191 5192 scmd = io_request->scmd; 5193 scsi_dma_unmap(scmd); 5194 if (io_request->status == -EAGAIN) 5195 set_host_byte(scmd, DID_IMM_RETRY); 5196 else if (pqi_raid_bypass_retry_needed(io_request)) { 5197 pqi_queue_raid_bypass_retry(io_request); 5198 return; 5199 } 5200 pqi_free_io_request(io_request); 5201 pqi_scsi_done(scmd); 5202 } 5203 5204 static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5205 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5206 struct pqi_queue_group *queue_group) 5207 { 5208 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle, 5209 scmd->cmnd, scmd->cmd_len, queue_group, NULL, false); 5210 } 5211 5212 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 5213 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 5214 unsigned int cdb_length, struct pqi_queue_group *queue_group, 5215 struct pqi_encryption_info *encryption_info, bool raid_bypass) 5216 { 5217 int rc; 5218 struct pqi_io_request *io_request; 5219 struct pqi_aio_path_request *request; 5220 5221 io_request = pqi_alloc_io_request(ctrl_info); 5222 io_request->io_complete_callback = pqi_aio_io_complete; 5223 io_request->scmd = scmd; 5224 io_request->raid_bypass = raid_bypass; 5225 5226 request = io_request->iu; 5227 memset(request, 0, 5228 offsetof(struct pqi_raid_path_request, sg_descriptors)); 5229 5230 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO; 5231 put_unaligned_le32(aio_handle, &request->nexus_id); 5232 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 5233 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5234 put_unaligned_le16(io_request->index, &request->request_id); 5235 request->error_index = request->request_id; 5236 if (cdb_length > sizeof(request->cdb)) 5237 cdb_length = sizeof(request->cdb); 5238 request->cdb_length = cdb_length; 5239 memcpy(request->cdb, cdb, cdb_length); 5240 5241 switch (scmd->sc_data_direction) { 5242 case DMA_TO_DEVICE: 5243 request->data_direction = SOP_READ_FLAG; 5244 break; 5245 case DMA_FROM_DEVICE: 5246 request->data_direction = SOP_WRITE_FLAG; 5247 break; 5248 case DMA_NONE: 5249 request->data_direction = SOP_NO_DIRECTION_FLAG; 5250 break; 5251 case DMA_BIDIRECTIONAL: 5252 request->data_direction = SOP_BIDIRECTIONAL; 5253 break; 5254 default: 5255 dev_err(&ctrl_info->pci_dev->dev, 5256 "unknown data direction: %d\n", 5257 scmd->sc_data_direction); 5258 break; 5259 } 5260 5261 if (encryption_info) { 5262 request->encryption_enable = true; 5263 put_unaligned_le16(encryption_info->data_encryption_key_index, 5264 &request->data_encryption_key_index); 5265 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5266 &request->encrypt_tweak_lower); 5267 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5268 &request->encrypt_tweak_upper); 5269 } 5270 5271 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request); 5272 if (rc) { 5273 pqi_free_io_request(io_request); 5274 return SCSI_MLQUEUE_HOST_BUSY; 5275 } 5276 5277 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5278 5279 return 0; 5280 } 5281 5282 static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info, 5283 struct scsi_cmnd *scmd) 5284 { 5285 u16 hw_queue; 5286 5287 hw_queue = blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scmd->request)); 5288 if (hw_queue > ctrl_info->max_hw_queue_index) 5289 hw_queue = 0; 5290 5291 return hw_queue; 5292 } 5293 5294 /* 5295 * This function gets called just before we hand the completed SCSI request 5296 * back to the SML. 5297 */ 5298 5299 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd) 5300 { 5301 struct pqi_scsi_dev *device; 5302 5303 if (!scmd->device) { 5304 set_host_byte(scmd, DID_NO_CONNECT); 5305 return; 5306 } 5307 5308 device = scmd->device->hostdata; 5309 if (!device) { 5310 set_host_byte(scmd, DID_NO_CONNECT); 5311 return; 5312 } 5313 5314 atomic_dec(&device->scsi_cmds_outstanding); 5315 } 5316 5317 static int pqi_scsi_queue_command(struct Scsi_Host *shost, 5318 struct scsi_cmnd *scmd) 5319 { 5320 int rc; 5321 struct pqi_ctrl_info *ctrl_info; 5322 struct pqi_scsi_dev *device; 5323 u16 hw_queue; 5324 struct pqi_queue_group *queue_group; 5325 bool raid_bypassed; 5326 5327 device = scmd->device->hostdata; 5328 ctrl_info = shost_to_hba(shost); 5329 5330 if (!device) { 5331 set_host_byte(scmd, DID_NO_CONNECT); 5332 pqi_scsi_done(scmd); 5333 return 0; 5334 } 5335 5336 atomic_inc(&device->scsi_cmds_outstanding); 5337 5338 if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(ctrl_info, 5339 device)) { 5340 set_host_byte(scmd, DID_NO_CONNECT); 5341 pqi_scsi_done(scmd); 5342 return 0; 5343 } 5344 5345 pqi_ctrl_busy(ctrl_info); 5346 if (pqi_ctrl_blocked(ctrl_info) || pqi_device_in_reset(device) || 5347 pqi_ctrl_in_ofa(ctrl_info)) { 5348 rc = SCSI_MLQUEUE_HOST_BUSY; 5349 goto out; 5350 } 5351 5352 /* 5353 * This is necessary because the SML doesn't zero out this field during 5354 * error recovery. 5355 */ 5356 scmd->result = 0; 5357 5358 hw_queue = pqi_get_hw_queue(ctrl_info, scmd); 5359 queue_group = &ctrl_info->queue_groups[hw_queue]; 5360 5361 if (pqi_is_logical_device(device)) { 5362 raid_bypassed = false; 5363 if (device->raid_bypass_enabled && 5364 !blk_rq_is_passthrough(scmd->request)) { 5365 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device, 5366 scmd, queue_group); 5367 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY) 5368 raid_bypassed = true; 5369 } 5370 if (!raid_bypassed) 5371 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, 5372 queue_group); 5373 } else { 5374 if (device->aio_enabled) 5375 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, 5376 queue_group); 5377 else 5378 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, 5379 queue_group); 5380 } 5381 5382 out: 5383 pqi_ctrl_unbusy(ctrl_info); 5384 if (rc) 5385 atomic_dec(&device->scsi_cmds_outstanding); 5386 5387 return rc; 5388 } 5389 5390 static int pqi_wait_until_queued_io_drained(struct pqi_ctrl_info *ctrl_info, 5391 struct pqi_queue_group *queue_group) 5392 { 5393 unsigned int path; 5394 unsigned long flags; 5395 bool list_is_empty; 5396 5397 for (path = 0; path < 2; path++) { 5398 while (1) { 5399 spin_lock_irqsave( 5400 &queue_group->submit_lock[path], flags); 5401 list_is_empty = 5402 list_empty(&queue_group->request_list[path]); 5403 spin_unlock_irqrestore( 5404 &queue_group->submit_lock[path], flags); 5405 if (list_is_empty) 5406 break; 5407 pqi_check_ctrl_health(ctrl_info); 5408 if (pqi_ctrl_offline(ctrl_info)) 5409 return -ENXIO; 5410 usleep_range(1000, 2000); 5411 } 5412 } 5413 5414 return 0; 5415 } 5416 5417 static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info) 5418 { 5419 int rc; 5420 unsigned int i; 5421 unsigned int path; 5422 struct pqi_queue_group *queue_group; 5423 pqi_index_t iq_pi; 5424 pqi_index_t iq_ci; 5425 5426 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5427 queue_group = &ctrl_info->queue_groups[i]; 5428 5429 rc = pqi_wait_until_queued_io_drained(ctrl_info, queue_group); 5430 if (rc) 5431 return rc; 5432 5433 for (path = 0; path < 2; path++) { 5434 iq_pi = queue_group->iq_pi_copy[path]; 5435 5436 while (1) { 5437 iq_ci = readl(queue_group->iq_ci[path]); 5438 if (iq_ci == iq_pi) 5439 break; 5440 pqi_check_ctrl_health(ctrl_info); 5441 if (pqi_ctrl_offline(ctrl_info)) 5442 return -ENXIO; 5443 usleep_range(1000, 2000); 5444 } 5445 } 5446 } 5447 5448 return 0; 5449 } 5450 5451 static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info, 5452 struct pqi_scsi_dev *device) 5453 { 5454 unsigned int i; 5455 unsigned int path; 5456 struct pqi_queue_group *queue_group; 5457 unsigned long flags; 5458 struct pqi_io_request *io_request; 5459 struct pqi_io_request *next; 5460 struct scsi_cmnd *scmd; 5461 struct pqi_scsi_dev *scsi_device; 5462 5463 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5464 queue_group = &ctrl_info->queue_groups[i]; 5465 5466 for (path = 0; path < 2; path++) { 5467 spin_lock_irqsave( 5468 &queue_group->submit_lock[path], flags); 5469 5470 list_for_each_entry_safe(io_request, next, 5471 &queue_group->request_list[path], 5472 request_list_entry) { 5473 scmd = io_request->scmd; 5474 if (!scmd) 5475 continue; 5476 5477 scsi_device = scmd->device->hostdata; 5478 if (scsi_device != device) 5479 continue; 5480 5481 list_del(&io_request->request_list_entry); 5482 set_host_byte(scmd, DID_RESET); 5483 pqi_scsi_done(scmd); 5484 } 5485 5486 spin_unlock_irqrestore( 5487 &queue_group->submit_lock[path], flags); 5488 } 5489 } 5490 } 5491 5492 static void pqi_fail_io_queued_for_all_devices(struct pqi_ctrl_info *ctrl_info) 5493 { 5494 unsigned int i; 5495 unsigned int path; 5496 struct pqi_queue_group *queue_group; 5497 unsigned long flags; 5498 struct pqi_io_request *io_request; 5499 struct pqi_io_request *next; 5500 struct scsi_cmnd *scmd; 5501 5502 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5503 queue_group = &ctrl_info->queue_groups[i]; 5504 5505 for (path = 0; path < 2; path++) { 5506 spin_lock_irqsave(&queue_group->submit_lock[path], 5507 flags); 5508 5509 list_for_each_entry_safe(io_request, next, 5510 &queue_group->request_list[path], 5511 request_list_entry) { 5512 5513 scmd = io_request->scmd; 5514 if (!scmd) 5515 continue; 5516 5517 list_del(&io_request->request_list_entry); 5518 set_host_byte(scmd, DID_RESET); 5519 pqi_scsi_done(scmd); 5520 } 5521 5522 spin_unlock_irqrestore( 5523 &queue_group->submit_lock[path], flags); 5524 } 5525 } 5526 } 5527 5528 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 5529 struct pqi_scsi_dev *device, unsigned long timeout_secs) 5530 { 5531 unsigned long timeout; 5532 5533 timeout = (timeout_secs * PQI_HZ) + jiffies; 5534 5535 while (atomic_read(&device->scsi_cmds_outstanding)) { 5536 pqi_check_ctrl_health(ctrl_info); 5537 if (pqi_ctrl_offline(ctrl_info)) 5538 return -ENXIO; 5539 if (timeout_secs != NO_TIMEOUT) { 5540 if (time_after(jiffies, timeout)) { 5541 dev_err(&ctrl_info->pci_dev->dev, 5542 "timed out waiting for pending IO\n"); 5543 return -ETIMEDOUT; 5544 } 5545 } 5546 usleep_range(1000, 2000); 5547 } 5548 5549 return 0; 5550 } 5551 5552 static int pqi_ctrl_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 5553 unsigned long timeout_secs) 5554 { 5555 bool io_pending; 5556 unsigned long flags; 5557 unsigned long timeout; 5558 struct pqi_scsi_dev *device; 5559 5560 timeout = (timeout_secs * PQI_HZ) + jiffies; 5561 while (1) { 5562 io_pending = false; 5563 5564 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 5565 list_for_each_entry(device, &ctrl_info->scsi_device_list, 5566 scsi_device_list_entry) { 5567 if (atomic_read(&device->scsi_cmds_outstanding)) { 5568 io_pending = true; 5569 break; 5570 } 5571 } 5572 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, 5573 flags); 5574 5575 if (!io_pending) 5576 break; 5577 5578 pqi_check_ctrl_health(ctrl_info); 5579 if (pqi_ctrl_offline(ctrl_info)) 5580 return -ENXIO; 5581 5582 if (timeout_secs != NO_TIMEOUT) { 5583 if (time_after(jiffies, timeout)) { 5584 dev_err(&ctrl_info->pci_dev->dev, 5585 "timed out waiting for pending IO\n"); 5586 return -ETIMEDOUT; 5587 } 5588 } 5589 usleep_range(1000, 2000); 5590 } 5591 5592 return 0; 5593 } 5594 5595 static void pqi_lun_reset_complete(struct pqi_io_request *io_request, 5596 void *context) 5597 { 5598 struct completion *waiting = context; 5599 5600 complete(waiting); 5601 } 5602 5603 #define PQI_LUN_RESET_TIMEOUT_SECS 10 5604 5605 static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info, 5606 struct pqi_scsi_dev *device, struct completion *wait) 5607 { 5608 int rc; 5609 5610 while (1) { 5611 if (wait_for_completion_io_timeout(wait, 5612 PQI_LUN_RESET_TIMEOUT_SECS * PQI_HZ)) { 5613 rc = 0; 5614 break; 5615 } 5616 5617 pqi_check_ctrl_health(ctrl_info); 5618 if (pqi_ctrl_offline(ctrl_info)) { 5619 rc = -ENXIO; 5620 break; 5621 } 5622 } 5623 5624 return rc; 5625 } 5626 5627 static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info, 5628 struct pqi_scsi_dev *device) 5629 { 5630 int rc; 5631 struct pqi_io_request *io_request; 5632 DECLARE_COMPLETION_ONSTACK(wait); 5633 struct pqi_task_management_request *request; 5634 5635 io_request = pqi_alloc_io_request(ctrl_info); 5636 io_request->io_complete_callback = pqi_lun_reset_complete; 5637 io_request->context = &wait; 5638 5639 request = io_request->iu; 5640 memset(request, 0, sizeof(*request)); 5641 5642 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT; 5643 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH, 5644 &request->header.iu_length); 5645 put_unaligned_le16(io_request->index, &request->request_id); 5646 memcpy(request->lun_number, device->scsi3addr, 5647 sizeof(request->lun_number)); 5648 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET; 5649 5650 pqi_start_io(ctrl_info, 5651 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 5652 io_request); 5653 5654 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, &wait); 5655 if (rc == 0) 5656 rc = io_request->status; 5657 5658 pqi_free_io_request(io_request); 5659 5660 return rc; 5661 } 5662 5663 #define PQI_LUN_RESET_RETRIES 3 5664 #define PQI_LUN_RESET_RETRY_INTERVAL_MSECS 10000 5665 /* Performs a reset at the LUN level. */ 5666 5667 static int _pqi_device_reset(struct pqi_ctrl_info *ctrl_info, 5668 struct pqi_scsi_dev *device) 5669 { 5670 int rc; 5671 unsigned int retries; 5672 unsigned long timeout_secs; 5673 5674 for (retries = 0;;) { 5675 rc = pqi_lun_reset(ctrl_info, device); 5676 if (rc != -EAGAIN || 5677 ++retries > PQI_LUN_RESET_RETRIES) 5678 break; 5679 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS); 5680 } 5681 timeout_secs = rc ? PQI_LUN_RESET_TIMEOUT_SECS : NO_TIMEOUT; 5682 5683 rc |= pqi_device_wait_for_pending_io(ctrl_info, device, timeout_secs); 5684 5685 return rc == 0 ? SUCCESS : FAILED; 5686 } 5687 5688 static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info, 5689 struct pqi_scsi_dev *device) 5690 { 5691 int rc; 5692 5693 mutex_lock(&ctrl_info->lun_reset_mutex); 5694 5695 pqi_ctrl_block_requests(ctrl_info); 5696 pqi_ctrl_wait_until_quiesced(ctrl_info); 5697 pqi_fail_io_queued_for_device(ctrl_info, device); 5698 rc = pqi_wait_until_inbound_queues_empty(ctrl_info); 5699 pqi_device_reset_start(device); 5700 pqi_ctrl_unblock_requests(ctrl_info); 5701 5702 if (rc) 5703 rc = FAILED; 5704 else 5705 rc = _pqi_device_reset(ctrl_info, device); 5706 5707 pqi_device_reset_done(device); 5708 5709 mutex_unlock(&ctrl_info->lun_reset_mutex); 5710 return rc; 5711 } 5712 5713 static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd) 5714 { 5715 int rc; 5716 struct Scsi_Host *shost; 5717 struct pqi_ctrl_info *ctrl_info; 5718 struct pqi_scsi_dev *device; 5719 5720 shost = scmd->device->host; 5721 ctrl_info = shost_to_hba(shost); 5722 device = scmd->device->hostdata; 5723 5724 dev_err(&ctrl_info->pci_dev->dev, 5725 "resetting scsi %d:%d:%d:%d\n", 5726 shost->host_no, device->bus, device->target, device->lun); 5727 5728 pqi_check_ctrl_health(ctrl_info); 5729 if (pqi_ctrl_offline(ctrl_info)) { 5730 dev_err(&ctrl_info->pci_dev->dev, 5731 "controller %u offlined - cannot send device reset\n", 5732 ctrl_info->ctrl_id); 5733 rc = FAILED; 5734 goto out; 5735 } 5736 5737 pqi_wait_until_ofa_finished(ctrl_info); 5738 5739 rc = pqi_device_reset(ctrl_info, device); 5740 out: 5741 dev_err(&ctrl_info->pci_dev->dev, 5742 "reset of scsi %d:%d:%d:%d: %s\n", 5743 shost->host_no, device->bus, device->target, device->lun, 5744 rc == SUCCESS ? "SUCCESS" : "FAILED"); 5745 5746 return rc; 5747 } 5748 5749 static int pqi_slave_alloc(struct scsi_device *sdev) 5750 { 5751 struct pqi_scsi_dev *device; 5752 unsigned long flags; 5753 struct pqi_ctrl_info *ctrl_info; 5754 struct scsi_target *starget; 5755 struct sas_rphy *rphy; 5756 5757 ctrl_info = shost_to_hba(sdev->host); 5758 5759 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 5760 5761 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) { 5762 starget = scsi_target(sdev); 5763 rphy = target_to_rphy(starget); 5764 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy); 5765 if (device) { 5766 device->target = sdev_id(sdev); 5767 device->lun = sdev->lun; 5768 device->target_lun_valid = true; 5769 } 5770 } else { 5771 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev), 5772 sdev_id(sdev), sdev->lun); 5773 } 5774 5775 if (device) { 5776 sdev->hostdata = device; 5777 device->sdev = sdev; 5778 if (device->queue_depth) { 5779 device->advertised_queue_depth = device->queue_depth; 5780 scsi_change_queue_depth(sdev, 5781 device->advertised_queue_depth); 5782 } 5783 if (pqi_is_logical_device(device)) 5784 pqi_disable_write_same(sdev); 5785 else 5786 sdev->allow_restart = 1; 5787 } 5788 5789 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 5790 5791 return 0; 5792 } 5793 5794 static int pqi_map_queues(struct Scsi_Host *shost) 5795 { 5796 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 5797 5798 return blk_mq_pci_map_queues(&shost->tag_set.map[0], 5799 ctrl_info->pci_dev, 0); 5800 } 5801 5802 static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, 5803 void __user *arg) 5804 { 5805 struct pci_dev *pci_dev; 5806 u32 subsystem_vendor; 5807 u32 subsystem_device; 5808 cciss_pci_info_struct pciinfo; 5809 5810 if (!arg) 5811 return -EINVAL; 5812 5813 pci_dev = ctrl_info->pci_dev; 5814 5815 pciinfo.domain = pci_domain_nr(pci_dev->bus); 5816 pciinfo.bus = pci_dev->bus->number; 5817 pciinfo.dev_fn = pci_dev->devfn; 5818 subsystem_vendor = pci_dev->subsystem_vendor; 5819 subsystem_device = pci_dev->subsystem_device; 5820 pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) | 5821 subsystem_vendor; 5822 5823 if (copy_to_user(arg, &pciinfo, sizeof(pciinfo))) 5824 return -EFAULT; 5825 5826 return 0; 5827 } 5828 5829 static int pqi_getdrivver_ioctl(void __user *arg) 5830 { 5831 u32 version; 5832 5833 if (!arg) 5834 return -EINVAL; 5835 5836 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) | 5837 (DRIVER_RELEASE << 16) | DRIVER_REVISION; 5838 5839 if (copy_to_user(arg, &version, sizeof(version))) 5840 return -EFAULT; 5841 5842 return 0; 5843 } 5844 5845 struct ciss_error_info { 5846 u8 scsi_status; 5847 int command_status; 5848 size_t sense_data_length; 5849 }; 5850 5851 static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info, 5852 struct ciss_error_info *ciss_error_info) 5853 { 5854 int ciss_cmd_status; 5855 size_t sense_data_length; 5856 5857 switch (pqi_error_info->data_out_result) { 5858 case PQI_DATA_IN_OUT_GOOD: 5859 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS; 5860 break; 5861 case PQI_DATA_IN_OUT_UNDERFLOW: 5862 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN; 5863 break; 5864 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 5865 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN; 5866 break; 5867 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 5868 case PQI_DATA_IN_OUT_BUFFER_ERROR: 5869 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 5870 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 5871 case PQI_DATA_IN_OUT_ERROR: 5872 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR; 5873 break; 5874 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 5875 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 5876 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 5877 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 5878 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 5879 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 5880 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 5881 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 5882 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 5883 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 5884 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR; 5885 break; 5886 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 5887 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT; 5888 break; 5889 case PQI_DATA_IN_OUT_ABORTED: 5890 ciss_cmd_status = CISS_CMD_STATUS_ABORTED; 5891 break; 5892 case PQI_DATA_IN_OUT_TIMEOUT: 5893 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT; 5894 break; 5895 default: 5896 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS; 5897 break; 5898 } 5899 5900 sense_data_length = 5901 get_unaligned_le16(&pqi_error_info->sense_data_length); 5902 if (sense_data_length == 0) 5903 sense_data_length = 5904 get_unaligned_le16(&pqi_error_info->response_data_length); 5905 if (sense_data_length) 5906 if (sense_data_length > sizeof(pqi_error_info->data)) 5907 sense_data_length = sizeof(pqi_error_info->data); 5908 5909 ciss_error_info->scsi_status = pqi_error_info->status; 5910 ciss_error_info->command_status = ciss_cmd_status; 5911 ciss_error_info->sense_data_length = sense_data_length; 5912 } 5913 5914 static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 5915 { 5916 int rc; 5917 char *kernel_buffer = NULL; 5918 u16 iu_length; 5919 size_t sense_data_length; 5920 IOCTL_Command_struct iocommand; 5921 struct pqi_raid_path_request request; 5922 struct pqi_raid_error_info pqi_error_info; 5923 struct ciss_error_info ciss_error_info; 5924 5925 if (pqi_ctrl_offline(ctrl_info)) 5926 return -ENXIO; 5927 if (!arg) 5928 return -EINVAL; 5929 if (!capable(CAP_SYS_RAWIO)) 5930 return -EPERM; 5931 if (copy_from_user(&iocommand, arg, sizeof(iocommand))) 5932 return -EFAULT; 5933 if (iocommand.buf_size < 1 && 5934 iocommand.Request.Type.Direction != XFER_NONE) 5935 return -EINVAL; 5936 if (iocommand.Request.CDBLen > sizeof(request.cdb)) 5937 return -EINVAL; 5938 if (iocommand.Request.Type.Type != TYPE_CMD) 5939 return -EINVAL; 5940 5941 switch (iocommand.Request.Type.Direction) { 5942 case XFER_NONE: 5943 case XFER_WRITE: 5944 case XFER_READ: 5945 case XFER_READ | XFER_WRITE: 5946 break; 5947 default: 5948 return -EINVAL; 5949 } 5950 5951 if (iocommand.buf_size > 0) { 5952 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL); 5953 if (!kernel_buffer) 5954 return -ENOMEM; 5955 if (iocommand.Request.Type.Direction & XFER_WRITE) { 5956 if (copy_from_user(kernel_buffer, iocommand.buf, 5957 iocommand.buf_size)) { 5958 rc = -EFAULT; 5959 goto out; 5960 } 5961 } else { 5962 memset(kernel_buffer, 0, iocommand.buf_size); 5963 } 5964 } 5965 5966 memset(&request, 0, sizeof(request)); 5967 5968 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 5969 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 5970 PQI_REQUEST_HEADER_LENGTH; 5971 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes, 5972 sizeof(request.lun_number)); 5973 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen); 5974 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 5975 5976 switch (iocommand.Request.Type.Direction) { 5977 case XFER_NONE: 5978 request.data_direction = SOP_NO_DIRECTION_FLAG; 5979 break; 5980 case XFER_WRITE: 5981 request.data_direction = SOP_WRITE_FLAG; 5982 break; 5983 case XFER_READ: 5984 request.data_direction = SOP_READ_FLAG; 5985 break; 5986 case XFER_READ | XFER_WRITE: 5987 request.data_direction = SOP_BIDIRECTIONAL; 5988 break; 5989 } 5990 5991 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5992 5993 if (iocommand.buf_size > 0) { 5994 put_unaligned_le32(iocommand.buf_size, &request.buffer_length); 5995 5996 rc = pqi_map_single(ctrl_info->pci_dev, 5997 &request.sg_descriptors[0], kernel_buffer, 5998 iocommand.buf_size, DMA_BIDIRECTIONAL); 5999 if (rc) 6000 goto out; 6001 6002 iu_length += sizeof(request.sg_descriptors[0]); 6003 } 6004 6005 put_unaligned_le16(iu_length, &request.header.iu_length); 6006 6007 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 6008 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info, NO_TIMEOUT); 6009 6010 if (iocommand.buf_size > 0) 6011 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 6012 DMA_BIDIRECTIONAL); 6013 6014 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info)); 6015 6016 if (rc == 0) { 6017 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info); 6018 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status; 6019 iocommand.error_info.CommandStatus = 6020 ciss_error_info.command_status; 6021 sense_data_length = ciss_error_info.sense_data_length; 6022 if (sense_data_length) { 6023 if (sense_data_length > 6024 sizeof(iocommand.error_info.SenseInfo)) 6025 sense_data_length = 6026 sizeof(iocommand.error_info.SenseInfo); 6027 memcpy(iocommand.error_info.SenseInfo, 6028 pqi_error_info.data, sense_data_length); 6029 iocommand.error_info.SenseLen = sense_data_length; 6030 } 6031 } 6032 6033 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) { 6034 rc = -EFAULT; 6035 goto out; 6036 } 6037 6038 if (rc == 0 && iocommand.buf_size > 0 && 6039 (iocommand.Request.Type.Direction & XFER_READ)) { 6040 if (copy_to_user(iocommand.buf, kernel_buffer, 6041 iocommand.buf_size)) { 6042 rc = -EFAULT; 6043 } 6044 } 6045 6046 out: 6047 kfree(kernel_buffer); 6048 6049 return rc; 6050 } 6051 6052 static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd, 6053 void __user *arg) 6054 { 6055 int rc; 6056 struct pqi_ctrl_info *ctrl_info; 6057 6058 ctrl_info = shost_to_hba(sdev->host); 6059 6060 if (pqi_ctrl_in_ofa(ctrl_info)) 6061 return -EBUSY; 6062 6063 switch (cmd) { 6064 case CCISS_DEREGDISK: 6065 case CCISS_REGNEWDISK: 6066 case CCISS_REGNEWD: 6067 rc = pqi_scan_scsi_devices(ctrl_info); 6068 break; 6069 case CCISS_GETPCIINFO: 6070 rc = pqi_getpciinfo_ioctl(ctrl_info, arg); 6071 break; 6072 case CCISS_GETDRIVVER: 6073 rc = pqi_getdrivver_ioctl(arg); 6074 break; 6075 case CCISS_PASSTHRU: 6076 rc = pqi_passthru_ioctl(ctrl_info, arg); 6077 break; 6078 default: 6079 rc = -EINVAL; 6080 break; 6081 } 6082 6083 return rc; 6084 } 6085 6086 static ssize_t pqi_version_show(struct device *dev, 6087 struct device_attribute *attr, char *buffer) 6088 { 6089 ssize_t count = 0; 6090 struct Scsi_Host *shost; 6091 struct pqi_ctrl_info *ctrl_info; 6092 6093 shost = class_to_shost(dev); 6094 ctrl_info = shost_to_hba(shost); 6095 6096 count += snprintf(buffer + count, PAGE_SIZE - count, 6097 " driver: %s\n", DRIVER_VERSION BUILD_TIMESTAMP); 6098 6099 count += snprintf(buffer + count, PAGE_SIZE - count, 6100 "firmware: %s\n", ctrl_info->firmware_version); 6101 6102 return count; 6103 } 6104 6105 static ssize_t pqi_host_rescan_store(struct device *dev, 6106 struct device_attribute *attr, const char *buffer, size_t count) 6107 { 6108 struct Scsi_Host *shost = class_to_shost(dev); 6109 6110 pqi_scan_start(shost); 6111 6112 return count; 6113 } 6114 6115 static ssize_t pqi_lockup_action_show(struct device *dev, 6116 struct device_attribute *attr, char *buffer) 6117 { 6118 int count = 0; 6119 unsigned int i; 6120 6121 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 6122 if (pqi_lockup_actions[i].action == pqi_lockup_action) 6123 count += snprintf(buffer + count, PAGE_SIZE - count, 6124 "[%s] ", pqi_lockup_actions[i].name); 6125 else 6126 count += snprintf(buffer + count, PAGE_SIZE - count, 6127 "%s ", pqi_lockup_actions[i].name); 6128 } 6129 6130 count += snprintf(buffer + count, PAGE_SIZE - count, "\n"); 6131 6132 return count; 6133 } 6134 6135 static ssize_t pqi_lockup_action_store(struct device *dev, 6136 struct device_attribute *attr, const char *buffer, size_t count) 6137 { 6138 unsigned int i; 6139 char *action_name; 6140 char action_name_buffer[32]; 6141 6142 strlcpy(action_name_buffer, buffer, sizeof(action_name_buffer)); 6143 action_name = strstrip(action_name_buffer); 6144 6145 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 6146 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) { 6147 pqi_lockup_action = pqi_lockup_actions[i].action; 6148 return count; 6149 } 6150 } 6151 6152 return -EINVAL; 6153 } 6154 6155 static DEVICE_ATTR(version, 0444, pqi_version_show, NULL); 6156 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store); 6157 static DEVICE_ATTR(lockup_action, 0644, 6158 pqi_lockup_action_show, pqi_lockup_action_store); 6159 6160 static struct device_attribute *pqi_shost_attrs[] = { 6161 &dev_attr_version, 6162 &dev_attr_rescan, 6163 &dev_attr_lockup_action, 6164 NULL 6165 }; 6166 6167 static ssize_t pqi_unique_id_show(struct device *dev, 6168 struct device_attribute *attr, char *buffer) 6169 { 6170 struct pqi_ctrl_info *ctrl_info; 6171 struct scsi_device *sdev; 6172 struct pqi_scsi_dev *device; 6173 unsigned long flags; 6174 unsigned char uid[16]; 6175 6176 sdev = to_scsi_device(dev); 6177 ctrl_info = shost_to_hba(sdev->host); 6178 6179 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6180 6181 device = sdev->hostdata; 6182 if (!device) { 6183 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, 6184 flags); 6185 return -ENODEV; 6186 } 6187 memcpy(uid, device->unique_id, sizeof(uid)); 6188 6189 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6190 6191 return snprintf(buffer, PAGE_SIZE, 6192 "%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X%02X\n", 6193 uid[0], uid[1], uid[2], uid[3], 6194 uid[4], uid[5], uid[6], uid[7], 6195 uid[8], uid[9], uid[10], uid[11], 6196 uid[12], uid[13], uid[14], uid[15]); 6197 } 6198 6199 static ssize_t pqi_lunid_show(struct device *dev, 6200 struct device_attribute *attr, char *buffer) 6201 { 6202 struct pqi_ctrl_info *ctrl_info; 6203 struct scsi_device *sdev; 6204 struct pqi_scsi_dev *device; 6205 unsigned long flags; 6206 u8 lunid[8]; 6207 6208 sdev = to_scsi_device(dev); 6209 ctrl_info = shost_to_hba(sdev->host); 6210 6211 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6212 6213 device = sdev->hostdata; 6214 if (!device) { 6215 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, 6216 flags); 6217 return -ENODEV; 6218 } 6219 memcpy(lunid, device->scsi3addr, sizeof(lunid)); 6220 6221 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6222 6223 return snprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid); 6224 } 6225 6226 #define MAX_PATHS 8 6227 static ssize_t pqi_path_info_show(struct device *dev, 6228 struct device_attribute *attr, char *buf) 6229 { 6230 struct pqi_ctrl_info *ctrl_info; 6231 struct scsi_device *sdev; 6232 struct pqi_scsi_dev *device; 6233 unsigned long flags; 6234 int i; 6235 int output_len = 0; 6236 u8 box; 6237 u8 bay; 6238 u8 path_map_index = 0; 6239 char *active; 6240 unsigned char phys_connector[2]; 6241 6242 sdev = to_scsi_device(dev); 6243 ctrl_info = shost_to_hba(sdev->host); 6244 6245 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6246 6247 device = sdev->hostdata; 6248 if (!device) { 6249 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, 6250 flags); 6251 return -ENODEV; 6252 } 6253 6254 bay = device->bay; 6255 for (i = 0; i < MAX_PATHS; i++) { 6256 path_map_index = 1<<i; 6257 if (i == device->active_path_index) 6258 active = "Active"; 6259 else if (device->path_map & path_map_index) 6260 active = "Inactive"; 6261 else 6262 continue; 6263 6264 output_len += scnprintf(buf + output_len, 6265 PAGE_SIZE - output_len, 6266 "[%d:%d:%d:%d] %20.20s ", 6267 ctrl_info->scsi_host->host_no, 6268 device->bus, device->target, 6269 device->lun, 6270 scsi_device_type(device->devtype)); 6271 6272 if (device->devtype == TYPE_RAID || 6273 pqi_is_logical_device(device)) 6274 goto end_buffer; 6275 6276 memcpy(&phys_connector, &device->phys_connector[i], 6277 sizeof(phys_connector)); 6278 if (phys_connector[0] < '0') 6279 phys_connector[0] = '0'; 6280 if (phys_connector[1] < '0') 6281 phys_connector[1] = '0'; 6282 6283 output_len += scnprintf(buf + output_len, 6284 PAGE_SIZE - output_len, 6285 "PORT: %.2s ", phys_connector); 6286 6287 box = device->box[i]; 6288 if (box != 0 && box != 0xFF) 6289 output_len += scnprintf(buf + output_len, 6290 PAGE_SIZE - output_len, 6291 "BOX: %hhu ", box); 6292 6293 if ((device->devtype == TYPE_DISK || 6294 device->devtype == TYPE_ZBC) && 6295 pqi_expose_device(device)) 6296 output_len += scnprintf(buf + output_len, 6297 PAGE_SIZE - output_len, 6298 "BAY: %hhu ", bay); 6299 6300 end_buffer: 6301 output_len += scnprintf(buf + output_len, 6302 PAGE_SIZE - output_len, 6303 "%s\n", active); 6304 } 6305 6306 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6307 return output_len; 6308 } 6309 6310 6311 static ssize_t pqi_sas_address_show(struct device *dev, 6312 struct device_attribute *attr, char *buffer) 6313 { 6314 struct pqi_ctrl_info *ctrl_info; 6315 struct scsi_device *sdev; 6316 struct pqi_scsi_dev *device; 6317 unsigned long flags; 6318 u64 sas_address; 6319 6320 sdev = to_scsi_device(dev); 6321 ctrl_info = shost_to_hba(sdev->host); 6322 6323 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6324 6325 device = sdev->hostdata; 6326 if (pqi_is_logical_device(device)) { 6327 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, 6328 flags); 6329 return -ENODEV; 6330 } 6331 sas_address = device->sas_address; 6332 6333 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6334 6335 return snprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address); 6336 } 6337 6338 static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev, 6339 struct device_attribute *attr, char *buffer) 6340 { 6341 struct pqi_ctrl_info *ctrl_info; 6342 struct scsi_device *sdev; 6343 struct pqi_scsi_dev *device; 6344 unsigned long flags; 6345 6346 sdev = to_scsi_device(dev); 6347 ctrl_info = shost_to_hba(sdev->host); 6348 6349 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6350 6351 device = sdev->hostdata; 6352 buffer[0] = device->raid_bypass_enabled ? '1' : '0'; 6353 buffer[1] = '\n'; 6354 buffer[2] = '\0'; 6355 6356 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6357 6358 return 2; 6359 } 6360 6361 static ssize_t pqi_raid_level_show(struct device *dev, 6362 struct device_attribute *attr, char *buffer) 6363 { 6364 struct pqi_ctrl_info *ctrl_info; 6365 struct scsi_device *sdev; 6366 struct pqi_scsi_dev *device; 6367 unsigned long flags; 6368 char *raid_level; 6369 6370 sdev = to_scsi_device(dev); 6371 ctrl_info = shost_to_hba(sdev->host); 6372 6373 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6374 6375 device = sdev->hostdata; 6376 6377 if (pqi_is_logical_device(device)) 6378 raid_level = pqi_raid_level_to_string(device->raid_level); 6379 else 6380 raid_level = "N/A"; 6381 6382 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6383 6384 return snprintf(buffer, PAGE_SIZE, "%s\n", raid_level); 6385 } 6386 6387 static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL); 6388 static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL); 6389 static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL); 6390 static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL); 6391 static DEVICE_ATTR(ssd_smart_path_enabled, 0444, 6392 pqi_ssd_smart_path_enabled_show, NULL); 6393 static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL); 6394 6395 static struct device_attribute *pqi_sdev_attrs[] = { 6396 &dev_attr_lunid, 6397 &dev_attr_unique_id, 6398 &dev_attr_path_info, 6399 &dev_attr_sas_address, 6400 &dev_attr_ssd_smart_path_enabled, 6401 &dev_attr_raid_level, 6402 NULL 6403 }; 6404 6405 static struct scsi_host_template pqi_driver_template = { 6406 .module = THIS_MODULE, 6407 .name = DRIVER_NAME_SHORT, 6408 .proc_name = DRIVER_NAME_SHORT, 6409 .queuecommand = pqi_scsi_queue_command, 6410 .scan_start = pqi_scan_start, 6411 .scan_finished = pqi_scan_finished, 6412 .this_id = -1, 6413 .eh_device_reset_handler = pqi_eh_device_reset_handler, 6414 .ioctl = pqi_ioctl, 6415 .slave_alloc = pqi_slave_alloc, 6416 .map_queues = pqi_map_queues, 6417 .sdev_attrs = pqi_sdev_attrs, 6418 .shost_attrs = pqi_shost_attrs, 6419 }; 6420 6421 static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info) 6422 { 6423 int rc; 6424 struct Scsi_Host *shost; 6425 6426 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info)); 6427 if (!shost) { 6428 dev_err(&ctrl_info->pci_dev->dev, 6429 "scsi_host_alloc failed for controller %u\n", 6430 ctrl_info->ctrl_id); 6431 return -ENOMEM; 6432 } 6433 6434 shost->io_port = 0; 6435 shost->n_io_port = 0; 6436 shost->this_id = -1; 6437 shost->max_channel = PQI_MAX_BUS; 6438 shost->max_cmd_len = MAX_COMMAND_SIZE; 6439 shost->max_lun = ~0; 6440 shost->max_id = ~0; 6441 shost->max_sectors = ctrl_info->max_sectors; 6442 shost->can_queue = ctrl_info->scsi_ml_can_queue; 6443 shost->cmd_per_lun = shost->can_queue; 6444 shost->sg_tablesize = ctrl_info->sg_tablesize; 6445 shost->transportt = pqi_sas_transport_template; 6446 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0); 6447 shost->unique_id = shost->irq; 6448 shost->nr_hw_queues = ctrl_info->num_queue_groups; 6449 shost->hostdata[0] = (unsigned long)ctrl_info; 6450 6451 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev); 6452 if (rc) { 6453 dev_err(&ctrl_info->pci_dev->dev, 6454 "scsi_add_host failed for controller %u\n", 6455 ctrl_info->ctrl_id); 6456 goto free_host; 6457 } 6458 6459 rc = pqi_add_sas_host(shost, ctrl_info); 6460 if (rc) { 6461 dev_err(&ctrl_info->pci_dev->dev, 6462 "add SAS host failed for controller %u\n", 6463 ctrl_info->ctrl_id); 6464 goto remove_host; 6465 } 6466 6467 ctrl_info->scsi_host = shost; 6468 6469 return 0; 6470 6471 remove_host: 6472 scsi_remove_host(shost); 6473 free_host: 6474 scsi_host_put(shost); 6475 6476 return rc; 6477 } 6478 6479 static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info) 6480 { 6481 struct Scsi_Host *shost; 6482 6483 pqi_delete_sas_host(ctrl_info); 6484 6485 shost = ctrl_info->scsi_host; 6486 if (!shost) 6487 return; 6488 6489 scsi_remove_host(shost); 6490 scsi_host_put(shost); 6491 } 6492 6493 static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info) 6494 { 6495 int rc = 0; 6496 struct pqi_device_registers __iomem *pqi_registers; 6497 unsigned long timeout; 6498 unsigned int timeout_msecs; 6499 union pqi_reset_register reset_reg; 6500 6501 pqi_registers = ctrl_info->pqi_registers; 6502 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100; 6503 timeout = msecs_to_jiffies(timeout_msecs) + jiffies; 6504 6505 while (1) { 6506 msleep(PQI_RESET_POLL_INTERVAL_MSECS); 6507 reset_reg.all_bits = readl(&pqi_registers->device_reset); 6508 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED) 6509 break; 6510 pqi_check_ctrl_health(ctrl_info); 6511 if (pqi_ctrl_offline(ctrl_info)) { 6512 rc = -ENXIO; 6513 break; 6514 } 6515 if (time_after(jiffies, timeout)) { 6516 rc = -ETIMEDOUT; 6517 break; 6518 } 6519 } 6520 6521 return rc; 6522 } 6523 6524 static int pqi_reset(struct pqi_ctrl_info *ctrl_info) 6525 { 6526 int rc; 6527 union pqi_reset_register reset_reg; 6528 6529 if (ctrl_info->pqi_reset_quiesce_supported) { 6530 rc = sis_pqi_reset_quiesce(ctrl_info); 6531 if (rc) { 6532 dev_err(&ctrl_info->pci_dev->dev, 6533 "PQI reset failed during quiesce with error %d\n", 6534 rc); 6535 return rc; 6536 } 6537 } 6538 6539 reset_reg.all_bits = 0; 6540 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET; 6541 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET; 6542 6543 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset); 6544 6545 rc = pqi_wait_for_pqi_reset_completion(ctrl_info); 6546 if (rc) 6547 dev_err(&ctrl_info->pci_dev->dev, 6548 "PQI reset failed with error %d\n", rc); 6549 6550 return rc; 6551 } 6552 6553 static int pqi_get_ctrl_firmware_version(struct pqi_ctrl_info *ctrl_info) 6554 { 6555 int rc; 6556 struct bmic_identify_controller *identify; 6557 6558 identify = kmalloc(sizeof(*identify), GFP_KERNEL); 6559 if (!identify) 6560 return -ENOMEM; 6561 6562 rc = pqi_identify_controller(ctrl_info, identify); 6563 if (rc) 6564 goto out; 6565 6566 memcpy(ctrl_info->firmware_version, identify->firmware_version, 6567 sizeof(identify->firmware_version)); 6568 ctrl_info->firmware_version[sizeof(identify->firmware_version)] = '\0'; 6569 snprintf(ctrl_info->firmware_version + 6570 strlen(ctrl_info->firmware_version), 6571 sizeof(ctrl_info->firmware_version), 6572 "-%u", get_unaligned_le16(&identify->firmware_build_number)); 6573 6574 out: 6575 kfree(identify); 6576 6577 return rc; 6578 } 6579 6580 struct pqi_config_table_section_info { 6581 struct pqi_ctrl_info *ctrl_info; 6582 void *section; 6583 u32 section_offset; 6584 void __iomem *section_iomem_addr; 6585 }; 6586 6587 static inline bool pqi_is_firmware_feature_supported( 6588 struct pqi_config_table_firmware_features *firmware_features, 6589 unsigned int bit_position) 6590 { 6591 unsigned int byte_index; 6592 6593 byte_index = bit_position / BITS_PER_BYTE; 6594 6595 if (byte_index >= le16_to_cpu(firmware_features->num_elements)) 6596 return false; 6597 6598 return firmware_features->features_supported[byte_index] & 6599 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 6600 } 6601 6602 static inline bool pqi_is_firmware_feature_enabled( 6603 struct pqi_config_table_firmware_features *firmware_features, 6604 void __iomem *firmware_features_iomem_addr, 6605 unsigned int bit_position) 6606 { 6607 unsigned int byte_index; 6608 u8 __iomem *features_enabled_iomem_addr; 6609 6610 byte_index = (bit_position / BITS_PER_BYTE) + 6611 (le16_to_cpu(firmware_features->num_elements) * 2); 6612 6613 features_enabled_iomem_addr = firmware_features_iomem_addr + 6614 offsetof(struct pqi_config_table_firmware_features, 6615 features_supported) + byte_index; 6616 6617 return *((__force u8 *)features_enabled_iomem_addr) & 6618 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 6619 } 6620 6621 static inline void pqi_request_firmware_feature( 6622 struct pqi_config_table_firmware_features *firmware_features, 6623 unsigned int bit_position) 6624 { 6625 unsigned int byte_index; 6626 6627 byte_index = (bit_position / BITS_PER_BYTE) + 6628 le16_to_cpu(firmware_features->num_elements); 6629 6630 firmware_features->features_supported[byte_index] |= 6631 (1 << (bit_position % BITS_PER_BYTE)); 6632 } 6633 6634 static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info, 6635 u16 first_section, u16 last_section) 6636 { 6637 struct pqi_vendor_general_request request; 6638 6639 memset(&request, 0, sizeof(request)); 6640 6641 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 6642 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 6643 &request.header.iu_length); 6644 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE, 6645 &request.function_code); 6646 put_unaligned_le16(first_section, 6647 &request.data.config_table_update.first_section); 6648 put_unaligned_le16(last_section, 6649 &request.data.config_table_update.last_section); 6650 6651 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 6652 0, NULL, NO_TIMEOUT); 6653 } 6654 6655 static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info, 6656 struct pqi_config_table_firmware_features *firmware_features, 6657 void __iomem *firmware_features_iomem_addr) 6658 { 6659 void *features_requested; 6660 void __iomem *features_requested_iomem_addr; 6661 6662 features_requested = firmware_features->features_supported + 6663 le16_to_cpu(firmware_features->num_elements); 6664 6665 features_requested_iomem_addr = firmware_features_iomem_addr + 6666 (features_requested - (void *)firmware_features); 6667 6668 memcpy_toio(features_requested_iomem_addr, features_requested, 6669 le16_to_cpu(firmware_features->num_elements)); 6670 6671 return pqi_config_table_update(ctrl_info, 6672 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES, 6673 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES); 6674 } 6675 6676 struct pqi_firmware_feature { 6677 char *feature_name; 6678 unsigned int feature_bit; 6679 bool supported; 6680 bool enabled; 6681 void (*feature_status)(struct pqi_ctrl_info *ctrl_info, 6682 struct pqi_firmware_feature *firmware_feature); 6683 }; 6684 6685 static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info, 6686 struct pqi_firmware_feature *firmware_feature) 6687 { 6688 if (!firmware_feature->supported) { 6689 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n", 6690 firmware_feature->feature_name); 6691 return; 6692 } 6693 6694 if (firmware_feature->enabled) { 6695 dev_info(&ctrl_info->pci_dev->dev, 6696 "%s enabled\n", firmware_feature->feature_name); 6697 return; 6698 } 6699 6700 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n", 6701 firmware_feature->feature_name); 6702 } 6703 6704 static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info, 6705 struct pqi_firmware_feature *firmware_feature) 6706 { 6707 if (firmware_feature->feature_status) 6708 firmware_feature->feature_status(ctrl_info, firmware_feature); 6709 } 6710 6711 static DEFINE_MUTEX(pqi_firmware_features_mutex); 6712 6713 static struct pqi_firmware_feature pqi_firmware_features[] = { 6714 { 6715 .feature_name = "Online Firmware Activation", 6716 .feature_bit = PQI_FIRMWARE_FEATURE_OFA, 6717 .feature_status = pqi_firmware_feature_status, 6718 }, 6719 { 6720 .feature_name = "Serial Management Protocol", 6721 .feature_bit = PQI_FIRMWARE_FEATURE_SMP, 6722 .feature_status = pqi_firmware_feature_status, 6723 }, 6724 { 6725 .feature_name = "New Soft Reset Handshake", 6726 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE, 6727 .feature_status = pqi_firmware_feature_status, 6728 }, 6729 }; 6730 6731 static void pqi_process_firmware_features( 6732 struct pqi_config_table_section_info *section_info) 6733 { 6734 int rc; 6735 struct pqi_ctrl_info *ctrl_info; 6736 struct pqi_config_table_firmware_features *firmware_features; 6737 void __iomem *firmware_features_iomem_addr; 6738 unsigned int i; 6739 unsigned int num_features_supported; 6740 6741 ctrl_info = section_info->ctrl_info; 6742 firmware_features = section_info->section; 6743 firmware_features_iomem_addr = section_info->section_iomem_addr; 6744 6745 for (i = 0, num_features_supported = 0; 6746 i < ARRAY_SIZE(pqi_firmware_features); i++) { 6747 if (pqi_is_firmware_feature_supported(firmware_features, 6748 pqi_firmware_features[i].feature_bit)) { 6749 pqi_firmware_features[i].supported = true; 6750 num_features_supported++; 6751 } else { 6752 pqi_firmware_feature_update(ctrl_info, 6753 &pqi_firmware_features[i]); 6754 } 6755 } 6756 6757 if (num_features_supported == 0) 6758 return; 6759 6760 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 6761 if (!pqi_firmware_features[i].supported) 6762 continue; 6763 pqi_request_firmware_feature(firmware_features, 6764 pqi_firmware_features[i].feature_bit); 6765 } 6766 6767 rc = pqi_enable_firmware_features(ctrl_info, firmware_features, 6768 firmware_features_iomem_addr); 6769 if (rc) { 6770 dev_err(&ctrl_info->pci_dev->dev, 6771 "failed to enable firmware features in PQI configuration table\n"); 6772 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 6773 if (!pqi_firmware_features[i].supported) 6774 continue; 6775 pqi_firmware_feature_update(ctrl_info, 6776 &pqi_firmware_features[i]); 6777 } 6778 return; 6779 } 6780 6781 ctrl_info->soft_reset_handshake_supported = false; 6782 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 6783 if (!pqi_firmware_features[i].supported) 6784 continue; 6785 if (pqi_is_firmware_feature_enabled(firmware_features, 6786 firmware_features_iomem_addr, 6787 pqi_firmware_features[i].feature_bit)) { 6788 pqi_firmware_features[i].enabled = true; 6789 if (pqi_firmware_features[i].feature_bit == 6790 PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE) 6791 ctrl_info->soft_reset_handshake_supported = 6792 true; 6793 } 6794 pqi_firmware_feature_update(ctrl_info, 6795 &pqi_firmware_features[i]); 6796 } 6797 } 6798 6799 static void pqi_init_firmware_features(void) 6800 { 6801 unsigned int i; 6802 6803 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 6804 pqi_firmware_features[i].supported = false; 6805 pqi_firmware_features[i].enabled = false; 6806 } 6807 } 6808 6809 static void pqi_process_firmware_features_section( 6810 struct pqi_config_table_section_info *section_info) 6811 { 6812 mutex_lock(&pqi_firmware_features_mutex); 6813 pqi_init_firmware_features(); 6814 pqi_process_firmware_features(section_info); 6815 mutex_unlock(&pqi_firmware_features_mutex); 6816 } 6817 6818 static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info) 6819 { 6820 u32 table_length; 6821 u32 section_offset; 6822 void __iomem *table_iomem_addr; 6823 struct pqi_config_table *config_table; 6824 struct pqi_config_table_section_header *section; 6825 struct pqi_config_table_section_info section_info; 6826 6827 table_length = ctrl_info->config_table_length; 6828 if (table_length == 0) 6829 return 0; 6830 6831 config_table = kmalloc(table_length, GFP_KERNEL); 6832 if (!config_table) { 6833 dev_err(&ctrl_info->pci_dev->dev, 6834 "failed to allocate memory for PQI configuration table\n"); 6835 return -ENOMEM; 6836 } 6837 6838 /* 6839 * Copy the config table contents from I/O memory space into the 6840 * temporary buffer. 6841 */ 6842 table_iomem_addr = ctrl_info->iomem_base + 6843 ctrl_info->config_table_offset; 6844 memcpy_fromio(config_table, table_iomem_addr, table_length); 6845 6846 section_info.ctrl_info = ctrl_info; 6847 section_offset = 6848 get_unaligned_le32(&config_table->first_section_offset); 6849 6850 while (section_offset) { 6851 section = (void *)config_table + section_offset; 6852 6853 section_info.section = section; 6854 section_info.section_offset = section_offset; 6855 section_info.section_iomem_addr = 6856 table_iomem_addr + section_offset; 6857 6858 switch (get_unaligned_le16(§ion->section_id)) { 6859 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES: 6860 pqi_process_firmware_features_section(§ion_info); 6861 break; 6862 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT: 6863 if (pqi_disable_heartbeat) 6864 dev_warn(&ctrl_info->pci_dev->dev, 6865 "heartbeat disabled by module parameter\n"); 6866 else 6867 ctrl_info->heartbeat_counter = 6868 table_iomem_addr + 6869 section_offset + 6870 offsetof( 6871 struct pqi_config_table_heartbeat, 6872 heartbeat_counter); 6873 break; 6874 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET: 6875 ctrl_info->soft_reset_status = 6876 table_iomem_addr + 6877 section_offset + 6878 offsetof(struct pqi_config_table_soft_reset, 6879 soft_reset_status); 6880 break; 6881 } 6882 6883 section_offset = 6884 get_unaligned_le16(§ion->next_section_offset); 6885 } 6886 6887 kfree(config_table); 6888 6889 return 0; 6890 } 6891 6892 /* Switches the controller from PQI mode back into SIS mode. */ 6893 6894 static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info) 6895 { 6896 int rc; 6897 6898 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE); 6899 rc = pqi_reset(ctrl_info); 6900 if (rc) 6901 return rc; 6902 rc = sis_reenable_sis_mode(ctrl_info); 6903 if (rc) { 6904 dev_err(&ctrl_info->pci_dev->dev, 6905 "re-enabling SIS mode failed with error %d\n", rc); 6906 return rc; 6907 } 6908 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 6909 6910 return 0; 6911 } 6912 6913 /* 6914 * If the controller isn't already in SIS mode, this function forces it into 6915 * SIS mode. 6916 */ 6917 6918 static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info) 6919 { 6920 if (!sis_is_firmware_running(ctrl_info)) 6921 return -ENXIO; 6922 6923 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE) 6924 return 0; 6925 6926 if (sis_is_kernel_up(ctrl_info)) { 6927 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 6928 return 0; 6929 } 6930 6931 return pqi_revert_to_sis_mode(ctrl_info); 6932 } 6933 6934 static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info) 6935 { 6936 int rc; 6937 6938 rc = pqi_force_sis_mode(ctrl_info); 6939 if (rc) 6940 return rc; 6941 6942 /* 6943 * Wait until the controller is ready to start accepting SIS 6944 * commands. 6945 */ 6946 rc = sis_wait_for_ctrl_ready(ctrl_info); 6947 if (rc) 6948 return rc; 6949 6950 /* 6951 * Get the controller properties. This allows us to determine 6952 * whether or not it supports PQI mode. 6953 */ 6954 rc = sis_get_ctrl_properties(ctrl_info); 6955 if (rc) { 6956 dev_err(&ctrl_info->pci_dev->dev, 6957 "error obtaining controller properties\n"); 6958 return rc; 6959 } 6960 6961 rc = sis_get_pqi_capabilities(ctrl_info); 6962 if (rc) { 6963 dev_err(&ctrl_info->pci_dev->dev, 6964 "error obtaining controller capabilities\n"); 6965 return rc; 6966 } 6967 6968 if (reset_devices) { 6969 if (ctrl_info->max_outstanding_requests > 6970 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP) 6971 ctrl_info->max_outstanding_requests = 6972 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP; 6973 } else { 6974 if (ctrl_info->max_outstanding_requests > 6975 PQI_MAX_OUTSTANDING_REQUESTS) 6976 ctrl_info->max_outstanding_requests = 6977 PQI_MAX_OUTSTANDING_REQUESTS; 6978 } 6979 6980 pqi_calculate_io_resources(ctrl_info); 6981 6982 rc = pqi_alloc_error_buffer(ctrl_info); 6983 if (rc) { 6984 dev_err(&ctrl_info->pci_dev->dev, 6985 "failed to allocate PQI error buffer\n"); 6986 return rc; 6987 } 6988 6989 /* 6990 * If the function we are about to call succeeds, the 6991 * controller will transition from legacy SIS mode 6992 * into PQI mode. 6993 */ 6994 rc = sis_init_base_struct_addr(ctrl_info); 6995 if (rc) { 6996 dev_err(&ctrl_info->pci_dev->dev, 6997 "error initializing PQI mode\n"); 6998 return rc; 6999 } 7000 7001 /* Wait for the controller to complete the SIS -> PQI transition. */ 7002 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 7003 if (rc) { 7004 dev_err(&ctrl_info->pci_dev->dev, 7005 "transition to PQI mode failed\n"); 7006 return rc; 7007 } 7008 7009 /* From here on, we are running in PQI mode. */ 7010 ctrl_info->pqi_mode_enabled = true; 7011 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 7012 7013 rc = pqi_alloc_admin_queues(ctrl_info); 7014 if (rc) { 7015 dev_err(&ctrl_info->pci_dev->dev, 7016 "failed to allocate admin queues\n"); 7017 return rc; 7018 } 7019 7020 rc = pqi_create_admin_queues(ctrl_info); 7021 if (rc) { 7022 dev_err(&ctrl_info->pci_dev->dev, 7023 "error creating admin queues\n"); 7024 return rc; 7025 } 7026 7027 rc = pqi_report_device_capability(ctrl_info); 7028 if (rc) { 7029 dev_err(&ctrl_info->pci_dev->dev, 7030 "obtaining device capability failed\n"); 7031 return rc; 7032 } 7033 7034 rc = pqi_validate_device_capability(ctrl_info); 7035 if (rc) 7036 return rc; 7037 7038 pqi_calculate_queue_resources(ctrl_info); 7039 7040 rc = pqi_enable_msix_interrupts(ctrl_info); 7041 if (rc) 7042 return rc; 7043 7044 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) { 7045 ctrl_info->max_msix_vectors = 7046 ctrl_info->num_msix_vectors_enabled; 7047 pqi_calculate_queue_resources(ctrl_info); 7048 } 7049 7050 rc = pqi_alloc_io_resources(ctrl_info); 7051 if (rc) 7052 return rc; 7053 7054 rc = pqi_alloc_operational_queues(ctrl_info); 7055 if (rc) { 7056 dev_err(&ctrl_info->pci_dev->dev, 7057 "failed to allocate operational queues\n"); 7058 return rc; 7059 } 7060 7061 pqi_init_operational_queues(ctrl_info); 7062 7063 rc = pqi_request_irqs(ctrl_info); 7064 if (rc) 7065 return rc; 7066 7067 rc = pqi_create_queues(ctrl_info); 7068 if (rc) 7069 return rc; 7070 7071 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 7072 7073 ctrl_info->controller_online = true; 7074 7075 rc = pqi_process_config_table(ctrl_info); 7076 if (rc) 7077 return rc; 7078 7079 pqi_start_heartbeat_timer(ctrl_info); 7080 7081 rc = pqi_enable_events(ctrl_info); 7082 if (rc) { 7083 dev_err(&ctrl_info->pci_dev->dev, 7084 "error enabling events\n"); 7085 return rc; 7086 } 7087 7088 /* Register with the SCSI subsystem. */ 7089 rc = pqi_register_scsi(ctrl_info); 7090 if (rc) 7091 return rc; 7092 7093 rc = pqi_get_ctrl_firmware_version(ctrl_info); 7094 if (rc) { 7095 dev_err(&ctrl_info->pci_dev->dev, 7096 "error obtaining firmware version\n"); 7097 return rc; 7098 } 7099 7100 rc = pqi_set_diag_rescan(ctrl_info); 7101 if (rc) { 7102 dev_err(&ctrl_info->pci_dev->dev, 7103 "error enabling multi-lun rescan\n"); 7104 return rc; 7105 } 7106 7107 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 7108 if (rc) { 7109 dev_err(&ctrl_info->pci_dev->dev, 7110 "error updating host wellness\n"); 7111 return rc; 7112 } 7113 7114 pqi_schedule_update_time_worker(ctrl_info); 7115 7116 pqi_scan_scsi_devices(ctrl_info); 7117 7118 return 0; 7119 } 7120 7121 static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info) 7122 { 7123 unsigned int i; 7124 struct pqi_admin_queues *admin_queues; 7125 struct pqi_event_queue *event_queue; 7126 7127 admin_queues = &ctrl_info->admin_queues; 7128 admin_queues->iq_pi_copy = 0; 7129 admin_queues->oq_ci_copy = 0; 7130 writel(0, admin_queues->oq_pi); 7131 7132 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 7133 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0; 7134 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0; 7135 ctrl_info->queue_groups[i].oq_ci_copy = 0; 7136 7137 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]); 7138 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]); 7139 writel(0, ctrl_info->queue_groups[i].oq_pi); 7140 } 7141 7142 event_queue = &ctrl_info->event_queue; 7143 writel(0, event_queue->oq_pi); 7144 event_queue->oq_ci_copy = 0; 7145 } 7146 7147 static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info) 7148 { 7149 int rc; 7150 7151 rc = pqi_force_sis_mode(ctrl_info); 7152 if (rc) 7153 return rc; 7154 7155 /* 7156 * Wait until the controller is ready to start accepting SIS 7157 * commands. 7158 */ 7159 rc = sis_wait_for_ctrl_ready_resume(ctrl_info); 7160 if (rc) 7161 return rc; 7162 7163 /* 7164 * Get the controller properties. This allows us to determine 7165 * whether or not it supports PQI mode. 7166 */ 7167 rc = sis_get_ctrl_properties(ctrl_info); 7168 if (rc) { 7169 dev_err(&ctrl_info->pci_dev->dev, 7170 "error obtaining controller properties\n"); 7171 return rc; 7172 } 7173 7174 rc = sis_get_pqi_capabilities(ctrl_info); 7175 if (rc) { 7176 dev_err(&ctrl_info->pci_dev->dev, 7177 "error obtaining controller capabilities\n"); 7178 return rc; 7179 } 7180 7181 /* 7182 * If the function we are about to call succeeds, the 7183 * controller will transition from legacy SIS mode 7184 * into PQI mode. 7185 */ 7186 rc = sis_init_base_struct_addr(ctrl_info); 7187 if (rc) { 7188 dev_err(&ctrl_info->pci_dev->dev, 7189 "error initializing PQI mode\n"); 7190 return rc; 7191 } 7192 7193 /* Wait for the controller to complete the SIS -> PQI transition. */ 7194 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 7195 if (rc) { 7196 dev_err(&ctrl_info->pci_dev->dev, 7197 "transition to PQI mode failed\n"); 7198 return rc; 7199 } 7200 7201 /* From here on, we are running in PQI mode. */ 7202 ctrl_info->pqi_mode_enabled = true; 7203 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 7204 7205 pqi_reinit_queues(ctrl_info); 7206 7207 rc = pqi_create_admin_queues(ctrl_info); 7208 if (rc) { 7209 dev_err(&ctrl_info->pci_dev->dev, 7210 "error creating admin queues\n"); 7211 return rc; 7212 } 7213 7214 rc = pqi_create_queues(ctrl_info); 7215 if (rc) 7216 return rc; 7217 7218 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 7219 7220 ctrl_info->controller_online = true; 7221 pqi_ctrl_unblock_requests(ctrl_info); 7222 7223 rc = pqi_process_config_table(ctrl_info); 7224 if (rc) 7225 return rc; 7226 7227 pqi_start_heartbeat_timer(ctrl_info); 7228 7229 rc = pqi_enable_events(ctrl_info); 7230 if (rc) { 7231 dev_err(&ctrl_info->pci_dev->dev, 7232 "error enabling events\n"); 7233 return rc; 7234 } 7235 7236 rc = pqi_get_ctrl_firmware_version(ctrl_info); 7237 if (rc) { 7238 dev_err(&ctrl_info->pci_dev->dev, 7239 "error obtaining firmware version\n"); 7240 return rc; 7241 } 7242 7243 rc = pqi_set_diag_rescan(ctrl_info); 7244 if (rc) { 7245 dev_err(&ctrl_info->pci_dev->dev, 7246 "error enabling multi-lun rescan\n"); 7247 return rc; 7248 } 7249 7250 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 7251 if (rc) { 7252 dev_err(&ctrl_info->pci_dev->dev, 7253 "error updating host wellness\n"); 7254 return rc; 7255 } 7256 7257 pqi_schedule_update_time_worker(ctrl_info); 7258 7259 pqi_scan_scsi_devices(ctrl_info); 7260 7261 return 0; 7262 } 7263 7264 static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev, 7265 u16 timeout) 7266 { 7267 return pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2, 7268 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout); 7269 } 7270 7271 static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info) 7272 { 7273 int rc; 7274 u64 mask; 7275 7276 rc = pci_enable_device(ctrl_info->pci_dev); 7277 if (rc) { 7278 dev_err(&ctrl_info->pci_dev->dev, 7279 "failed to enable PCI device\n"); 7280 return rc; 7281 } 7282 7283 if (sizeof(dma_addr_t) > 4) 7284 mask = DMA_BIT_MASK(64); 7285 else 7286 mask = DMA_BIT_MASK(32); 7287 7288 rc = dma_set_mask(&ctrl_info->pci_dev->dev, mask); 7289 if (rc) { 7290 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n"); 7291 goto disable_device; 7292 } 7293 7294 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT); 7295 if (rc) { 7296 dev_err(&ctrl_info->pci_dev->dev, 7297 "failed to obtain PCI resources\n"); 7298 goto disable_device; 7299 } 7300 7301 ctrl_info->iomem_base = ioremap_nocache(pci_resource_start( 7302 ctrl_info->pci_dev, 0), 7303 sizeof(struct pqi_ctrl_registers)); 7304 if (!ctrl_info->iomem_base) { 7305 dev_err(&ctrl_info->pci_dev->dev, 7306 "failed to map memory for controller registers\n"); 7307 rc = -ENOMEM; 7308 goto release_regions; 7309 } 7310 7311 #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6 7312 7313 /* Increase the PCIe completion timeout. */ 7314 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev, 7315 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS); 7316 if (rc) { 7317 dev_err(&ctrl_info->pci_dev->dev, 7318 "failed to set PCIe completion timeout\n"); 7319 goto release_regions; 7320 } 7321 7322 /* Enable bus mastering. */ 7323 pci_set_master(ctrl_info->pci_dev); 7324 7325 ctrl_info->registers = ctrl_info->iomem_base; 7326 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers; 7327 7328 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info); 7329 7330 return 0; 7331 7332 release_regions: 7333 pci_release_regions(ctrl_info->pci_dev); 7334 disable_device: 7335 pci_disable_device(ctrl_info->pci_dev); 7336 7337 return rc; 7338 } 7339 7340 static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info) 7341 { 7342 iounmap(ctrl_info->iomem_base); 7343 pci_release_regions(ctrl_info->pci_dev); 7344 if (pci_is_enabled(ctrl_info->pci_dev)) 7345 pci_disable_device(ctrl_info->pci_dev); 7346 pci_set_drvdata(ctrl_info->pci_dev, NULL); 7347 } 7348 7349 static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node) 7350 { 7351 struct pqi_ctrl_info *ctrl_info; 7352 7353 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info), 7354 GFP_KERNEL, numa_node); 7355 if (!ctrl_info) 7356 return NULL; 7357 7358 mutex_init(&ctrl_info->scan_mutex); 7359 mutex_init(&ctrl_info->lun_reset_mutex); 7360 mutex_init(&ctrl_info->ofa_mutex); 7361 7362 INIT_LIST_HEAD(&ctrl_info->scsi_device_list); 7363 spin_lock_init(&ctrl_info->scsi_device_list_lock); 7364 7365 INIT_WORK(&ctrl_info->event_work, pqi_event_worker); 7366 atomic_set(&ctrl_info->num_interrupts, 0); 7367 7368 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker); 7369 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker); 7370 7371 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0); 7372 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker); 7373 7374 sema_init(&ctrl_info->sync_request_sem, 7375 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS); 7376 init_waitqueue_head(&ctrl_info->block_requests_wait); 7377 7378 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list); 7379 spin_lock_init(&ctrl_info->raid_bypass_retry_list_lock); 7380 INIT_WORK(&ctrl_info->raid_bypass_retry_work, 7381 pqi_raid_bypass_retry_worker); 7382 7383 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1; 7384 ctrl_info->irq_mode = IRQ_MODE_NONE; 7385 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS; 7386 7387 return ctrl_info; 7388 } 7389 7390 static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info) 7391 { 7392 kfree(ctrl_info); 7393 } 7394 7395 static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info) 7396 { 7397 pqi_free_irqs(ctrl_info); 7398 pqi_disable_msix_interrupts(ctrl_info); 7399 } 7400 7401 static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info) 7402 { 7403 pqi_stop_heartbeat_timer(ctrl_info); 7404 pqi_free_interrupts(ctrl_info); 7405 if (ctrl_info->queue_memory_base) 7406 dma_free_coherent(&ctrl_info->pci_dev->dev, 7407 ctrl_info->queue_memory_length, 7408 ctrl_info->queue_memory_base, 7409 ctrl_info->queue_memory_base_dma_handle); 7410 if (ctrl_info->admin_queue_memory_base) 7411 dma_free_coherent(&ctrl_info->pci_dev->dev, 7412 ctrl_info->admin_queue_memory_length, 7413 ctrl_info->admin_queue_memory_base, 7414 ctrl_info->admin_queue_memory_base_dma_handle); 7415 pqi_free_all_io_requests(ctrl_info); 7416 if (ctrl_info->error_buffer) 7417 dma_free_coherent(&ctrl_info->pci_dev->dev, 7418 ctrl_info->error_buffer_length, 7419 ctrl_info->error_buffer, 7420 ctrl_info->error_buffer_dma_handle); 7421 if (ctrl_info->iomem_base) 7422 pqi_cleanup_pci_init(ctrl_info); 7423 pqi_free_ctrl_info(ctrl_info); 7424 } 7425 7426 static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info) 7427 { 7428 pqi_cancel_rescan_worker(ctrl_info); 7429 pqi_cancel_update_time_worker(ctrl_info); 7430 pqi_remove_all_scsi_devices(ctrl_info); 7431 pqi_unregister_scsi(ctrl_info); 7432 if (ctrl_info->pqi_mode_enabled) 7433 pqi_revert_to_sis_mode(ctrl_info); 7434 pqi_free_ctrl_resources(ctrl_info); 7435 } 7436 7437 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info) 7438 { 7439 pqi_cancel_update_time_worker(ctrl_info); 7440 pqi_cancel_rescan_worker(ctrl_info); 7441 pqi_wait_until_lun_reset_finished(ctrl_info); 7442 pqi_wait_until_scan_finished(ctrl_info); 7443 pqi_ctrl_ofa_start(ctrl_info); 7444 pqi_ctrl_block_requests(ctrl_info); 7445 pqi_ctrl_wait_until_quiesced(ctrl_info); 7446 pqi_ctrl_wait_for_pending_io(ctrl_info, PQI_PENDING_IO_TIMEOUT_SECS); 7447 pqi_fail_io_queued_for_all_devices(ctrl_info); 7448 pqi_wait_until_inbound_queues_empty(ctrl_info); 7449 pqi_stop_heartbeat_timer(ctrl_info); 7450 ctrl_info->pqi_mode_enabled = false; 7451 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 7452 } 7453 7454 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info) 7455 { 7456 pqi_ofa_free_host_buffer(ctrl_info); 7457 ctrl_info->pqi_mode_enabled = true; 7458 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 7459 ctrl_info->controller_online = true; 7460 pqi_ctrl_unblock_requests(ctrl_info); 7461 pqi_start_heartbeat_timer(ctrl_info); 7462 pqi_schedule_update_time_worker(ctrl_info); 7463 pqi_clear_soft_reset_status(ctrl_info, 7464 PQI_SOFT_RESET_ABORT); 7465 pqi_scan_scsi_devices(ctrl_info); 7466 } 7467 7468 static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info, 7469 u32 total_size, u32 chunk_size) 7470 { 7471 u32 sg_count; 7472 u32 size; 7473 int i; 7474 struct pqi_sg_descriptor *mem_descriptor = NULL; 7475 struct device *dev; 7476 struct pqi_ofa_memory *ofap; 7477 7478 dev = &ctrl_info->pci_dev->dev; 7479 7480 sg_count = (total_size + chunk_size - 1); 7481 sg_count /= chunk_size; 7482 7483 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 7484 7485 if (sg_count*chunk_size < total_size) 7486 goto out; 7487 7488 ctrl_info->pqi_ofa_chunk_virt_addr = 7489 kcalloc(sg_count, sizeof(void *), GFP_KERNEL); 7490 if (!ctrl_info->pqi_ofa_chunk_virt_addr) 7491 goto out; 7492 7493 for (size = 0, i = 0; size < total_size; size += chunk_size, i++) { 7494 dma_addr_t dma_handle; 7495 7496 ctrl_info->pqi_ofa_chunk_virt_addr[i] = 7497 dma_alloc_coherent(dev, chunk_size, &dma_handle, 7498 GFP_KERNEL); 7499 7500 if (!ctrl_info->pqi_ofa_chunk_virt_addr[i]) 7501 break; 7502 7503 mem_descriptor = &ofap->sg_descriptor[i]; 7504 put_unaligned_le64 ((u64) dma_handle, &mem_descriptor->address); 7505 put_unaligned_le32 (chunk_size, &mem_descriptor->length); 7506 } 7507 7508 if (!size || size < total_size) 7509 goto out_free_chunks; 7510 7511 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags); 7512 put_unaligned_le16(sg_count, &ofap->num_memory_descriptors); 7513 put_unaligned_le32(size, &ofap->bytes_allocated); 7514 7515 return 0; 7516 7517 out_free_chunks: 7518 while (--i >= 0) { 7519 mem_descriptor = &ofap->sg_descriptor[i]; 7520 dma_free_coherent(dev, chunk_size, 7521 ctrl_info->pqi_ofa_chunk_virt_addr[i], 7522 get_unaligned_le64(&mem_descriptor->address)); 7523 } 7524 kfree(ctrl_info->pqi_ofa_chunk_virt_addr); 7525 7526 out: 7527 put_unaligned_le32 (0, &ofap->bytes_allocated); 7528 return -ENOMEM; 7529 } 7530 7531 static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info) 7532 { 7533 u32 total_size; 7534 u32 min_chunk_size; 7535 u32 chunk_sz; 7536 7537 total_size = le32_to_cpu( 7538 ctrl_info->pqi_ofa_mem_virt_addr->bytes_allocated); 7539 min_chunk_size = total_size / PQI_OFA_MAX_SG_DESCRIPTORS; 7540 7541 for (chunk_sz = total_size; chunk_sz >= min_chunk_size; chunk_sz /= 2) 7542 if (!pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_sz)) 7543 return 0; 7544 7545 return -ENOMEM; 7546 } 7547 7548 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info, 7549 u32 bytes_requested) 7550 { 7551 struct pqi_ofa_memory *pqi_ofa_memory; 7552 struct device *dev; 7553 7554 dev = &ctrl_info->pci_dev->dev; 7555 pqi_ofa_memory = dma_alloc_coherent(dev, 7556 PQI_OFA_MEMORY_DESCRIPTOR_LENGTH, 7557 &ctrl_info->pqi_ofa_mem_dma_handle, 7558 GFP_KERNEL); 7559 7560 if (!pqi_ofa_memory) 7561 return; 7562 7563 put_unaligned_le16(PQI_OFA_VERSION, &pqi_ofa_memory->version); 7564 memcpy(&pqi_ofa_memory->signature, PQI_OFA_SIGNATURE, 7565 sizeof(pqi_ofa_memory->signature)); 7566 pqi_ofa_memory->bytes_allocated = cpu_to_le32(bytes_requested); 7567 7568 ctrl_info->pqi_ofa_mem_virt_addr = pqi_ofa_memory; 7569 7570 if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) { 7571 dev_err(dev, "Failed to allocate host buffer of size = %u", 7572 bytes_requested); 7573 } 7574 } 7575 7576 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info) 7577 { 7578 int i; 7579 struct pqi_sg_descriptor *mem_descriptor; 7580 struct pqi_ofa_memory *ofap; 7581 7582 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 7583 7584 if (!ofap) 7585 return; 7586 7587 if (!ofap->bytes_allocated) 7588 goto out; 7589 7590 mem_descriptor = ofap->sg_descriptor; 7591 7592 for (i = 0; i < get_unaligned_le16(&ofap->num_memory_descriptors); 7593 i++) { 7594 dma_free_coherent(&ctrl_info->pci_dev->dev, 7595 get_unaligned_le32(&mem_descriptor[i].length), 7596 ctrl_info->pqi_ofa_chunk_virt_addr[i], 7597 get_unaligned_le64(&mem_descriptor[i].address)); 7598 } 7599 kfree(ctrl_info->pqi_ofa_chunk_virt_addr); 7600 7601 out: 7602 dma_free_coherent(&ctrl_info->pci_dev->dev, 7603 PQI_OFA_MEMORY_DESCRIPTOR_LENGTH, ofap, 7604 ctrl_info->pqi_ofa_mem_dma_handle); 7605 ctrl_info->pqi_ofa_mem_virt_addr = NULL; 7606 } 7607 7608 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info) 7609 { 7610 struct pqi_vendor_general_request request; 7611 size_t size; 7612 struct pqi_ofa_memory *ofap; 7613 7614 memset(&request, 0, sizeof(request)); 7615 7616 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 7617 7618 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 7619 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 7620 &request.header.iu_length); 7621 put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE, 7622 &request.function_code); 7623 7624 if (ofap) { 7625 size = offsetof(struct pqi_ofa_memory, sg_descriptor) + 7626 get_unaligned_le16(&ofap->num_memory_descriptors) * 7627 sizeof(struct pqi_sg_descriptor); 7628 7629 put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle, 7630 &request.data.ofa_memory_allocation.buffer_address); 7631 put_unaligned_le32(size, 7632 &request.data.ofa_memory_allocation.buffer_length); 7633 7634 } 7635 7636 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 7637 0, NULL, NO_TIMEOUT); 7638 } 7639 7640 #define PQI_POST_RESET_DELAY_B4_MSGU_READY 5000 7641 7642 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info) 7643 { 7644 msleep(PQI_POST_RESET_DELAY_B4_MSGU_READY); 7645 return pqi_ctrl_init_resume(ctrl_info); 7646 } 7647 7648 static void pqi_perform_lockup_action(void) 7649 { 7650 switch (pqi_lockup_action) { 7651 case PANIC: 7652 panic("FATAL: Smart Family Controller lockup detected"); 7653 break; 7654 case REBOOT: 7655 emergency_restart(); 7656 break; 7657 case NONE: 7658 default: 7659 break; 7660 } 7661 } 7662 7663 static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = { 7664 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR, 7665 .status = SAM_STAT_CHECK_CONDITION, 7666 }; 7667 7668 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info) 7669 { 7670 unsigned int i; 7671 struct pqi_io_request *io_request; 7672 struct scsi_cmnd *scmd; 7673 7674 for (i = 0; i < ctrl_info->max_io_slots; i++) { 7675 io_request = &ctrl_info->io_request_pool[i]; 7676 if (atomic_read(&io_request->refcount) == 0) 7677 continue; 7678 7679 scmd = io_request->scmd; 7680 if (scmd) { 7681 set_host_byte(scmd, DID_NO_CONNECT); 7682 } else { 7683 io_request->status = -ENXIO; 7684 io_request->error_info = 7685 &pqi_ctrl_offline_raid_error_info; 7686 } 7687 7688 io_request->io_complete_callback(io_request, 7689 io_request->context); 7690 } 7691 } 7692 7693 static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info) 7694 { 7695 pqi_perform_lockup_action(); 7696 pqi_stop_heartbeat_timer(ctrl_info); 7697 pqi_free_interrupts(ctrl_info); 7698 pqi_cancel_rescan_worker(ctrl_info); 7699 pqi_cancel_update_time_worker(ctrl_info); 7700 pqi_ctrl_wait_until_quiesced(ctrl_info); 7701 pqi_fail_all_outstanding_requests(ctrl_info); 7702 pqi_clear_all_queued_raid_bypass_retries(ctrl_info); 7703 pqi_ctrl_unblock_requests(ctrl_info); 7704 } 7705 7706 static void pqi_ctrl_offline_worker(struct work_struct *work) 7707 { 7708 struct pqi_ctrl_info *ctrl_info; 7709 7710 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work); 7711 pqi_take_ctrl_offline_deferred(ctrl_info); 7712 } 7713 7714 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info) 7715 { 7716 if (!ctrl_info->controller_online) 7717 return; 7718 7719 ctrl_info->controller_online = false; 7720 ctrl_info->pqi_mode_enabled = false; 7721 pqi_ctrl_block_requests(ctrl_info); 7722 if (!pqi_disable_ctrl_shutdown) 7723 sis_shutdown_ctrl(ctrl_info); 7724 pci_disable_device(ctrl_info->pci_dev); 7725 dev_err(&ctrl_info->pci_dev->dev, "controller offline\n"); 7726 schedule_work(&ctrl_info->ctrl_offline_work); 7727 } 7728 7729 static void pqi_print_ctrl_info(struct pci_dev *pci_dev, 7730 const struct pci_device_id *id) 7731 { 7732 char *ctrl_description; 7733 7734 if (id->driver_data) 7735 ctrl_description = (char *)id->driver_data; 7736 else 7737 ctrl_description = "Microsemi Smart Family Controller"; 7738 7739 dev_info(&pci_dev->dev, "%s found\n", ctrl_description); 7740 } 7741 7742 static int pqi_pci_probe(struct pci_dev *pci_dev, 7743 const struct pci_device_id *id) 7744 { 7745 int rc; 7746 int node, cp_node; 7747 struct pqi_ctrl_info *ctrl_info; 7748 7749 pqi_print_ctrl_info(pci_dev, id); 7750 7751 if (pqi_disable_device_id_wildcards && 7752 id->subvendor == PCI_ANY_ID && 7753 id->subdevice == PCI_ANY_ID) { 7754 dev_warn(&pci_dev->dev, 7755 "controller not probed because device ID wildcards are disabled\n"); 7756 return -ENODEV; 7757 } 7758 7759 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID) 7760 dev_warn(&pci_dev->dev, 7761 "controller device ID matched using wildcards\n"); 7762 7763 node = dev_to_node(&pci_dev->dev); 7764 if (node == NUMA_NO_NODE) { 7765 cp_node = cpu_to_node(0); 7766 if (cp_node == NUMA_NO_NODE) 7767 cp_node = 0; 7768 set_dev_node(&pci_dev->dev, cp_node); 7769 } 7770 7771 ctrl_info = pqi_alloc_ctrl_info(node); 7772 if (!ctrl_info) { 7773 dev_err(&pci_dev->dev, 7774 "failed to allocate controller info block\n"); 7775 return -ENOMEM; 7776 } 7777 7778 ctrl_info->pci_dev = pci_dev; 7779 7780 rc = pqi_pci_init(ctrl_info); 7781 if (rc) 7782 goto error; 7783 7784 rc = pqi_ctrl_init(ctrl_info); 7785 if (rc) 7786 goto error; 7787 7788 return 0; 7789 7790 error: 7791 pqi_remove_ctrl(ctrl_info); 7792 7793 return rc; 7794 } 7795 7796 static void pqi_pci_remove(struct pci_dev *pci_dev) 7797 { 7798 struct pqi_ctrl_info *ctrl_info; 7799 7800 ctrl_info = pci_get_drvdata(pci_dev); 7801 if (!ctrl_info) 7802 return; 7803 7804 ctrl_info->in_shutdown = true; 7805 7806 pqi_remove_ctrl(ctrl_info); 7807 } 7808 7809 static void pqi_shutdown(struct pci_dev *pci_dev) 7810 { 7811 int rc; 7812 struct pqi_ctrl_info *ctrl_info; 7813 7814 ctrl_info = pci_get_drvdata(pci_dev); 7815 if (!ctrl_info) 7816 goto error; 7817 7818 /* 7819 * Write all data in the controller's battery-backed cache to 7820 * storage. 7821 */ 7822 rc = pqi_flush_cache(ctrl_info, SHUTDOWN); 7823 pqi_free_interrupts(ctrl_info); 7824 pqi_reset(ctrl_info); 7825 if (rc == 0) 7826 return; 7827 7828 error: 7829 dev_warn(&pci_dev->dev, 7830 "unable to flush controller cache\n"); 7831 } 7832 7833 static void pqi_process_lockup_action_param(void) 7834 { 7835 unsigned int i; 7836 7837 if (!pqi_lockup_action_param) 7838 return; 7839 7840 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 7841 if (strcmp(pqi_lockup_action_param, 7842 pqi_lockup_actions[i].name) == 0) { 7843 pqi_lockup_action = pqi_lockup_actions[i].action; 7844 return; 7845 } 7846 } 7847 7848 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n", 7849 DRIVER_NAME_SHORT, pqi_lockup_action_param); 7850 } 7851 7852 static void pqi_process_module_params(void) 7853 { 7854 pqi_process_lockup_action_param(); 7855 } 7856 7857 static __maybe_unused int pqi_suspend(struct pci_dev *pci_dev, pm_message_t state) 7858 { 7859 struct pqi_ctrl_info *ctrl_info; 7860 7861 ctrl_info = pci_get_drvdata(pci_dev); 7862 7863 pqi_disable_events(ctrl_info); 7864 pqi_cancel_update_time_worker(ctrl_info); 7865 pqi_cancel_rescan_worker(ctrl_info); 7866 pqi_wait_until_scan_finished(ctrl_info); 7867 pqi_wait_until_lun_reset_finished(ctrl_info); 7868 pqi_wait_until_ofa_finished(ctrl_info); 7869 pqi_flush_cache(ctrl_info, SUSPEND); 7870 pqi_ctrl_block_requests(ctrl_info); 7871 pqi_ctrl_wait_until_quiesced(ctrl_info); 7872 pqi_wait_until_inbound_queues_empty(ctrl_info); 7873 pqi_ctrl_wait_for_pending_io(ctrl_info, NO_TIMEOUT); 7874 pqi_stop_heartbeat_timer(ctrl_info); 7875 7876 if (state.event == PM_EVENT_FREEZE) 7877 return 0; 7878 7879 pci_save_state(pci_dev); 7880 pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state)); 7881 7882 ctrl_info->controller_online = false; 7883 ctrl_info->pqi_mode_enabled = false; 7884 7885 return 0; 7886 } 7887 7888 static __maybe_unused int pqi_resume(struct pci_dev *pci_dev) 7889 { 7890 int rc; 7891 struct pqi_ctrl_info *ctrl_info; 7892 7893 ctrl_info = pci_get_drvdata(pci_dev); 7894 7895 if (pci_dev->current_state != PCI_D0) { 7896 ctrl_info->max_hw_queue_index = 0; 7897 pqi_free_interrupts(ctrl_info); 7898 pqi_change_irq_mode(ctrl_info, IRQ_MODE_INTX); 7899 rc = request_irq(pci_irq_vector(pci_dev, 0), pqi_irq_handler, 7900 IRQF_SHARED, DRIVER_NAME_SHORT, 7901 &ctrl_info->queue_groups[0]); 7902 if (rc) { 7903 dev_err(&ctrl_info->pci_dev->dev, 7904 "irq %u init failed with error %d\n", 7905 pci_dev->irq, rc); 7906 return rc; 7907 } 7908 pqi_start_heartbeat_timer(ctrl_info); 7909 pqi_ctrl_unblock_requests(ctrl_info); 7910 return 0; 7911 } 7912 7913 pci_set_power_state(pci_dev, PCI_D0); 7914 pci_restore_state(pci_dev); 7915 7916 return pqi_ctrl_init_resume(ctrl_info); 7917 } 7918 7919 /* Define the PCI IDs for the controllers that we support. */ 7920 static const struct pci_device_id pqi_pci_id_table[] = { 7921 { 7922 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7923 0x105b, 0x1211) 7924 }, 7925 { 7926 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7927 0x105b, 0x1321) 7928 }, 7929 { 7930 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7931 0x152d, 0x8a22) 7932 }, 7933 { 7934 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7935 0x152d, 0x8a23) 7936 }, 7937 { 7938 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7939 0x152d, 0x8a24) 7940 }, 7941 { 7942 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7943 0x152d, 0x8a36) 7944 }, 7945 { 7946 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7947 0x152d, 0x8a37) 7948 }, 7949 { 7950 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7951 0x193d, 0x8460) 7952 }, 7953 { 7954 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7955 0x193d, 0x8461) 7956 }, 7957 { 7958 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7959 0x193d, 0xc460) 7960 }, 7961 { 7962 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7963 0x193d, 0xc461) 7964 }, 7965 { 7966 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7967 0x193d, 0xf460) 7968 }, 7969 { 7970 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7971 0x193d, 0xf461) 7972 }, 7973 { 7974 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7975 0x1bd4, 0x0045) 7976 }, 7977 { 7978 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7979 0x1bd4, 0x0046) 7980 }, 7981 { 7982 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7983 0x1bd4, 0x0047) 7984 }, 7985 { 7986 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7987 0x1bd4, 0x0048) 7988 }, 7989 { 7990 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7991 0x1bd4, 0x004a) 7992 }, 7993 { 7994 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7995 0x1bd4, 0x004b) 7996 }, 7997 { 7998 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7999 0x1bd4, 0x004c) 8000 }, 8001 { 8002 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8003 0x19e5, 0xd227) 8004 }, 8005 { 8006 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8007 0x19e5, 0xd228) 8008 }, 8009 { 8010 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8011 0x19e5, 0xd229) 8012 }, 8013 { 8014 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8015 0x19e5, 0xd22a) 8016 }, 8017 { 8018 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8019 0x19e5, 0xd22b) 8020 }, 8021 { 8022 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8023 0x19e5, 0xd22c) 8024 }, 8025 { 8026 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8027 PCI_VENDOR_ID_ADAPTEC2, 0x0110) 8028 }, 8029 { 8030 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8031 PCI_VENDOR_ID_ADAPTEC2, 0x0608) 8032 }, 8033 { 8034 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8035 PCI_VENDOR_ID_ADAPTEC2, 0x0800) 8036 }, 8037 { 8038 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8039 PCI_VENDOR_ID_ADAPTEC2, 0x0801) 8040 }, 8041 { 8042 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8043 PCI_VENDOR_ID_ADAPTEC2, 0x0802) 8044 }, 8045 { 8046 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8047 PCI_VENDOR_ID_ADAPTEC2, 0x0803) 8048 }, 8049 { 8050 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8051 PCI_VENDOR_ID_ADAPTEC2, 0x0804) 8052 }, 8053 { 8054 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8055 PCI_VENDOR_ID_ADAPTEC2, 0x0805) 8056 }, 8057 { 8058 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8059 PCI_VENDOR_ID_ADAPTEC2, 0x0806) 8060 }, 8061 { 8062 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8063 PCI_VENDOR_ID_ADAPTEC2, 0x0807) 8064 }, 8065 { 8066 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8067 PCI_VENDOR_ID_ADAPTEC2, 0x0900) 8068 }, 8069 { 8070 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8071 PCI_VENDOR_ID_ADAPTEC2, 0x0901) 8072 }, 8073 { 8074 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8075 PCI_VENDOR_ID_ADAPTEC2, 0x0902) 8076 }, 8077 { 8078 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8079 PCI_VENDOR_ID_ADAPTEC2, 0x0903) 8080 }, 8081 { 8082 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8083 PCI_VENDOR_ID_ADAPTEC2, 0x0904) 8084 }, 8085 { 8086 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8087 PCI_VENDOR_ID_ADAPTEC2, 0x0905) 8088 }, 8089 { 8090 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8091 PCI_VENDOR_ID_ADAPTEC2, 0x0906) 8092 }, 8093 { 8094 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8095 PCI_VENDOR_ID_ADAPTEC2, 0x0907) 8096 }, 8097 { 8098 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8099 PCI_VENDOR_ID_ADAPTEC2, 0x0908) 8100 }, 8101 { 8102 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8103 PCI_VENDOR_ID_ADAPTEC2, 0x090a) 8104 }, 8105 { 8106 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8107 PCI_VENDOR_ID_ADAPTEC2, 0x1200) 8108 }, 8109 { 8110 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8111 PCI_VENDOR_ID_ADAPTEC2, 0x1201) 8112 }, 8113 { 8114 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8115 PCI_VENDOR_ID_ADAPTEC2, 0x1202) 8116 }, 8117 { 8118 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8119 PCI_VENDOR_ID_ADAPTEC2, 0x1280) 8120 }, 8121 { 8122 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8123 PCI_VENDOR_ID_ADAPTEC2, 0x1281) 8124 }, 8125 { 8126 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8127 PCI_VENDOR_ID_ADAPTEC2, 0x1282) 8128 }, 8129 { 8130 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8131 PCI_VENDOR_ID_ADAPTEC2, 0x1300) 8132 }, 8133 { 8134 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8135 PCI_VENDOR_ID_ADAPTEC2, 0x1301) 8136 }, 8137 { 8138 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8139 PCI_VENDOR_ID_ADAPTEC2, 0x1302) 8140 }, 8141 { 8142 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8143 PCI_VENDOR_ID_ADAPTEC2, 0x1303) 8144 }, 8145 { 8146 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8147 PCI_VENDOR_ID_ADAPTEC2, 0x1380) 8148 }, 8149 { 8150 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8151 PCI_VENDOR_ID_ADVANTECH, 0x8312) 8152 }, 8153 { 8154 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8155 PCI_VENDOR_ID_DELL, 0x1fe0) 8156 }, 8157 { 8158 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8159 PCI_VENDOR_ID_HP, 0x0600) 8160 }, 8161 { 8162 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8163 PCI_VENDOR_ID_HP, 0x0601) 8164 }, 8165 { 8166 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8167 PCI_VENDOR_ID_HP, 0x0602) 8168 }, 8169 { 8170 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8171 PCI_VENDOR_ID_HP, 0x0603) 8172 }, 8173 { 8174 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8175 PCI_VENDOR_ID_HP, 0x0609) 8176 }, 8177 { 8178 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8179 PCI_VENDOR_ID_HP, 0x0650) 8180 }, 8181 { 8182 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8183 PCI_VENDOR_ID_HP, 0x0651) 8184 }, 8185 { 8186 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8187 PCI_VENDOR_ID_HP, 0x0652) 8188 }, 8189 { 8190 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8191 PCI_VENDOR_ID_HP, 0x0653) 8192 }, 8193 { 8194 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8195 PCI_VENDOR_ID_HP, 0x0654) 8196 }, 8197 { 8198 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8199 PCI_VENDOR_ID_HP, 0x0655) 8200 }, 8201 { 8202 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8203 PCI_VENDOR_ID_HP, 0x0700) 8204 }, 8205 { 8206 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8207 PCI_VENDOR_ID_HP, 0x0701) 8208 }, 8209 { 8210 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8211 PCI_VENDOR_ID_HP, 0x1001) 8212 }, 8213 { 8214 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8215 PCI_VENDOR_ID_HP, 0x1100) 8216 }, 8217 { 8218 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8219 PCI_VENDOR_ID_HP, 0x1101) 8220 }, 8221 { 8222 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8223 PCI_ANY_ID, PCI_ANY_ID) 8224 }, 8225 { 0 } 8226 }; 8227 8228 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table); 8229 8230 static struct pci_driver pqi_pci_driver = { 8231 .name = DRIVER_NAME_SHORT, 8232 .id_table = pqi_pci_id_table, 8233 .probe = pqi_pci_probe, 8234 .remove = pqi_pci_remove, 8235 .shutdown = pqi_shutdown, 8236 #if defined(CONFIG_PM) 8237 .suspend = pqi_suspend, 8238 .resume = pqi_resume, 8239 #endif 8240 }; 8241 8242 static int __init pqi_init(void) 8243 { 8244 int rc; 8245 8246 pr_info(DRIVER_NAME "\n"); 8247 8248 pqi_sas_transport_template = 8249 sas_attach_transport(&pqi_sas_transport_functions); 8250 if (!pqi_sas_transport_template) 8251 return -ENODEV; 8252 8253 pqi_process_module_params(); 8254 8255 rc = pci_register_driver(&pqi_pci_driver); 8256 if (rc) 8257 sas_release_transport(pqi_sas_transport_template); 8258 8259 return rc; 8260 } 8261 8262 static void __exit pqi_cleanup(void) 8263 { 8264 pci_unregister_driver(&pqi_pci_driver); 8265 sas_release_transport(pqi_sas_transport_template); 8266 } 8267 8268 module_init(pqi_init); 8269 module_exit(pqi_cleanup); 8270 8271 static void __attribute__((unused)) verify_structures(void) 8272 { 8273 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 8274 sis_host_to_ctrl_doorbell) != 0x20); 8275 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 8276 sis_interrupt_mask) != 0x34); 8277 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 8278 sis_ctrl_to_host_doorbell) != 0x9c); 8279 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 8280 sis_ctrl_to_host_doorbell_clear) != 0xa0); 8281 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 8282 sis_driver_scratch) != 0xb0); 8283 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 8284 sis_firmware_status) != 0xbc); 8285 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 8286 sis_mailbox) != 0x1000); 8287 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 8288 pqi_registers) != 0x4000); 8289 8290 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 8291 iu_type) != 0x0); 8292 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 8293 iu_length) != 0x2); 8294 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 8295 response_queue_id) != 0x4); 8296 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 8297 work_area) != 0x6); 8298 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8); 8299 8300 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 8301 status) != 0x0); 8302 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 8303 service_response) != 0x1); 8304 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 8305 data_present) != 0x2); 8306 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 8307 reserved) != 0x3); 8308 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 8309 residual_count) != 0x4); 8310 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 8311 data_length) != 0x8); 8312 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 8313 reserved1) != 0xa); 8314 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 8315 data) != 0xc); 8316 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c); 8317 8318 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8319 data_in_result) != 0x0); 8320 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8321 data_out_result) != 0x1); 8322 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8323 reserved) != 0x2); 8324 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8325 status) != 0x5); 8326 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8327 status_qualifier) != 0x6); 8328 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8329 sense_data_length) != 0x8); 8330 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8331 response_data_length) != 0xa); 8332 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8333 data_in_transferred) != 0xc); 8334 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8335 data_out_transferred) != 0x10); 8336 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 8337 data) != 0x14); 8338 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114); 8339 8340 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8341 signature) != 0x0); 8342 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8343 function_and_status_code) != 0x8); 8344 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8345 max_admin_iq_elements) != 0x10); 8346 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8347 max_admin_oq_elements) != 0x11); 8348 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8349 admin_iq_element_length) != 0x12); 8350 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8351 admin_oq_element_length) != 0x13); 8352 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8353 max_reset_timeout) != 0x14); 8354 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8355 legacy_intx_status) != 0x18); 8356 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8357 legacy_intx_mask_set) != 0x1c); 8358 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8359 legacy_intx_mask_clear) != 0x20); 8360 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8361 device_status) != 0x40); 8362 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8363 admin_iq_pi_offset) != 0x48); 8364 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8365 admin_oq_ci_offset) != 0x50); 8366 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8367 admin_iq_element_array_addr) != 0x58); 8368 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8369 admin_oq_element_array_addr) != 0x60); 8370 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8371 admin_iq_ci_addr) != 0x68); 8372 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8373 admin_oq_pi_addr) != 0x70); 8374 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8375 admin_iq_num_elements) != 0x78); 8376 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8377 admin_oq_num_elements) != 0x79); 8378 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8379 admin_queue_int_msg_num) != 0x7a); 8380 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8381 device_error) != 0x80); 8382 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8383 error_details) != 0x88); 8384 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8385 device_reset) != 0x90); 8386 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 8387 power_action) != 0x94); 8388 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100); 8389 8390 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8391 header.iu_type) != 0); 8392 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8393 header.iu_length) != 2); 8394 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8395 header.work_area) != 6); 8396 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8397 request_id) != 8); 8398 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8399 function_code) != 10); 8400 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8401 data.report_device_capability.buffer_length) != 44); 8402 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8403 data.report_device_capability.sg_descriptor) != 48); 8404 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8405 data.create_operational_iq.queue_id) != 12); 8406 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8407 data.create_operational_iq.element_array_addr) != 16); 8408 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8409 data.create_operational_iq.ci_addr) != 24); 8410 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8411 data.create_operational_iq.num_elements) != 32); 8412 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8413 data.create_operational_iq.element_length) != 34); 8414 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8415 data.create_operational_iq.queue_protocol) != 36); 8416 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8417 data.create_operational_oq.queue_id) != 12); 8418 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8419 data.create_operational_oq.element_array_addr) != 16); 8420 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8421 data.create_operational_oq.pi_addr) != 24); 8422 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8423 data.create_operational_oq.num_elements) != 32); 8424 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8425 data.create_operational_oq.element_length) != 34); 8426 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8427 data.create_operational_oq.queue_protocol) != 36); 8428 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8429 data.create_operational_oq.int_msg_num) != 40); 8430 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8431 data.create_operational_oq.coalescing_count) != 42); 8432 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8433 data.create_operational_oq.min_coalescing_time) != 44); 8434 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8435 data.create_operational_oq.max_coalescing_time) != 48); 8436 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 8437 data.delete_operational_queue.queue_id) != 12); 8438 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64); 8439 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request, 8440 data.create_operational_iq) != 64 - 11); 8441 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request, 8442 data.create_operational_oq) != 64 - 11); 8443 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request, 8444 data.delete_operational_queue) != 64 - 11); 8445 8446 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8447 header.iu_type) != 0); 8448 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8449 header.iu_length) != 2); 8450 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8451 header.work_area) != 6); 8452 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8453 request_id) != 8); 8454 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8455 function_code) != 10); 8456 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8457 status) != 11); 8458 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8459 data.create_operational_iq.status_descriptor) != 12); 8460 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8461 data.create_operational_iq.iq_pi_offset) != 16); 8462 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8463 data.create_operational_oq.status_descriptor) != 12); 8464 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 8465 data.create_operational_oq.oq_ci_offset) != 16); 8466 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64); 8467 8468 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8469 header.iu_type) != 0); 8470 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8471 header.iu_length) != 2); 8472 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8473 header.response_queue_id) != 4); 8474 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8475 header.work_area) != 6); 8476 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8477 request_id) != 8); 8478 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8479 nexus_id) != 10); 8480 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8481 buffer_length) != 12); 8482 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8483 lun_number) != 16); 8484 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8485 protocol_specific) != 24); 8486 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8487 error_index) != 27); 8488 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8489 cdb) != 32); 8490 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 8491 sg_descriptors) != 64); 8492 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) != 8493 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 8494 8495 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8496 header.iu_type) != 0); 8497 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8498 header.iu_length) != 2); 8499 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8500 header.response_queue_id) != 4); 8501 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8502 header.work_area) != 6); 8503 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8504 request_id) != 8); 8505 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8506 nexus_id) != 12); 8507 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8508 buffer_length) != 16); 8509 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8510 data_encryption_key_index) != 22); 8511 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8512 encrypt_tweak_lower) != 24); 8513 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8514 encrypt_tweak_upper) != 28); 8515 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8516 cdb) != 32); 8517 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8518 error_index) != 48); 8519 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8520 num_sg_descriptors) != 50); 8521 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8522 cdb_length) != 51); 8523 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8524 lun_number) != 52); 8525 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 8526 sg_descriptors) != 64); 8527 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) != 8528 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 8529 8530 BUILD_BUG_ON(offsetof(struct pqi_io_response, 8531 header.iu_type) != 0); 8532 BUILD_BUG_ON(offsetof(struct pqi_io_response, 8533 header.iu_length) != 2); 8534 BUILD_BUG_ON(offsetof(struct pqi_io_response, 8535 request_id) != 8); 8536 BUILD_BUG_ON(offsetof(struct pqi_io_response, 8537 error_index) != 10); 8538 8539 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 8540 header.iu_type) != 0); 8541 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 8542 header.iu_length) != 2); 8543 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 8544 header.response_queue_id) != 4); 8545 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 8546 request_id) != 8); 8547 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 8548 data.report_event_configuration.buffer_length) != 12); 8549 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 8550 data.report_event_configuration.sg_descriptors) != 16); 8551 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 8552 data.set_event_configuration.global_event_oq_id) != 10); 8553 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 8554 data.set_event_configuration.buffer_length) != 12); 8555 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 8556 data.set_event_configuration.sg_descriptors) != 16); 8557 8558 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 8559 max_inbound_iu_length) != 6); 8560 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 8561 max_outbound_iu_length) != 14); 8562 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16); 8563 8564 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8565 data_length) != 0); 8566 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8567 iq_arbitration_priority_support_bitmask) != 8); 8568 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8569 maximum_aw_a) != 9); 8570 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8571 maximum_aw_b) != 10); 8572 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8573 maximum_aw_c) != 11); 8574 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8575 max_inbound_queues) != 16); 8576 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8577 max_elements_per_iq) != 18); 8578 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8579 max_iq_element_length) != 24); 8580 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8581 min_iq_element_length) != 26); 8582 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8583 max_outbound_queues) != 30); 8584 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8585 max_elements_per_oq) != 32); 8586 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8587 intr_coalescing_time_granularity) != 34); 8588 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8589 max_oq_element_length) != 36); 8590 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8591 min_oq_element_length) != 38); 8592 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 8593 iu_layer_descriptors) != 64); 8594 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576); 8595 8596 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 8597 event_type) != 0); 8598 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 8599 oq_id) != 2); 8600 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4); 8601 8602 BUILD_BUG_ON(offsetof(struct pqi_event_config, 8603 num_event_descriptors) != 2); 8604 BUILD_BUG_ON(offsetof(struct pqi_event_config, 8605 descriptors) != 4); 8606 8607 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS != 8608 ARRAY_SIZE(pqi_supported_event_types)); 8609 8610 BUILD_BUG_ON(offsetof(struct pqi_event_response, 8611 header.iu_type) != 0); 8612 BUILD_BUG_ON(offsetof(struct pqi_event_response, 8613 header.iu_length) != 2); 8614 BUILD_BUG_ON(offsetof(struct pqi_event_response, 8615 event_type) != 8); 8616 BUILD_BUG_ON(offsetof(struct pqi_event_response, 8617 event_id) != 10); 8618 BUILD_BUG_ON(offsetof(struct pqi_event_response, 8619 additional_event_id) != 12); 8620 BUILD_BUG_ON(offsetof(struct pqi_event_response, 8621 data) != 16); 8622 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32); 8623 8624 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 8625 header.iu_type) != 0); 8626 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 8627 header.iu_length) != 2); 8628 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 8629 event_type) != 8); 8630 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 8631 event_id) != 10); 8632 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 8633 additional_event_id) != 12); 8634 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16); 8635 8636 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 8637 header.iu_type) != 0); 8638 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 8639 header.iu_length) != 2); 8640 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 8641 request_id) != 8); 8642 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 8643 nexus_id) != 10); 8644 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 8645 lun_number) != 16); 8646 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 8647 protocol_specific) != 24); 8648 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 8649 outbound_queue_id_to_manage) != 26); 8650 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 8651 request_id_to_manage) != 28); 8652 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 8653 task_management_function) != 30); 8654 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32); 8655 8656 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 8657 header.iu_type) != 0); 8658 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 8659 header.iu_length) != 2); 8660 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 8661 request_id) != 8); 8662 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 8663 nexus_id) != 10); 8664 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 8665 additional_response_info) != 12); 8666 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 8667 response_code) != 15); 8668 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16); 8669 8670 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 8671 configured_logical_drive_count) != 0); 8672 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 8673 configuration_signature) != 1); 8674 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 8675 firmware_version) != 5); 8676 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 8677 extended_logical_unit_count) != 154); 8678 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 8679 firmware_build_number) != 190); 8680 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 8681 controller_mode) != 292); 8682 8683 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 8684 phys_bay_in_box) != 115); 8685 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 8686 device_type) != 120); 8687 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 8688 redundant_path_present_map) != 1736); 8689 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 8690 active_path_number) != 1738); 8691 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 8692 alternate_paths_phys_connector) != 1739); 8693 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 8694 alternate_paths_phys_box_on_port) != 1755); 8695 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 8696 current_queue_depth_limit) != 1796); 8697 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560); 8698 8699 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255); 8700 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255); 8701 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH % 8702 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 8703 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH % 8704 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 8705 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560); 8706 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH % 8707 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 8708 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560); 8709 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH % 8710 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 8711 8712 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS); 8713 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= 8714 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP); 8715 } 8716