1 /* 2 * driver for Microsemi PQI-based storage controllers 3 * Copyright (c) 2016-2017 Microsemi Corporation 4 * Copyright (c) 2016 PMC-Sierra, Inc. 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; version 2 of the License. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 13 * NON INFRINGEMENT. See the GNU General Public License for more details. 14 * 15 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 16 * 17 */ 18 19 #include <linux/module.h> 20 #include <linux/kernel.h> 21 #include <linux/pci.h> 22 #include <linux/delay.h> 23 #include <linux/interrupt.h> 24 #include <linux/sched.h> 25 #include <linux/rtc.h> 26 #include <linux/bcd.h> 27 #include <linux/reboot.h> 28 #include <linux/cciss_ioctl.h> 29 #include <linux/blk-mq-pci.h> 30 #include <scsi/scsi_host.h> 31 #include <scsi/scsi_cmnd.h> 32 #include <scsi/scsi_device.h> 33 #include <scsi/scsi_eh.h> 34 #include <scsi/scsi_transport_sas.h> 35 #include <asm/unaligned.h> 36 #include "smartpqi.h" 37 #include "smartpqi_sis.h" 38 39 #if !defined(BUILD_TIMESTAMP) 40 #define BUILD_TIMESTAMP 41 #endif 42 43 #define DRIVER_VERSION "1.1.4-115" 44 #define DRIVER_MAJOR 1 45 #define DRIVER_MINOR 1 46 #define DRIVER_RELEASE 4 47 #define DRIVER_REVISION 115 48 49 #define DRIVER_NAME "Microsemi PQI Driver (v" \ 50 DRIVER_VERSION BUILD_TIMESTAMP ")" 51 #define DRIVER_NAME_SHORT "smartpqi" 52 53 #define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor)) 54 55 MODULE_AUTHOR("Microsemi"); 56 MODULE_DESCRIPTION("Driver for Microsemi Smart Family Controller version " 57 DRIVER_VERSION); 58 MODULE_SUPPORTED_DEVICE("Microsemi Smart Family Controllers"); 59 MODULE_VERSION(DRIVER_VERSION); 60 MODULE_LICENSE("GPL"); 61 62 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info); 63 static void pqi_ctrl_offline_worker(struct work_struct *work); 64 static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info); 65 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info); 66 static void pqi_scan_start(struct Scsi_Host *shost); 67 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 68 struct pqi_queue_group *queue_group, enum pqi_io_path path, 69 struct pqi_io_request *io_request); 70 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 71 struct pqi_iu_header *request, unsigned int flags, 72 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs); 73 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 74 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 75 unsigned int cdb_length, struct pqi_queue_group *queue_group, 76 struct pqi_encryption_info *encryption_info, bool raid_bypass); 77 78 /* for flags argument to pqi_submit_raid_request_synchronous() */ 79 #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1 80 81 static struct scsi_transport_template *pqi_sas_transport_template; 82 83 static atomic_t pqi_controller_count = ATOMIC_INIT(0); 84 85 enum pqi_lockup_action { 86 NONE, 87 REBOOT, 88 PANIC 89 }; 90 91 static enum pqi_lockup_action pqi_lockup_action = NONE; 92 93 static struct { 94 enum pqi_lockup_action action; 95 char *name; 96 } pqi_lockup_actions[] = { 97 { 98 .action = NONE, 99 .name = "none", 100 }, 101 { 102 .action = REBOOT, 103 .name = "reboot", 104 }, 105 { 106 .action = PANIC, 107 .name = "panic", 108 }, 109 }; 110 111 static unsigned int pqi_supported_event_types[] = { 112 PQI_EVENT_TYPE_HOTPLUG, 113 PQI_EVENT_TYPE_HARDWARE, 114 PQI_EVENT_TYPE_PHYSICAL_DEVICE, 115 PQI_EVENT_TYPE_LOGICAL_DEVICE, 116 PQI_EVENT_TYPE_AIO_STATE_CHANGE, 117 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE, 118 }; 119 120 static int pqi_disable_device_id_wildcards; 121 module_param_named(disable_device_id_wildcards, 122 pqi_disable_device_id_wildcards, int, 0644); 123 MODULE_PARM_DESC(disable_device_id_wildcards, 124 "Disable device ID wildcards."); 125 126 static int pqi_disable_heartbeat; 127 module_param_named(disable_heartbeat, 128 pqi_disable_heartbeat, int, 0644); 129 MODULE_PARM_DESC(disable_heartbeat, 130 "Disable heartbeat."); 131 132 static int pqi_disable_ctrl_shutdown; 133 module_param_named(disable_ctrl_shutdown, 134 pqi_disable_ctrl_shutdown, int, 0644); 135 MODULE_PARM_DESC(disable_ctrl_shutdown, 136 "Disable controller shutdown when controller locked up."); 137 138 static char *pqi_lockup_action_param; 139 module_param_named(lockup_action, 140 pqi_lockup_action_param, charp, 0644); 141 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n" 142 "\t\tSupported: none, reboot, panic\n" 143 "\t\tDefault: none"); 144 145 static char *raid_levels[] = { 146 "RAID-0", 147 "RAID-4", 148 "RAID-1(1+0)", 149 "RAID-5", 150 "RAID-5+1", 151 "RAID-ADG", 152 "RAID-1(ADM)", 153 }; 154 155 static char *pqi_raid_level_to_string(u8 raid_level) 156 { 157 if (raid_level < ARRAY_SIZE(raid_levels)) 158 return raid_levels[raid_level]; 159 160 return "RAID UNKNOWN"; 161 } 162 163 #define SA_RAID_0 0 164 #define SA_RAID_4 1 165 #define SA_RAID_1 2 /* also used for RAID 10 */ 166 #define SA_RAID_5 3 /* also used for RAID 50 */ 167 #define SA_RAID_51 4 168 #define SA_RAID_6 5 /* also used for RAID 60 */ 169 #define SA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 170 #define SA_RAID_MAX SA_RAID_ADM 171 #define SA_RAID_UNKNOWN 0xff 172 173 static inline void pqi_scsi_done(struct scsi_cmnd *scmd) 174 { 175 pqi_prep_for_scsi_done(scmd); 176 scmd->scsi_done(scmd); 177 } 178 179 static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2) 180 { 181 return memcmp(scsi3addr1, scsi3addr2, 8) == 0; 182 } 183 184 static inline struct pqi_ctrl_info *shost_to_hba(struct Scsi_Host *shost) 185 { 186 void *hostdata = shost_priv(shost); 187 188 return *((struct pqi_ctrl_info **)hostdata); 189 } 190 191 static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device) 192 { 193 return !device->is_physical_device; 194 } 195 196 static inline bool pqi_is_external_raid_addr(u8 *scsi3addr) 197 { 198 return scsi3addr[2] != 0; 199 } 200 201 static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info) 202 { 203 return !ctrl_info->controller_online; 204 } 205 206 static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info) 207 { 208 if (ctrl_info->controller_online) 209 if (!sis_is_firmware_running(ctrl_info)) 210 pqi_take_ctrl_offline(ctrl_info); 211 } 212 213 static inline bool pqi_is_hba_lunid(u8 *scsi3addr) 214 { 215 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID); 216 } 217 218 static inline enum pqi_ctrl_mode pqi_get_ctrl_mode( 219 struct pqi_ctrl_info *ctrl_info) 220 { 221 return sis_read_driver_scratch(ctrl_info); 222 } 223 224 static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info, 225 enum pqi_ctrl_mode mode) 226 { 227 sis_write_driver_scratch(ctrl_info, mode); 228 } 229 230 static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info) 231 { 232 ctrl_info->block_requests = true; 233 scsi_block_requests(ctrl_info->scsi_host); 234 } 235 236 static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info) 237 { 238 ctrl_info->block_requests = false; 239 wake_up_all(&ctrl_info->block_requests_wait); 240 pqi_retry_raid_bypass_requests(ctrl_info); 241 scsi_unblock_requests(ctrl_info->scsi_host); 242 } 243 244 static inline bool pqi_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 245 { 246 return ctrl_info->block_requests; 247 } 248 249 static unsigned long pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info, 250 unsigned long timeout_msecs) 251 { 252 unsigned long remaining_msecs; 253 254 if (!pqi_ctrl_blocked(ctrl_info)) 255 return timeout_msecs; 256 257 atomic_inc(&ctrl_info->num_blocked_threads); 258 259 if (timeout_msecs == NO_TIMEOUT) { 260 wait_event(ctrl_info->block_requests_wait, 261 !pqi_ctrl_blocked(ctrl_info)); 262 remaining_msecs = timeout_msecs; 263 } else { 264 unsigned long remaining_jiffies; 265 266 remaining_jiffies = 267 wait_event_timeout(ctrl_info->block_requests_wait, 268 !pqi_ctrl_blocked(ctrl_info), 269 msecs_to_jiffies(timeout_msecs)); 270 remaining_msecs = jiffies_to_msecs(remaining_jiffies); 271 } 272 273 atomic_dec(&ctrl_info->num_blocked_threads); 274 275 return remaining_msecs; 276 } 277 278 static inline void pqi_ctrl_busy(struct pqi_ctrl_info *ctrl_info) 279 { 280 atomic_inc(&ctrl_info->num_busy_threads); 281 } 282 283 static inline void pqi_ctrl_unbusy(struct pqi_ctrl_info *ctrl_info) 284 { 285 atomic_dec(&ctrl_info->num_busy_threads); 286 } 287 288 static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info) 289 { 290 while (atomic_read(&ctrl_info->num_busy_threads) > 291 atomic_read(&ctrl_info->num_blocked_threads)) 292 usleep_range(1000, 2000); 293 } 294 295 static inline bool pqi_device_offline(struct pqi_scsi_dev *device) 296 { 297 return device->device_offline; 298 } 299 300 static inline void pqi_device_reset_start(struct pqi_scsi_dev *device) 301 { 302 device->in_reset = true; 303 } 304 305 static inline void pqi_device_reset_done(struct pqi_scsi_dev *device) 306 { 307 device->in_reset = false; 308 } 309 310 static inline bool pqi_device_in_reset(struct pqi_scsi_dev *device) 311 { 312 return device->in_reset; 313 } 314 315 static inline void pqi_schedule_rescan_worker_with_delay( 316 struct pqi_ctrl_info *ctrl_info, unsigned long delay) 317 { 318 if (pqi_ctrl_offline(ctrl_info)) 319 return; 320 321 schedule_delayed_work(&ctrl_info->rescan_work, delay); 322 } 323 324 static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info) 325 { 326 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0); 327 } 328 329 #define PQI_RESCAN_WORK_DELAY (10 * HZ) 330 331 static inline void pqi_schedule_rescan_worker_delayed( 332 struct pqi_ctrl_info *ctrl_info) 333 { 334 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY); 335 } 336 337 static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info) 338 { 339 cancel_delayed_work_sync(&ctrl_info->rescan_work); 340 } 341 342 static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info) 343 { 344 if (!ctrl_info->heartbeat_counter) 345 return 0; 346 347 return readl(ctrl_info->heartbeat_counter); 348 } 349 350 static int pqi_map_single(struct pci_dev *pci_dev, 351 struct pqi_sg_descriptor *sg_descriptor, void *buffer, 352 size_t buffer_length, int data_direction) 353 { 354 dma_addr_t bus_address; 355 356 if (!buffer || buffer_length == 0 || data_direction == PCI_DMA_NONE) 357 return 0; 358 359 bus_address = pci_map_single(pci_dev, buffer, buffer_length, 360 data_direction); 361 if (pci_dma_mapping_error(pci_dev, bus_address)) 362 return -ENOMEM; 363 364 put_unaligned_le64((u64)bus_address, &sg_descriptor->address); 365 put_unaligned_le32(buffer_length, &sg_descriptor->length); 366 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 367 368 return 0; 369 } 370 371 static void pqi_pci_unmap(struct pci_dev *pci_dev, 372 struct pqi_sg_descriptor *descriptors, int num_descriptors, 373 int data_direction) 374 { 375 int i; 376 377 if (data_direction == PCI_DMA_NONE) 378 return; 379 380 for (i = 0; i < num_descriptors; i++) 381 pci_unmap_single(pci_dev, 382 (dma_addr_t)get_unaligned_le64(&descriptors[i].address), 383 get_unaligned_le32(&descriptors[i].length), 384 data_direction); 385 } 386 387 static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info, 388 struct pqi_raid_path_request *request, u8 cmd, 389 u8 *scsi3addr, void *buffer, size_t buffer_length, 390 u16 vpd_page, int *pci_direction) 391 { 392 u8 *cdb; 393 int pci_dir; 394 395 memset(request, 0, sizeof(*request)); 396 397 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 398 put_unaligned_le16(offsetof(struct pqi_raid_path_request, 399 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH, 400 &request->header.iu_length); 401 put_unaligned_le32(buffer_length, &request->buffer_length); 402 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number)); 403 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 404 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 405 406 cdb = request->cdb; 407 408 switch (cmd) { 409 case INQUIRY: 410 request->data_direction = SOP_READ_FLAG; 411 cdb[0] = INQUIRY; 412 if (vpd_page & VPD_PAGE) { 413 cdb[1] = 0x1; 414 cdb[2] = (u8)vpd_page; 415 } 416 cdb[4] = (u8)buffer_length; 417 break; 418 case CISS_REPORT_LOG: 419 case CISS_REPORT_PHYS: 420 request->data_direction = SOP_READ_FLAG; 421 cdb[0] = cmd; 422 if (cmd == CISS_REPORT_PHYS) 423 cdb[1] = CISS_REPORT_PHYS_EXTENDED; 424 else 425 cdb[1] = CISS_REPORT_LOG_EXTENDED; 426 put_unaligned_be32(buffer_length, &cdb[6]); 427 break; 428 case CISS_GET_RAID_MAP: 429 request->data_direction = SOP_READ_FLAG; 430 cdb[0] = CISS_READ; 431 cdb[1] = CISS_GET_RAID_MAP; 432 put_unaligned_be32(buffer_length, &cdb[6]); 433 break; 434 case SA_FLUSH_CACHE: 435 request->data_direction = SOP_WRITE_FLAG; 436 cdb[0] = BMIC_WRITE; 437 cdb[6] = BMIC_FLUSH_CACHE; 438 put_unaligned_be16(buffer_length, &cdb[7]); 439 break; 440 case BMIC_IDENTIFY_CONTROLLER: 441 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 442 request->data_direction = SOP_READ_FLAG; 443 cdb[0] = BMIC_READ; 444 cdb[6] = cmd; 445 put_unaligned_be16(buffer_length, &cdb[7]); 446 break; 447 case BMIC_WRITE_HOST_WELLNESS: 448 request->data_direction = SOP_WRITE_FLAG; 449 cdb[0] = BMIC_WRITE; 450 cdb[6] = cmd; 451 put_unaligned_be16(buffer_length, &cdb[7]); 452 break; 453 default: 454 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", 455 cmd); 456 break; 457 } 458 459 switch (request->data_direction) { 460 case SOP_READ_FLAG: 461 pci_dir = PCI_DMA_FROMDEVICE; 462 break; 463 case SOP_WRITE_FLAG: 464 pci_dir = PCI_DMA_TODEVICE; 465 break; 466 case SOP_NO_DIRECTION_FLAG: 467 pci_dir = PCI_DMA_NONE; 468 break; 469 default: 470 pci_dir = PCI_DMA_BIDIRECTIONAL; 471 break; 472 } 473 474 *pci_direction = pci_dir; 475 476 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0], 477 buffer, buffer_length, pci_dir); 478 } 479 480 static inline void pqi_reinit_io_request(struct pqi_io_request *io_request) 481 { 482 io_request->scmd = NULL; 483 io_request->status = 0; 484 io_request->error_info = NULL; 485 io_request->raid_bypass = false; 486 } 487 488 static struct pqi_io_request *pqi_alloc_io_request( 489 struct pqi_ctrl_info *ctrl_info) 490 { 491 struct pqi_io_request *io_request; 492 u16 i = ctrl_info->next_io_request_slot; /* benignly racy */ 493 494 while (1) { 495 io_request = &ctrl_info->io_request_pool[i]; 496 if (atomic_inc_return(&io_request->refcount) == 1) 497 break; 498 atomic_dec(&io_request->refcount); 499 i = (i + 1) % ctrl_info->max_io_slots; 500 } 501 502 /* benignly racy */ 503 ctrl_info->next_io_request_slot = (i + 1) % ctrl_info->max_io_slots; 504 505 pqi_reinit_io_request(io_request); 506 507 return io_request; 508 } 509 510 static void pqi_free_io_request(struct pqi_io_request *io_request) 511 { 512 atomic_dec(&io_request->refcount); 513 } 514 515 static int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info, 516 struct bmic_identify_controller *buffer) 517 { 518 int rc; 519 int pci_direction; 520 struct pqi_raid_path_request request; 521 522 rc = pqi_build_raid_path_request(ctrl_info, &request, 523 BMIC_IDENTIFY_CONTROLLER, RAID_CTLR_LUNID, buffer, 524 sizeof(*buffer), 0, &pci_direction); 525 if (rc) 526 return rc; 527 528 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, 529 NULL, NO_TIMEOUT); 530 531 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 532 pci_direction); 533 534 return rc; 535 } 536 537 static int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info, 538 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length) 539 { 540 int rc; 541 int pci_direction; 542 struct pqi_raid_path_request request; 543 544 rc = pqi_build_raid_path_request(ctrl_info, &request, 545 INQUIRY, scsi3addr, buffer, buffer_length, vpd_page, 546 &pci_direction); 547 if (rc) 548 return rc; 549 550 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, 551 NULL, NO_TIMEOUT); 552 553 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 554 pci_direction); 555 556 return rc; 557 } 558 559 static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info, 560 struct pqi_scsi_dev *device, 561 struct bmic_identify_physical_device *buffer, 562 size_t buffer_length) 563 { 564 int rc; 565 int pci_direction; 566 u16 bmic_device_index; 567 struct pqi_raid_path_request request; 568 569 rc = pqi_build_raid_path_request(ctrl_info, &request, 570 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer, 571 buffer_length, 0, &pci_direction); 572 if (rc) 573 return rc; 574 575 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr); 576 request.cdb[2] = (u8)bmic_device_index; 577 request.cdb[9] = (u8)(bmic_device_index >> 8); 578 579 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 580 0, NULL, NO_TIMEOUT); 581 582 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 583 pci_direction); 584 585 return rc; 586 } 587 588 static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info, 589 enum bmic_flush_cache_shutdown_event shutdown_event) 590 { 591 int rc; 592 struct pqi_raid_path_request request; 593 int pci_direction; 594 struct bmic_flush_cache *flush_cache; 595 596 /* 597 * Don't bother trying to flush the cache if the controller is 598 * locked up. 599 */ 600 if (pqi_ctrl_offline(ctrl_info)) 601 return -ENXIO; 602 603 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL); 604 if (!flush_cache) 605 return -ENOMEM; 606 607 flush_cache->shutdown_event = shutdown_event; 608 609 rc = pqi_build_raid_path_request(ctrl_info, &request, 610 SA_FLUSH_CACHE, RAID_CTLR_LUNID, flush_cache, 611 sizeof(*flush_cache), 0, &pci_direction); 612 if (rc) 613 goto out; 614 615 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 616 0, NULL, NO_TIMEOUT); 617 618 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 619 pci_direction); 620 621 out: 622 kfree(flush_cache); 623 624 return rc; 625 } 626 627 static int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info, 628 void *buffer, size_t buffer_length) 629 { 630 int rc; 631 struct pqi_raid_path_request request; 632 int pci_direction; 633 634 rc = pqi_build_raid_path_request(ctrl_info, &request, 635 BMIC_WRITE_HOST_WELLNESS, RAID_CTLR_LUNID, buffer, 636 buffer_length, 0, &pci_direction); 637 if (rc) 638 return rc; 639 640 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 641 0, NULL, NO_TIMEOUT); 642 643 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 644 pci_direction); 645 646 return rc; 647 } 648 649 #pragma pack(1) 650 651 struct bmic_host_wellness_driver_version { 652 u8 start_tag[4]; 653 u8 driver_version_tag[2]; 654 __le16 driver_version_length; 655 char driver_version[32]; 656 u8 end_tag[2]; 657 }; 658 659 #pragma pack() 660 661 static int pqi_write_driver_version_to_host_wellness( 662 struct pqi_ctrl_info *ctrl_info) 663 { 664 int rc; 665 struct bmic_host_wellness_driver_version *buffer; 666 size_t buffer_length; 667 668 buffer_length = sizeof(*buffer); 669 670 buffer = kmalloc(buffer_length, GFP_KERNEL); 671 if (!buffer) 672 return -ENOMEM; 673 674 buffer->start_tag[0] = '<'; 675 buffer->start_tag[1] = 'H'; 676 buffer->start_tag[2] = 'W'; 677 buffer->start_tag[3] = '>'; 678 buffer->driver_version_tag[0] = 'D'; 679 buffer->driver_version_tag[1] = 'V'; 680 put_unaligned_le16(sizeof(buffer->driver_version), 681 &buffer->driver_version_length); 682 strncpy(buffer->driver_version, "Linux " DRIVER_VERSION, 683 sizeof(buffer->driver_version) - 1); 684 buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0'; 685 buffer->end_tag[0] = 'Z'; 686 buffer->end_tag[1] = 'Z'; 687 688 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 689 690 kfree(buffer); 691 692 return rc; 693 } 694 695 #pragma pack(1) 696 697 struct bmic_host_wellness_time { 698 u8 start_tag[4]; 699 u8 time_tag[2]; 700 __le16 time_length; 701 u8 time[8]; 702 u8 dont_write_tag[2]; 703 u8 end_tag[2]; 704 }; 705 706 #pragma pack() 707 708 static int pqi_write_current_time_to_host_wellness( 709 struct pqi_ctrl_info *ctrl_info) 710 { 711 int rc; 712 struct bmic_host_wellness_time *buffer; 713 size_t buffer_length; 714 time64_t local_time; 715 unsigned int year; 716 struct tm tm; 717 718 buffer_length = sizeof(*buffer); 719 720 buffer = kmalloc(buffer_length, GFP_KERNEL); 721 if (!buffer) 722 return -ENOMEM; 723 724 buffer->start_tag[0] = '<'; 725 buffer->start_tag[1] = 'H'; 726 buffer->start_tag[2] = 'W'; 727 buffer->start_tag[3] = '>'; 728 buffer->time_tag[0] = 'T'; 729 buffer->time_tag[1] = 'D'; 730 put_unaligned_le16(sizeof(buffer->time), 731 &buffer->time_length); 732 733 local_time = ktime_get_real_seconds(); 734 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm); 735 year = tm.tm_year + 1900; 736 737 buffer->time[0] = bin2bcd(tm.tm_hour); 738 buffer->time[1] = bin2bcd(tm.tm_min); 739 buffer->time[2] = bin2bcd(tm.tm_sec); 740 buffer->time[3] = 0; 741 buffer->time[4] = bin2bcd(tm.tm_mon + 1); 742 buffer->time[5] = bin2bcd(tm.tm_mday); 743 buffer->time[6] = bin2bcd(year / 100); 744 buffer->time[7] = bin2bcd(year % 100); 745 746 buffer->dont_write_tag[0] = 'D'; 747 buffer->dont_write_tag[1] = 'W'; 748 buffer->end_tag[0] = 'Z'; 749 buffer->end_tag[1] = 'Z'; 750 751 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 752 753 kfree(buffer); 754 755 return rc; 756 } 757 758 #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * HZ) 759 760 static void pqi_update_time_worker(struct work_struct *work) 761 { 762 int rc; 763 struct pqi_ctrl_info *ctrl_info; 764 765 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 766 update_time_work); 767 768 if (pqi_ctrl_offline(ctrl_info)) 769 return; 770 771 rc = pqi_write_current_time_to_host_wellness(ctrl_info); 772 if (rc) 773 dev_warn(&ctrl_info->pci_dev->dev, 774 "error updating time on controller\n"); 775 776 schedule_delayed_work(&ctrl_info->update_time_work, 777 PQI_UPDATE_TIME_WORK_INTERVAL); 778 } 779 780 static inline void pqi_schedule_update_time_worker( 781 struct pqi_ctrl_info *ctrl_info) 782 { 783 schedule_delayed_work(&ctrl_info->update_time_work, 0); 784 } 785 786 static inline void pqi_cancel_update_time_worker( 787 struct pqi_ctrl_info *ctrl_info) 788 { 789 cancel_delayed_work_sync(&ctrl_info->update_time_work); 790 } 791 792 static int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, 793 void *buffer, size_t buffer_length) 794 { 795 int rc; 796 int pci_direction; 797 struct pqi_raid_path_request request; 798 799 rc = pqi_build_raid_path_request(ctrl_info, &request, 800 cmd, RAID_CTLR_LUNID, buffer, buffer_length, 0, &pci_direction); 801 if (rc) 802 return rc; 803 804 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, 805 NULL, NO_TIMEOUT); 806 807 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 808 pci_direction); 809 810 return rc; 811 } 812 813 static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, 814 void **buffer) 815 { 816 int rc; 817 size_t lun_list_length; 818 size_t lun_data_length; 819 size_t new_lun_list_length; 820 void *lun_data = NULL; 821 struct report_lun_header *report_lun_header; 822 823 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL); 824 if (!report_lun_header) { 825 rc = -ENOMEM; 826 goto out; 827 } 828 829 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header, 830 sizeof(*report_lun_header)); 831 if (rc) 832 goto out; 833 834 lun_list_length = get_unaligned_be32(&report_lun_header->list_length); 835 836 again: 837 lun_data_length = sizeof(struct report_lun_header) + lun_list_length; 838 839 lun_data = kmalloc(lun_data_length, GFP_KERNEL); 840 if (!lun_data) { 841 rc = -ENOMEM; 842 goto out; 843 } 844 845 if (lun_list_length == 0) { 846 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header)); 847 goto out; 848 } 849 850 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length); 851 if (rc) 852 goto out; 853 854 new_lun_list_length = get_unaligned_be32( 855 &((struct report_lun_header *)lun_data)->list_length); 856 857 if (new_lun_list_length > lun_list_length) { 858 lun_list_length = new_lun_list_length; 859 kfree(lun_data); 860 goto again; 861 } 862 863 out: 864 kfree(report_lun_header); 865 866 if (rc) { 867 kfree(lun_data); 868 lun_data = NULL; 869 } 870 871 *buffer = lun_data; 872 873 return rc; 874 } 875 876 static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info, 877 void **buffer) 878 { 879 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS, 880 buffer); 881 } 882 883 static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info, 884 void **buffer) 885 { 886 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer); 887 } 888 889 static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info, 890 struct report_phys_lun_extended **physdev_list, 891 struct report_log_lun_extended **logdev_list) 892 { 893 int rc; 894 size_t logdev_list_length; 895 size_t logdev_data_length; 896 struct report_log_lun_extended *internal_logdev_list; 897 struct report_log_lun_extended *logdev_data; 898 struct report_lun_header report_lun_header; 899 900 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list); 901 if (rc) 902 dev_err(&ctrl_info->pci_dev->dev, 903 "report physical LUNs failed\n"); 904 905 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list); 906 if (rc) 907 dev_err(&ctrl_info->pci_dev->dev, 908 "report logical LUNs failed\n"); 909 910 /* 911 * Tack the controller itself onto the end of the logical device list. 912 */ 913 914 logdev_data = *logdev_list; 915 916 if (logdev_data) { 917 logdev_list_length = 918 get_unaligned_be32(&logdev_data->header.list_length); 919 } else { 920 memset(&report_lun_header, 0, sizeof(report_lun_header)); 921 logdev_data = 922 (struct report_log_lun_extended *)&report_lun_header; 923 logdev_list_length = 0; 924 } 925 926 logdev_data_length = sizeof(struct report_lun_header) + 927 logdev_list_length; 928 929 internal_logdev_list = kmalloc(logdev_data_length + 930 sizeof(struct report_log_lun_extended), GFP_KERNEL); 931 if (!internal_logdev_list) { 932 kfree(*logdev_list); 933 *logdev_list = NULL; 934 return -ENOMEM; 935 } 936 937 memcpy(internal_logdev_list, logdev_data, logdev_data_length); 938 memset((u8 *)internal_logdev_list + logdev_data_length, 0, 939 sizeof(struct report_log_lun_extended_entry)); 940 put_unaligned_be32(logdev_list_length + 941 sizeof(struct report_log_lun_extended_entry), 942 &internal_logdev_list->header.list_length); 943 944 kfree(*logdev_list); 945 *logdev_list = internal_logdev_list; 946 947 return 0; 948 } 949 950 static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device, 951 int bus, int target, int lun) 952 { 953 device->bus = bus; 954 device->target = target; 955 device->lun = lun; 956 } 957 958 static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device) 959 { 960 u8 *scsi3addr; 961 u32 lunid; 962 int bus; 963 int target; 964 int lun; 965 966 scsi3addr = device->scsi3addr; 967 lunid = get_unaligned_le32(scsi3addr); 968 969 if (pqi_is_hba_lunid(scsi3addr)) { 970 /* The specified device is the controller. */ 971 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff); 972 device->target_lun_valid = true; 973 return; 974 } 975 976 if (pqi_is_logical_device(device)) { 977 if (device->is_external_raid_device) { 978 bus = PQI_EXTERNAL_RAID_VOLUME_BUS; 979 target = (lunid >> 16) & 0x3fff; 980 lun = lunid & 0xff; 981 } else { 982 bus = PQI_RAID_VOLUME_BUS; 983 target = 0; 984 lun = lunid & 0x3fff; 985 } 986 pqi_set_bus_target_lun(device, bus, target, lun); 987 device->target_lun_valid = true; 988 return; 989 } 990 991 /* 992 * Defer target and LUN assignment for non-controller physical devices 993 * because the SAS transport layer will make these assignments later. 994 */ 995 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0); 996 } 997 998 static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info, 999 struct pqi_scsi_dev *device) 1000 { 1001 int rc; 1002 u8 raid_level; 1003 u8 *buffer; 1004 1005 raid_level = SA_RAID_UNKNOWN; 1006 1007 buffer = kmalloc(64, GFP_KERNEL); 1008 if (buffer) { 1009 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1010 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64); 1011 if (rc == 0) { 1012 raid_level = buffer[8]; 1013 if (raid_level > SA_RAID_MAX) 1014 raid_level = SA_RAID_UNKNOWN; 1015 } 1016 kfree(buffer); 1017 } 1018 1019 device->raid_level = raid_level; 1020 } 1021 1022 static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info, 1023 struct pqi_scsi_dev *device, struct raid_map *raid_map) 1024 { 1025 char *err_msg; 1026 u32 raid_map_size; 1027 u32 r5or6_blocks_per_row; 1028 unsigned int num_phys_disks; 1029 unsigned int num_raid_map_entries; 1030 1031 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1032 1033 if (raid_map_size < offsetof(struct raid_map, disk_data)) { 1034 err_msg = "RAID map too small"; 1035 goto bad_raid_map; 1036 } 1037 1038 if (raid_map_size > sizeof(*raid_map)) { 1039 err_msg = "RAID map too large"; 1040 goto bad_raid_map; 1041 } 1042 1043 num_phys_disks = get_unaligned_le16(&raid_map->layout_map_count) * 1044 (get_unaligned_le16(&raid_map->data_disks_per_row) + 1045 get_unaligned_le16(&raid_map->metadata_disks_per_row)); 1046 num_raid_map_entries = num_phys_disks * 1047 get_unaligned_le16(&raid_map->row_cnt); 1048 1049 if (num_raid_map_entries > RAID_MAP_MAX_ENTRIES) { 1050 err_msg = "invalid number of map entries in RAID map"; 1051 goto bad_raid_map; 1052 } 1053 1054 if (device->raid_level == SA_RAID_1) { 1055 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) { 1056 err_msg = "invalid RAID-1 map"; 1057 goto bad_raid_map; 1058 } 1059 } else if (device->raid_level == SA_RAID_ADM) { 1060 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) { 1061 err_msg = "invalid RAID-1(ADM) map"; 1062 goto bad_raid_map; 1063 } 1064 } else if ((device->raid_level == SA_RAID_5 || 1065 device->raid_level == SA_RAID_6) && 1066 get_unaligned_le16(&raid_map->layout_map_count) > 1) { 1067 /* RAID 50/60 */ 1068 r5or6_blocks_per_row = 1069 get_unaligned_le16(&raid_map->strip_size) * 1070 get_unaligned_le16(&raid_map->data_disks_per_row); 1071 if (r5or6_blocks_per_row == 0) { 1072 err_msg = "invalid RAID-5 or RAID-6 map"; 1073 goto bad_raid_map; 1074 } 1075 } 1076 1077 return 0; 1078 1079 bad_raid_map: 1080 dev_warn(&ctrl_info->pci_dev->dev, 1081 "logical device %08x%08x %s\n", 1082 *((u32 *)&device->scsi3addr), 1083 *((u32 *)&device->scsi3addr[4]), err_msg); 1084 1085 return -EINVAL; 1086 } 1087 1088 static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info, 1089 struct pqi_scsi_dev *device) 1090 { 1091 int rc; 1092 int pci_direction; 1093 struct pqi_raid_path_request request; 1094 struct raid_map *raid_map; 1095 1096 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL); 1097 if (!raid_map) 1098 return -ENOMEM; 1099 1100 rc = pqi_build_raid_path_request(ctrl_info, &request, 1101 CISS_GET_RAID_MAP, device->scsi3addr, raid_map, 1102 sizeof(*raid_map), 0, &pci_direction); 1103 if (rc) 1104 goto error; 1105 1106 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, 1107 NULL, NO_TIMEOUT); 1108 1109 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 1110 pci_direction); 1111 1112 if (rc) 1113 goto error; 1114 1115 rc = pqi_validate_raid_map(ctrl_info, device, raid_map); 1116 if (rc) 1117 goto error; 1118 1119 device->raid_map = raid_map; 1120 1121 return 0; 1122 1123 error: 1124 kfree(raid_map); 1125 1126 return rc; 1127 } 1128 1129 static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info, 1130 struct pqi_scsi_dev *device) 1131 { 1132 int rc; 1133 u8 *buffer; 1134 u8 bypass_status; 1135 1136 buffer = kmalloc(64, GFP_KERNEL); 1137 if (!buffer) 1138 return; 1139 1140 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1141 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64); 1142 if (rc) 1143 goto out; 1144 1145 #define RAID_BYPASS_STATUS 4 1146 #define RAID_BYPASS_CONFIGURED 0x1 1147 #define RAID_BYPASS_ENABLED 0x2 1148 1149 bypass_status = buffer[RAID_BYPASS_STATUS]; 1150 device->raid_bypass_configured = 1151 (bypass_status & RAID_BYPASS_CONFIGURED) != 0; 1152 if (device->raid_bypass_configured && 1153 (bypass_status & RAID_BYPASS_ENABLED) && 1154 pqi_get_raid_map(ctrl_info, device) == 0) 1155 device->raid_bypass_enabled = true; 1156 1157 out: 1158 kfree(buffer); 1159 } 1160 1161 /* 1162 * Use vendor-specific VPD to determine online/offline status of a volume. 1163 */ 1164 1165 static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info, 1166 struct pqi_scsi_dev *device) 1167 { 1168 int rc; 1169 size_t page_length; 1170 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE; 1171 bool volume_offline = true; 1172 u32 volume_flags; 1173 struct ciss_vpd_logical_volume_status *vpd; 1174 1175 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL); 1176 if (!vpd) 1177 goto no_buffer; 1178 1179 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1180 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd)); 1181 if (rc) 1182 goto out; 1183 1184 page_length = offsetof(struct ciss_vpd_logical_volume_status, 1185 volume_status) + vpd->page_length; 1186 if (page_length < sizeof(*vpd)) 1187 goto out; 1188 1189 volume_status = vpd->volume_status; 1190 volume_flags = get_unaligned_be32(&vpd->flags); 1191 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0; 1192 1193 out: 1194 kfree(vpd); 1195 no_buffer: 1196 device->volume_status = volume_status; 1197 device->volume_offline = volume_offline; 1198 } 1199 1200 static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info, 1201 struct pqi_scsi_dev *device) 1202 { 1203 int rc; 1204 u8 *buffer; 1205 1206 buffer = kmalloc(64, GFP_KERNEL); 1207 if (!buffer) 1208 return -ENOMEM; 1209 1210 /* Send an inquiry to the device to see what it is. */ 1211 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, buffer, 64); 1212 if (rc) 1213 goto out; 1214 1215 scsi_sanitize_inquiry_string(&buffer[8], 8); 1216 scsi_sanitize_inquiry_string(&buffer[16], 16); 1217 1218 device->devtype = buffer[0] & 0x1f; 1219 memcpy(device->vendor, &buffer[8], sizeof(device->vendor)); 1220 memcpy(device->model, &buffer[16], sizeof(device->model)); 1221 1222 if (pqi_is_logical_device(device) && device->devtype == TYPE_DISK) { 1223 if (device->is_external_raid_device) { 1224 device->raid_level = SA_RAID_UNKNOWN; 1225 device->volume_status = CISS_LV_OK; 1226 device->volume_offline = false; 1227 } else { 1228 pqi_get_raid_level(ctrl_info, device); 1229 pqi_get_raid_bypass_status(ctrl_info, device); 1230 pqi_get_volume_status(ctrl_info, device); 1231 } 1232 } 1233 1234 out: 1235 kfree(buffer); 1236 1237 return rc; 1238 } 1239 1240 static void pqi_get_physical_disk_info(struct pqi_ctrl_info *ctrl_info, 1241 struct pqi_scsi_dev *device, 1242 struct bmic_identify_physical_device *id_phys) 1243 { 1244 int rc; 1245 1246 memset(id_phys, 0, sizeof(*id_phys)); 1247 1248 rc = pqi_identify_physical_device(ctrl_info, device, 1249 id_phys, sizeof(*id_phys)); 1250 if (rc) { 1251 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH; 1252 return; 1253 } 1254 1255 device->queue_depth = 1256 get_unaligned_le16(&id_phys->current_queue_depth_limit); 1257 device->device_type = id_phys->device_type; 1258 device->active_path_index = id_phys->active_path_number; 1259 device->path_map = id_phys->redundant_path_present_map; 1260 memcpy(&device->box, 1261 &id_phys->alternate_paths_phys_box_on_port, 1262 sizeof(device->box)); 1263 memcpy(&device->phys_connector, 1264 &id_phys->alternate_paths_phys_connector, 1265 sizeof(device->phys_connector)); 1266 device->bay = id_phys->phys_bay_in_box; 1267 } 1268 1269 static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info, 1270 struct pqi_scsi_dev *device) 1271 { 1272 char *status; 1273 static const char unknown_state_str[] = 1274 "Volume is in an unknown state (%u)"; 1275 char unknown_state_buffer[sizeof(unknown_state_str) + 10]; 1276 1277 switch (device->volume_status) { 1278 case CISS_LV_OK: 1279 status = "Volume online"; 1280 break; 1281 case CISS_LV_FAILED: 1282 status = "Volume failed"; 1283 break; 1284 case CISS_LV_NOT_CONFIGURED: 1285 status = "Volume not configured"; 1286 break; 1287 case CISS_LV_DEGRADED: 1288 status = "Volume degraded"; 1289 break; 1290 case CISS_LV_READY_FOR_RECOVERY: 1291 status = "Volume ready for recovery operation"; 1292 break; 1293 case CISS_LV_UNDERGOING_RECOVERY: 1294 status = "Volume undergoing recovery"; 1295 break; 1296 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED: 1297 status = "Wrong physical drive was replaced"; 1298 break; 1299 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM: 1300 status = "A physical drive not properly connected"; 1301 break; 1302 case CISS_LV_HARDWARE_OVERHEATING: 1303 status = "Hardware is overheating"; 1304 break; 1305 case CISS_LV_HARDWARE_HAS_OVERHEATED: 1306 status = "Hardware has overheated"; 1307 break; 1308 case CISS_LV_UNDERGOING_EXPANSION: 1309 status = "Volume undergoing expansion"; 1310 break; 1311 case CISS_LV_NOT_AVAILABLE: 1312 status = "Volume waiting for transforming volume"; 1313 break; 1314 case CISS_LV_QUEUED_FOR_EXPANSION: 1315 status = "Volume queued for expansion"; 1316 break; 1317 case CISS_LV_DISABLED_SCSI_ID_CONFLICT: 1318 status = "Volume disabled due to SCSI ID conflict"; 1319 break; 1320 case CISS_LV_EJECTED: 1321 status = "Volume has been ejected"; 1322 break; 1323 case CISS_LV_UNDERGOING_ERASE: 1324 status = "Volume undergoing background erase"; 1325 break; 1326 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD: 1327 status = "Volume ready for predictive spare rebuild"; 1328 break; 1329 case CISS_LV_UNDERGOING_RPI: 1330 status = "Volume undergoing rapid parity initialization"; 1331 break; 1332 case CISS_LV_PENDING_RPI: 1333 status = "Volume queued for rapid parity initialization"; 1334 break; 1335 case CISS_LV_ENCRYPTED_NO_KEY: 1336 status = "Encrypted volume inaccessible - key not present"; 1337 break; 1338 case CISS_LV_UNDERGOING_ENCRYPTION: 1339 status = "Volume undergoing encryption process"; 1340 break; 1341 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING: 1342 status = "Volume undergoing encryption re-keying process"; 1343 break; 1344 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1345 status = "Volume encrypted but encryption is disabled"; 1346 break; 1347 case CISS_LV_PENDING_ENCRYPTION: 1348 status = "Volume pending migration to encrypted state"; 1349 break; 1350 case CISS_LV_PENDING_ENCRYPTION_REKEYING: 1351 status = "Volume pending encryption rekeying"; 1352 break; 1353 case CISS_LV_NOT_SUPPORTED: 1354 status = "Volume not supported on this controller"; 1355 break; 1356 case CISS_LV_STATUS_UNAVAILABLE: 1357 status = "Volume status not available"; 1358 break; 1359 default: 1360 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer), 1361 unknown_state_str, device->volume_status); 1362 status = unknown_state_buffer; 1363 break; 1364 } 1365 1366 dev_info(&ctrl_info->pci_dev->dev, 1367 "scsi %d:%d:%d:%d %s\n", 1368 ctrl_info->scsi_host->host_no, 1369 device->bus, device->target, device->lun, status); 1370 } 1371 1372 static void pqi_rescan_worker(struct work_struct *work) 1373 { 1374 struct pqi_ctrl_info *ctrl_info; 1375 1376 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1377 rescan_work); 1378 1379 pqi_scan_scsi_devices(ctrl_info); 1380 } 1381 1382 static int pqi_add_device(struct pqi_ctrl_info *ctrl_info, 1383 struct pqi_scsi_dev *device) 1384 { 1385 int rc; 1386 1387 if (pqi_is_logical_device(device)) 1388 rc = scsi_add_device(ctrl_info->scsi_host, device->bus, 1389 device->target, device->lun); 1390 else 1391 rc = pqi_add_sas_device(ctrl_info->sas_host, device); 1392 1393 return rc; 1394 } 1395 1396 static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info, 1397 struct pqi_scsi_dev *device) 1398 { 1399 if (pqi_is_logical_device(device)) 1400 scsi_remove_device(device->sdev); 1401 else 1402 pqi_remove_sas_device(device); 1403 } 1404 1405 /* Assumes the SCSI device list lock is held. */ 1406 1407 static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info, 1408 int bus, int target, int lun) 1409 { 1410 struct pqi_scsi_dev *device; 1411 1412 list_for_each_entry(device, &ctrl_info->scsi_device_list, 1413 scsi_device_list_entry) 1414 if (device->bus == bus && device->target == target && 1415 device->lun == lun) 1416 return device; 1417 1418 return NULL; 1419 } 1420 1421 static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1, 1422 struct pqi_scsi_dev *dev2) 1423 { 1424 if (dev1->is_physical_device != dev2->is_physical_device) 1425 return false; 1426 1427 if (dev1->is_physical_device) 1428 return dev1->wwid == dev2->wwid; 1429 1430 return memcmp(dev1->volume_id, dev2->volume_id, 1431 sizeof(dev1->volume_id)) == 0; 1432 } 1433 1434 enum pqi_find_result { 1435 DEVICE_NOT_FOUND, 1436 DEVICE_CHANGED, 1437 DEVICE_SAME, 1438 }; 1439 1440 static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info, 1441 struct pqi_scsi_dev *device_to_find, 1442 struct pqi_scsi_dev **matching_device) 1443 { 1444 struct pqi_scsi_dev *device; 1445 1446 list_for_each_entry(device, &ctrl_info->scsi_device_list, 1447 scsi_device_list_entry) { 1448 if (pqi_scsi3addr_equal(device_to_find->scsi3addr, 1449 device->scsi3addr)) { 1450 *matching_device = device; 1451 if (pqi_device_equal(device_to_find, device)) { 1452 if (device_to_find->volume_offline) 1453 return DEVICE_CHANGED; 1454 return DEVICE_SAME; 1455 } 1456 return DEVICE_CHANGED; 1457 } 1458 } 1459 1460 return DEVICE_NOT_FOUND; 1461 } 1462 1463 #define PQI_DEV_INFO_BUFFER_LENGTH 128 1464 1465 static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info, 1466 char *action, struct pqi_scsi_dev *device) 1467 { 1468 ssize_t count; 1469 char buffer[PQI_DEV_INFO_BUFFER_LENGTH]; 1470 1471 count = snprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH, 1472 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus); 1473 1474 if (device->target_lun_valid) 1475 count += snprintf(buffer + count, 1476 PQI_DEV_INFO_BUFFER_LENGTH - count, 1477 "%d:%d", 1478 device->target, 1479 device->lun); 1480 else 1481 count += snprintf(buffer + count, 1482 PQI_DEV_INFO_BUFFER_LENGTH - count, 1483 "-:-"); 1484 1485 if (pqi_is_logical_device(device)) 1486 count += snprintf(buffer + count, 1487 PQI_DEV_INFO_BUFFER_LENGTH - count, 1488 " %08x%08x", 1489 *((u32 *)&device->scsi3addr), 1490 *((u32 *)&device->scsi3addr[4])); 1491 else 1492 count += snprintf(buffer + count, 1493 PQI_DEV_INFO_BUFFER_LENGTH - count, 1494 " %016llx", device->sas_address); 1495 1496 count += snprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count, 1497 " %s %.8s %.16s ", 1498 scsi_device_type(device->devtype), 1499 device->vendor, 1500 device->model); 1501 1502 if (pqi_is_logical_device(device)) { 1503 if (device->devtype == TYPE_DISK) 1504 count += snprintf(buffer + count, 1505 PQI_DEV_INFO_BUFFER_LENGTH - count, 1506 "SSDSmartPathCap%c En%c %-12s", 1507 device->raid_bypass_configured ? '+' : '-', 1508 device->raid_bypass_enabled ? '+' : '-', 1509 pqi_raid_level_to_string(device->raid_level)); 1510 } else { 1511 count += snprintf(buffer + count, 1512 PQI_DEV_INFO_BUFFER_LENGTH - count, 1513 "AIO%c", device->aio_enabled ? '+' : '-'); 1514 if (device->devtype == TYPE_DISK || 1515 device->devtype == TYPE_ZBC) 1516 count += snprintf(buffer + count, 1517 PQI_DEV_INFO_BUFFER_LENGTH - count, 1518 " qd=%-6d", device->queue_depth); 1519 } 1520 1521 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer); 1522 } 1523 1524 /* Assumes the SCSI device list lock is held. */ 1525 1526 static void pqi_scsi_update_device(struct pqi_scsi_dev *existing_device, 1527 struct pqi_scsi_dev *new_device) 1528 { 1529 existing_device->devtype = new_device->devtype; 1530 existing_device->device_type = new_device->device_type; 1531 existing_device->bus = new_device->bus; 1532 if (new_device->target_lun_valid) { 1533 existing_device->target = new_device->target; 1534 existing_device->lun = new_device->lun; 1535 existing_device->target_lun_valid = true; 1536 } 1537 1538 /* By definition, the scsi3addr and wwid fields are already the same. */ 1539 1540 existing_device->is_physical_device = new_device->is_physical_device; 1541 existing_device->is_external_raid_device = 1542 new_device->is_external_raid_device; 1543 existing_device->aio_enabled = new_device->aio_enabled; 1544 memcpy(existing_device->vendor, new_device->vendor, 1545 sizeof(existing_device->vendor)); 1546 memcpy(existing_device->model, new_device->model, 1547 sizeof(existing_device->model)); 1548 existing_device->sas_address = new_device->sas_address; 1549 existing_device->raid_level = new_device->raid_level; 1550 existing_device->queue_depth = new_device->queue_depth; 1551 existing_device->aio_handle = new_device->aio_handle; 1552 existing_device->volume_status = new_device->volume_status; 1553 existing_device->active_path_index = new_device->active_path_index; 1554 existing_device->path_map = new_device->path_map; 1555 existing_device->bay = new_device->bay; 1556 memcpy(existing_device->box, new_device->box, 1557 sizeof(existing_device->box)); 1558 memcpy(existing_device->phys_connector, new_device->phys_connector, 1559 sizeof(existing_device->phys_connector)); 1560 existing_device->offload_to_mirror = 0; 1561 kfree(existing_device->raid_map); 1562 existing_device->raid_map = new_device->raid_map; 1563 existing_device->raid_bypass_configured = 1564 new_device->raid_bypass_configured; 1565 existing_device->raid_bypass_enabled = 1566 new_device->raid_bypass_enabled; 1567 1568 /* To prevent this from being freed later. */ 1569 new_device->raid_map = NULL; 1570 } 1571 1572 static inline void pqi_free_device(struct pqi_scsi_dev *device) 1573 { 1574 if (device) { 1575 kfree(device->raid_map); 1576 kfree(device); 1577 } 1578 } 1579 1580 /* 1581 * Called when exposing a new device to the OS fails in order to re-adjust 1582 * our internal SCSI device list to match the SCSI ML's view. 1583 */ 1584 1585 static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info, 1586 struct pqi_scsi_dev *device) 1587 { 1588 unsigned long flags; 1589 1590 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 1591 list_del(&device->scsi_device_list_entry); 1592 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 1593 1594 /* Allow the device structure to be freed later. */ 1595 device->keep_device = false; 1596 } 1597 1598 static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info, 1599 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices) 1600 { 1601 int rc; 1602 unsigned int i; 1603 unsigned long flags; 1604 enum pqi_find_result find_result; 1605 struct pqi_scsi_dev *device; 1606 struct pqi_scsi_dev *next; 1607 struct pqi_scsi_dev *matching_device; 1608 LIST_HEAD(add_list); 1609 LIST_HEAD(delete_list); 1610 1611 /* 1612 * The idea here is to do as little work as possible while holding the 1613 * spinlock. That's why we go to great pains to defer anything other 1614 * than updating the internal device list until after we release the 1615 * spinlock. 1616 */ 1617 1618 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 1619 1620 /* Assume that all devices in the existing list have gone away. */ 1621 list_for_each_entry(device, &ctrl_info->scsi_device_list, 1622 scsi_device_list_entry) 1623 device->device_gone = true; 1624 1625 for (i = 0; i < num_new_devices; i++) { 1626 device = new_device_list[i]; 1627 1628 find_result = pqi_scsi_find_entry(ctrl_info, device, 1629 &matching_device); 1630 1631 switch (find_result) { 1632 case DEVICE_SAME: 1633 /* 1634 * The newly found device is already in the existing 1635 * device list. 1636 */ 1637 device->new_device = false; 1638 matching_device->device_gone = false; 1639 pqi_scsi_update_device(matching_device, device); 1640 break; 1641 case DEVICE_NOT_FOUND: 1642 /* 1643 * The newly found device is NOT in the existing device 1644 * list. 1645 */ 1646 device->new_device = true; 1647 break; 1648 case DEVICE_CHANGED: 1649 /* 1650 * The original device has gone away and we need to add 1651 * the new device. 1652 */ 1653 device->new_device = true; 1654 break; 1655 } 1656 } 1657 1658 /* Process all devices that have gone away. */ 1659 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list, 1660 scsi_device_list_entry) { 1661 if (device->device_gone) { 1662 list_del(&device->scsi_device_list_entry); 1663 list_add_tail(&device->delete_list_entry, &delete_list); 1664 } 1665 } 1666 1667 /* Process all new devices. */ 1668 for (i = 0; i < num_new_devices; i++) { 1669 device = new_device_list[i]; 1670 if (!device->new_device) 1671 continue; 1672 if (device->volume_offline) 1673 continue; 1674 list_add_tail(&device->scsi_device_list_entry, 1675 &ctrl_info->scsi_device_list); 1676 list_add_tail(&device->add_list_entry, &add_list); 1677 /* To prevent this device structure from being freed later. */ 1678 device->keep_device = true; 1679 } 1680 1681 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 1682 1683 /* Remove all devices that have gone away. */ 1684 list_for_each_entry_safe(device, next, &delete_list, 1685 delete_list_entry) { 1686 if (device->volume_offline) { 1687 pqi_dev_info(ctrl_info, "offline", device); 1688 pqi_show_volume_status(ctrl_info, device); 1689 } else { 1690 pqi_dev_info(ctrl_info, "removed", device); 1691 } 1692 if (device->sdev) 1693 pqi_remove_device(ctrl_info, device); 1694 list_del(&device->delete_list_entry); 1695 pqi_free_device(device); 1696 } 1697 1698 /* 1699 * Notify the SCSI ML if the queue depth of any existing device has 1700 * changed. 1701 */ 1702 list_for_each_entry(device, &ctrl_info->scsi_device_list, 1703 scsi_device_list_entry) { 1704 if (device->sdev && device->queue_depth != 1705 device->advertised_queue_depth) { 1706 device->advertised_queue_depth = device->queue_depth; 1707 scsi_change_queue_depth(device->sdev, 1708 device->advertised_queue_depth); 1709 } 1710 } 1711 1712 /* Expose any new devices. */ 1713 list_for_each_entry_safe(device, next, &add_list, add_list_entry) { 1714 if (!device->sdev) { 1715 pqi_dev_info(ctrl_info, "added", device); 1716 rc = pqi_add_device(ctrl_info, device); 1717 if (rc) { 1718 dev_warn(&ctrl_info->pci_dev->dev, 1719 "scsi %d:%d:%d:%d addition failed, device not added\n", 1720 ctrl_info->scsi_host->host_no, 1721 device->bus, device->target, 1722 device->lun); 1723 pqi_fixup_botched_add(ctrl_info, device); 1724 } 1725 } 1726 } 1727 } 1728 1729 static bool pqi_is_supported_device(struct pqi_scsi_dev *device) 1730 { 1731 bool is_supported = false; 1732 1733 switch (device->devtype) { 1734 case TYPE_DISK: 1735 case TYPE_ZBC: 1736 case TYPE_TAPE: 1737 case TYPE_MEDIUM_CHANGER: 1738 case TYPE_ENCLOSURE: 1739 is_supported = true; 1740 break; 1741 case TYPE_RAID: 1742 /* 1743 * Only support the HBA controller itself as a RAID 1744 * controller. If it's a RAID controller other than 1745 * the HBA itself (an external RAID controller, for 1746 * example), we don't support it. 1747 */ 1748 if (pqi_is_hba_lunid(device->scsi3addr)) 1749 is_supported = true; 1750 break; 1751 } 1752 1753 return is_supported; 1754 } 1755 1756 static inline bool pqi_skip_device(u8 *scsi3addr) 1757 { 1758 /* Ignore all masked devices. */ 1759 if (MASKED_DEVICE(scsi3addr)) 1760 return true; 1761 1762 return false; 1763 } 1764 1765 static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info) 1766 { 1767 int i; 1768 int rc; 1769 LIST_HEAD(new_device_list_head); 1770 struct report_phys_lun_extended *physdev_list = NULL; 1771 struct report_log_lun_extended *logdev_list = NULL; 1772 struct report_phys_lun_extended_entry *phys_lun_ext_entry; 1773 struct report_log_lun_extended_entry *log_lun_ext_entry; 1774 struct bmic_identify_physical_device *id_phys = NULL; 1775 u32 num_physicals; 1776 u32 num_logicals; 1777 struct pqi_scsi_dev **new_device_list = NULL; 1778 struct pqi_scsi_dev *device; 1779 struct pqi_scsi_dev *next; 1780 unsigned int num_new_devices; 1781 unsigned int num_valid_devices; 1782 bool is_physical_device; 1783 u8 *scsi3addr; 1784 static char *out_of_memory_msg = 1785 "failed to allocate memory, device discovery stopped"; 1786 1787 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list); 1788 if (rc) 1789 goto out; 1790 1791 if (physdev_list) 1792 num_physicals = 1793 get_unaligned_be32(&physdev_list->header.list_length) 1794 / sizeof(physdev_list->lun_entries[0]); 1795 else 1796 num_physicals = 0; 1797 1798 if (logdev_list) 1799 num_logicals = 1800 get_unaligned_be32(&logdev_list->header.list_length) 1801 / sizeof(logdev_list->lun_entries[0]); 1802 else 1803 num_logicals = 0; 1804 1805 if (num_physicals) { 1806 /* 1807 * We need this buffer for calls to pqi_get_physical_disk_info() 1808 * below. We allocate it here instead of inside 1809 * pqi_get_physical_disk_info() because it's a fairly large 1810 * buffer. 1811 */ 1812 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL); 1813 if (!id_phys) { 1814 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 1815 out_of_memory_msg); 1816 rc = -ENOMEM; 1817 goto out; 1818 } 1819 } 1820 1821 num_new_devices = num_physicals + num_logicals; 1822 1823 new_device_list = kmalloc(sizeof(*new_device_list) * 1824 num_new_devices, GFP_KERNEL); 1825 if (!new_device_list) { 1826 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg); 1827 rc = -ENOMEM; 1828 goto out; 1829 } 1830 1831 for (i = 0; i < num_new_devices; i++) { 1832 device = kzalloc(sizeof(*device), GFP_KERNEL); 1833 if (!device) { 1834 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 1835 out_of_memory_msg); 1836 rc = -ENOMEM; 1837 goto out; 1838 } 1839 list_add_tail(&device->new_device_list_entry, 1840 &new_device_list_head); 1841 } 1842 1843 device = NULL; 1844 num_valid_devices = 0; 1845 1846 for (i = 0; i < num_new_devices; i++) { 1847 1848 if (i < num_physicals) { 1849 is_physical_device = true; 1850 phys_lun_ext_entry = &physdev_list->lun_entries[i]; 1851 log_lun_ext_entry = NULL; 1852 scsi3addr = phys_lun_ext_entry->lunid; 1853 } else { 1854 is_physical_device = false; 1855 phys_lun_ext_entry = NULL; 1856 log_lun_ext_entry = 1857 &logdev_list->lun_entries[i - num_physicals]; 1858 scsi3addr = log_lun_ext_entry->lunid; 1859 } 1860 1861 if (is_physical_device && pqi_skip_device(scsi3addr)) 1862 continue; 1863 1864 if (device) 1865 device = list_next_entry(device, new_device_list_entry); 1866 else 1867 device = list_first_entry(&new_device_list_head, 1868 struct pqi_scsi_dev, new_device_list_entry); 1869 1870 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1871 device->is_physical_device = is_physical_device; 1872 if (!is_physical_device) 1873 device->is_external_raid_device = 1874 pqi_is_external_raid_addr(scsi3addr); 1875 1876 /* Gather information about the device. */ 1877 rc = pqi_get_device_info(ctrl_info, device); 1878 if (rc == -ENOMEM) { 1879 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 1880 out_of_memory_msg); 1881 goto out; 1882 } 1883 if (rc) { 1884 if (device->is_physical_device) 1885 dev_warn(&ctrl_info->pci_dev->dev, 1886 "obtaining device info failed, skipping physical device %016llx\n", 1887 get_unaligned_be64( 1888 &phys_lun_ext_entry->wwid)); 1889 else 1890 dev_warn(&ctrl_info->pci_dev->dev, 1891 "obtaining device info failed, skipping logical device %08x%08x\n", 1892 *((u32 *)&device->scsi3addr), 1893 *((u32 *)&device->scsi3addr[4])); 1894 rc = 0; 1895 continue; 1896 } 1897 1898 if (!pqi_is_supported_device(device)) 1899 continue; 1900 1901 pqi_assign_bus_target_lun(device); 1902 1903 if (device->is_physical_device) { 1904 device->wwid = phys_lun_ext_entry->wwid; 1905 if ((phys_lun_ext_entry->device_flags & 1906 REPORT_PHYS_LUN_DEV_FLAG_AIO_ENABLED) && 1907 phys_lun_ext_entry->aio_handle) 1908 device->aio_enabled = true; 1909 } else { 1910 memcpy(device->volume_id, log_lun_ext_entry->volume_id, 1911 sizeof(device->volume_id)); 1912 } 1913 1914 switch (device->devtype) { 1915 case TYPE_DISK: 1916 case TYPE_ZBC: 1917 case TYPE_ENCLOSURE: 1918 if (device->is_physical_device) { 1919 device->sas_address = 1920 get_unaligned_be64(&device->wwid); 1921 if (device->devtype == TYPE_DISK || 1922 device->devtype == TYPE_ZBC) { 1923 device->aio_handle = 1924 phys_lun_ext_entry->aio_handle; 1925 pqi_get_physical_disk_info(ctrl_info, 1926 device, id_phys); 1927 } 1928 } 1929 break; 1930 } 1931 1932 new_device_list[num_valid_devices++] = device; 1933 } 1934 1935 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices); 1936 1937 out: 1938 list_for_each_entry_safe(device, next, &new_device_list_head, 1939 new_device_list_entry) { 1940 if (device->keep_device) 1941 continue; 1942 list_del(&device->new_device_list_entry); 1943 pqi_free_device(device); 1944 } 1945 1946 kfree(new_device_list); 1947 kfree(physdev_list); 1948 kfree(logdev_list); 1949 kfree(id_phys); 1950 1951 return rc; 1952 } 1953 1954 static void pqi_remove_all_scsi_devices(struct pqi_ctrl_info *ctrl_info) 1955 { 1956 unsigned long flags; 1957 struct pqi_scsi_dev *device; 1958 1959 while (1) { 1960 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 1961 1962 device = list_first_entry_or_null(&ctrl_info->scsi_device_list, 1963 struct pqi_scsi_dev, scsi_device_list_entry); 1964 if (device) 1965 list_del(&device->scsi_device_list_entry); 1966 1967 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, 1968 flags); 1969 1970 if (!device) 1971 break; 1972 1973 if (device->sdev) 1974 pqi_remove_device(ctrl_info, device); 1975 pqi_free_device(device); 1976 } 1977 } 1978 1979 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info) 1980 { 1981 int rc; 1982 1983 if (pqi_ctrl_offline(ctrl_info)) 1984 return -ENXIO; 1985 1986 mutex_lock(&ctrl_info->scan_mutex); 1987 1988 rc = pqi_update_scsi_devices(ctrl_info); 1989 if (rc) 1990 pqi_schedule_rescan_worker_delayed(ctrl_info); 1991 1992 mutex_unlock(&ctrl_info->scan_mutex); 1993 1994 return rc; 1995 } 1996 1997 static void pqi_scan_start(struct Scsi_Host *shost) 1998 { 1999 pqi_scan_scsi_devices(shost_to_hba(shost)); 2000 } 2001 2002 /* Returns TRUE if scan is finished. */ 2003 2004 static int pqi_scan_finished(struct Scsi_Host *shost, 2005 unsigned long elapsed_time) 2006 { 2007 struct pqi_ctrl_info *ctrl_info; 2008 2009 ctrl_info = shost_priv(shost); 2010 2011 return !mutex_is_locked(&ctrl_info->scan_mutex); 2012 } 2013 2014 static void pqi_wait_until_scan_finished(struct pqi_ctrl_info *ctrl_info) 2015 { 2016 mutex_lock(&ctrl_info->scan_mutex); 2017 mutex_unlock(&ctrl_info->scan_mutex); 2018 } 2019 2020 static void pqi_wait_until_lun_reset_finished(struct pqi_ctrl_info *ctrl_info) 2021 { 2022 mutex_lock(&ctrl_info->lun_reset_mutex); 2023 mutex_unlock(&ctrl_info->lun_reset_mutex); 2024 } 2025 2026 static inline void pqi_set_encryption_info( 2027 struct pqi_encryption_info *encryption_info, struct raid_map *raid_map, 2028 u64 first_block) 2029 { 2030 u32 volume_blk_size; 2031 2032 /* 2033 * Set the encryption tweak values based on logical block address. 2034 * If the block size is 512, the tweak value is equal to the LBA. 2035 * For other block sizes, tweak value is (LBA * block size) / 512. 2036 */ 2037 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size); 2038 if (volume_blk_size != 512) 2039 first_block = (first_block * volume_blk_size) / 512; 2040 2041 encryption_info->data_encryption_key_index = 2042 get_unaligned_le16(&raid_map->data_encryption_key_index); 2043 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block); 2044 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block); 2045 } 2046 2047 /* 2048 * Attempt to perform RAID bypass mapping for a logical volume I/O. 2049 */ 2050 2051 #define PQI_RAID_BYPASS_INELIGIBLE 1 2052 2053 static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 2054 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 2055 struct pqi_queue_group *queue_group) 2056 { 2057 struct raid_map *raid_map; 2058 bool is_write = false; 2059 u32 map_index; 2060 u64 first_block; 2061 u64 last_block; 2062 u32 block_cnt; 2063 u32 blocks_per_row; 2064 u64 first_row; 2065 u64 last_row; 2066 u32 first_row_offset; 2067 u32 last_row_offset; 2068 u32 first_column; 2069 u32 last_column; 2070 u64 r0_first_row; 2071 u64 r0_last_row; 2072 u32 r5or6_blocks_per_row; 2073 u64 r5or6_first_row; 2074 u64 r5or6_last_row; 2075 u32 r5or6_first_row_offset; 2076 u32 r5or6_last_row_offset; 2077 u32 r5or6_first_column; 2078 u32 r5or6_last_column; 2079 u16 data_disks_per_row; 2080 u32 total_disks_per_row; 2081 u16 layout_map_count; 2082 u32 stripesize; 2083 u16 strip_size; 2084 u32 first_group; 2085 u32 last_group; 2086 u32 current_group; 2087 u32 map_row; 2088 u32 aio_handle; 2089 u64 disk_block; 2090 u32 disk_block_cnt; 2091 u8 cdb[16]; 2092 u8 cdb_length; 2093 int offload_to_mirror; 2094 struct pqi_encryption_info *encryption_info_ptr; 2095 struct pqi_encryption_info encryption_info; 2096 #if BITS_PER_LONG == 32 2097 u64 tmpdiv; 2098 #endif 2099 2100 /* Check for valid opcode, get LBA and block count. */ 2101 switch (scmd->cmnd[0]) { 2102 case WRITE_6: 2103 is_write = true; 2104 /* fall through */ 2105 case READ_6: 2106 first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) | 2107 (scmd->cmnd[2] << 8) | scmd->cmnd[3]); 2108 block_cnt = (u32)scmd->cmnd[4]; 2109 if (block_cnt == 0) 2110 block_cnt = 256; 2111 break; 2112 case WRITE_10: 2113 is_write = true; 2114 /* fall through */ 2115 case READ_10: 2116 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2117 block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]); 2118 break; 2119 case WRITE_12: 2120 is_write = true; 2121 /* fall through */ 2122 case READ_12: 2123 first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2124 block_cnt = get_unaligned_be32(&scmd->cmnd[6]); 2125 break; 2126 case WRITE_16: 2127 is_write = true; 2128 /* fall through */ 2129 case READ_16: 2130 first_block = get_unaligned_be64(&scmd->cmnd[2]); 2131 block_cnt = get_unaligned_be32(&scmd->cmnd[10]); 2132 break; 2133 default: 2134 /* Process via normal I/O path. */ 2135 return PQI_RAID_BYPASS_INELIGIBLE; 2136 } 2137 2138 /* Check for write to non-RAID-0. */ 2139 if (is_write && device->raid_level != SA_RAID_0) 2140 return PQI_RAID_BYPASS_INELIGIBLE; 2141 2142 if (unlikely(block_cnt == 0)) 2143 return PQI_RAID_BYPASS_INELIGIBLE; 2144 2145 last_block = first_block + block_cnt - 1; 2146 raid_map = device->raid_map; 2147 2148 /* Check for invalid block or wraparound. */ 2149 if (last_block >= get_unaligned_le64(&raid_map->volume_blk_cnt) || 2150 last_block < first_block) 2151 return PQI_RAID_BYPASS_INELIGIBLE; 2152 2153 data_disks_per_row = get_unaligned_le16(&raid_map->data_disks_per_row); 2154 strip_size = get_unaligned_le16(&raid_map->strip_size); 2155 layout_map_count = get_unaligned_le16(&raid_map->layout_map_count); 2156 2157 /* Calculate stripe information for the request. */ 2158 blocks_per_row = data_disks_per_row * strip_size; 2159 #if BITS_PER_LONG == 32 2160 tmpdiv = first_block; 2161 do_div(tmpdiv, blocks_per_row); 2162 first_row = tmpdiv; 2163 tmpdiv = last_block; 2164 do_div(tmpdiv, blocks_per_row); 2165 last_row = tmpdiv; 2166 first_row_offset = (u32)(first_block - (first_row * blocks_per_row)); 2167 last_row_offset = (u32)(last_block - (last_row * blocks_per_row)); 2168 tmpdiv = first_row_offset; 2169 do_div(tmpdiv, strip_size); 2170 first_column = tmpdiv; 2171 tmpdiv = last_row_offset; 2172 do_div(tmpdiv, strip_size); 2173 last_column = tmpdiv; 2174 #else 2175 first_row = first_block / blocks_per_row; 2176 last_row = last_block / blocks_per_row; 2177 first_row_offset = (u32)(first_block - (first_row * blocks_per_row)); 2178 last_row_offset = (u32)(last_block - (last_row * blocks_per_row)); 2179 first_column = first_row_offset / strip_size; 2180 last_column = last_row_offset / strip_size; 2181 #endif 2182 2183 /* If this isn't a single row/column then give to the controller. */ 2184 if (first_row != last_row || first_column != last_column) 2185 return PQI_RAID_BYPASS_INELIGIBLE; 2186 2187 /* Proceeding with driver mapping. */ 2188 total_disks_per_row = data_disks_per_row + 2189 get_unaligned_le16(&raid_map->metadata_disks_per_row); 2190 map_row = ((u32)(first_row >> raid_map->parity_rotation_shift)) % 2191 get_unaligned_le16(&raid_map->row_cnt); 2192 map_index = (map_row * total_disks_per_row) + first_column; 2193 2194 /* RAID 1 */ 2195 if (device->raid_level == SA_RAID_1) { 2196 if (device->offload_to_mirror) 2197 map_index += data_disks_per_row; 2198 device->offload_to_mirror = !device->offload_to_mirror; 2199 } else if (device->raid_level == SA_RAID_ADM) { 2200 /* RAID ADM */ 2201 /* 2202 * Handles N-way mirrors (R1-ADM) and R10 with # of drives 2203 * divisible by 3. 2204 */ 2205 offload_to_mirror = device->offload_to_mirror; 2206 if (offload_to_mirror == 0) { 2207 /* use physical disk in the first mirrored group. */ 2208 map_index %= data_disks_per_row; 2209 } else { 2210 do { 2211 /* 2212 * Determine mirror group that map_index 2213 * indicates. 2214 */ 2215 current_group = map_index / data_disks_per_row; 2216 2217 if (offload_to_mirror != current_group) { 2218 if (current_group < 2219 layout_map_count - 1) { 2220 /* 2221 * Select raid index from 2222 * next group. 2223 */ 2224 map_index += data_disks_per_row; 2225 current_group++; 2226 } else { 2227 /* 2228 * Select raid index from first 2229 * group. 2230 */ 2231 map_index %= data_disks_per_row; 2232 current_group = 0; 2233 } 2234 } 2235 } while (offload_to_mirror != current_group); 2236 } 2237 2238 /* Set mirror group to use next time. */ 2239 offload_to_mirror = 2240 (offload_to_mirror >= layout_map_count - 1) ? 2241 0 : offload_to_mirror + 1; 2242 WARN_ON(offload_to_mirror >= layout_map_count); 2243 device->offload_to_mirror = offload_to_mirror; 2244 /* 2245 * Avoid direct use of device->offload_to_mirror within this 2246 * function since multiple threads might simultaneously 2247 * increment it beyond the range of device->layout_map_count -1. 2248 */ 2249 } else if ((device->raid_level == SA_RAID_5 || 2250 device->raid_level == SA_RAID_6) && layout_map_count > 1) { 2251 /* RAID 50/60 */ 2252 /* Verify first and last block are in same RAID group */ 2253 r5or6_blocks_per_row = strip_size * data_disks_per_row; 2254 stripesize = r5or6_blocks_per_row * layout_map_count; 2255 #if BITS_PER_LONG == 32 2256 tmpdiv = first_block; 2257 first_group = do_div(tmpdiv, stripesize); 2258 tmpdiv = first_group; 2259 do_div(tmpdiv, r5or6_blocks_per_row); 2260 first_group = tmpdiv; 2261 tmpdiv = last_block; 2262 last_group = do_div(tmpdiv, stripesize); 2263 tmpdiv = last_group; 2264 do_div(tmpdiv, r5or6_blocks_per_row); 2265 last_group = tmpdiv; 2266 #else 2267 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 2268 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 2269 #endif 2270 if (first_group != last_group) 2271 return PQI_RAID_BYPASS_INELIGIBLE; 2272 2273 /* Verify request is in a single row of RAID 5/6 */ 2274 #if BITS_PER_LONG == 32 2275 tmpdiv = first_block; 2276 do_div(tmpdiv, stripesize); 2277 first_row = r5or6_first_row = r0_first_row = tmpdiv; 2278 tmpdiv = last_block; 2279 do_div(tmpdiv, stripesize); 2280 r5or6_last_row = r0_last_row = tmpdiv; 2281 #else 2282 first_row = r5or6_first_row = r0_first_row = 2283 first_block / stripesize; 2284 r5or6_last_row = r0_last_row = last_block / stripesize; 2285 #endif 2286 if (r5or6_first_row != r5or6_last_row) 2287 return PQI_RAID_BYPASS_INELIGIBLE; 2288 2289 /* Verify request is in a single column */ 2290 #if BITS_PER_LONG == 32 2291 tmpdiv = first_block; 2292 first_row_offset = do_div(tmpdiv, stripesize); 2293 tmpdiv = first_row_offset; 2294 first_row_offset = (u32)do_div(tmpdiv, r5or6_blocks_per_row); 2295 r5or6_first_row_offset = first_row_offset; 2296 tmpdiv = last_block; 2297 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 2298 tmpdiv = r5or6_last_row_offset; 2299 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 2300 tmpdiv = r5or6_first_row_offset; 2301 do_div(tmpdiv, strip_size); 2302 first_column = r5or6_first_column = tmpdiv; 2303 tmpdiv = r5or6_last_row_offset; 2304 do_div(tmpdiv, strip_size); 2305 r5or6_last_column = tmpdiv; 2306 #else 2307 first_row_offset = r5or6_first_row_offset = 2308 (u32)((first_block % stripesize) % 2309 r5or6_blocks_per_row); 2310 2311 r5or6_last_row_offset = 2312 (u32)((last_block % stripesize) % 2313 r5or6_blocks_per_row); 2314 2315 first_column = r5or6_first_row_offset / strip_size; 2316 r5or6_first_column = first_column; 2317 r5or6_last_column = r5or6_last_row_offset / strip_size; 2318 #endif 2319 if (r5or6_first_column != r5or6_last_column) 2320 return PQI_RAID_BYPASS_INELIGIBLE; 2321 2322 /* Request is eligible */ 2323 map_row = 2324 ((u32)(first_row >> raid_map->parity_rotation_shift)) % 2325 get_unaligned_le16(&raid_map->row_cnt); 2326 2327 map_index = (first_group * 2328 (get_unaligned_le16(&raid_map->row_cnt) * 2329 total_disks_per_row)) + 2330 (map_row * total_disks_per_row) + first_column; 2331 } 2332 2333 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 2334 return PQI_RAID_BYPASS_INELIGIBLE; 2335 2336 aio_handle = raid_map->disk_data[map_index].aio_handle; 2337 disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) + 2338 first_row * strip_size + 2339 (first_row_offset - first_column * strip_size); 2340 disk_block_cnt = block_cnt; 2341 2342 /* Handle differing logical/physical block sizes. */ 2343 if (raid_map->phys_blk_shift) { 2344 disk_block <<= raid_map->phys_blk_shift; 2345 disk_block_cnt <<= raid_map->phys_blk_shift; 2346 } 2347 2348 if (unlikely(disk_block_cnt > 0xffff)) 2349 return PQI_RAID_BYPASS_INELIGIBLE; 2350 2351 /* Build the new CDB for the physical disk I/O. */ 2352 if (disk_block > 0xffffffff) { 2353 cdb[0] = is_write ? WRITE_16 : READ_16; 2354 cdb[1] = 0; 2355 put_unaligned_be64(disk_block, &cdb[2]); 2356 put_unaligned_be32(disk_block_cnt, &cdb[10]); 2357 cdb[14] = 0; 2358 cdb[15] = 0; 2359 cdb_length = 16; 2360 } else { 2361 cdb[0] = is_write ? WRITE_10 : READ_10; 2362 cdb[1] = 0; 2363 put_unaligned_be32((u32)disk_block, &cdb[2]); 2364 cdb[6] = 0; 2365 put_unaligned_be16((u16)disk_block_cnt, &cdb[7]); 2366 cdb[9] = 0; 2367 cdb_length = 10; 2368 } 2369 2370 if (get_unaligned_le16(&raid_map->flags) & 2371 RAID_MAP_ENCRYPTION_ENABLED) { 2372 pqi_set_encryption_info(&encryption_info, raid_map, 2373 first_block); 2374 encryption_info_ptr = &encryption_info; 2375 } else { 2376 encryption_info_ptr = NULL; 2377 } 2378 2379 return pqi_aio_submit_io(ctrl_info, scmd, aio_handle, 2380 cdb, cdb_length, queue_group, encryption_info_ptr, true); 2381 } 2382 2383 #define PQI_STATUS_IDLE 0x0 2384 2385 #define PQI_CREATE_ADMIN_QUEUE_PAIR 1 2386 #define PQI_DELETE_ADMIN_QUEUE_PAIR 2 2387 2388 #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0 2389 #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1 2390 #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2 2391 #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3 2392 #define PQI_DEVICE_STATE_ERROR 0x4 2393 2394 #define PQI_MODE_READY_TIMEOUT_SECS 30 2395 #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1 2396 2397 static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info) 2398 { 2399 struct pqi_device_registers __iomem *pqi_registers; 2400 unsigned long timeout; 2401 u64 signature; 2402 u8 status; 2403 2404 pqi_registers = ctrl_info->pqi_registers; 2405 timeout = (PQI_MODE_READY_TIMEOUT_SECS * HZ) + jiffies; 2406 2407 while (1) { 2408 signature = readq(&pqi_registers->signature); 2409 if (memcmp(&signature, PQI_DEVICE_SIGNATURE, 2410 sizeof(signature)) == 0) 2411 break; 2412 if (time_after(jiffies, timeout)) { 2413 dev_err(&ctrl_info->pci_dev->dev, 2414 "timed out waiting for PQI signature\n"); 2415 return -ETIMEDOUT; 2416 } 2417 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 2418 } 2419 2420 while (1) { 2421 status = readb(&pqi_registers->function_and_status_code); 2422 if (status == PQI_STATUS_IDLE) 2423 break; 2424 if (time_after(jiffies, timeout)) { 2425 dev_err(&ctrl_info->pci_dev->dev, 2426 "timed out waiting for PQI IDLE\n"); 2427 return -ETIMEDOUT; 2428 } 2429 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 2430 } 2431 2432 while (1) { 2433 if (readl(&pqi_registers->device_status) == 2434 PQI_DEVICE_STATE_ALL_REGISTERS_READY) 2435 break; 2436 if (time_after(jiffies, timeout)) { 2437 dev_err(&ctrl_info->pci_dev->dev, 2438 "timed out waiting for PQI all registers ready\n"); 2439 return -ETIMEDOUT; 2440 } 2441 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 2442 } 2443 2444 return 0; 2445 } 2446 2447 static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request) 2448 { 2449 struct pqi_scsi_dev *device; 2450 2451 device = io_request->scmd->device->hostdata; 2452 device->raid_bypass_enabled = false; 2453 device->aio_enabled = false; 2454 } 2455 2456 static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path) 2457 { 2458 struct pqi_ctrl_info *ctrl_info; 2459 struct pqi_scsi_dev *device; 2460 2461 device = sdev->hostdata; 2462 if (device->device_offline) 2463 return; 2464 2465 device->device_offline = true; 2466 scsi_device_set_state(sdev, SDEV_OFFLINE); 2467 ctrl_info = shost_to_hba(sdev->host); 2468 pqi_schedule_rescan_worker(ctrl_info); 2469 dev_err(&ctrl_info->pci_dev->dev, "offlined %s scsi %d:%d:%d:%d\n", 2470 path, ctrl_info->scsi_host->host_no, device->bus, 2471 device->target, device->lun); 2472 } 2473 2474 static void pqi_process_raid_io_error(struct pqi_io_request *io_request) 2475 { 2476 u8 scsi_status; 2477 u8 host_byte; 2478 struct scsi_cmnd *scmd; 2479 struct pqi_raid_error_info *error_info; 2480 size_t sense_data_length; 2481 int residual_count; 2482 int xfer_count; 2483 struct scsi_sense_hdr sshdr; 2484 2485 scmd = io_request->scmd; 2486 if (!scmd) 2487 return; 2488 2489 error_info = io_request->error_info; 2490 scsi_status = error_info->status; 2491 host_byte = DID_OK; 2492 2493 switch (error_info->data_out_result) { 2494 case PQI_DATA_IN_OUT_GOOD: 2495 break; 2496 case PQI_DATA_IN_OUT_UNDERFLOW: 2497 xfer_count = 2498 get_unaligned_le32(&error_info->data_out_transferred); 2499 residual_count = scsi_bufflen(scmd) - xfer_count; 2500 scsi_set_resid(scmd, residual_count); 2501 if (xfer_count < scmd->underflow) 2502 host_byte = DID_SOFT_ERROR; 2503 break; 2504 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 2505 case PQI_DATA_IN_OUT_ABORTED: 2506 host_byte = DID_ABORT; 2507 break; 2508 case PQI_DATA_IN_OUT_TIMEOUT: 2509 host_byte = DID_TIME_OUT; 2510 break; 2511 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 2512 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 2513 case PQI_DATA_IN_OUT_BUFFER_ERROR: 2514 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 2515 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 2516 case PQI_DATA_IN_OUT_ERROR: 2517 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 2518 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 2519 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 2520 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 2521 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 2522 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 2523 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 2524 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 2525 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 2526 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 2527 default: 2528 host_byte = DID_ERROR; 2529 break; 2530 } 2531 2532 sense_data_length = get_unaligned_le16(&error_info->sense_data_length); 2533 if (sense_data_length == 0) 2534 sense_data_length = 2535 get_unaligned_le16(&error_info->response_data_length); 2536 if (sense_data_length) { 2537 if (sense_data_length > sizeof(error_info->data)) 2538 sense_data_length = sizeof(error_info->data); 2539 2540 if (scsi_status == SAM_STAT_CHECK_CONDITION && 2541 scsi_normalize_sense(error_info->data, 2542 sense_data_length, &sshdr) && 2543 sshdr.sense_key == HARDWARE_ERROR && 2544 sshdr.asc == 0x3e && 2545 sshdr.ascq == 0x1) { 2546 pqi_take_device_offline(scmd->device, "RAID"); 2547 host_byte = DID_NO_CONNECT; 2548 } 2549 2550 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 2551 sense_data_length = SCSI_SENSE_BUFFERSIZE; 2552 memcpy(scmd->sense_buffer, error_info->data, 2553 sense_data_length); 2554 } 2555 2556 scmd->result = scsi_status; 2557 set_host_byte(scmd, host_byte); 2558 } 2559 2560 static void pqi_process_aio_io_error(struct pqi_io_request *io_request) 2561 { 2562 u8 scsi_status; 2563 u8 host_byte; 2564 struct scsi_cmnd *scmd; 2565 struct pqi_aio_error_info *error_info; 2566 size_t sense_data_length; 2567 int residual_count; 2568 int xfer_count; 2569 bool device_offline; 2570 2571 scmd = io_request->scmd; 2572 error_info = io_request->error_info; 2573 host_byte = DID_OK; 2574 sense_data_length = 0; 2575 device_offline = false; 2576 2577 switch (error_info->service_response) { 2578 case PQI_AIO_SERV_RESPONSE_COMPLETE: 2579 scsi_status = error_info->status; 2580 break; 2581 case PQI_AIO_SERV_RESPONSE_FAILURE: 2582 switch (error_info->status) { 2583 case PQI_AIO_STATUS_IO_ABORTED: 2584 scsi_status = SAM_STAT_TASK_ABORTED; 2585 break; 2586 case PQI_AIO_STATUS_UNDERRUN: 2587 scsi_status = SAM_STAT_GOOD; 2588 residual_count = get_unaligned_le32( 2589 &error_info->residual_count); 2590 scsi_set_resid(scmd, residual_count); 2591 xfer_count = scsi_bufflen(scmd) - residual_count; 2592 if (xfer_count < scmd->underflow) 2593 host_byte = DID_SOFT_ERROR; 2594 break; 2595 case PQI_AIO_STATUS_OVERRUN: 2596 scsi_status = SAM_STAT_GOOD; 2597 break; 2598 case PQI_AIO_STATUS_AIO_PATH_DISABLED: 2599 pqi_aio_path_disabled(io_request); 2600 scsi_status = SAM_STAT_GOOD; 2601 io_request->status = -EAGAIN; 2602 break; 2603 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE: 2604 case PQI_AIO_STATUS_INVALID_DEVICE: 2605 if (!io_request->raid_bypass) { 2606 device_offline = true; 2607 pqi_take_device_offline(scmd->device, "AIO"); 2608 host_byte = DID_NO_CONNECT; 2609 } 2610 scsi_status = SAM_STAT_CHECK_CONDITION; 2611 break; 2612 case PQI_AIO_STATUS_IO_ERROR: 2613 default: 2614 scsi_status = SAM_STAT_CHECK_CONDITION; 2615 break; 2616 } 2617 break; 2618 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE: 2619 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED: 2620 scsi_status = SAM_STAT_GOOD; 2621 break; 2622 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED: 2623 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN: 2624 default: 2625 scsi_status = SAM_STAT_CHECK_CONDITION; 2626 break; 2627 } 2628 2629 if (error_info->data_present) { 2630 sense_data_length = 2631 get_unaligned_le16(&error_info->data_length); 2632 if (sense_data_length) { 2633 if (sense_data_length > sizeof(error_info->data)) 2634 sense_data_length = sizeof(error_info->data); 2635 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 2636 sense_data_length = SCSI_SENSE_BUFFERSIZE; 2637 memcpy(scmd->sense_buffer, error_info->data, 2638 sense_data_length); 2639 } 2640 } 2641 2642 if (device_offline && sense_data_length == 0) 2643 scsi_build_sense_buffer(0, scmd->sense_buffer, HARDWARE_ERROR, 2644 0x3e, 0x1); 2645 2646 scmd->result = scsi_status; 2647 set_host_byte(scmd, host_byte); 2648 } 2649 2650 static void pqi_process_io_error(unsigned int iu_type, 2651 struct pqi_io_request *io_request) 2652 { 2653 switch (iu_type) { 2654 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 2655 pqi_process_raid_io_error(io_request); 2656 break; 2657 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 2658 pqi_process_aio_io_error(io_request); 2659 break; 2660 } 2661 } 2662 2663 static int pqi_interpret_task_management_response( 2664 struct pqi_task_management_response *response) 2665 { 2666 int rc; 2667 2668 switch (response->response_code) { 2669 case SOP_TMF_COMPLETE: 2670 case SOP_TMF_FUNCTION_SUCCEEDED: 2671 rc = 0; 2672 break; 2673 default: 2674 rc = -EIO; 2675 break; 2676 } 2677 2678 return rc; 2679 } 2680 2681 static unsigned int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, 2682 struct pqi_queue_group *queue_group) 2683 { 2684 unsigned int num_responses; 2685 pqi_index_t oq_pi; 2686 pqi_index_t oq_ci; 2687 struct pqi_io_request *io_request; 2688 struct pqi_io_response *response; 2689 u16 request_id; 2690 2691 num_responses = 0; 2692 oq_ci = queue_group->oq_ci_copy; 2693 2694 while (1) { 2695 oq_pi = *queue_group->oq_pi; 2696 if (oq_pi == oq_ci) 2697 break; 2698 2699 num_responses++; 2700 response = queue_group->oq_element_array + 2701 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 2702 2703 request_id = get_unaligned_le16(&response->request_id); 2704 WARN_ON(request_id >= ctrl_info->max_io_slots); 2705 2706 io_request = &ctrl_info->io_request_pool[request_id]; 2707 WARN_ON(atomic_read(&io_request->refcount) == 0); 2708 2709 switch (response->header.iu_type) { 2710 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS: 2711 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS: 2712 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT: 2713 break; 2714 case PQI_RESPONSE_IU_TASK_MANAGEMENT: 2715 io_request->status = 2716 pqi_interpret_task_management_response( 2717 (void *)response); 2718 break; 2719 case PQI_RESPONSE_IU_AIO_PATH_DISABLED: 2720 pqi_aio_path_disabled(io_request); 2721 io_request->status = -EAGAIN; 2722 break; 2723 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 2724 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 2725 io_request->error_info = ctrl_info->error_buffer + 2726 (get_unaligned_le16(&response->error_index) * 2727 PQI_ERROR_BUFFER_ELEMENT_LENGTH); 2728 pqi_process_io_error(response->header.iu_type, 2729 io_request); 2730 break; 2731 default: 2732 dev_err(&ctrl_info->pci_dev->dev, 2733 "unexpected IU type: 0x%x\n", 2734 response->header.iu_type); 2735 break; 2736 } 2737 2738 io_request->io_complete_callback(io_request, 2739 io_request->context); 2740 2741 /* 2742 * Note that the I/O request structure CANNOT BE TOUCHED after 2743 * returning from the I/O completion callback! 2744 */ 2745 2746 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq; 2747 } 2748 2749 if (num_responses) { 2750 queue_group->oq_ci_copy = oq_ci; 2751 writel(oq_ci, queue_group->oq_ci); 2752 } 2753 2754 return num_responses; 2755 } 2756 2757 static inline unsigned int pqi_num_elements_free(unsigned int pi, 2758 unsigned int ci, unsigned int elements_in_queue) 2759 { 2760 unsigned int num_elements_used; 2761 2762 if (pi >= ci) 2763 num_elements_used = pi - ci; 2764 else 2765 num_elements_used = elements_in_queue - ci + pi; 2766 2767 return elements_in_queue - num_elements_used - 1; 2768 } 2769 2770 static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info, 2771 struct pqi_event_acknowledge_request *iu, size_t iu_length) 2772 { 2773 pqi_index_t iq_pi; 2774 pqi_index_t iq_ci; 2775 unsigned long flags; 2776 void *next_element; 2777 struct pqi_queue_group *queue_group; 2778 2779 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP]; 2780 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id); 2781 2782 while (1) { 2783 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags); 2784 2785 iq_pi = queue_group->iq_pi_copy[RAID_PATH]; 2786 iq_ci = *queue_group->iq_ci[RAID_PATH]; 2787 2788 if (pqi_num_elements_free(iq_pi, iq_ci, 2789 ctrl_info->num_elements_per_iq)) 2790 break; 2791 2792 spin_unlock_irqrestore( 2793 &queue_group->submit_lock[RAID_PATH], flags); 2794 2795 if (pqi_ctrl_offline(ctrl_info)) 2796 return; 2797 } 2798 2799 next_element = queue_group->iq_element_array[RAID_PATH] + 2800 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 2801 2802 memcpy(next_element, iu, iu_length); 2803 2804 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq; 2805 queue_group->iq_pi_copy[RAID_PATH] = iq_pi; 2806 2807 /* 2808 * This write notifies the controller that an IU is available to be 2809 * processed. 2810 */ 2811 writel(iq_pi, queue_group->iq_pi[RAID_PATH]); 2812 2813 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags); 2814 } 2815 2816 static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info, 2817 struct pqi_event *event) 2818 { 2819 struct pqi_event_acknowledge_request request; 2820 2821 memset(&request, 0, sizeof(request)); 2822 2823 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT; 2824 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 2825 &request.header.iu_length); 2826 request.event_type = event->event_type; 2827 request.event_id = event->event_id; 2828 request.additional_event_id = event->additional_event_id; 2829 2830 pqi_send_event_ack(ctrl_info, &request, sizeof(request)); 2831 } 2832 2833 static void pqi_event_worker(struct work_struct *work) 2834 { 2835 unsigned int i; 2836 struct pqi_ctrl_info *ctrl_info; 2837 struct pqi_event *event; 2838 2839 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work); 2840 2841 pqi_ctrl_busy(ctrl_info); 2842 pqi_wait_if_ctrl_blocked(ctrl_info, NO_TIMEOUT); 2843 if (pqi_ctrl_offline(ctrl_info)) 2844 goto out; 2845 2846 pqi_schedule_rescan_worker_delayed(ctrl_info); 2847 2848 event = ctrl_info->events; 2849 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) { 2850 if (event->pending) { 2851 event->pending = false; 2852 pqi_acknowledge_event(ctrl_info, event); 2853 } 2854 event++; 2855 } 2856 2857 out: 2858 pqi_ctrl_unbusy(ctrl_info); 2859 } 2860 2861 #define PQI_HEARTBEAT_TIMER_INTERVAL (10 * HZ) 2862 2863 static void pqi_heartbeat_timer_handler(struct timer_list *t) 2864 { 2865 int num_interrupts; 2866 u32 heartbeat_count; 2867 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t, 2868 heartbeat_timer); 2869 2870 pqi_check_ctrl_health(ctrl_info); 2871 if (pqi_ctrl_offline(ctrl_info)) 2872 return; 2873 2874 num_interrupts = atomic_read(&ctrl_info->num_interrupts); 2875 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info); 2876 2877 if (num_interrupts == ctrl_info->previous_num_interrupts) { 2878 if (heartbeat_count == ctrl_info->previous_heartbeat_count) { 2879 dev_err(&ctrl_info->pci_dev->dev, 2880 "no heartbeat detected - last heartbeat count: %u\n", 2881 heartbeat_count); 2882 pqi_take_ctrl_offline(ctrl_info); 2883 return; 2884 } 2885 } else { 2886 ctrl_info->previous_num_interrupts = num_interrupts; 2887 } 2888 2889 ctrl_info->previous_heartbeat_count = heartbeat_count; 2890 mod_timer(&ctrl_info->heartbeat_timer, 2891 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL); 2892 } 2893 2894 static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 2895 { 2896 if (!ctrl_info->heartbeat_counter) 2897 return; 2898 2899 ctrl_info->previous_num_interrupts = 2900 atomic_read(&ctrl_info->num_interrupts); 2901 ctrl_info->previous_heartbeat_count = 2902 pqi_read_heartbeat_counter(ctrl_info); 2903 2904 ctrl_info->heartbeat_timer.expires = 2905 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL; 2906 add_timer(&ctrl_info->heartbeat_timer); 2907 } 2908 2909 static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 2910 { 2911 del_timer_sync(&ctrl_info->heartbeat_timer); 2912 } 2913 2914 static inline int pqi_event_type_to_event_index(unsigned int event_type) 2915 { 2916 int index; 2917 2918 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++) 2919 if (event_type == pqi_supported_event_types[index]) 2920 return index; 2921 2922 return -1; 2923 } 2924 2925 static inline bool pqi_is_supported_event(unsigned int event_type) 2926 { 2927 return pqi_event_type_to_event_index(event_type) != -1; 2928 } 2929 2930 static unsigned int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info) 2931 { 2932 unsigned int num_events; 2933 pqi_index_t oq_pi; 2934 pqi_index_t oq_ci; 2935 struct pqi_event_queue *event_queue; 2936 struct pqi_event_response *response; 2937 struct pqi_event *event; 2938 int event_index; 2939 2940 event_queue = &ctrl_info->event_queue; 2941 num_events = 0; 2942 oq_ci = event_queue->oq_ci_copy; 2943 2944 while (1) { 2945 oq_pi = *event_queue->oq_pi; 2946 if (oq_pi == oq_ci) 2947 break; 2948 2949 num_events++; 2950 response = event_queue->oq_element_array + 2951 (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH); 2952 2953 event_index = 2954 pqi_event_type_to_event_index(response->event_type); 2955 2956 if (event_index >= 0) { 2957 if (response->request_acknowlege) { 2958 event = &ctrl_info->events[event_index]; 2959 event->pending = true; 2960 event->event_type = response->event_type; 2961 event->event_id = response->event_id; 2962 event->additional_event_id = 2963 response->additional_event_id; 2964 } 2965 } 2966 2967 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS; 2968 } 2969 2970 if (num_events) { 2971 event_queue->oq_ci_copy = oq_ci; 2972 writel(oq_ci, event_queue->oq_ci); 2973 schedule_work(&ctrl_info->event_work); 2974 } 2975 2976 return num_events; 2977 } 2978 2979 #define PQI_LEGACY_INTX_MASK 0x1 2980 2981 static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info, 2982 bool enable_intx) 2983 { 2984 u32 intx_mask; 2985 struct pqi_device_registers __iomem *pqi_registers; 2986 volatile void __iomem *register_addr; 2987 2988 pqi_registers = ctrl_info->pqi_registers; 2989 2990 if (enable_intx) 2991 register_addr = &pqi_registers->legacy_intx_mask_clear; 2992 else 2993 register_addr = &pqi_registers->legacy_intx_mask_set; 2994 2995 intx_mask = readl(register_addr); 2996 intx_mask |= PQI_LEGACY_INTX_MASK; 2997 writel(intx_mask, register_addr); 2998 } 2999 3000 static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info, 3001 enum pqi_irq_mode new_mode) 3002 { 3003 switch (ctrl_info->irq_mode) { 3004 case IRQ_MODE_MSIX: 3005 switch (new_mode) { 3006 case IRQ_MODE_MSIX: 3007 break; 3008 case IRQ_MODE_INTX: 3009 pqi_configure_legacy_intx(ctrl_info, true); 3010 sis_enable_intx(ctrl_info); 3011 break; 3012 case IRQ_MODE_NONE: 3013 break; 3014 } 3015 break; 3016 case IRQ_MODE_INTX: 3017 switch (new_mode) { 3018 case IRQ_MODE_MSIX: 3019 pqi_configure_legacy_intx(ctrl_info, false); 3020 sis_enable_msix(ctrl_info); 3021 break; 3022 case IRQ_MODE_INTX: 3023 break; 3024 case IRQ_MODE_NONE: 3025 pqi_configure_legacy_intx(ctrl_info, false); 3026 break; 3027 } 3028 break; 3029 case IRQ_MODE_NONE: 3030 switch (new_mode) { 3031 case IRQ_MODE_MSIX: 3032 sis_enable_msix(ctrl_info); 3033 break; 3034 case IRQ_MODE_INTX: 3035 pqi_configure_legacy_intx(ctrl_info, true); 3036 sis_enable_intx(ctrl_info); 3037 break; 3038 case IRQ_MODE_NONE: 3039 break; 3040 } 3041 break; 3042 } 3043 3044 ctrl_info->irq_mode = new_mode; 3045 } 3046 3047 #define PQI_LEGACY_INTX_PENDING 0x1 3048 3049 static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info) 3050 { 3051 bool valid_irq; 3052 u32 intx_status; 3053 3054 switch (ctrl_info->irq_mode) { 3055 case IRQ_MODE_MSIX: 3056 valid_irq = true; 3057 break; 3058 case IRQ_MODE_INTX: 3059 intx_status = 3060 readl(&ctrl_info->pqi_registers->legacy_intx_status); 3061 if (intx_status & PQI_LEGACY_INTX_PENDING) 3062 valid_irq = true; 3063 else 3064 valid_irq = false; 3065 break; 3066 case IRQ_MODE_NONE: 3067 default: 3068 valid_irq = false; 3069 break; 3070 } 3071 3072 return valid_irq; 3073 } 3074 3075 static irqreturn_t pqi_irq_handler(int irq, void *data) 3076 { 3077 struct pqi_ctrl_info *ctrl_info; 3078 struct pqi_queue_group *queue_group; 3079 unsigned int num_responses_handled; 3080 3081 queue_group = data; 3082 ctrl_info = queue_group->ctrl_info; 3083 3084 if (!pqi_is_valid_irq(ctrl_info)) 3085 return IRQ_NONE; 3086 3087 num_responses_handled = pqi_process_io_intr(ctrl_info, queue_group); 3088 3089 if (irq == ctrl_info->event_irq) 3090 num_responses_handled += pqi_process_event_intr(ctrl_info); 3091 3092 if (num_responses_handled) 3093 atomic_inc(&ctrl_info->num_interrupts); 3094 3095 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL); 3096 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL); 3097 3098 return IRQ_HANDLED; 3099 } 3100 3101 static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info) 3102 { 3103 struct pci_dev *pci_dev = ctrl_info->pci_dev; 3104 int i; 3105 int rc; 3106 3107 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0); 3108 3109 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) { 3110 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0, 3111 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]); 3112 if (rc) { 3113 dev_err(&pci_dev->dev, 3114 "irq %u init failed with error %d\n", 3115 pci_irq_vector(pci_dev, i), rc); 3116 return rc; 3117 } 3118 ctrl_info->num_msix_vectors_initialized++; 3119 } 3120 3121 return 0; 3122 } 3123 3124 static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info) 3125 { 3126 int i; 3127 3128 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++) 3129 free_irq(pci_irq_vector(ctrl_info->pci_dev, i), 3130 &ctrl_info->queue_groups[i]); 3131 3132 ctrl_info->num_msix_vectors_initialized = 0; 3133 } 3134 3135 static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 3136 { 3137 int num_vectors_enabled; 3138 3139 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev, 3140 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups, 3141 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 3142 if (num_vectors_enabled < 0) { 3143 dev_err(&ctrl_info->pci_dev->dev, 3144 "MSI-X init failed with error %d\n", 3145 num_vectors_enabled); 3146 return num_vectors_enabled; 3147 } 3148 3149 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled; 3150 ctrl_info->irq_mode = IRQ_MODE_MSIX; 3151 return 0; 3152 } 3153 3154 static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 3155 { 3156 if (ctrl_info->num_msix_vectors_enabled) { 3157 pci_free_irq_vectors(ctrl_info->pci_dev); 3158 ctrl_info->num_msix_vectors_enabled = 0; 3159 } 3160 } 3161 3162 static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info) 3163 { 3164 unsigned int i; 3165 size_t alloc_length; 3166 size_t element_array_length_per_iq; 3167 size_t element_array_length_per_oq; 3168 void *element_array; 3169 void *next_queue_index; 3170 void *aligned_pointer; 3171 unsigned int num_inbound_queues; 3172 unsigned int num_outbound_queues; 3173 unsigned int num_queue_indexes; 3174 struct pqi_queue_group *queue_group; 3175 3176 element_array_length_per_iq = 3177 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH * 3178 ctrl_info->num_elements_per_iq; 3179 element_array_length_per_oq = 3180 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH * 3181 ctrl_info->num_elements_per_oq; 3182 num_inbound_queues = ctrl_info->num_queue_groups * 2; 3183 num_outbound_queues = ctrl_info->num_queue_groups; 3184 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1; 3185 3186 aligned_pointer = NULL; 3187 3188 for (i = 0; i < num_inbound_queues; i++) { 3189 aligned_pointer = PTR_ALIGN(aligned_pointer, 3190 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3191 aligned_pointer += element_array_length_per_iq; 3192 } 3193 3194 for (i = 0; i < num_outbound_queues; i++) { 3195 aligned_pointer = PTR_ALIGN(aligned_pointer, 3196 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3197 aligned_pointer += element_array_length_per_oq; 3198 } 3199 3200 aligned_pointer = PTR_ALIGN(aligned_pointer, 3201 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3202 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS * 3203 PQI_EVENT_OQ_ELEMENT_LENGTH; 3204 3205 for (i = 0; i < num_queue_indexes; i++) { 3206 aligned_pointer = PTR_ALIGN(aligned_pointer, 3207 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3208 aligned_pointer += sizeof(pqi_index_t); 3209 } 3210 3211 alloc_length = (size_t)aligned_pointer + 3212 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 3213 3214 alloc_length += PQI_EXTRA_SGL_MEMORY; 3215 3216 ctrl_info->queue_memory_base = 3217 dma_zalloc_coherent(&ctrl_info->pci_dev->dev, 3218 alloc_length, 3219 &ctrl_info->queue_memory_base_dma_handle, GFP_KERNEL); 3220 3221 if (!ctrl_info->queue_memory_base) 3222 return -ENOMEM; 3223 3224 ctrl_info->queue_memory_length = alloc_length; 3225 3226 element_array = PTR_ALIGN(ctrl_info->queue_memory_base, 3227 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3228 3229 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3230 queue_group = &ctrl_info->queue_groups[i]; 3231 queue_group->iq_element_array[RAID_PATH] = element_array; 3232 queue_group->iq_element_array_bus_addr[RAID_PATH] = 3233 ctrl_info->queue_memory_base_dma_handle + 3234 (element_array - ctrl_info->queue_memory_base); 3235 element_array += element_array_length_per_iq; 3236 element_array = PTR_ALIGN(element_array, 3237 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3238 queue_group->iq_element_array[AIO_PATH] = element_array; 3239 queue_group->iq_element_array_bus_addr[AIO_PATH] = 3240 ctrl_info->queue_memory_base_dma_handle + 3241 (element_array - ctrl_info->queue_memory_base); 3242 element_array += element_array_length_per_iq; 3243 element_array = PTR_ALIGN(element_array, 3244 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3245 } 3246 3247 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3248 queue_group = &ctrl_info->queue_groups[i]; 3249 queue_group->oq_element_array = element_array; 3250 queue_group->oq_element_array_bus_addr = 3251 ctrl_info->queue_memory_base_dma_handle + 3252 (element_array - ctrl_info->queue_memory_base); 3253 element_array += element_array_length_per_oq; 3254 element_array = PTR_ALIGN(element_array, 3255 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3256 } 3257 3258 ctrl_info->event_queue.oq_element_array = element_array; 3259 ctrl_info->event_queue.oq_element_array_bus_addr = 3260 ctrl_info->queue_memory_base_dma_handle + 3261 (element_array - ctrl_info->queue_memory_base); 3262 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS * 3263 PQI_EVENT_OQ_ELEMENT_LENGTH; 3264 3265 next_queue_index = PTR_ALIGN(element_array, 3266 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3267 3268 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3269 queue_group = &ctrl_info->queue_groups[i]; 3270 queue_group->iq_ci[RAID_PATH] = next_queue_index; 3271 queue_group->iq_ci_bus_addr[RAID_PATH] = 3272 ctrl_info->queue_memory_base_dma_handle + 3273 (next_queue_index - ctrl_info->queue_memory_base); 3274 next_queue_index += sizeof(pqi_index_t); 3275 next_queue_index = PTR_ALIGN(next_queue_index, 3276 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3277 queue_group->iq_ci[AIO_PATH] = next_queue_index; 3278 queue_group->iq_ci_bus_addr[AIO_PATH] = 3279 ctrl_info->queue_memory_base_dma_handle + 3280 (next_queue_index - ctrl_info->queue_memory_base); 3281 next_queue_index += sizeof(pqi_index_t); 3282 next_queue_index = PTR_ALIGN(next_queue_index, 3283 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3284 queue_group->oq_pi = next_queue_index; 3285 queue_group->oq_pi_bus_addr = 3286 ctrl_info->queue_memory_base_dma_handle + 3287 (next_queue_index - ctrl_info->queue_memory_base); 3288 next_queue_index += sizeof(pqi_index_t); 3289 next_queue_index = PTR_ALIGN(next_queue_index, 3290 PQI_OPERATIONAL_INDEX_ALIGNMENT); 3291 } 3292 3293 ctrl_info->event_queue.oq_pi = next_queue_index; 3294 ctrl_info->event_queue.oq_pi_bus_addr = 3295 ctrl_info->queue_memory_base_dma_handle + 3296 (next_queue_index - ctrl_info->queue_memory_base); 3297 3298 return 0; 3299 } 3300 3301 static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info) 3302 { 3303 unsigned int i; 3304 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 3305 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 3306 3307 /* 3308 * Initialize the backpointers to the controller structure in 3309 * each operational queue group structure. 3310 */ 3311 for (i = 0; i < ctrl_info->num_queue_groups; i++) 3312 ctrl_info->queue_groups[i].ctrl_info = ctrl_info; 3313 3314 /* 3315 * Assign IDs to all operational queues. Note that the IDs 3316 * assigned to operational IQs are independent of the IDs 3317 * assigned to operational OQs. 3318 */ 3319 ctrl_info->event_queue.oq_id = next_oq_id++; 3320 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3321 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++; 3322 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++; 3323 ctrl_info->queue_groups[i].oq_id = next_oq_id++; 3324 } 3325 3326 /* 3327 * Assign MSI-X table entry indexes to all queues. Note that the 3328 * interrupt for the event queue is shared with the first queue group. 3329 */ 3330 ctrl_info->event_queue.int_msg_num = 0; 3331 for (i = 0; i < ctrl_info->num_queue_groups; i++) 3332 ctrl_info->queue_groups[i].int_msg_num = i; 3333 3334 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 3335 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]); 3336 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]); 3337 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]); 3338 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]); 3339 } 3340 } 3341 3342 static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info) 3343 { 3344 size_t alloc_length; 3345 struct pqi_admin_queues_aligned *admin_queues_aligned; 3346 struct pqi_admin_queues *admin_queues; 3347 3348 alloc_length = sizeof(struct pqi_admin_queues_aligned) + 3349 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 3350 3351 ctrl_info->admin_queue_memory_base = 3352 dma_zalloc_coherent(&ctrl_info->pci_dev->dev, 3353 alloc_length, 3354 &ctrl_info->admin_queue_memory_base_dma_handle, 3355 GFP_KERNEL); 3356 3357 if (!ctrl_info->admin_queue_memory_base) 3358 return -ENOMEM; 3359 3360 ctrl_info->admin_queue_memory_length = alloc_length; 3361 3362 admin_queues = &ctrl_info->admin_queues; 3363 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base, 3364 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 3365 admin_queues->iq_element_array = 3366 &admin_queues_aligned->iq_element_array; 3367 admin_queues->oq_element_array = 3368 &admin_queues_aligned->oq_element_array; 3369 admin_queues->iq_ci = &admin_queues_aligned->iq_ci; 3370 admin_queues->oq_pi = &admin_queues_aligned->oq_pi; 3371 3372 admin_queues->iq_element_array_bus_addr = 3373 ctrl_info->admin_queue_memory_base_dma_handle + 3374 (admin_queues->iq_element_array - 3375 ctrl_info->admin_queue_memory_base); 3376 admin_queues->oq_element_array_bus_addr = 3377 ctrl_info->admin_queue_memory_base_dma_handle + 3378 (admin_queues->oq_element_array - 3379 ctrl_info->admin_queue_memory_base); 3380 admin_queues->iq_ci_bus_addr = 3381 ctrl_info->admin_queue_memory_base_dma_handle + 3382 ((void *)admin_queues->iq_ci - 3383 ctrl_info->admin_queue_memory_base); 3384 admin_queues->oq_pi_bus_addr = 3385 ctrl_info->admin_queue_memory_base_dma_handle + 3386 ((void *)admin_queues->oq_pi - 3387 ctrl_info->admin_queue_memory_base); 3388 3389 return 0; 3390 } 3391 3392 #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES HZ 3393 #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1 3394 3395 static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info) 3396 { 3397 struct pqi_device_registers __iomem *pqi_registers; 3398 struct pqi_admin_queues *admin_queues; 3399 unsigned long timeout; 3400 u8 status; 3401 u32 reg; 3402 3403 pqi_registers = ctrl_info->pqi_registers; 3404 admin_queues = &ctrl_info->admin_queues; 3405 3406 writeq((u64)admin_queues->iq_element_array_bus_addr, 3407 &pqi_registers->admin_iq_element_array_addr); 3408 writeq((u64)admin_queues->oq_element_array_bus_addr, 3409 &pqi_registers->admin_oq_element_array_addr); 3410 writeq((u64)admin_queues->iq_ci_bus_addr, 3411 &pqi_registers->admin_iq_ci_addr); 3412 writeq((u64)admin_queues->oq_pi_bus_addr, 3413 &pqi_registers->admin_oq_pi_addr); 3414 3415 reg = PQI_ADMIN_IQ_NUM_ELEMENTS | 3416 (PQI_ADMIN_OQ_NUM_ELEMENTS) << 8 | 3417 (admin_queues->int_msg_num << 16); 3418 writel(reg, &pqi_registers->admin_iq_num_elements); 3419 writel(PQI_CREATE_ADMIN_QUEUE_PAIR, 3420 &pqi_registers->function_and_status_code); 3421 3422 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies; 3423 while (1) { 3424 status = readb(&pqi_registers->function_and_status_code); 3425 if (status == PQI_STATUS_IDLE) 3426 break; 3427 if (time_after(jiffies, timeout)) 3428 return -ETIMEDOUT; 3429 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS); 3430 } 3431 3432 /* 3433 * The offset registers are not initialized to the correct 3434 * offsets until *after* the create admin queue pair command 3435 * completes successfully. 3436 */ 3437 admin_queues->iq_pi = ctrl_info->iomem_base + 3438 PQI_DEVICE_REGISTERS_OFFSET + 3439 readq(&pqi_registers->admin_iq_pi_offset); 3440 admin_queues->oq_ci = ctrl_info->iomem_base + 3441 PQI_DEVICE_REGISTERS_OFFSET + 3442 readq(&pqi_registers->admin_oq_ci_offset); 3443 3444 return 0; 3445 } 3446 3447 static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info, 3448 struct pqi_general_admin_request *request) 3449 { 3450 struct pqi_admin_queues *admin_queues; 3451 void *next_element; 3452 pqi_index_t iq_pi; 3453 3454 admin_queues = &ctrl_info->admin_queues; 3455 iq_pi = admin_queues->iq_pi_copy; 3456 3457 next_element = admin_queues->iq_element_array + 3458 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH); 3459 3460 memcpy(next_element, request, sizeof(*request)); 3461 3462 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS; 3463 admin_queues->iq_pi_copy = iq_pi; 3464 3465 /* 3466 * This write notifies the controller that an IU is available to be 3467 * processed. 3468 */ 3469 writel(iq_pi, admin_queues->iq_pi); 3470 } 3471 3472 #define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60 3473 3474 static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info, 3475 struct pqi_general_admin_response *response) 3476 { 3477 struct pqi_admin_queues *admin_queues; 3478 pqi_index_t oq_pi; 3479 pqi_index_t oq_ci; 3480 unsigned long timeout; 3481 3482 admin_queues = &ctrl_info->admin_queues; 3483 oq_ci = admin_queues->oq_ci_copy; 3484 3485 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * HZ) + jiffies; 3486 3487 while (1) { 3488 oq_pi = *admin_queues->oq_pi; 3489 if (oq_pi != oq_ci) 3490 break; 3491 if (time_after(jiffies, timeout)) { 3492 dev_err(&ctrl_info->pci_dev->dev, 3493 "timed out waiting for admin response\n"); 3494 return -ETIMEDOUT; 3495 } 3496 if (!sis_is_firmware_running(ctrl_info)) 3497 return -ENXIO; 3498 usleep_range(1000, 2000); 3499 } 3500 3501 memcpy(response, admin_queues->oq_element_array + 3502 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response)); 3503 3504 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS; 3505 admin_queues->oq_ci_copy = oq_ci; 3506 writel(oq_ci, admin_queues->oq_ci); 3507 3508 return 0; 3509 } 3510 3511 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 3512 struct pqi_queue_group *queue_group, enum pqi_io_path path, 3513 struct pqi_io_request *io_request) 3514 { 3515 struct pqi_io_request *next; 3516 void *next_element; 3517 pqi_index_t iq_pi; 3518 pqi_index_t iq_ci; 3519 size_t iu_length; 3520 unsigned long flags; 3521 unsigned int num_elements_needed; 3522 unsigned int num_elements_to_end_of_queue; 3523 size_t copy_count; 3524 struct pqi_iu_header *request; 3525 3526 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 3527 3528 if (io_request) { 3529 io_request->queue_group = queue_group; 3530 list_add_tail(&io_request->request_list_entry, 3531 &queue_group->request_list[path]); 3532 } 3533 3534 iq_pi = queue_group->iq_pi_copy[path]; 3535 3536 list_for_each_entry_safe(io_request, next, 3537 &queue_group->request_list[path], request_list_entry) { 3538 3539 request = io_request->iu; 3540 3541 iu_length = get_unaligned_le16(&request->iu_length) + 3542 PQI_REQUEST_HEADER_LENGTH; 3543 num_elements_needed = 3544 DIV_ROUND_UP(iu_length, 3545 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3546 3547 iq_ci = *queue_group->iq_ci[path]; 3548 3549 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci, 3550 ctrl_info->num_elements_per_iq)) 3551 break; 3552 3553 put_unaligned_le16(queue_group->oq_id, 3554 &request->response_queue_id); 3555 3556 next_element = queue_group->iq_element_array[path] + 3557 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3558 3559 num_elements_to_end_of_queue = 3560 ctrl_info->num_elements_per_iq - iq_pi; 3561 3562 if (num_elements_needed <= num_elements_to_end_of_queue) { 3563 memcpy(next_element, request, iu_length); 3564 } else { 3565 copy_count = num_elements_to_end_of_queue * 3566 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 3567 memcpy(next_element, request, copy_count); 3568 memcpy(queue_group->iq_element_array[path], 3569 (u8 *)request + copy_count, 3570 iu_length - copy_count); 3571 } 3572 3573 iq_pi = (iq_pi + num_elements_needed) % 3574 ctrl_info->num_elements_per_iq; 3575 3576 list_del(&io_request->request_list_entry); 3577 } 3578 3579 if (iq_pi != queue_group->iq_pi_copy[path]) { 3580 queue_group->iq_pi_copy[path] = iq_pi; 3581 /* 3582 * This write notifies the controller that one or more IUs are 3583 * available to be processed. 3584 */ 3585 writel(iq_pi, queue_group->iq_pi[path]); 3586 } 3587 3588 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 3589 } 3590 3591 #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10 3592 3593 static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info, 3594 struct completion *wait) 3595 { 3596 int rc; 3597 3598 while (1) { 3599 if (wait_for_completion_io_timeout(wait, 3600 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * HZ)) { 3601 rc = 0; 3602 break; 3603 } 3604 3605 pqi_check_ctrl_health(ctrl_info); 3606 if (pqi_ctrl_offline(ctrl_info)) { 3607 rc = -ENXIO; 3608 break; 3609 } 3610 } 3611 3612 return rc; 3613 } 3614 3615 static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request, 3616 void *context) 3617 { 3618 struct completion *waiting = context; 3619 3620 complete(waiting); 3621 } 3622 3623 static int pqi_submit_raid_request_synchronous_with_io_request( 3624 struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request, 3625 unsigned long timeout_msecs) 3626 { 3627 int rc = 0; 3628 DECLARE_COMPLETION_ONSTACK(wait); 3629 3630 io_request->io_complete_callback = pqi_raid_synchronous_complete; 3631 io_request->context = &wait; 3632 3633 pqi_start_io(ctrl_info, 3634 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 3635 io_request); 3636 3637 if (timeout_msecs == NO_TIMEOUT) { 3638 pqi_wait_for_completion_io(ctrl_info, &wait); 3639 } else { 3640 if (!wait_for_completion_io_timeout(&wait, 3641 msecs_to_jiffies(timeout_msecs))) { 3642 dev_warn(&ctrl_info->pci_dev->dev, 3643 "command timed out\n"); 3644 rc = -ETIMEDOUT; 3645 } 3646 } 3647 3648 return rc; 3649 } 3650 3651 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 3652 struct pqi_iu_header *request, unsigned int flags, 3653 struct pqi_raid_error_info *error_info, unsigned long timeout_msecs) 3654 { 3655 int rc; 3656 struct pqi_io_request *io_request; 3657 unsigned long start_jiffies; 3658 unsigned long msecs_blocked; 3659 size_t iu_length; 3660 3661 /* 3662 * Note that specifying PQI_SYNC_FLAGS_INTERRUPTABLE and a timeout value 3663 * are mutually exclusive. 3664 */ 3665 3666 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) { 3667 if (down_interruptible(&ctrl_info->sync_request_sem)) 3668 return -ERESTARTSYS; 3669 } else { 3670 if (timeout_msecs == NO_TIMEOUT) { 3671 down(&ctrl_info->sync_request_sem); 3672 } else { 3673 start_jiffies = jiffies; 3674 if (down_timeout(&ctrl_info->sync_request_sem, 3675 msecs_to_jiffies(timeout_msecs))) 3676 return -ETIMEDOUT; 3677 msecs_blocked = 3678 jiffies_to_msecs(jiffies - start_jiffies); 3679 if (msecs_blocked >= timeout_msecs) 3680 return -ETIMEDOUT; 3681 timeout_msecs -= msecs_blocked; 3682 } 3683 } 3684 3685 pqi_ctrl_busy(ctrl_info); 3686 timeout_msecs = pqi_wait_if_ctrl_blocked(ctrl_info, timeout_msecs); 3687 if (timeout_msecs == 0) { 3688 rc = -ETIMEDOUT; 3689 goto out; 3690 } 3691 3692 if (pqi_ctrl_offline(ctrl_info)) { 3693 rc = -ENXIO; 3694 goto out; 3695 } 3696 3697 io_request = pqi_alloc_io_request(ctrl_info); 3698 3699 put_unaligned_le16(io_request->index, 3700 &(((struct pqi_raid_path_request *)request)->request_id)); 3701 3702 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO) 3703 ((struct pqi_raid_path_request *)request)->error_index = 3704 ((struct pqi_raid_path_request *)request)->request_id; 3705 3706 iu_length = get_unaligned_le16(&request->iu_length) + 3707 PQI_REQUEST_HEADER_LENGTH; 3708 memcpy(io_request->iu, request, iu_length); 3709 3710 rc = pqi_submit_raid_request_synchronous_with_io_request(ctrl_info, 3711 io_request, timeout_msecs); 3712 3713 if (error_info) { 3714 if (io_request->error_info) 3715 memcpy(error_info, io_request->error_info, 3716 sizeof(*error_info)); 3717 else 3718 memset(error_info, 0, sizeof(*error_info)); 3719 } else if (rc == 0 && io_request->error_info) { 3720 u8 scsi_status; 3721 struct pqi_raid_error_info *raid_error_info; 3722 3723 raid_error_info = io_request->error_info; 3724 scsi_status = raid_error_info->status; 3725 3726 if (scsi_status == SAM_STAT_CHECK_CONDITION && 3727 raid_error_info->data_out_result == 3728 PQI_DATA_IN_OUT_UNDERFLOW) 3729 scsi_status = SAM_STAT_GOOD; 3730 3731 if (scsi_status != SAM_STAT_GOOD) 3732 rc = -EIO; 3733 } 3734 3735 pqi_free_io_request(io_request); 3736 3737 out: 3738 pqi_ctrl_unbusy(ctrl_info); 3739 up(&ctrl_info->sync_request_sem); 3740 3741 return rc; 3742 } 3743 3744 static int pqi_validate_admin_response( 3745 struct pqi_general_admin_response *response, u8 expected_function_code) 3746 { 3747 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN) 3748 return -EINVAL; 3749 3750 if (get_unaligned_le16(&response->header.iu_length) != 3751 PQI_GENERAL_ADMIN_IU_LENGTH) 3752 return -EINVAL; 3753 3754 if (response->function_code != expected_function_code) 3755 return -EINVAL; 3756 3757 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) 3758 return -EINVAL; 3759 3760 return 0; 3761 } 3762 3763 static int pqi_submit_admin_request_synchronous( 3764 struct pqi_ctrl_info *ctrl_info, 3765 struct pqi_general_admin_request *request, 3766 struct pqi_general_admin_response *response) 3767 { 3768 int rc; 3769 3770 pqi_submit_admin_request(ctrl_info, request); 3771 3772 rc = pqi_poll_for_admin_response(ctrl_info, response); 3773 3774 if (rc == 0) 3775 rc = pqi_validate_admin_response(response, 3776 request->function_code); 3777 3778 return rc; 3779 } 3780 3781 static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info) 3782 { 3783 int rc; 3784 struct pqi_general_admin_request request; 3785 struct pqi_general_admin_response response; 3786 struct pqi_device_capability *capability; 3787 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor; 3788 3789 capability = kmalloc(sizeof(*capability), GFP_KERNEL); 3790 if (!capability) 3791 return -ENOMEM; 3792 3793 memset(&request, 0, sizeof(request)); 3794 3795 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 3796 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 3797 &request.header.iu_length); 3798 request.function_code = 3799 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY; 3800 put_unaligned_le32(sizeof(*capability), 3801 &request.data.report_device_capability.buffer_length); 3802 3803 rc = pqi_map_single(ctrl_info->pci_dev, 3804 &request.data.report_device_capability.sg_descriptor, 3805 capability, sizeof(*capability), 3806 PCI_DMA_FROMDEVICE); 3807 if (rc) 3808 goto out; 3809 3810 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 3811 &response); 3812 3813 pqi_pci_unmap(ctrl_info->pci_dev, 3814 &request.data.report_device_capability.sg_descriptor, 1, 3815 PCI_DMA_FROMDEVICE); 3816 3817 if (rc) 3818 goto out; 3819 3820 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) { 3821 rc = -EIO; 3822 goto out; 3823 } 3824 3825 ctrl_info->max_inbound_queues = 3826 get_unaligned_le16(&capability->max_inbound_queues); 3827 ctrl_info->max_elements_per_iq = 3828 get_unaligned_le16(&capability->max_elements_per_iq); 3829 ctrl_info->max_iq_element_length = 3830 get_unaligned_le16(&capability->max_iq_element_length) 3831 * 16; 3832 ctrl_info->max_outbound_queues = 3833 get_unaligned_le16(&capability->max_outbound_queues); 3834 ctrl_info->max_elements_per_oq = 3835 get_unaligned_le16(&capability->max_elements_per_oq); 3836 ctrl_info->max_oq_element_length = 3837 get_unaligned_le16(&capability->max_oq_element_length) 3838 * 16; 3839 3840 sop_iu_layer_descriptor = 3841 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP]; 3842 3843 ctrl_info->max_inbound_iu_length_per_firmware = 3844 get_unaligned_le16( 3845 &sop_iu_layer_descriptor->max_inbound_iu_length); 3846 ctrl_info->inbound_spanning_supported = 3847 sop_iu_layer_descriptor->inbound_spanning_supported; 3848 ctrl_info->outbound_spanning_supported = 3849 sop_iu_layer_descriptor->outbound_spanning_supported; 3850 3851 out: 3852 kfree(capability); 3853 3854 return rc; 3855 } 3856 3857 static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info) 3858 { 3859 if (ctrl_info->max_iq_element_length < 3860 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 3861 dev_err(&ctrl_info->pci_dev->dev, 3862 "max. inbound queue element length of %d is less than the required length of %d\n", 3863 ctrl_info->max_iq_element_length, 3864 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3865 return -EINVAL; 3866 } 3867 3868 if (ctrl_info->max_oq_element_length < 3869 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) { 3870 dev_err(&ctrl_info->pci_dev->dev, 3871 "max. outbound queue element length of %d is less than the required length of %d\n", 3872 ctrl_info->max_oq_element_length, 3873 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 3874 return -EINVAL; 3875 } 3876 3877 if (ctrl_info->max_inbound_iu_length_per_firmware < 3878 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 3879 dev_err(&ctrl_info->pci_dev->dev, 3880 "max. inbound IU length of %u is less than the min. required length of %d\n", 3881 ctrl_info->max_inbound_iu_length_per_firmware, 3882 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3883 return -EINVAL; 3884 } 3885 3886 if (!ctrl_info->inbound_spanning_supported) { 3887 dev_err(&ctrl_info->pci_dev->dev, 3888 "the controller does not support inbound spanning\n"); 3889 return -EINVAL; 3890 } 3891 3892 if (ctrl_info->outbound_spanning_supported) { 3893 dev_err(&ctrl_info->pci_dev->dev, 3894 "the controller supports outbound spanning but this driver does not\n"); 3895 return -EINVAL; 3896 } 3897 3898 return 0; 3899 } 3900 3901 static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info) 3902 { 3903 int rc; 3904 struct pqi_event_queue *event_queue; 3905 struct pqi_general_admin_request request; 3906 struct pqi_general_admin_response response; 3907 3908 event_queue = &ctrl_info->event_queue; 3909 3910 /* 3911 * Create OQ (Outbound Queue - device to host queue) to dedicate 3912 * to events. 3913 */ 3914 memset(&request, 0, sizeof(request)); 3915 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 3916 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 3917 &request.header.iu_length); 3918 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 3919 put_unaligned_le16(event_queue->oq_id, 3920 &request.data.create_operational_oq.queue_id); 3921 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr, 3922 &request.data.create_operational_oq.element_array_addr); 3923 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr, 3924 &request.data.create_operational_oq.pi_addr); 3925 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS, 3926 &request.data.create_operational_oq.num_elements); 3927 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16, 3928 &request.data.create_operational_oq.element_length); 3929 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 3930 put_unaligned_le16(event_queue->int_msg_num, 3931 &request.data.create_operational_oq.int_msg_num); 3932 3933 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 3934 &response); 3935 if (rc) 3936 return rc; 3937 3938 event_queue->oq_ci = ctrl_info->iomem_base + 3939 PQI_DEVICE_REGISTERS_OFFSET + 3940 get_unaligned_le64( 3941 &response.data.create_operational_oq.oq_ci_offset); 3942 3943 return 0; 3944 } 3945 3946 static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info, 3947 unsigned int group_number) 3948 { 3949 int rc; 3950 struct pqi_queue_group *queue_group; 3951 struct pqi_general_admin_request request; 3952 struct pqi_general_admin_response response; 3953 3954 queue_group = &ctrl_info->queue_groups[group_number]; 3955 3956 /* 3957 * Create IQ (Inbound Queue - host to device queue) for 3958 * RAID path. 3959 */ 3960 memset(&request, 0, sizeof(request)); 3961 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 3962 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 3963 &request.header.iu_length); 3964 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 3965 put_unaligned_le16(queue_group->iq_id[RAID_PATH], 3966 &request.data.create_operational_iq.queue_id); 3967 put_unaligned_le64( 3968 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH], 3969 &request.data.create_operational_iq.element_array_addr); 3970 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH], 3971 &request.data.create_operational_iq.ci_addr); 3972 put_unaligned_le16(ctrl_info->num_elements_per_iq, 3973 &request.data.create_operational_iq.num_elements); 3974 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 3975 &request.data.create_operational_iq.element_length); 3976 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 3977 3978 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 3979 &response); 3980 if (rc) { 3981 dev_err(&ctrl_info->pci_dev->dev, 3982 "error creating inbound RAID queue\n"); 3983 return rc; 3984 } 3985 3986 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base + 3987 PQI_DEVICE_REGISTERS_OFFSET + 3988 get_unaligned_le64( 3989 &response.data.create_operational_iq.iq_pi_offset); 3990 3991 /* 3992 * Create IQ (Inbound Queue - host to device queue) for 3993 * Advanced I/O (AIO) path. 3994 */ 3995 memset(&request, 0, sizeof(request)); 3996 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 3997 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 3998 &request.header.iu_length); 3999 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4000 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4001 &request.data.create_operational_iq.queue_id); 4002 put_unaligned_le64((u64)queue_group-> 4003 iq_element_array_bus_addr[AIO_PATH], 4004 &request.data.create_operational_iq.element_array_addr); 4005 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH], 4006 &request.data.create_operational_iq.ci_addr); 4007 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4008 &request.data.create_operational_iq.num_elements); 4009 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4010 &request.data.create_operational_iq.element_length); 4011 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4012 4013 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4014 &response); 4015 if (rc) { 4016 dev_err(&ctrl_info->pci_dev->dev, 4017 "error creating inbound AIO queue\n"); 4018 return rc; 4019 } 4020 4021 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base + 4022 PQI_DEVICE_REGISTERS_OFFSET + 4023 get_unaligned_le64( 4024 &response.data.create_operational_iq.iq_pi_offset); 4025 4026 /* 4027 * Designate the 2nd IQ as the AIO path. By default, all IQs are 4028 * assumed to be for RAID path I/O unless we change the queue's 4029 * property. 4030 */ 4031 memset(&request, 0, sizeof(request)); 4032 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4033 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4034 &request.header.iu_length); 4035 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY; 4036 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4037 &request.data.change_operational_iq_properties.queue_id); 4038 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE, 4039 &request.data.change_operational_iq_properties.vendor_specific); 4040 4041 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4042 &response); 4043 if (rc) { 4044 dev_err(&ctrl_info->pci_dev->dev, 4045 "error changing queue property\n"); 4046 return rc; 4047 } 4048 4049 /* 4050 * Create OQ (Outbound Queue - device to host queue). 4051 */ 4052 memset(&request, 0, sizeof(request)); 4053 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4054 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4055 &request.header.iu_length); 4056 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4057 put_unaligned_le16(queue_group->oq_id, 4058 &request.data.create_operational_oq.queue_id); 4059 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr, 4060 &request.data.create_operational_oq.element_array_addr); 4061 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr, 4062 &request.data.create_operational_oq.pi_addr); 4063 put_unaligned_le16(ctrl_info->num_elements_per_oq, 4064 &request.data.create_operational_oq.num_elements); 4065 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16, 4066 &request.data.create_operational_oq.element_length); 4067 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4068 put_unaligned_le16(queue_group->int_msg_num, 4069 &request.data.create_operational_oq.int_msg_num); 4070 4071 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4072 &response); 4073 if (rc) { 4074 dev_err(&ctrl_info->pci_dev->dev, 4075 "error creating outbound queue\n"); 4076 return rc; 4077 } 4078 4079 queue_group->oq_ci = ctrl_info->iomem_base + 4080 PQI_DEVICE_REGISTERS_OFFSET + 4081 get_unaligned_le64( 4082 &response.data.create_operational_oq.oq_ci_offset); 4083 4084 return 0; 4085 } 4086 4087 static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info) 4088 { 4089 int rc; 4090 unsigned int i; 4091 4092 rc = pqi_create_event_queue(ctrl_info); 4093 if (rc) { 4094 dev_err(&ctrl_info->pci_dev->dev, 4095 "error creating event queue\n"); 4096 return rc; 4097 } 4098 4099 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4100 rc = pqi_create_queue_group(ctrl_info, i); 4101 if (rc) { 4102 dev_err(&ctrl_info->pci_dev->dev, 4103 "error creating queue group number %u/%u\n", 4104 i, ctrl_info->num_queue_groups); 4105 return rc; 4106 } 4107 } 4108 4109 return 0; 4110 } 4111 4112 #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \ 4113 (offsetof(struct pqi_event_config, descriptors) + \ 4114 (PQI_MAX_EVENT_DESCRIPTORS * sizeof(struct pqi_event_descriptor))) 4115 4116 static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info, 4117 bool enable_events) 4118 { 4119 int rc; 4120 unsigned int i; 4121 struct pqi_event_config *event_config; 4122 struct pqi_event_descriptor *event_descriptor; 4123 struct pqi_general_management_request request; 4124 4125 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4126 GFP_KERNEL); 4127 if (!event_config) 4128 return -ENOMEM; 4129 4130 memset(&request, 0, sizeof(request)); 4131 4132 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG; 4133 put_unaligned_le16(offsetof(struct pqi_general_management_request, 4134 data.report_event_configuration.sg_descriptors[1]) - 4135 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 4136 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4137 &request.data.report_event_configuration.buffer_length); 4138 4139 rc = pqi_map_single(ctrl_info->pci_dev, 4140 request.data.report_event_configuration.sg_descriptors, 4141 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4142 PCI_DMA_FROMDEVICE); 4143 if (rc) 4144 goto out; 4145 4146 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 4147 0, NULL, NO_TIMEOUT); 4148 4149 pqi_pci_unmap(ctrl_info->pci_dev, 4150 request.data.report_event_configuration.sg_descriptors, 1, 4151 PCI_DMA_FROMDEVICE); 4152 4153 if (rc) 4154 goto out; 4155 4156 for (i = 0; i < event_config->num_event_descriptors; i++) { 4157 event_descriptor = &event_config->descriptors[i]; 4158 if (enable_events && 4159 pqi_is_supported_event(event_descriptor->event_type)) 4160 put_unaligned_le16(ctrl_info->event_queue.oq_id, 4161 &event_descriptor->oq_id); 4162 else 4163 put_unaligned_le16(0, &event_descriptor->oq_id); 4164 } 4165 4166 memset(&request, 0, sizeof(request)); 4167 4168 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG; 4169 put_unaligned_le16(offsetof(struct pqi_general_management_request, 4170 data.report_event_configuration.sg_descriptors[1]) - 4171 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 4172 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4173 &request.data.report_event_configuration.buffer_length); 4174 4175 rc = pqi_map_single(ctrl_info->pci_dev, 4176 request.data.report_event_configuration.sg_descriptors, 4177 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4178 PCI_DMA_TODEVICE); 4179 if (rc) 4180 goto out; 4181 4182 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, 4183 NULL, NO_TIMEOUT); 4184 4185 pqi_pci_unmap(ctrl_info->pci_dev, 4186 request.data.report_event_configuration.sg_descriptors, 1, 4187 PCI_DMA_TODEVICE); 4188 4189 out: 4190 kfree(event_config); 4191 4192 return rc; 4193 } 4194 4195 static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info) 4196 { 4197 return pqi_configure_events(ctrl_info, true); 4198 } 4199 4200 static inline int pqi_disable_events(struct pqi_ctrl_info *ctrl_info) 4201 { 4202 return pqi_configure_events(ctrl_info, false); 4203 } 4204 4205 static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info) 4206 { 4207 unsigned int i; 4208 struct device *dev; 4209 size_t sg_chain_buffer_length; 4210 struct pqi_io_request *io_request; 4211 4212 if (!ctrl_info->io_request_pool) 4213 return; 4214 4215 dev = &ctrl_info->pci_dev->dev; 4216 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 4217 io_request = ctrl_info->io_request_pool; 4218 4219 for (i = 0; i < ctrl_info->max_io_slots; i++) { 4220 kfree(io_request->iu); 4221 if (!io_request->sg_chain_buffer) 4222 break; 4223 dma_free_coherent(dev, sg_chain_buffer_length, 4224 io_request->sg_chain_buffer, 4225 io_request->sg_chain_buffer_dma_handle); 4226 io_request++; 4227 } 4228 4229 kfree(ctrl_info->io_request_pool); 4230 ctrl_info->io_request_pool = NULL; 4231 } 4232 4233 static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info) 4234 { 4235 ctrl_info->error_buffer = dma_zalloc_coherent(&ctrl_info->pci_dev->dev, 4236 ctrl_info->error_buffer_length, 4237 &ctrl_info->error_buffer_dma_handle, GFP_KERNEL); 4238 4239 if (!ctrl_info->error_buffer) 4240 return -ENOMEM; 4241 4242 return 0; 4243 } 4244 4245 static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info) 4246 { 4247 unsigned int i; 4248 void *sg_chain_buffer; 4249 size_t sg_chain_buffer_length; 4250 dma_addr_t sg_chain_buffer_dma_handle; 4251 struct device *dev; 4252 struct pqi_io_request *io_request; 4253 4254 ctrl_info->io_request_pool = kzalloc(ctrl_info->max_io_slots * 4255 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL); 4256 4257 if (!ctrl_info->io_request_pool) { 4258 dev_err(&ctrl_info->pci_dev->dev, 4259 "failed to allocate I/O request pool\n"); 4260 goto error; 4261 } 4262 4263 dev = &ctrl_info->pci_dev->dev; 4264 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 4265 io_request = ctrl_info->io_request_pool; 4266 4267 for (i = 0; i < ctrl_info->max_io_slots; i++) { 4268 io_request->iu = 4269 kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL); 4270 4271 if (!io_request->iu) { 4272 dev_err(&ctrl_info->pci_dev->dev, 4273 "failed to allocate IU buffers\n"); 4274 goto error; 4275 } 4276 4277 sg_chain_buffer = dma_alloc_coherent(dev, 4278 sg_chain_buffer_length, &sg_chain_buffer_dma_handle, 4279 GFP_KERNEL); 4280 4281 if (!sg_chain_buffer) { 4282 dev_err(&ctrl_info->pci_dev->dev, 4283 "failed to allocate PQI scatter-gather chain buffers\n"); 4284 goto error; 4285 } 4286 4287 io_request->index = i; 4288 io_request->sg_chain_buffer = sg_chain_buffer; 4289 io_request->sg_chain_buffer_dma_handle = 4290 sg_chain_buffer_dma_handle; 4291 io_request++; 4292 } 4293 4294 return 0; 4295 4296 error: 4297 pqi_free_all_io_requests(ctrl_info); 4298 4299 return -ENOMEM; 4300 } 4301 4302 /* 4303 * Calculate required resources that are sized based on max. outstanding 4304 * requests and max. transfer size. 4305 */ 4306 4307 static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info) 4308 { 4309 u32 max_transfer_size; 4310 u32 max_sg_entries; 4311 4312 ctrl_info->scsi_ml_can_queue = 4313 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS; 4314 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests; 4315 4316 ctrl_info->error_buffer_length = 4317 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH; 4318 4319 if (reset_devices) 4320 max_transfer_size = min(ctrl_info->max_transfer_size, 4321 PQI_MAX_TRANSFER_SIZE_KDUMP); 4322 else 4323 max_transfer_size = min(ctrl_info->max_transfer_size, 4324 PQI_MAX_TRANSFER_SIZE); 4325 4326 max_sg_entries = max_transfer_size / PAGE_SIZE; 4327 4328 /* +1 to cover when the buffer is not page-aligned. */ 4329 max_sg_entries++; 4330 4331 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries); 4332 4333 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE; 4334 4335 ctrl_info->sg_chain_buffer_length = 4336 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) + 4337 PQI_EXTRA_SGL_MEMORY; 4338 ctrl_info->sg_tablesize = max_sg_entries; 4339 ctrl_info->max_sectors = max_transfer_size / 512; 4340 } 4341 4342 static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info) 4343 { 4344 int num_queue_groups; 4345 u16 num_elements_per_iq; 4346 u16 num_elements_per_oq; 4347 4348 if (reset_devices) { 4349 num_queue_groups = 1; 4350 } else { 4351 int num_cpus; 4352 int max_queue_groups; 4353 4354 max_queue_groups = min(ctrl_info->max_inbound_queues / 2, 4355 ctrl_info->max_outbound_queues - 1); 4356 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS); 4357 4358 num_cpus = num_online_cpus(); 4359 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors); 4360 num_queue_groups = min(num_queue_groups, max_queue_groups); 4361 } 4362 4363 ctrl_info->num_queue_groups = num_queue_groups; 4364 ctrl_info->max_hw_queue_index = num_queue_groups - 1; 4365 4366 /* 4367 * Make sure that the max. inbound IU length is an even multiple 4368 * of our inbound element length. 4369 */ 4370 ctrl_info->max_inbound_iu_length = 4371 (ctrl_info->max_inbound_iu_length_per_firmware / 4372 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) * 4373 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 4374 4375 num_elements_per_iq = 4376 (ctrl_info->max_inbound_iu_length / 4377 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4378 4379 /* Add one because one element in each queue is unusable. */ 4380 num_elements_per_iq++; 4381 4382 num_elements_per_iq = min(num_elements_per_iq, 4383 ctrl_info->max_elements_per_iq); 4384 4385 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1; 4386 num_elements_per_oq = min(num_elements_per_oq, 4387 ctrl_info->max_elements_per_oq); 4388 4389 ctrl_info->num_elements_per_iq = num_elements_per_iq; 4390 ctrl_info->num_elements_per_oq = num_elements_per_oq; 4391 4392 ctrl_info->max_sg_per_iu = 4393 ((ctrl_info->max_inbound_iu_length - 4394 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 4395 sizeof(struct pqi_sg_descriptor)) + 4396 PQI_MAX_EMBEDDED_SG_DESCRIPTORS; 4397 } 4398 4399 static inline void pqi_set_sg_descriptor( 4400 struct pqi_sg_descriptor *sg_descriptor, struct scatterlist *sg) 4401 { 4402 u64 address = (u64)sg_dma_address(sg); 4403 unsigned int length = sg_dma_len(sg); 4404 4405 put_unaligned_le64(address, &sg_descriptor->address); 4406 put_unaligned_le32(length, &sg_descriptor->length); 4407 put_unaligned_le32(0, &sg_descriptor->flags); 4408 } 4409 4410 static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info, 4411 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd, 4412 struct pqi_io_request *io_request) 4413 { 4414 int i; 4415 u16 iu_length; 4416 int sg_count; 4417 bool chained; 4418 unsigned int num_sg_in_iu; 4419 unsigned int max_sg_per_iu; 4420 struct scatterlist *sg; 4421 struct pqi_sg_descriptor *sg_descriptor; 4422 4423 sg_count = scsi_dma_map(scmd); 4424 if (sg_count < 0) 4425 return sg_count; 4426 4427 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 4428 PQI_REQUEST_HEADER_LENGTH; 4429 4430 if (sg_count == 0) 4431 goto out; 4432 4433 sg = scsi_sglist(scmd); 4434 sg_descriptor = request->sg_descriptors; 4435 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1; 4436 chained = false; 4437 num_sg_in_iu = 0; 4438 i = 0; 4439 4440 while (1) { 4441 pqi_set_sg_descriptor(sg_descriptor, sg); 4442 if (!chained) 4443 num_sg_in_iu++; 4444 i++; 4445 if (i == sg_count) 4446 break; 4447 sg_descriptor++; 4448 if (i == max_sg_per_iu) { 4449 put_unaligned_le64( 4450 (u64)io_request->sg_chain_buffer_dma_handle, 4451 &sg_descriptor->address); 4452 put_unaligned_le32((sg_count - num_sg_in_iu) 4453 * sizeof(*sg_descriptor), 4454 &sg_descriptor->length); 4455 put_unaligned_le32(CISS_SG_CHAIN, 4456 &sg_descriptor->flags); 4457 chained = true; 4458 num_sg_in_iu++; 4459 sg_descriptor = io_request->sg_chain_buffer; 4460 } 4461 sg = sg_next(sg); 4462 } 4463 4464 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 4465 request->partial = chained; 4466 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 4467 4468 out: 4469 put_unaligned_le16(iu_length, &request->header.iu_length); 4470 4471 return 0; 4472 } 4473 4474 static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info, 4475 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd, 4476 struct pqi_io_request *io_request) 4477 { 4478 int i; 4479 u16 iu_length; 4480 int sg_count; 4481 bool chained; 4482 unsigned int num_sg_in_iu; 4483 unsigned int max_sg_per_iu; 4484 struct scatterlist *sg; 4485 struct pqi_sg_descriptor *sg_descriptor; 4486 4487 sg_count = scsi_dma_map(scmd); 4488 if (sg_count < 0) 4489 return sg_count; 4490 4491 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) - 4492 PQI_REQUEST_HEADER_LENGTH; 4493 num_sg_in_iu = 0; 4494 4495 if (sg_count == 0) 4496 goto out; 4497 4498 sg = scsi_sglist(scmd); 4499 sg_descriptor = request->sg_descriptors; 4500 max_sg_per_iu = ctrl_info->max_sg_per_iu - 1; 4501 chained = false; 4502 i = 0; 4503 4504 while (1) { 4505 pqi_set_sg_descriptor(sg_descriptor, sg); 4506 if (!chained) 4507 num_sg_in_iu++; 4508 i++; 4509 if (i == sg_count) 4510 break; 4511 sg_descriptor++; 4512 if (i == max_sg_per_iu) { 4513 put_unaligned_le64( 4514 (u64)io_request->sg_chain_buffer_dma_handle, 4515 &sg_descriptor->address); 4516 put_unaligned_le32((sg_count - num_sg_in_iu) 4517 * sizeof(*sg_descriptor), 4518 &sg_descriptor->length); 4519 put_unaligned_le32(CISS_SG_CHAIN, 4520 &sg_descriptor->flags); 4521 chained = true; 4522 num_sg_in_iu++; 4523 sg_descriptor = io_request->sg_chain_buffer; 4524 } 4525 sg = sg_next(sg); 4526 } 4527 4528 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 4529 request->partial = chained; 4530 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 4531 4532 out: 4533 put_unaligned_le16(iu_length, &request->header.iu_length); 4534 request->num_sg_descriptors = num_sg_in_iu; 4535 4536 return 0; 4537 } 4538 4539 static void pqi_raid_io_complete(struct pqi_io_request *io_request, 4540 void *context) 4541 { 4542 struct scsi_cmnd *scmd; 4543 4544 scmd = io_request->scmd; 4545 pqi_free_io_request(io_request); 4546 scsi_dma_unmap(scmd); 4547 pqi_scsi_done(scmd); 4548 } 4549 4550 static int pqi_raid_submit_scsi_cmd_with_io_request( 4551 struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request, 4552 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 4553 struct pqi_queue_group *queue_group) 4554 { 4555 int rc; 4556 size_t cdb_length; 4557 struct pqi_raid_path_request *request; 4558 4559 io_request->io_complete_callback = pqi_raid_io_complete; 4560 io_request->scmd = scmd; 4561 4562 request = io_request->iu; 4563 memset(request, 0, 4564 offsetof(struct pqi_raid_path_request, sg_descriptors)); 4565 4566 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 4567 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 4568 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 4569 put_unaligned_le16(io_request->index, &request->request_id); 4570 request->error_index = request->request_id; 4571 memcpy(request->lun_number, device->scsi3addr, 4572 sizeof(request->lun_number)); 4573 4574 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb)); 4575 memcpy(request->cdb, scmd->cmnd, cdb_length); 4576 4577 switch (cdb_length) { 4578 case 6: 4579 case 10: 4580 case 12: 4581 case 16: 4582 /* No bytes in the Additional CDB bytes field */ 4583 request->additional_cdb_bytes_usage = 4584 SOP_ADDITIONAL_CDB_BYTES_0; 4585 break; 4586 case 20: 4587 /* 4 bytes in the Additional cdb field */ 4588 request->additional_cdb_bytes_usage = 4589 SOP_ADDITIONAL_CDB_BYTES_4; 4590 break; 4591 case 24: 4592 /* 8 bytes in the Additional cdb field */ 4593 request->additional_cdb_bytes_usage = 4594 SOP_ADDITIONAL_CDB_BYTES_8; 4595 break; 4596 case 28: 4597 /* 12 bytes in the Additional cdb field */ 4598 request->additional_cdb_bytes_usage = 4599 SOP_ADDITIONAL_CDB_BYTES_12; 4600 break; 4601 case 32: 4602 default: 4603 /* 16 bytes in the Additional cdb field */ 4604 request->additional_cdb_bytes_usage = 4605 SOP_ADDITIONAL_CDB_BYTES_16; 4606 break; 4607 } 4608 4609 switch (scmd->sc_data_direction) { 4610 case DMA_TO_DEVICE: 4611 request->data_direction = SOP_READ_FLAG; 4612 break; 4613 case DMA_FROM_DEVICE: 4614 request->data_direction = SOP_WRITE_FLAG; 4615 break; 4616 case DMA_NONE: 4617 request->data_direction = SOP_NO_DIRECTION_FLAG; 4618 break; 4619 case DMA_BIDIRECTIONAL: 4620 request->data_direction = SOP_BIDIRECTIONAL; 4621 break; 4622 default: 4623 dev_err(&ctrl_info->pci_dev->dev, 4624 "unknown data direction: %d\n", 4625 scmd->sc_data_direction); 4626 break; 4627 } 4628 4629 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request); 4630 if (rc) { 4631 pqi_free_io_request(io_request); 4632 return SCSI_MLQUEUE_HOST_BUSY; 4633 } 4634 4635 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request); 4636 4637 return 0; 4638 } 4639 4640 static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 4641 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 4642 struct pqi_queue_group *queue_group) 4643 { 4644 struct pqi_io_request *io_request; 4645 4646 io_request = pqi_alloc_io_request(ctrl_info); 4647 4648 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request, 4649 device, scmd, queue_group); 4650 } 4651 4652 static inline void pqi_schedule_bypass_retry(struct pqi_ctrl_info *ctrl_info) 4653 { 4654 if (!pqi_ctrl_blocked(ctrl_info)) 4655 schedule_work(&ctrl_info->raid_bypass_retry_work); 4656 } 4657 4658 static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request) 4659 { 4660 struct scsi_cmnd *scmd; 4661 struct pqi_scsi_dev *device; 4662 struct pqi_ctrl_info *ctrl_info; 4663 4664 if (!io_request->raid_bypass) 4665 return false; 4666 4667 scmd = io_request->scmd; 4668 if ((scmd->result & 0xff) == SAM_STAT_GOOD) 4669 return false; 4670 if (host_byte(scmd->result) == DID_NO_CONNECT) 4671 return false; 4672 4673 device = scmd->device->hostdata; 4674 if (pqi_device_offline(device)) 4675 return false; 4676 4677 ctrl_info = shost_to_hba(scmd->device->host); 4678 if (pqi_ctrl_offline(ctrl_info)) 4679 return false; 4680 4681 return true; 4682 } 4683 4684 static inline void pqi_add_to_raid_bypass_retry_list( 4685 struct pqi_ctrl_info *ctrl_info, 4686 struct pqi_io_request *io_request, bool at_head) 4687 { 4688 unsigned long flags; 4689 4690 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags); 4691 if (at_head) 4692 list_add(&io_request->request_list_entry, 4693 &ctrl_info->raid_bypass_retry_list); 4694 else 4695 list_add_tail(&io_request->request_list_entry, 4696 &ctrl_info->raid_bypass_retry_list); 4697 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags); 4698 } 4699 4700 static void pqi_queued_raid_bypass_complete(struct pqi_io_request *io_request, 4701 void *context) 4702 { 4703 struct scsi_cmnd *scmd; 4704 4705 scmd = io_request->scmd; 4706 pqi_free_io_request(io_request); 4707 pqi_scsi_done(scmd); 4708 } 4709 4710 static void pqi_queue_raid_bypass_retry(struct pqi_io_request *io_request) 4711 { 4712 struct scsi_cmnd *scmd; 4713 struct pqi_ctrl_info *ctrl_info; 4714 4715 io_request->io_complete_callback = pqi_queued_raid_bypass_complete; 4716 scmd = io_request->scmd; 4717 scmd->result = 0; 4718 ctrl_info = shost_to_hba(scmd->device->host); 4719 4720 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request, false); 4721 pqi_schedule_bypass_retry(ctrl_info); 4722 } 4723 4724 static int pqi_retry_raid_bypass(struct pqi_io_request *io_request) 4725 { 4726 struct scsi_cmnd *scmd; 4727 struct pqi_scsi_dev *device; 4728 struct pqi_ctrl_info *ctrl_info; 4729 struct pqi_queue_group *queue_group; 4730 4731 scmd = io_request->scmd; 4732 device = scmd->device->hostdata; 4733 if (pqi_device_in_reset(device)) { 4734 pqi_free_io_request(io_request); 4735 set_host_byte(scmd, DID_RESET); 4736 pqi_scsi_done(scmd); 4737 return 0; 4738 } 4739 4740 ctrl_info = shost_to_hba(scmd->device->host); 4741 queue_group = io_request->queue_group; 4742 4743 pqi_reinit_io_request(io_request); 4744 4745 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request, 4746 device, scmd, queue_group); 4747 } 4748 4749 static inline struct pqi_io_request *pqi_next_queued_raid_bypass_request( 4750 struct pqi_ctrl_info *ctrl_info) 4751 { 4752 unsigned long flags; 4753 struct pqi_io_request *io_request; 4754 4755 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags); 4756 io_request = list_first_entry_or_null( 4757 &ctrl_info->raid_bypass_retry_list, 4758 struct pqi_io_request, request_list_entry); 4759 if (io_request) 4760 list_del(&io_request->request_list_entry); 4761 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags); 4762 4763 return io_request; 4764 } 4765 4766 static void pqi_retry_raid_bypass_requests(struct pqi_ctrl_info *ctrl_info) 4767 { 4768 int rc; 4769 struct pqi_io_request *io_request; 4770 4771 pqi_ctrl_busy(ctrl_info); 4772 4773 while (1) { 4774 if (pqi_ctrl_blocked(ctrl_info)) 4775 break; 4776 io_request = pqi_next_queued_raid_bypass_request(ctrl_info); 4777 if (!io_request) 4778 break; 4779 rc = pqi_retry_raid_bypass(io_request); 4780 if (rc) { 4781 pqi_add_to_raid_bypass_retry_list(ctrl_info, io_request, 4782 true); 4783 pqi_schedule_bypass_retry(ctrl_info); 4784 break; 4785 } 4786 } 4787 4788 pqi_ctrl_unbusy(ctrl_info); 4789 } 4790 4791 static void pqi_raid_bypass_retry_worker(struct work_struct *work) 4792 { 4793 struct pqi_ctrl_info *ctrl_info; 4794 4795 ctrl_info = container_of(work, struct pqi_ctrl_info, 4796 raid_bypass_retry_work); 4797 pqi_retry_raid_bypass_requests(ctrl_info); 4798 } 4799 4800 static void pqi_clear_all_queued_raid_bypass_retries( 4801 struct pqi_ctrl_info *ctrl_info) 4802 { 4803 unsigned long flags; 4804 4805 spin_lock_irqsave(&ctrl_info->raid_bypass_retry_list_lock, flags); 4806 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list); 4807 spin_unlock_irqrestore(&ctrl_info->raid_bypass_retry_list_lock, flags); 4808 } 4809 4810 static void pqi_aio_io_complete(struct pqi_io_request *io_request, 4811 void *context) 4812 { 4813 struct scsi_cmnd *scmd; 4814 4815 scmd = io_request->scmd; 4816 scsi_dma_unmap(scmd); 4817 if (io_request->status == -EAGAIN) 4818 set_host_byte(scmd, DID_IMM_RETRY); 4819 else if (pqi_raid_bypass_retry_needed(io_request)) { 4820 pqi_queue_raid_bypass_retry(io_request); 4821 return; 4822 } 4823 pqi_free_io_request(io_request); 4824 pqi_scsi_done(scmd); 4825 } 4826 4827 static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 4828 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 4829 struct pqi_queue_group *queue_group) 4830 { 4831 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle, 4832 scmd->cmnd, scmd->cmd_len, queue_group, NULL, false); 4833 } 4834 4835 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 4836 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 4837 unsigned int cdb_length, struct pqi_queue_group *queue_group, 4838 struct pqi_encryption_info *encryption_info, bool raid_bypass) 4839 { 4840 int rc; 4841 struct pqi_io_request *io_request; 4842 struct pqi_aio_path_request *request; 4843 4844 io_request = pqi_alloc_io_request(ctrl_info); 4845 io_request->io_complete_callback = pqi_aio_io_complete; 4846 io_request->scmd = scmd; 4847 io_request->raid_bypass = raid_bypass; 4848 4849 request = io_request->iu; 4850 memset(request, 0, 4851 offsetof(struct pqi_raid_path_request, sg_descriptors)); 4852 4853 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO; 4854 put_unaligned_le32(aio_handle, &request->nexus_id); 4855 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 4856 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 4857 put_unaligned_le16(io_request->index, &request->request_id); 4858 request->error_index = request->request_id; 4859 if (cdb_length > sizeof(request->cdb)) 4860 cdb_length = sizeof(request->cdb); 4861 request->cdb_length = cdb_length; 4862 memcpy(request->cdb, cdb, cdb_length); 4863 4864 switch (scmd->sc_data_direction) { 4865 case DMA_TO_DEVICE: 4866 request->data_direction = SOP_READ_FLAG; 4867 break; 4868 case DMA_FROM_DEVICE: 4869 request->data_direction = SOP_WRITE_FLAG; 4870 break; 4871 case DMA_NONE: 4872 request->data_direction = SOP_NO_DIRECTION_FLAG; 4873 break; 4874 case DMA_BIDIRECTIONAL: 4875 request->data_direction = SOP_BIDIRECTIONAL; 4876 break; 4877 default: 4878 dev_err(&ctrl_info->pci_dev->dev, 4879 "unknown data direction: %d\n", 4880 scmd->sc_data_direction); 4881 break; 4882 } 4883 4884 if (encryption_info) { 4885 request->encryption_enable = true; 4886 put_unaligned_le16(encryption_info->data_encryption_key_index, 4887 &request->data_encryption_key_index); 4888 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 4889 &request->encrypt_tweak_lower); 4890 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 4891 &request->encrypt_tweak_upper); 4892 } 4893 4894 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request); 4895 if (rc) { 4896 pqi_free_io_request(io_request); 4897 return SCSI_MLQUEUE_HOST_BUSY; 4898 } 4899 4900 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 4901 4902 return 0; 4903 } 4904 4905 static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info, 4906 struct scsi_cmnd *scmd) 4907 { 4908 u16 hw_queue; 4909 4910 hw_queue = blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scmd->request)); 4911 if (hw_queue > ctrl_info->max_hw_queue_index) 4912 hw_queue = 0; 4913 4914 return hw_queue; 4915 } 4916 4917 /* 4918 * This function gets called just before we hand the completed SCSI request 4919 * back to the SML. 4920 */ 4921 4922 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd) 4923 { 4924 struct pqi_scsi_dev *device; 4925 4926 device = scmd->device->hostdata; 4927 atomic_dec(&device->scsi_cmds_outstanding); 4928 } 4929 4930 static int pqi_scsi_queue_command(struct Scsi_Host *shost, 4931 struct scsi_cmnd *scmd) 4932 { 4933 int rc; 4934 struct pqi_ctrl_info *ctrl_info; 4935 struct pqi_scsi_dev *device; 4936 u16 hw_queue; 4937 struct pqi_queue_group *queue_group; 4938 bool raid_bypassed; 4939 4940 device = scmd->device->hostdata; 4941 ctrl_info = shost_to_hba(shost); 4942 4943 atomic_inc(&device->scsi_cmds_outstanding); 4944 4945 if (pqi_ctrl_offline(ctrl_info)) { 4946 set_host_byte(scmd, DID_NO_CONNECT); 4947 pqi_scsi_done(scmd); 4948 return 0; 4949 } 4950 4951 pqi_ctrl_busy(ctrl_info); 4952 if (pqi_ctrl_blocked(ctrl_info) || pqi_device_in_reset(device)) { 4953 rc = SCSI_MLQUEUE_HOST_BUSY; 4954 goto out; 4955 } 4956 4957 /* 4958 * This is necessary because the SML doesn't zero out this field during 4959 * error recovery. 4960 */ 4961 scmd->result = 0; 4962 4963 hw_queue = pqi_get_hw_queue(ctrl_info, scmd); 4964 queue_group = &ctrl_info->queue_groups[hw_queue]; 4965 4966 if (pqi_is_logical_device(device)) { 4967 raid_bypassed = false; 4968 if (device->raid_bypass_enabled && 4969 !blk_rq_is_passthrough(scmd->request)) { 4970 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device, 4971 scmd, queue_group); 4972 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY) 4973 raid_bypassed = true; 4974 } 4975 if (!raid_bypassed) 4976 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, 4977 queue_group); 4978 } else { 4979 if (device->aio_enabled) 4980 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, 4981 queue_group); 4982 else 4983 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, 4984 queue_group); 4985 } 4986 4987 out: 4988 pqi_ctrl_unbusy(ctrl_info); 4989 if (rc) 4990 atomic_dec(&device->scsi_cmds_outstanding); 4991 4992 return rc; 4993 } 4994 4995 static int pqi_wait_until_queued_io_drained(struct pqi_ctrl_info *ctrl_info, 4996 struct pqi_queue_group *queue_group) 4997 { 4998 unsigned int path; 4999 unsigned long flags; 5000 bool list_is_empty; 5001 5002 for (path = 0; path < 2; path++) { 5003 while (1) { 5004 spin_lock_irqsave( 5005 &queue_group->submit_lock[path], flags); 5006 list_is_empty = 5007 list_empty(&queue_group->request_list[path]); 5008 spin_unlock_irqrestore( 5009 &queue_group->submit_lock[path], flags); 5010 if (list_is_empty) 5011 break; 5012 pqi_check_ctrl_health(ctrl_info); 5013 if (pqi_ctrl_offline(ctrl_info)) 5014 return -ENXIO; 5015 usleep_range(1000, 2000); 5016 } 5017 } 5018 5019 return 0; 5020 } 5021 5022 static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info) 5023 { 5024 int rc; 5025 unsigned int i; 5026 unsigned int path; 5027 struct pqi_queue_group *queue_group; 5028 pqi_index_t iq_pi; 5029 pqi_index_t iq_ci; 5030 5031 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5032 queue_group = &ctrl_info->queue_groups[i]; 5033 5034 rc = pqi_wait_until_queued_io_drained(ctrl_info, queue_group); 5035 if (rc) 5036 return rc; 5037 5038 for (path = 0; path < 2; path++) { 5039 iq_pi = queue_group->iq_pi_copy[path]; 5040 5041 while (1) { 5042 iq_ci = *queue_group->iq_ci[path]; 5043 if (iq_ci == iq_pi) 5044 break; 5045 pqi_check_ctrl_health(ctrl_info); 5046 if (pqi_ctrl_offline(ctrl_info)) 5047 return -ENXIO; 5048 usleep_range(1000, 2000); 5049 } 5050 } 5051 } 5052 5053 return 0; 5054 } 5055 5056 static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info, 5057 struct pqi_scsi_dev *device) 5058 { 5059 unsigned int i; 5060 unsigned int path; 5061 struct pqi_queue_group *queue_group; 5062 unsigned long flags; 5063 struct pqi_io_request *io_request; 5064 struct pqi_io_request *next; 5065 struct scsi_cmnd *scmd; 5066 struct pqi_scsi_dev *scsi_device; 5067 5068 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5069 queue_group = &ctrl_info->queue_groups[i]; 5070 5071 for (path = 0; path < 2; path++) { 5072 spin_lock_irqsave( 5073 &queue_group->submit_lock[path], flags); 5074 5075 list_for_each_entry_safe(io_request, next, 5076 &queue_group->request_list[path], 5077 request_list_entry) { 5078 scmd = io_request->scmd; 5079 if (!scmd) 5080 continue; 5081 5082 scsi_device = scmd->device->hostdata; 5083 if (scsi_device != device) 5084 continue; 5085 5086 list_del(&io_request->request_list_entry); 5087 set_host_byte(scmd, DID_RESET); 5088 pqi_scsi_done(scmd); 5089 } 5090 5091 spin_unlock_irqrestore( 5092 &queue_group->submit_lock[path], flags); 5093 } 5094 } 5095 } 5096 5097 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 5098 struct pqi_scsi_dev *device) 5099 { 5100 while (atomic_read(&device->scsi_cmds_outstanding)) { 5101 pqi_check_ctrl_health(ctrl_info); 5102 if (pqi_ctrl_offline(ctrl_info)) 5103 return -ENXIO; 5104 usleep_range(1000, 2000); 5105 } 5106 5107 return 0; 5108 } 5109 5110 static int pqi_ctrl_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info) 5111 { 5112 bool io_pending; 5113 unsigned long flags; 5114 struct pqi_scsi_dev *device; 5115 5116 while (1) { 5117 io_pending = false; 5118 5119 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 5120 list_for_each_entry(device, &ctrl_info->scsi_device_list, 5121 scsi_device_list_entry) { 5122 if (atomic_read(&device->scsi_cmds_outstanding)) { 5123 io_pending = true; 5124 break; 5125 } 5126 } 5127 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, 5128 flags); 5129 5130 if (!io_pending) 5131 break; 5132 5133 pqi_check_ctrl_health(ctrl_info); 5134 if (pqi_ctrl_offline(ctrl_info)) 5135 return -ENXIO; 5136 5137 usleep_range(1000, 2000); 5138 } 5139 5140 return 0; 5141 } 5142 5143 static void pqi_lun_reset_complete(struct pqi_io_request *io_request, 5144 void *context) 5145 { 5146 struct completion *waiting = context; 5147 5148 complete(waiting); 5149 } 5150 5151 #define PQI_LUN_RESET_TIMEOUT_SECS 10 5152 5153 static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info, 5154 struct pqi_scsi_dev *device, struct completion *wait) 5155 { 5156 int rc; 5157 5158 while (1) { 5159 if (wait_for_completion_io_timeout(wait, 5160 PQI_LUN_RESET_TIMEOUT_SECS * HZ)) { 5161 rc = 0; 5162 break; 5163 } 5164 5165 pqi_check_ctrl_health(ctrl_info); 5166 if (pqi_ctrl_offline(ctrl_info)) { 5167 rc = -ENXIO; 5168 break; 5169 } 5170 } 5171 5172 return rc; 5173 } 5174 5175 static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info, 5176 struct pqi_scsi_dev *device) 5177 { 5178 int rc; 5179 struct pqi_io_request *io_request; 5180 DECLARE_COMPLETION_ONSTACK(wait); 5181 struct pqi_task_management_request *request; 5182 5183 io_request = pqi_alloc_io_request(ctrl_info); 5184 io_request->io_complete_callback = pqi_lun_reset_complete; 5185 io_request->context = &wait; 5186 5187 request = io_request->iu; 5188 memset(request, 0, sizeof(*request)); 5189 5190 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT; 5191 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH, 5192 &request->header.iu_length); 5193 put_unaligned_le16(io_request->index, &request->request_id); 5194 memcpy(request->lun_number, device->scsi3addr, 5195 sizeof(request->lun_number)); 5196 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET; 5197 5198 pqi_start_io(ctrl_info, 5199 &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 5200 io_request); 5201 5202 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, &wait); 5203 if (rc == 0) 5204 rc = io_request->status; 5205 5206 pqi_free_io_request(io_request); 5207 5208 return rc; 5209 } 5210 5211 /* Performs a reset at the LUN level. */ 5212 5213 static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info, 5214 struct pqi_scsi_dev *device) 5215 { 5216 int rc; 5217 5218 rc = pqi_lun_reset(ctrl_info, device); 5219 if (rc == 0) 5220 rc = pqi_device_wait_for_pending_io(ctrl_info, device); 5221 5222 return rc == 0 ? SUCCESS : FAILED; 5223 } 5224 5225 static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd) 5226 { 5227 int rc; 5228 struct Scsi_Host *shost; 5229 struct pqi_ctrl_info *ctrl_info; 5230 struct pqi_scsi_dev *device; 5231 5232 shost = scmd->device->host; 5233 ctrl_info = shost_to_hba(shost); 5234 device = scmd->device->hostdata; 5235 5236 dev_err(&ctrl_info->pci_dev->dev, 5237 "resetting scsi %d:%d:%d:%d\n", 5238 shost->host_no, device->bus, device->target, device->lun); 5239 5240 pqi_check_ctrl_health(ctrl_info); 5241 if (pqi_ctrl_offline(ctrl_info)) { 5242 rc = FAILED; 5243 goto out; 5244 } 5245 5246 mutex_lock(&ctrl_info->lun_reset_mutex); 5247 5248 pqi_ctrl_block_requests(ctrl_info); 5249 pqi_ctrl_wait_until_quiesced(ctrl_info); 5250 pqi_fail_io_queued_for_device(ctrl_info, device); 5251 rc = pqi_wait_until_inbound_queues_empty(ctrl_info); 5252 pqi_device_reset_start(device); 5253 pqi_ctrl_unblock_requests(ctrl_info); 5254 5255 if (rc) 5256 rc = FAILED; 5257 else 5258 rc = pqi_device_reset(ctrl_info, device); 5259 5260 pqi_device_reset_done(device); 5261 5262 mutex_unlock(&ctrl_info->lun_reset_mutex); 5263 5264 out: 5265 dev_err(&ctrl_info->pci_dev->dev, 5266 "reset of scsi %d:%d:%d:%d: %s\n", 5267 shost->host_no, device->bus, device->target, device->lun, 5268 rc == SUCCESS ? "SUCCESS" : "FAILED"); 5269 5270 return rc; 5271 } 5272 5273 static int pqi_slave_alloc(struct scsi_device *sdev) 5274 { 5275 struct pqi_scsi_dev *device; 5276 unsigned long flags; 5277 struct pqi_ctrl_info *ctrl_info; 5278 struct scsi_target *starget; 5279 struct sas_rphy *rphy; 5280 5281 ctrl_info = shost_to_hba(sdev->host); 5282 5283 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 5284 5285 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) { 5286 starget = scsi_target(sdev); 5287 rphy = target_to_rphy(starget); 5288 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy); 5289 if (device) { 5290 device->target = sdev_id(sdev); 5291 device->lun = sdev->lun; 5292 device->target_lun_valid = true; 5293 } 5294 } else { 5295 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev), 5296 sdev_id(sdev), sdev->lun); 5297 } 5298 5299 if (device) { 5300 sdev->hostdata = device; 5301 device->sdev = sdev; 5302 if (device->queue_depth) { 5303 device->advertised_queue_depth = device->queue_depth; 5304 scsi_change_queue_depth(sdev, 5305 device->advertised_queue_depth); 5306 } 5307 } 5308 5309 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 5310 5311 return 0; 5312 } 5313 5314 static int pqi_map_queues(struct Scsi_Host *shost) 5315 { 5316 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 5317 5318 return blk_mq_pci_map_queues(&shost->tag_set, ctrl_info->pci_dev, 0); 5319 } 5320 5321 static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, 5322 void __user *arg) 5323 { 5324 struct pci_dev *pci_dev; 5325 u32 subsystem_vendor; 5326 u32 subsystem_device; 5327 cciss_pci_info_struct pciinfo; 5328 5329 if (!arg) 5330 return -EINVAL; 5331 5332 pci_dev = ctrl_info->pci_dev; 5333 5334 pciinfo.domain = pci_domain_nr(pci_dev->bus); 5335 pciinfo.bus = pci_dev->bus->number; 5336 pciinfo.dev_fn = pci_dev->devfn; 5337 subsystem_vendor = pci_dev->subsystem_vendor; 5338 subsystem_device = pci_dev->subsystem_device; 5339 pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) | 5340 subsystem_vendor; 5341 5342 if (copy_to_user(arg, &pciinfo, sizeof(pciinfo))) 5343 return -EFAULT; 5344 5345 return 0; 5346 } 5347 5348 static int pqi_getdrivver_ioctl(void __user *arg) 5349 { 5350 u32 version; 5351 5352 if (!arg) 5353 return -EINVAL; 5354 5355 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) | 5356 (DRIVER_RELEASE << 16) | DRIVER_REVISION; 5357 5358 if (copy_to_user(arg, &version, sizeof(version))) 5359 return -EFAULT; 5360 5361 return 0; 5362 } 5363 5364 struct ciss_error_info { 5365 u8 scsi_status; 5366 int command_status; 5367 size_t sense_data_length; 5368 }; 5369 5370 static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info, 5371 struct ciss_error_info *ciss_error_info) 5372 { 5373 int ciss_cmd_status; 5374 size_t sense_data_length; 5375 5376 switch (pqi_error_info->data_out_result) { 5377 case PQI_DATA_IN_OUT_GOOD: 5378 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS; 5379 break; 5380 case PQI_DATA_IN_OUT_UNDERFLOW: 5381 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN; 5382 break; 5383 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 5384 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN; 5385 break; 5386 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 5387 case PQI_DATA_IN_OUT_BUFFER_ERROR: 5388 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 5389 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 5390 case PQI_DATA_IN_OUT_ERROR: 5391 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR; 5392 break; 5393 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 5394 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 5395 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 5396 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 5397 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 5398 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 5399 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 5400 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 5401 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 5402 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 5403 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR; 5404 break; 5405 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 5406 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT; 5407 break; 5408 case PQI_DATA_IN_OUT_ABORTED: 5409 ciss_cmd_status = CISS_CMD_STATUS_ABORTED; 5410 break; 5411 case PQI_DATA_IN_OUT_TIMEOUT: 5412 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT; 5413 break; 5414 default: 5415 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS; 5416 break; 5417 } 5418 5419 sense_data_length = 5420 get_unaligned_le16(&pqi_error_info->sense_data_length); 5421 if (sense_data_length == 0) 5422 sense_data_length = 5423 get_unaligned_le16(&pqi_error_info->response_data_length); 5424 if (sense_data_length) 5425 if (sense_data_length > sizeof(pqi_error_info->data)) 5426 sense_data_length = sizeof(pqi_error_info->data); 5427 5428 ciss_error_info->scsi_status = pqi_error_info->status; 5429 ciss_error_info->command_status = ciss_cmd_status; 5430 ciss_error_info->sense_data_length = sense_data_length; 5431 } 5432 5433 static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 5434 { 5435 int rc; 5436 char *kernel_buffer = NULL; 5437 u16 iu_length; 5438 size_t sense_data_length; 5439 IOCTL_Command_struct iocommand; 5440 struct pqi_raid_path_request request; 5441 struct pqi_raid_error_info pqi_error_info; 5442 struct ciss_error_info ciss_error_info; 5443 5444 if (pqi_ctrl_offline(ctrl_info)) 5445 return -ENXIO; 5446 if (!arg) 5447 return -EINVAL; 5448 if (!capable(CAP_SYS_RAWIO)) 5449 return -EPERM; 5450 if (copy_from_user(&iocommand, arg, sizeof(iocommand))) 5451 return -EFAULT; 5452 if (iocommand.buf_size < 1 && 5453 iocommand.Request.Type.Direction != XFER_NONE) 5454 return -EINVAL; 5455 if (iocommand.Request.CDBLen > sizeof(request.cdb)) 5456 return -EINVAL; 5457 if (iocommand.Request.Type.Type != TYPE_CMD) 5458 return -EINVAL; 5459 5460 switch (iocommand.Request.Type.Direction) { 5461 case XFER_NONE: 5462 case XFER_WRITE: 5463 case XFER_READ: 5464 case XFER_READ | XFER_WRITE: 5465 break; 5466 default: 5467 return -EINVAL; 5468 } 5469 5470 if (iocommand.buf_size > 0) { 5471 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL); 5472 if (!kernel_buffer) 5473 return -ENOMEM; 5474 if (iocommand.Request.Type.Direction & XFER_WRITE) { 5475 if (copy_from_user(kernel_buffer, iocommand.buf, 5476 iocommand.buf_size)) { 5477 rc = -EFAULT; 5478 goto out; 5479 } 5480 } else { 5481 memset(kernel_buffer, 0, iocommand.buf_size); 5482 } 5483 } 5484 5485 memset(&request, 0, sizeof(request)); 5486 5487 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 5488 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 5489 PQI_REQUEST_HEADER_LENGTH; 5490 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes, 5491 sizeof(request.lun_number)); 5492 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen); 5493 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 5494 5495 switch (iocommand.Request.Type.Direction) { 5496 case XFER_NONE: 5497 request.data_direction = SOP_NO_DIRECTION_FLAG; 5498 break; 5499 case XFER_WRITE: 5500 request.data_direction = SOP_WRITE_FLAG; 5501 break; 5502 case XFER_READ: 5503 request.data_direction = SOP_READ_FLAG; 5504 break; 5505 case XFER_READ | XFER_WRITE: 5506 request.data_direction = SOP_BIDIRECTIONAL; 5507 break; 5508 } 5509 5510 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5511 5512 if (iocommand.buf_size > 0) { 5513 put_unaligned_le32(iocommand.buf_size, &request.buffer_length); 5514 5515 rc = pqi_map_single(ctrl_info->pci_dev, 5516 &request.sg_descriptors[0], kernel_buffer, 5517 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 5518 if (rc) 5519 goto out; 5520 5521 iu_length += sizeof(request.sg_descriptors[0]); 5522 } 5523 5524 put_unaligned_le16(iu_length, &request.header.iu_length); 5525 5526 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 5527 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info, NO_TIMEOUT); 5528 5529 if (iocommand.buf_size > 0) 5530 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 5531 PCI_DMA_BIDIRECTIONAL); 5532 5533 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info)); 5534 5535 if (rc == 0) { 5536 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info); 5537 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status; 5538 iocommand.error_info.CommandStatus = 5539 ciss_error_info.command_status; 5540 sense_data_length = ciss_error_info.sense_data_length; 5541 if (sense_data_length) { 5542 if (sense_data_length > 5543 sizeof(iocommand.error_info.SenseInfo)) 5544 sense_data_length = 5545 sizeof(iocommand.error_info.SenseInfo); 5546 memcpy(iocommand.error_info.SenseInfo, 5547 pqi_error_info.data, sense_data_length); 5548 iocommand.error_info.SenseLen = sense_data_length; 5549 } 5550 } 5551 5552 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) { 5553 rc = -EFAULT; 5554 goto out; 5555 } 5556 5557 if (rc == 0 && iocommand.buf_size > 0 && 5558 (iocommand.Request.Type.Direction & XFER_READ)) { 5559 if (copy_to_user(iocommand.buf, kernel_buffer, 5560 iocommand.buf_size)) { 5561 rc = -EFAULT; 5562 } 5563 } 5564 5565 out: 5566 kfree(kernel_buffer); 5567 5568 return rc; 5569 } 5570 5571 static int pqi_ioctl(struct scsi_device *sdev, int cmd, void __user *arg) 5572 { 5573 int rc; 5574 struct pqi_ctrl_info *ctrl_info; 5575 5576 ctrl_info = shost_to_hba(sdev->host); 5577 5578 switch (cmd) { 5579 case CCISS_DEREGDISK: 5580 case CCISS_REGNEWDISK: 5581 case CCISS_REGNEWD: 5582 rc = pqi_scan_scsi_devices(ctrl_info); 5583 break; 5584 case CCISS_GETPCIINFO: 5585 rc = pqi_getpciinfo_ioctl(ctrl_info, arg); 5586 break; 5587 case CCISS_GETDRIVVER: 5588 rc = pqi_getdrivver_ioctl(arg); 5589 break; 5590 case CCISS_PASSTHRU: 5591 rc = pqi_passthru_ioctl(ctrl_info, arg); 5592 break; 5593 default: 5594 rc = -EINVAL; 5595 break; 5596 } 5597 5598 return rc; 5599 } 5600 5601 static ssize_t pqi_version_show(struct device *dev, 5602 struct device_attribute *attr, char *buffer) 5603 { 5604 ssize_t count = 0; 5605 struct Scsi_Host *shost; 5606 struct pqi_ctrl_info *ctrl_info; 5607 5608 shost = class_to_shost(dev); 5609 ctrl_info = shost_to_hba(shost); 5610 5611 count += snprintf(buffer + count, PAGE_SIZE - count, 5612 " driver: %s\n", DRIVER_VERSION BUILD_TIMESTAMP); 5613 5614 count += snprintf(buffer + count, PAGE_SIZE - count, 5615 "firmware: %s\n", ctrl_info->firmware_version); 5616 5617 return count; 5618 } 5619 5620 static ssize_t pqi_host_rescan_store(struct device *dev, 5621 struct device_attribute *attr, const char *buffer, size_t count) 5622 { 5623 struct Scsi_Host *shost = class_to_shost(dev); 5624 5625 pqi_scan_start(shost); 5626 5627 return count; 5628 } 5629 5630 static ssize_t pqi_lockup_action_show(struct device *dev, 5631 struct device_attribute *attr, char *buffer) 5632 { 5633 int count = 0; 5634 unsigned int i; 5635 5636 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 5637 if (pqi_lockup_actions[i].action == pqi_lockup_action) 5638 count += snprintf(buffer + count, PAGE_SIZE - count, 5639 "[%s] ", pqi_lockup_actions[i].name); 5640 else 5641 count += snprintf(buffer + count, PAGE_SIZE - count, 5642 "%s ", pqi_lockup_actions[i].name); 5643 } 5644 5645 count += snprintf(buffer + count, PAGE_SIZE - count, "\n"); 5646 5647 return count; 5648 } 5649 5650 static ssize_t pqi_lockup_action_store(struct device *dev, 5651 struct device_attribute *attr, const char *buffer, size_t count) 5652 { 5653 unsigned int i; 5654 char *action_name; 5655 char action_name_buffer[32]; 5656 5657 strlcpy(action_name_buffer, buffer, sizeof(action_name_buffer)); 5658 action_name = strstrip(action_name_buffer); 5659 5660 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 5661 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) { 5662 pqi_lockup_action = pqi_lockup_actions[i].action; 5663 return count; 5664 } 5665 } 5666 5667 return -EINVAL; 5668 } 5669 5670 static DEVICE_ATTR(version, 0444, pqi_version_show, NULL); 5671 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store); 5672 static DEVICE_ATTR(lockup_action, 0644, 5673 pqi_lockup_action_show, pqi_lockup_action_store); 5674 5675 static struct device_attribute *pqi_shost_attrs[] = { 5676 &dev_attr_version, 5677 &dev_attr_rescan, 5678 &dev_attr_lockup_action, 5679 NULL 5680 }; 5681 5682 static ssize_t pqi_sas_address_show(struct device *dev, 5683 struct device_attribute *attr, char *buffer) 5684 { 5685 struct pqi_ctrl_info *ctrl_info; 5686 struct scsi_device *sdev; 5687 struct pqi_scsi_dev *device; 5688 unsigned long flags; 5689 u64 sas_address; 5690 5691 sdev = to_scsi_device(dev); 5692 ctrl_info = shost_to_hba(sdev->host); 5693 5694 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 5695 5696 device = sdev->hostdata; 5697 if (pqi_is_logical_device(device)) { 5698 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, 5699 flags); 5700 return -ENODEV; 5701 } 5702 sas_address = device->sas_address; 5703 5704 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 5705 5706 return snprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address); 5707 } 5708 5709 static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev, 5710 struct device_attribute *attr, char *buffer) 5711 { 5712 struct pqi_ctrl_info *ctrl_info; 5713 struct scsi_device *sdev; 5714 struct pqi_scsi_dev *device; 5715 unsigned long flags; 5716 5717 sdev = to_scsi_device(dev); 5718 ctrl_info = shost_to_hba(sdev->host); 5719 5720 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 5721 5722 device = sdev->hostdata; 5723 buffer[0] = device->raid_bypass_enabled ? '1' : '0'; 5724 buffer[1] = '\n'; 5725 buffer[2] = '\0'; 5726 5727 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 5728 5729 return 2; 5730 } 5731 5732 static ssize_t pqi_raid_level_show(struct device *dev, 5733 struct device_attribute *attr, char *buffer) 5734 { 5735 struct pqi_ctrl_info *ctrl_info; 5736 struct scsi_device *sdev; 5737 struct pqi_scsi_dev *device; 5738 unsigned long flags; 5739 char *raid_level; 5740 5741 sdev = to_scsi_device(dev); 5742 ctrl_info = shost_to_hba(sdev->host); 5743 5744 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 5745 5746 device = sdev->hostdata; 5747 5748 if (pqi_is_logical_device(device)) 5749 raid_level = pqi_raid_level_to_string(device->raid_level); 5750 else 5751 raid_level = "N/A"; 5752 5753 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 5754 5755 return snprintf(buffer, PAGE_SIZE, "%s\n", raid_level); 5756 } 5757 5758 static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL); 5759 static DEVICE_ATTR(ssd_smart_path_enabled, 0444, 5760 pqi_ssd_smart_path_enabled_show, NULL); 5761 static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL); 5762 5763 static struct device_attribute *pqi_sdev_attrs[] = { 5764 &dev_attr_sas_address, 5765 &dev_attr_ssd_smart_path_enabled, 5766 &dev_attr_raid_level, 5767 NULL 5768 }; 5769 5770 static struct scsi_host_template pqi_driver_template = { 5771 .module = THIS_MODULE, 5772 .name = DRIVER_NAME_SHORT, 5773 .proc_name = DRIVER_NAME_SHORT, 5774 .queuecommand = pqi_scsi_queue_command, 5775 .scan_start = pqi_scan_start, 5776 .scan_finished = pqi_scan_finished, 5777 .this_id = -1, 5778 .use_clustering = ENABLE_CLUSTERING, 5779 .eh_device_reset_handler = pqi_eh_device_reset_handler, 5780 .ioctl = pqi_ioctl, 5781 .slave_alloc = pqi_slave_alloc, 5782 .map_queues = pqi_map_queues, 5783 .sdev_attrs = pqi_sdev_attrs, 5784 .shost_attrs = pqi_shost_attrs, 5785 }; 5786 5787 static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info) 5788 { 5789 int rc; 5790 struct Scsi_Host *shost; 5791 5792 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info)); 5793 if (!shost) { 5794 dev_err(&ctrl_info->pci_dev->dev, 5795 "scsi_host_alloc failed for controller %u\n", 5796 ctrl_info->ctrl_id); 5797 return -ENOMEM; 5798 } 5799 5800 shost->io_port = 0; 5801 shost->n_io_port = 0; 5802 shost->this_id = -1; 5803 shost->max_channel = PQI_MAX_BUS; 5804 shost->max_cmd_len = MAX_COMMAND_SIZE; 5805 shost->max_lun = ~0; 5806 shost->max_id = ~0; 5807 shost->max_sectors = ctrl_info->max_sectors; 5808 shost->can_queue = ctrl_info->scsi_ml_can_queue; 5809 shost->cmd_per_lun = shost->can_queue; 5810 shost->sg_tablesize = ctrl_info->sg_tablesize; 5811 shost->transportt = pqi_sas_transport_template; 5812 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0); 5813 shost->unique_id = shost->irq; 5814 shost->nr_hw_queues = ctrl_info->num_queue_groups; 5815 shost->hostdata[0] = (unsigned long)ctrl_info; 5816 5817 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev); 5818 if (rc) { 5819 dev_err(&ctrl_info->pci_dev->dev, 5820 "scsi_add_host failed for controller %u\n", 5821 ctrl_info->ctrl_id); 5822 goto free_host; 5823 } 5824 5825 rc = pqi_add_sas_host(shost, ctrl_info); 5826 if (rc) { 5827 dev_err(&ctrl_info->pci_dev->dev, 5828 "add SAS host failed for controller %u\n", 5829 ctrl_info->ctrl_id); 5830 goto remove_host; 5831 } 5832 5833 ctrl_info->scsi_host = shost; 5834 5835 return 0; 5836 5837 remove_host: 5838 scsi_remove_host(shost); 5839 free_host: 5840 scsi_host_put(shost); 5841 5842 return rc; 5843 } 5844 5845 static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info) 5846 { 5847 struct Scsi_Host *shost; 5848 5849 pqi_delete_sas_host(ctrl_info); 5850 5851 shost = ctrl_info->scsi_host; 5852 if (!shost) 5853 return; 5854 5855 scsi_remove_host(shost); 5856 scsi_host_put(shost); 5857 } 5858 5859 static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info) 5860 { 5861 int rc = 0; 5862 struct pqi_device_registers __iomem *pqi_registers; 5863 unsigned long timeout; 5864 unsigned int timeout_msecs; 5865 union pqi_reset_register reset_reg; 5866 5867 pqi_registers = ctrl_info->pqi_registers; 5868 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100; 5869 timeout = msecs_to_jiffies(timeout_msecs) + jiffies; 5870 5871 while (1) { 5872 msleep(PQI_RESET_POLL_INTERVAL_MSECS); 5873 reset_reg.all_bits = readl(&pqi_registers->device_reset); 5874 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED) 5875 break; 5876 pqi_check_ctrl_health(ctrl_info); 5877 if (pqi_ctrl_offline(ctrl_info)) { 5878 rc = -ENXIO; 5879 break; 5880 } 5881 if (time_after(jiffies, timeout)) { 5882 rc = -ETIMEDOUT; 5883 break; 5884 } 5885 } 5886 5887 return rc; 5888 } 5889 5890 static int pqi_reset(struct pqi_ctrl_info *ctrl_info) 5891 { 5892 int rc; 5893 union pqi_reset_register reset_reg; 5894 5895 if (ctrl_info->pqi_reset_quiesce_supported) { 5896 rc = sis_pqi_reset_quiesce(ctrl_info); 5897 if (rc) { 5898 dev_err(&ctrl_info->pci_dev->dev, 5899 "PQI reset failed during quiesce with error %d\n", 5900 rc); 5901 return rc; 5902 } 5903 } 5904 5905 reset_reg.all_bits = 0; 5906 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET; 5907 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET; 5908 5909 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset); 5910 5911 rc = pqi_wait_for_pqi_reset_completion(ctrl_info); 5912 if (rc) 5913 dev_err(&ctrl_info->pci_dev->dev, 5914 "PQI reset failed with error %d\n", rc); 5915 5916 return rc; 5917 } 5918 5919 static int pqi_get_ctrl_firmware_version(struct pqi_ctrl_info *ctrl_info) 5920 { 5921 int rc; 5922 struct bmic_identify_controller *identify; 5923 5924 identify = kmalloc(sizeof(*identify), GFP_KERNEL); 5925 if (!identify) 5926 return -ENOMEM; 5927 5928 rc = pqi_identify_controller(ctrl_info, identify); 5929 if (rc) 5930 goto out; 5931 5932 memcpy(ctrl_info->firmware_version, identify->firmware_version, 5933 sizeof(identify->firmware_version)); 5934 ctrl_info->firmware_version[sizeof(identify->firmware_version)] = '\0'; 5935 snprintf(ctrl_info->firmware_version + 5936 strlen(ctrl_info->firmware_version), 5937 sizeof(ctrl_info->firmware_version), 5938 "-%u", get_unaligned_le16(&identify->firmware_build_number)); 5939 5940 out: 5941 kfree(identify); 5942 5943 return rc; 5944 } 5945 5946 static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info) 5947 { 5948 u32 table_length; 5949 u32 section_offset; 5950 void __iomem *table_iomem_addr; 5951 struct pqi_config_table *config_table; 5952 struct pqi_config_table_section_header *section; 5953 5954 table_length = ctrl_info->config_table_length; 5955 5956 config_table = kmalloc(table_length, GFP_KERNEL); 5957 if (!config_table) { 5958 dev_err(&ctrl_info->pci_dev->dev, 5959 "failed to allocate memory for PQI configuration table\n"); 5960 return -ENOMEM; 5961 } 5962 5963 /* 5964 * Copy the config table contents from I/O memory space into the 5965 * temporary buffer. 5966 */ 5967 table_iomem_addr = ctrl_info->iomem_base + 5968 ctrl_info->config_table_offset; 5969 memcpy_fromio(config_table, table_iomem_addr, table_length); 5970 5971 section_offset = 5972 get_unaligned_le32(&config_table->first_section_offset); 5973 5974 while (section_offset) { 5975 section = (void *)config_table + section_offset; 5976 5977 switch (get_unaligned_le16(§ion->section_id)) { 5978 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT: 5979 if (pqi_disable_heartbeat) 5980 dev_warn(&ctrl_info->pci_dev->dev, 5981 "heartbeat disabled by module parameter\n"); 5982 else 5983 ctrl_info->heartbeat_counter = 5984 table_iomem_addr + 5985 section_offset + 5986 offsetof( 5987 struct pqi_config_table_heartbeat, 5988 heartbeat_counter); 5989 break; 5990 } 5991 5992 section_offset = 5993 get_unaligned_le16(§ion->next_section_offset); 5994 } 5995 5996 kfree(config_table); 5997 5998 return 0; 5999 } 6000 6001 /* Switches the controller from PQI mode back into SIS mode. */ 6002 6003 static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info) 6004 { 6005 int rc; 6006 6007 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE); 6008 rc = pqi_reset(ctrl_info); 6009 if (rc) 6010 return rc; 6011 rc = sis_reenable_sis_mode(ctrl_info); 6012 if (rc) { 6013 dev_err(&ctrl_info->pci_dev->dev, 6014 "re-enabling SIS mode failed with error %d\n", rc); 6015 return rc; 6016 } 6017 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 6018 6019 return 0; 6020 } 6021 6022 /* 6023 * If the controller isn't already in SIS mode, this function forces it into 6024 * SIS mode. 6025 */ 6026 6027 static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info) 6028 { 6029 if (!sis_is_firmware_running(ctrl_info)) 6030 return -ENXIO; 6031 6032 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE) 6033 return 0; 6034 6035 if (sis_is_kernel_up(ctrl_info)) { 6036 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 6037 return 0; 6038 } 6039 6040 return pqi_revert_to_sis_mode(ctrl_info); 6041 } 6042 6043 static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info) 6044 { 6045 int rc; 6046 6047 rc = pqi_force_sis_mode(ctrl_info); 6048 if (rc) 6049 return rc; 6050 6051 /* 6052 * Wait until the controller is ready to start accepting SIS 6053 * commands. 6054 */ 6055 rc = sis_wait_for_ctrl_ready(ctrl_info); 6056 if (rc) 6057 return rc; 6058 6059 /* 6060 * Get the controller properties. This allows us to determine 6061 * whether or not it supports PQI mode. 6062 */ 6063 rc = sis_get_ctrl_properties(ctrl_info); 6064 if (rc) { 6065 dev_err(&ctrl_info->pci_dev->dev, 6066 "error obtaining controller properties\n"); 6067 return rc; 6068 } 6069 6070 rc = sis_get_pqi_capabilities(ctrl_info); 6071 if (rc) { 6072 dev_err(&ctrl_info->pci_dev->dev, 6073 "error obtaining controller capabilities\n"); 6074 return rc; 6075 } 6076 6077 if (reset_devices) { 6078 if (ctrl_info->max_outstanding_requests > 6079 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP) 6080 ctrl_info->max_outstanding_requests = 6081 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP; 6082 } else { 6083 if (ctrl_info->max_outstanding_requests > 6084 PQI_MAX_OUTSTANDING_REQUESTS) 6085 ctrl_info->max_outstanding_requests = 6086 PQI_MAX_OUTSTANDING_REQUESTS; 6087 } 6088 6089 pqi_calculate_io_resources(ctrl_info); 6090 6091 rc = pqi_alloc_error_buffer(ctrl_info); 6092 if (rc) { 6093 dev_err(&ctrl_info->pci_dev->dev, 6094 "failed to allocate PQI error buffer\n"); 6095 return rc; 6096 } 6097 6098 /* 6099 * If the function we are about to call succeeds, the 6100 * controller will transition from legacy SIS mode 6101 * into PQI mode. 6102 */ 6103 rc = sis_init_base_struct_addr(ctrl_info); 6104 if (rc) { 6105 dev_err(&ctrl_info->pci_dev->dev, 6106 "error initializing PQI mode\n"); 6107 return rc; 6108 } 6109 6110 /* Wait for the controller to complete the SIS -> PQI transition. */ 6111 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 6112 if (rc) { 6113 dev_err(&ctrl_info->pci_dev->dev, 6114 "transition to PQI mode failed\n"); 6115 return rc; 6116 } 6117 6118 /* From here on, we are running in PQI mode. */ 6119 ctrl_info->pqi_mode_enabled = true; 6120 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 6121 6122 rc = pqi_process_config_table(ctrl_info); 6123 if (rc) 6124 return rc; 6125 6126 rc = pqi_alloc_admin_queues(ctrl_info); 6127 if (rc) { 6128 dev_err(&ctrl_info->pci_dev->dev, 6129 "failed to allocate admin queues\n"); 6130 return rc; 6131 } 6132 6133 rc = pqi_create_admin_queues(ctrl_info); 6134 if (rc) { 6135 dev_err(&ctrl_info->pci_dev->dev, 6136 "error creating admin queues\n"); 6137 return rc; 6138 } 6139 6140 rc = pqi_report_device_capability(ctrl_info); 6141 if (rc) { 6142 dev_err(&ctrl_info->pci_dev->dev, 6143 "obtaining device capability failed\n"); 6144 return rc; 6145 } 6146 6147 rc = pqi_validate_device_capability(ctrl_info); 6148 if (rc) 6149 return rc; 6150 6151 pqi_calculate_queue_resources(ctrl_info); 6152 6153 rc = pqi_enable_msix_interrupts(ctrl_info); 6154 if (rc) 6155 return rc; 6156 6157 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) { 6158 ctrl_info->max_msix_vectors = 6159 ctrl_info->num_msix_vectors_enabled; 6160 pqi_calculate_queue_resources(ctrl_info); 6161 } 6162 6163 rc = pqi_alloc_io_resources(ctrl_info); 6164 if (rc) 6165 return rc; 6166 6167 rc = pqi_alloc_operational_queues(ctrl_info); 6168 if (rc) { 6169 dev_err(&ctrl_info->pci_dev->dev, 6170 "failed to allocate operational queues\n"); 6171 return rc; 6172 } 6173 6174 pqi_init_operational_queues(ctrl_info); 6175 6176 rc = pqi_request_irqs(ctrl_info); 6177 if (rc) 6178 return rc; 6179 6180 rc = pqi_create_queues(ctrl_info); 6181 if (rc) 6182 return rc; 6183 6184 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 6185 6186 ctrl_info->controller_online = true; 6187 pqi_start_heartbeat_timer(ctrl_info); 6188 6189 rc = pqi_enable_events(ctrl_info); 6190 if (rc) { 6191 dev_err(&ctrl_info->pci_dev->dev, 6192 "error enabling events\n"); 6193 return rc; 6194 } 6195 6196 /* Register with the SCSI subsystem. */ 6197 rc = pqi_register_scsi(ctrl_info); 6198 if (rc) 6199 return rc; 6200 6201 rc = pqi_get_ctrl_firmware_version(ctrl_info); 6202 if (rc) { 6203 dev_err(&ctrl_info->pci_dev->dev, 6204 "error obtaining firmware version\n"); 6205 return rc; 6206 } 6207 6208 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 6209 if (rc) { 6210 dev_err(&ctrl_info->pci_dev->dev, 6211 "error updating host wellness\n"); 6212 return rc; 6213 } 6214 6215 pqi_schedule_update_time_worker(ctrl_info); 6216 6217 pqi_scan_scsi_devices(ctrl_info); 6218 6219 return 0; 6220 } 6221 6222 static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info) 6223 { 6224 unsigned int i; 6225 struct pqi_admin_queues *admin_queues; 6226 struct pqi_event_queue *event_queue; 6227 6228 admin_queues = &ctrl_info->admin_queues; 6229 admin_queues->iq_pi_copy = 0; 6230 admin_queues->oq_ci_copy = 0; 6231 *admin_queues->oq_pi = 0; 6232 6233 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6234 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0; 6235 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0; 6236 ctrl_info->queue_groups[i].oq_ci_copy = 0; 6237 6238 *ctrl_info->queue_groups[i].iq_ci[RAID_PATH] = 0; 6239 *ctrl_info->queue_groups[i].iq_ci[AIO_PATH] = 0; 6240 *ctrl_info->queue_groups[i].oq_pi = 0; 6241 } 6242 6243 event_queue = &ctrl_info->event_queue; 6244 *event_queue->oq_pi = 0; 6245 event_queue->oq_ci_copy = 0; 6246 } 6247 6248 static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info) 6249 { 6250 int rc; 6251 6252 rc = pqi_force_sis_mode(ctrl_info); 6253 if (rc) 6254 return rc; 6255 6256 /* 6257 * Wait until the controller is ready to start accepting SIS 6258 * commands. 6259 */ 6260 rc = sis_wait_for_ctrl_ready_resume(ctrl_info); 6261 if (rc) 6262 return rc; 6263 6264 /* 6265 * If the function we are about to call succeeds, the 6266 * controller will transition from legacy SIS mode 6267 * into PQI mode. 6268 */ 6269 rc = sis_init_base_struct_addr(ctrl_info); 6270 if (rc) { 6271 dev_err(&ctrl_info->pci_dev->dev, 6272 "error initializing PQI mode\n"); 6273 return rc; 6274 } 6275 6276 /* Wait for the controller to complete the SIS -> PQI transition. */ 6277 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 6278 if (rc) { 6279 dev_err(&ctrl_info->pci_dev->dev, 6280 "transition to PQI mode failed\n"); 6281 return rc; 6282 } 6283 6284 /* From here on, we are running in PQI mode. */ 6285 ctrl_info->pqi_mode_enabled = true; 6286 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 6287 6288 pqi_reinit_queues(ctrl_info); 6289 6290 rc = pqi_create_admin_queues(ctrl_info); 6291 if (rc) { 6292 dev_err(&ctrl_info->pci_dev->dev, 6293 "error creating admin queues\n"); 6294 return rc; 6295 } 6296 6297 rc = pqi_create_queues(ctrl_info); 6298 if (rc) 6299 return rc; 6300 6301 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 6302 6303 ctrl_info->controller_online = true; 6304 pqi_start_heartbeat_timer(ctrl_info); 6305 pqi_ctrl_unblock_requests(ctrl_info); 6306 6307 rc = pqi_enable_events(ctrl_info); 6308 if (rc) { 6309 dev_err(&ctrl_info->pci_dev->dev, 6310 "error enabling events\n"); 6311 return rc; 6312 } 6313 6314 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 6315 if (rc) { 6316 dev_err(&ctrl_info->pci_dev->dev, 6317 "error updating host wellness\n"); 6318 return rc; 6319 } 6320 6321 pqi_schedule_update_time_worker(ctrl_info); 6322 6323 pqi_scan_scsi_devices(ctrl_info); 6324 6325 return 0; 6326 } 6327 6328 static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev, 6329 u16 timeout) 6330 { 6331 return pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2, 6332 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout); 6333 } 6334 6335 static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info) 6336 { 6337 int rc; 6338 u64 mask; 6339 6340 rc = pci_enable_device(ctrl_info->pci_dev); 6341 if (rc) { 6342 dev_err(&ctrl_info->pci_dev->dev, 6343 "failed to enable PCI device\n"); 6344 return rc; 6345 } 6346 6347 if (sizeof(dma_addr_t) > 4) 6348 mask = DMA_BIT_MASK(64); 6349 else 6350 mask = DMA_BIT_MASK(32); 6351 6352 rc = dma_set_mask(&ctrl_info->pci_dev->dev, mask); 6353 if (rc) { 6354 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n"); 6355 goto disable_device; 6356 } 6357 6358 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT); 6359 if (rc) { 6360 dev_err(&ctrl_info->pci_dev->dev, 6361 "failed to obtain PCI resources\n"); 6362 goto disable_device; 6363 } 6364 6365 ctrl_info->iomem_base = ioremap_nocache(pci_resource_start( 6366 ctrl_info->pci_dev, 0), 6367 sizeof(struct pqi_ctrl_registers)); 6368 if (!ctrl_info->iomem_base) { 6369 dev_err(&ctrl_info->pci_dev->dev, 6370 "failed to map memory for controller registers\n"); 6371 rc = -ENOMEM; 6372 goto release_regions; 6373 } 6374 6375 #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6 6376 6377 /* Increase the PCIe completion timeout. */ 6378 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev, 6379 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS); 6380 if (rc) { 6381 dev_err(&ctrl_info->pci_dev->dev, 6382 "failed to set PCIe completion timeout\n"); 6383 goto release_regions; 6384 } 6385 6386 /* Enable bus mastering. */ 6387 pci_set_master(ctrl_info->pci_dev); 6388 6389 ctrl_info->registers = ctrl_info->iomem_base; 6390 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers; 6391 6392 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info); 6393 6394 return 0; 6395 6396 release_regions: 6397 pci_release_regions(ctrl_info->pci_dev); 6398 disable_device: 6399 pci_disable_device(ctrl_info->pci_dev); 6400 6401 return rc; 6402 } 6403 6404 static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info) 6405 { 6406 iounmap(ctrl_info->iomem_base); 6407 pci_release_regions(ctrl_info->pci_dev); 6408 if (pci_is_enabled(ctrl_info->pci_dev)) 6409 pci_disable_device(ctrl_info->pci_dev); 6410 pci_set_drvdata(ctrl_info->pci_dev, NULL); 6411 } 6412 6413 static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node) 6414 { 6415 struct pqi_ctrl_info *ctrl_info; 6416 6417 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info), 6418 GFP_KERNEL, numa_node); 6419 if (!ctrl_info) 6420 return NULL; 6421 6422 mutex_init(&ctrl_info->scan_mutex); 6423 mutex_init(&ctrl_info->lun_reset_mutex); 6424 6425 INIT_LIST_HEAD(&ctrl_info->scsi_device_list); 6426 spin_lock_init(&ctrl_info->scsi_device_list_lock); 6427 6428 INIT_WORK(&ctrl_info->event_work, pqi_event_worker); 6429 atomic_set(&ctrl_info->num_interrupts, 0); 6430 6431 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker); 6432 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker); 6433 6434 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0); 6435 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker); 6436 6437 sema_init(&ctrl_info->sync_request_sem, 6438 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS); 6439 init_waitqueue_head(&ctrl_info->block_requests_wait); 6440 6441 INIT_LIST_HEAD(&ctrl_info->raid_bypass_retry_list); 6442 spin_lock_init(&ctrl_info->raid_bypass_retry_list_lock); 6443 INIT_WORK(&ctrl_info->raid_bypass_retry_work, 6444 pqi_raid_bypass_retry_worker); 6445 6446 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1; 6447 ctrl_info->irq_mode = IRQ_MODE_NONE; 6448 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS; 6449 6450 return ctrl_info; 6451 } 6452 6453 static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info) 6454 { 6455 kfree(ctrl_info); 6456 } 6457 6458 static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info) 6459 { 6460 pqi_free_irqs(ctrl_info); 6461 pqi_disable_msix_interrupts(ctrl_info); 6462 } 6463 6464 static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info) 6465 { 6466 pqi_stop_heartbeat_timer(ctrl_info); 6467 pqi_free_interrupts(ctrl_info); 6468 if (ctrl_info->queue_memory_base) 6469 dma_free_coherent(&ctrl_info->pci_dev->dev, 6470 ctrl_info->queue_memory_length, 6471 ctrl_info->queue_memory_base, 6472 ctrl_info->queue_memory_base_dma_handle); 6473 if (ctrl_info->admin_queue_memory_base) 6474 dma_free_coherent(&ctrl_info->pci_dev->dev, 6475 ctrl_info->admin_queue_memory_length, 6476 ctrl_info->admin_queue_memory_base, 6477 ctrl_info->admin_queue_memory_base_dma_handle); 6478 pqi_free_all_io_requests(ctrl_info); 6479 if (ctrl_info->error_buffer) 6480 dma_free_coherent(&ctrl_info->pci_dev->dev, 6481 ctrl_info->error_buffer_length, 6482 ctrl_info->error_buffer, 6483 ctrl_info->error_buffer_dma_handle); 6484 if (ctrl_info->iomem_base) 6485 pqi_cleanup_pci_init(ctrl_info); 6486 pqi_free_ctrl_info(ctrl_info); 6487 } 6488 6489 static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info) 6490 { 6491 pqi_cancel_rescan_worker(ctrl_info); 6492 pqi_cancel_update_time_worker(ctrl_info); 6493 pqi_remove_all_scsi_devices(ctrl_info); 6494 pqi_unregister_scsi(ctrl_info); 6495 if (ctrl_info->pqi_mode_enabled) 6496 pqi_revert_to_sis_mode(ctrl_info); 6497 pqi_free_ctrl_resources(ctrl_info); 6498 } 6499 6500 static void pqi_perform_lockup_action(void) 6501 { 6502 switch (pqi_lockup_action) { 6503 case PANIC: 6504 panic("FATAL: Smart Family Controller lockup detected"); 6505 break; 6506 case REBOOT: 6507 emergency_restart(); 6508 break; 6509 case NONE: 6510 default: 6511 break; 6512 } 6513 } 6514 6515 static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = { 6516 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR, 6517 .status = SAM_STAT_CHECK_CONDITION, 6518 }; 6519 6520 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info) 6521 { 6522 unsigned int i; 6523 struct pqi_io_request *io_request; 6524 struct scsi_cmnd *scmd; 6525 6526 for (i = 0; i < ctrl_info->max_io_slots; i++) { 6527 io_request = &ctrl_info->io_request_pool[i]; 6528 if (atomic_read(&io_request->refcount) == 0) 6529 continue; 6530 6531 scmd = io_request->scmd; 6532 if (scmd) { 6533 set_host_byte(scmd, DID_NO_CONNECT); 6534 } else { 6535 io_request->status = -ENXIO; 6536 io_request->error_info = 6537 &pqi_ctrl_offline_raid_error_info; 6538 } 6539 6540 io_request->io_complete_callback(io_request, 6541 io_request->context); 6542 } 6543 } 6544 6545 static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info) 6546 { 6547 pqi_perform_lockup_action(); 6548 pqi_stop_heartbeat_timer(ctrl_info); 6549 pqi_free_interrupts(ctrl_info); 6550 pqi_cancel_rescan_worker(ctrl_info); 6551 pqi_cancel_update_time_worker(ctrl_info); 6552 pqi_ctrl_wait_until_quiesced(ctrl_info); 6553 pqi_fail_all_outstanding_requests(ctrl_info); 6554 pqi_clear_all_queued_raid_bypass_retries(ctrl_info); 6555 pqi_ctrl_unblock_requests(ctrl_info); 6556 } 6557 6558 static void pqi_ctrl_offline_worker(struct work_struct *work) 6559 { 6560 struct pqi_ctrl_info *ctrl_info; 6561 6562 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work); 6563 pqi_take_ctrl_offline_deferred(ctrl_info); 6564 } 6565 6566 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info) 6567 { 6568 if (!ctrl_info->controller_online) 6569 return; 6570 6571 ctrl_info->controller_online = false; 6572 ctrl_info->pqi_mode_enabled = false; 6573 pqi_ctrl_block_requests(ctrl_info); 6574 if (!pqi_disable_ctrl_shutdown) 6575 sis_shutdown_ctrl(ctrl_info); 6576 pci_disable_device(ctrl_info->pci_dev); 6577 dev_err(&ctrl_info->pci_dev->dev, "controller offline\n"); 6578 schedule_work(&ctrl_info->ctrl_offline_work); 6579 } 6580 6581 static void pqi_print_ctrl_info(struct pci_dev *pci_dev, 6582 const struct pci_device_id *id) 6583 { 6584 char *ctrl_description; 6585 6586 if (id->driver_data) 6587 ctrl_description = (char *)id->driver_data; 6588 else 6589 ctrl_description = "Microsemi Smart Family Controller"; 6590 6591 dev_info(&pci_dev->dev, "%s found\n", ctrl_description); 6592 } 6593 6594 static int pqi_pci_probe(struct pci_dev *pci_dev, 6595 const struct pci_device_id *id) 6596 { 6597 int rc; 6598 int node; 6599 struct pqi_ctrl_info *ctrl_info; 6600 6601 pqi_print_ctrl_info(pci_dev, id); 6602 6603 if (pqi_disable_device_id_wildcards && 6604 id->subvendor == PCI_ANY_ID && 6605 id->subdevice == PCI_ANY_ID) { 6606 dev_warn(&pci_dev->dev, 6607 "controller not probed because device ID wildcards are disabled\n"); 6608 return -ENODEV; 6609 } 6610 6611 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID) 6612 dev_warn(&pci_dev->dev, 6613 "controller device ID matched using wildcards\n"); 6614 6615 node = dev_to_node(&pci_dev->dev); 6616 if (node == NUMA_NO_NODE) 6617 set_dev_node(&pci_dev->dev, 0); 6618 6619 ctrl_info = pqi_alloc_ctrl_info(node); 6620 if (!ctrl_info) { 6621 dev_err(&pci_dev->dev, 6622 "failed to allocate controller info block\n"); 6623 return -ENOMEM; 6624 } 6625 6626 ctrl_info->pci_dev = pci_dev; 6627 6628 rc = pqi_pci_init(ctrl_info); 6629 if (rc) 6630 goto error; 6631 6632 rc = pqi_ctrl_init(ctrl_info); 6633 if (rc) 6634 goto error; 6635 6636 return 0; 6637 6638 error: 6639 pqi_remove_ctrl(ctrl_info); 6640 6641 return rc; 6642 } 6643 6644 static void pqi_pci_remove(struct pci_dev *pci_dev) 6645 { 6646 struct pqi_ctrl_info *ctrl_info; 6647 6648 ctrl_info = pci_get_drvdata(pci_dev); 6649 if (!ctrl_info) 6650 return; 6651 6652 pqi_remove_ctrl(ctrl_info); 6653 } 6654 6655 static void pqi_shutdown(struct pci_dev *pci_dev) 6656 { 6657 int rc; 6658 struct pqi_ctrl_info *ctrl_info; 6659 6660 ctrl_info = pci_get_drvdata(pci_dev); 6661 if (!ctrl_info) 6662 goto error; 6663 6664 /* 6665 * Write all data in the controller's battery-backed cache to 6666 * storage. 6667 */ 6668 rc = pqi_flush_cache(ctrl_info, SHUTDOWN); 6669 pqi_reset(ctrl_info); 6670 if (rc == 0) 6671 return; 6672 6673 error: 6674 dev_warn(&pci_dev->dev, 6675 "unable to flush controller cache\n"); 6676 } 6677 6678 static void pqi_process_lockup_action_param(void) 6679 { 6680 unsigned int i; 6681 6682 if (!pqi_lockup_action_param) 6683 return; 6684 6685 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 6686 if (strcmp(pqi_lockup_action_param, 6687 pqi_lockup_actions[i].name) == 0) { 6688 pqi_lockup_action = pqi_lockup_actions[i].action; 6689 return; 6690 } 6691 } 6692 6693 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n", 6694 DRIVER_NAME_SHORT, pqi_lockup_action_param); 6695 } 6696 6697 static void pqi_process_module_params(void) 6698 { 6699 pqi_process_lockup_action_param(); 6700 } 6701 6702 static __maybe_unused int pqi_suspend(struct pci_dev *pci_dev, pm_message_t state) 6703 { 6704 struct pqi_ctrl_info *ctrl_info; 6705 6706 ctrl_info = pci_get_drvdata(pci_dev); 6707 6708 pqi_disable_events(ctrl_info); 6709 pqi_cancel_update_time_worker(ctrl_info); 6710 pqi_cancel_rescan_worker(ctrl_info); 6711 pqi_wait_until_scan_finished(ctrl_info); 6712 pqi_wait_until_lun_reset_finished(ctrl_info); 6713 pqi_flush_cache(ctrl_info, SUSPEND); 6714 pqi_ctrl_block_requests(ctrl_info); 6715 pqi_ctrl_wait_until_quiesced(ctrl_info); 6716 pqi_wait_until_inbound_queues_empty(ctrl_info); 6717 pqi_ctrl_wait_for_pending_io(ctrl_info); 6718 pqi_stop_heartbeat_timer(ctrl_info); 6719 6720 if (state.event == PM_EVENT_FREEZE) 6721 return 0; 6722 6723 pci_save_state(pci_dev); 6724 pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state)); 6725 6726 ctrl_info->controller_online = false; 6727 ctrl_info->pqi_mode_enabled = false; 6728 6729 return 0; 6730 } 6731 6732 static __maybe_unused int pqi_resume(struct pci_dev *pci_dev) 6733 { 6734 int rc; 6735 struct pqi_ctrl_info *ctrl_info; 6736 6737 ctrl_info = pci_get_drvdata(pci_dev); 6738 6739 if (pci_dev->current_state != PCI_D0) { 6740 ctrl_info->max_hw_queue_index = 0; 6741 pqi_free_interrupts(ctrl_info); 6742 pqi_change_irq_mode(ctrl_info, IRQ_MODE_INTX); 6743 rc = request_irq(pci_irq_vector(pci_dev, 0), pqi_irq_handler, 6744 IRQF_SHARED, DRIVER_NAME_SHORT, 6745 &ctrl_info->queue_groups[0]); 6746 if (rc) { 6747 dev_err(&ctrl_info->pci_dev->dev, 6748 "irq %u init failed with error %d\n", 6749 pci_dev->irq, rc); 6750 return rc; 6751 } 6752 pqi_start_heartbeat_timer(ctrl_info); 6753 pqi_ctrl_unblock_requests(ctrl_info); 6754 return 0; 6755 } 6756 6757 pci_set_power_state(pci_dev, PCI_D0); 6758 pci_restore_state(pci_dev); 6759 6760 return pqi_ctrl_init_resume(ctrl_info); 6761 } 6762 6763 /* Define the PCI IDs for the controllers that we support. */ 6764 static const struct pci_device_id pqi_pci_id_table[] = { 6765 { 6766 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6767 0x105b, 0x1211) 6768 }, 6769 { 6770 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6771 0x105b, 0x1321) 6772 }, 6773 { 6774 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6775 0x152d, 0x8a22) 6776 }, 6777 { 6778 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6779 0x152d, 0x8a23) 6780 }, 6781 { 6782 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6783 0x152d, 0x8a24) 6784 }, 6785 { 6786 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6787 0x152d, 0x8a36) 6788 }, 6789 { 6790 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6791 0x152d, 0x8a37) 6792 }, 6793 { 6794 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6795 0x193d, 0x8460) 6796 }, 6797 { 6798 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6799 0x193d, 0x8461) 6800 }, 6801 { 6802 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6803 0x193d, 0xf460) 6804 }, 6805 { 6806 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6807 0x193d, 0xf461) 6808 }, 6809 { 6810 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6811 0x1bd4, 0x0045) 6812 }, 6813 { 6814 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6815 0x1bd4, 0x0046) 6816 }, 6817 { 6818 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6819 0x1bd4, 0x0047) 6820 }, 6821 { 6822 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6823 0x1bd4, 0x0048) 6824 }, 6825 { 6826 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6827 PCI_VENDOR_ID_ADAPTEC2, 0x0110) 6828 }, 6829 { 6830 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6831 PCI_VENDOR_ID_ADAPTEC2, 0x0608) 6832 }, 6833 { 6834 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6835 PCI_VENDOR_ID_ADAPTEC2, 0x0800) 6836 }, 6837 { 6838 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6839 PCI_VENDOR_ID_ADAPTEC2, 0x0801) 6840 }, 6841 { 6842 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6843 PCI_VENDOR_ID_ADAPTEC2, 0x0802) 6844 }, 6845 { 6846 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6847 PCI_VENDOR_ID_ADAPTEC2, 0x0803) 6848 }, 6849 { 6850 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6851 PCI_VENDOR_ID_ADAPTEC2, 0x0804) 6852 }, 6853 { 6854 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6855 PCI_VENDOR_ID_ADAPTEC2, 0x0805) 6856 }, 6857 { 6858 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6859 PCI_VENDOR_ID_ADAPTEC2, 0x0806) 6860 }, 6861 { 6862 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6863 PCI_VENDOR_ID_ADAPTEC2, 0x0807) 6864 }, 6865 { 6866 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6867 PCI_VENDOR_ID_ADAPTEC2, 0x0900) 6868 }, 6869 { 6870 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6871 PCI_VENDOR_ID_ADAPTEC2, 0x0901) 6872 }, 6873 { 6874 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6875 PCI_VENDOR_ID_ADAPTEC2, 0x0902) 6876 }, 6877 { 6878 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6879 PCI_VENDOR_ID_ADAPTEC2, 0x0903) 6880 }, 6881 { 6882 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6883 PCI_VENDOR_ID_ADAPTEC2, 0x0904) 6884 }, 6885 { 6886 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6887 PCI_VENDOR_ID_ADAPTEC2, 0x0905) 6888 }, 6889 { 6890 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6891 PCI_VENDOR_ID_ADAPTEC2, 0x0906) 6892 }, 6893 { 6894 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6895 PCI_VENDOR_ID_ADAPTEC2, 0x0907) 6896 }, 6897 { 6898 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6899 PCI_VENDOR_ID_ADAPTEC2, 0x0908) 6900 }, 6901 { 6902 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6903 PCI_VENDOR_ID_ADAPTEC2, 0x090a) 6904 }, 6905 { 6906 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6907 PCI_VENDOR_ID_ADAPTEC2, 0x1200) 6908 }, 6909 { 6910 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6911 PCI_VENDOR_ID_ADAPTEC2, 0x1201) 6912 }, 6913 { 6914 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6915 PCI_VENDOR_ID_ADAPTEC2, 0x1202) 6916 }, 6917 { 6918 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6919 PCI_VENDOR_ID_ADAPTEC2, 0x1280) 6920 }, 6921 { 6922 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6923 PCI_VENDOR_ID_ADAPTEC2, 0x1281) 6924 }, 6925 { 6926 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6927 PCI_VENDOR_ID_ADAPTEC2, 0x1282) 6928 }, 6929 { 6930 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6931 PCI_VENDOR_ID_ADAPTEC2, 0x1300) 6932 }, 6933 { 6934 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6935 PCI_VENDOR_ID_ADAPTEC2, 0x1301) 6936 }, 6937 { 6938 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6939 PCI_VENDOR_ID_ADAPTEC2, 0x1302) 6940 }, 6941 { 6942 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6943 PCI_VENDOR_ID_ADAPTEC2, 0x1303) 6944 }, 6945 { 6946 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6947 PCI_VENDOR_ID_ADAPTEC2, 0x1380) 6948 }, 6949 { 6950 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6951 PCI_VENDOR_ID_DELL, 0x1fe0) 6952 }, 6953 { 6954 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6955 PCI_VENDOR_ID_HP, 0x0600) 6956 }, 6957 { 6958 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6959 PCI_VENDOR_ID_HP, 0x0601) 6960 }, 6961 { 6962 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6963 PCI_VENDOR_ID_HP, 0x0602) 6964 }, 6965 { 6966 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6967 PCI_VENDOR_ID_HP, 0x0603) 6968 }, 6969 { 6970 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6971 PCI_VENDOR_ID_HP, 0x0609) 6972 }, 6973 { 6974 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6975 PCI_VENDOR_ID_HP, 0x0650) 6976 }, 6977 { 6978 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6979 PCI_VENDOR_ID_HP, 0x0651) 6980 }, 6981 { 6982 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6983 PCI_VENDOR_ID_HP, 0x0652) 6984 }, 6985 { 6986 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6987 PCI_VENDOR_ID_HP, 0x0653) 6988 }, 6989 { 6990 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6991 PCI_VENDOR_ID_HP, 0x0654) 6992 }, 6993 { 6994 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6995 PCI_VENDOR_ID_HP, 0x0655) 6996 }, 6997 { 6998 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 6999 PCI_VENDOR_ID_HP, 0x0700) 7000 }, 7001 { 7002 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7003 PCI_VENDOR_ID_HP, 0x0701) 7004 }, 7005 { 7006 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7007 PCI_VENDOR_ID_HP, 0x1001) 7008 }, 7009 { 7010 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7011 PCI_VENDOR_ID_HP, 0x1100) 7012 }, 7013 { 7014 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7015 PCI_VENDOR_ID_HP, 0x1101) 7016 }, 7017 { 7018 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 7019 PCI_ANY_ID, PCI_ANY_ID) 7020 }, 7021 { 0 } 7022 }; 7023 7024 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table); 7025 7026 static struct pci_driver pqi_pci_driver = { 7027 .name = DRIVER_NAME_SHORT, 7028 .id_table = pqi_pci_id_table, 7029 .probe = pqi_pci_probe, 7030 .remove = pqi_pci_remove, 7031 .shutdown = pqi_shutdown, 7032 #if defined(CONFIG_PM) 7033 .suspend = pqi_suspend, 7034 .resume = pqi_resume, 7035 #endif 7036 }; 7037 7038 static int __init pqi_init(void) 7039 { 7040 int rc; 7041 7042 pr_info(DRIVER_NAME "\n"); 7043 7044 pqi_sas_transport_template = 7045 sas_attach_transport(&pqi_sas_transport_functions); 7046 if (!pqi_sas_transport_template) 7047 return -ENODEV; 7048 7049 pqi_process_module_params(); 7050 7051 rc = pci_register_driver(&pqi_pci_driver); 7052 if (rc) 7053 sas_release_transport(pqi_sas_transport_template); 7054 7055 return rc; 7056 } 7057 7058 static void __exit pqi_cleanup(void) 7059 { 7060 pci_unregister_driver(&pqi_pci_driver); 7061 sas_release_transport(pqi_sas_transport_template); 7062 } 7063 7064 module_init(pqi_init); 7065 module_exit(pqi_cleanup); 7066 7067 static void __attribute__((unused)) verify_structures(void) 7068 { 7069 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 7070 sis_host_to_ctrl_doorbell) != 0x20); 7071 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 7072 sis_interrupt_mask) != 0x34); 7073 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 7074 sis_ctrl_to_host_doorbell) != 0x9c); 7075 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 7076 sis_ctrl_to_host_doorbell_clear) != 0xa0); 7077 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 7078 sis_driver_scratch) != 0xb0); 7079 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 7080 sis_firmware_status) != 0xbc); 7081 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 7082 sis_mailbox) != 0x1000); 7083 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 7084 pqi_registers) != 0x4000); 7085 7086 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 7087 iu_type) != 0x0); 7088 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 7089 iu_length) != 0x2); 7090 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 7091 response_queue_id) != 0x4); 7092 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 7093 work_area) != 0x6); 7094 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8); 7095 7096 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 7097 status) != 0x0); 7098 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 7099 service_response) != 0x1); 7100 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 7101 data_present) != 0x2); 7102 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 7103 reserved) != 0x3); 7104 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 7105 residual_count) != 0x4); 7106 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 7107 data_length) != 0x8); 7108 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 7109 reserved1) != 0xa); 7110 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 7111 data) != 0xc); 7112 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c); 7113 7114 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7115 data_in_result) != 0x0); 7116 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7117 data_out_result) != 0x1); 7118 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7119 reserved) != 0x2); 7120 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7121 status) != 0x5); 7122 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7123 status_qualifier) != 0x6); 7124 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7125 sense_data_length) != 0x8); 7126 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7127 response_data_length) != 0xa); 7128 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7129 data_in_transferred) != 0xc); 7130 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7131 data_out_transferred) != 0x10); 7132 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 7133 data) != 0x14); 7134 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114); 7135 7136 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7137 signature) != 0x0); 7138 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7139 function_and_status_code) != 0x8); 7140 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7141 max_admin_iq_elements) != 0x10); 7142 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7143 max_admin_oq_elements) != 0x11); 7144 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7145 admin_iq_element_length) != 0x12); 7146 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7147 admin_oq_element_length) != 0x13); 7148 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7149 max_reset_timeout) != 0x14); 7150 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7151 legacy_intx_status) != 0x18); 7152 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7153 legacy_intx_mask_set) != 0x1c); 7154 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7155 legacy_intx_mask_clear) != 0x20); 7156 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7157 device_status) != 0x40); 7158 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7159 admin_iq_pi_offset) != 0x48); 7160 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7161 admin_oq_ci_offset) != 0x50); 7162 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7163 admin_iq_element_array_addr) != 0x58); 7164 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7165 admin_oq_element_array_addr) != 0x60); 7166 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7167 admin_iq_ci_addr) != 0x68); 7168 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7169 admin_oq_pi_addr) != 0x70); 7170 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7171 admin_iq_num_elements) != 0x78); 7172 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7173 admin_oq_num_elements) != 0x79); 7174 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7175 admin_queue_int_msg_num) != 0x7a); 7176 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7177 device_error) != 0x80); 7178 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7179 error_details) != 0x88); 7180 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7181 device_reset) != 0x90); 7182 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 7183 power_action) != 0x94); 7184 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100); 7185 7186 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7187 header.iu_type) != 0); 7188 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7189 header.iu_length) != 2); 7190 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7191 header.work_area) != 6); 7192 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7193 request_id) != 8); 7194 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7195 function_code) != 10); 7196 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7197 data.report_device_capability.buffer_length) != 44); 7198 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7199 data.report_device_capability.sg_descriptor) != 48); 7200 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7201 data.create_operational_iq.queue_id) != 12); 7202 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7203 data.create_operational_iq.element_array_addr) != 16); 7204 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7205 data.create_operational_iq.ci_addr) != 24); 7206 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7207 data.create_operational_iq.num_elements) != 32); 7208 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7209 data.create_operational_iq.element_length) != 34); 7210 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7211 data.create_operational_iq.queue_protocol) != 36); 7212 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7213 data.create_operational_oq.queue_id) != 12); 7214 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7215 data.create_operational_oq.element_array_addr) != 16); 7216 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7217 data.create_operational_oq.pi_addr) != 24); 7218 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7219 data.create_operational_oq.num_elements) != 32); 7220 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7221 data.create_operational_oq.element_length) != 34); 7222 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7223 data.create_operational_oq.queue_protocol) != 36); 7224 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7225 data.create_operational_oq.int_msg_num) != 40); 7226 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7227 data.create_operational_oq.coalescing_count) != 42); 7228 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7229 data.create_operational_oq.min_coalescing_time) != 44); 7230 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7231 data.create_operational_oq.max_coalescing_time) != 48); 7232 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 7233 data.delete_operational_queue.queue_id) != 12); 7234 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64); 7235 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request, 7236 data.create_operational_iq) != 64 - 11); 7237 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request, 7238 data.create_operational_oq) != 64 - 11); 7239 BUILD_BUG_ON(FIELD_SIZEOF(struct pqi_general_admin_request, 7240 data.delete_operational_queue) != 64 - 11); 7241 7242 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7243 header.iu_type) != 0); 7244 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7245 header.iu_length) != 2); 7246 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7247 header.work_area) != 6); 7248 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7249 request_id) != 8); 7250 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7251 function_code) != 10); 7252 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7253 status) != 11); 7254 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7255 data.create_operational_iq.status_descriptor) != 12); 7256 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7257 data.create_operational_iq.iq_pi_offset) != 16); 7258 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7259 data.create_operational_oq.status_descriptor) != 12); 7260 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 7261 data.create_operational_oq.oq_ci_offset) != 16); 7262 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64); 7263 7264 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7265 header.iu_type) != 0); 7266 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7267 header.iu_length) != 2); 7268 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7269 header.response_queue_id) != 4); 7270 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7271 header.work_area) != 6); 7272 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7273 request_id) != 8); 7274 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7275 nexus_id) != 10); 7276 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7277 buffer_length) != 12); 7278 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7279 lun_number) != 16); 7280 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7281 protocol_specific) != 24); 7282 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7283 error_index) != 27); 7284 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7285 cdb) != 32); 7286 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 7287 sg_descriptors) != 64); 7288 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) != 7289 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 7290 7291 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7292 header.iu_type) != 0); 7293 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7294 header.iu_length) != 2); 7295 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7296 header.response_queue_id) != 4); 7297 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7298 header.work_area) != 6); 7299 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7300 request_id) != 8); 7301 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7302 nexus_id) != 12); 7303 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7304 buffer_length) != 16); 7305 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7306 data_encryption_key_index) != 22); 7307 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7308 encrypt_tweak_lower) != 24); 7309 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7310 encrypt_tweak_upper) != 28); 7311 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7312 cdb) != 32); 7313 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7314 error_index) != 48); 7315 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7316 num_sg_descriptors) != 50); 7317 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7318 cdb_length) != 51); 7319 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7320 lun_number) != 52); 7321 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 7322 sg_descriptors) != 64); 7323 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) != 7324 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 7325 7326 BUILD_BUG_ON(offsetof(struct pqi_io_response, 7327 header.iu_type) != 0); 7328 BUILD_BUG_ON(offsetof(struct pqi_io_response, 7329 header.iu_length) != 2); 7330 BUILD_BUG_ON(offsetof(struct pqi_io_response, 7331 request_id) != 8); 7332 BUILD_BUG_ON(offsetof(struct pqi_io_response, 7333 error_index) != 10); 7334 7335 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 7336 header.iu_type) != 0); 7337 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 7338 header.iu_length) != 2); 7339 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 7340 header.response_queue_id) != 4); 7341 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 7342 request_id) != 8); 7343 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 7344 data.report_event_configuration.buffer_length) != 12); 7345 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 7346 data.report_event_configuration.sg_descriptors) != 16); 7347 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 7348 data.set_event_configuration.global_event_oq_id) != 10); 7349 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 7350 data.set_event_configuration.buffer_length) != 12); 7351 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 7352 data.set_event_configuration.sg_descriptors) != 16); 7353 7354 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 7355 max_inbound_iu_length) != 6); 7356 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 7357 max_outbound_iu_length) != 14); 7358 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16); 7359 7360 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7361 data_length) != 0); 7362 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7363 iq_arbitration_priority_support_bitmask) != 8); 7364 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7365 maximum_aw_a) != 9); 7366 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7367 maximum_aw_b) != 10); 7368 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7369 maximum_aw_c) != 11); 7370 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7371 max_inbound_queues) != 16); 7372 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7373 max_elements_per_iq) != 18); 7374 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7375 max_iq_element_length) != 24); 7376 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7377 min_iq_element_length) != 26); 7378 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7379 max_outbound_queues) != 30); 7380 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7381 max_elements_per_oq) != 32); 7382 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7383 intr_coalescing_time_granularity) != 34); 7384 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7385 max_oq_element_length) != 36); 7386 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7387 min_oq_element_length) != 38); 7388 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 7389 iu_layer_descriptors) != 64); 7390 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576); 7391 7392 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 7393 event_type) != 0); 7394 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 7395 oq_id) != 2); 7396 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4); 7397 7398 BUILD_BUG_ON(offsetof(struct pqi_event_config, 7399 num_event_descriptors) != 2); 7400 BUILD_BUG_ON(offsetof(struct pqi_event_config, 7401 descriptors) != 4); 7402 7403 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS != 7404 ARRAY_SIZE(pqi_supported_event_types)); 7405 7406 BUILD_BUG_ON(offsetof(struct pqi_event_response, 7407 header.iu_type) != 0); 7408 BUILD_BUG_ON(offsetof(struct pqi_event_response, 7409 header.iu_length) != 2); 7410 BUILD_BUG_ON(offsetof(struct pqi_event_response, 7411 event_type) != 8); 7412 BUILD_BUG_ON(offsetof(struct pqi_event_response, 7413 event_id) != 10); 7414 BUILD_BUG_ON(offsetof(struct pqi_event_response, 7415 additional_event_id) != 12); 7416 BUILD_BUG_ON(offsetof(struct pqi_event_response, 7417 data) != 16); 7418 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32); 7419 7420 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 7421 header.iu_type) != 0); 7422 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 7423 header.iu_length) != 2); 7424 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 7425 event_type) != 8); 7426 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 7427 event_id) != 10); 7428 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 7429 additional_event_id) != 12); 7430 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16); 7431 7432 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 7433 header.iu_type) != 0); 7434 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 7435 header.iu_length) != 2); 7436 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 7437 request_id) != 8); 7438 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 7439 nexus_id) != 10); 7440 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 7441 lun_number) != 16); 7442 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 7443 protocol_specific) != 24); 7444 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 7445 outbound_queue_id_to_manage) != 26); 7446 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 7447 request_id_to_manage) != 28); 7448 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 7449 task_management_function) != 30); 7450 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32); 7451 7452 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 7453 header.iu_type) != 0); 7454 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 7455 header.iu_length) != 2); 7456 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 7457 request_id) != 8); 7458 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 7459 nexus_id) != 10); 7460 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 7461 additional_response_info) != 12); 7462 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 7463 response_code) != 15); 7464 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16); 7465 7466 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 7467 configured_logical_drive_count) != 0); 7468 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 7469 configuration_signature) != 1); 7470 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 7471 firmware_version) != 5); 7472 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 7473 extended_logical_unit_count) != 154); 7474 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 7475 firmware_build_number) != 190); 7476 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 7477 controller_mode) != 292); 7478 7479 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 7480 phys_bay_in_box) != 115); 7481 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 7482 device_type) != 120); 7483 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 7484 redundant_path_present_map) != 1736); 7485 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 7486 active_path_number) != 1738); 7487 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 7488 alternate_paths_phys_connector) != 1739); 7489 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 7490 alternate_paths_phys_box_on_port) != 1755); 7491 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 7492 current_queue_depth_limit) != 1796); 7493 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560); 7494 7495 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255); 7496 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255); 7497 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH % 7498 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 7499 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH % 7500 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 7501 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560); 7502 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH % 7503 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 7504 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560); 7505 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH % 7506 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 7507 7508 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS); 7509 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= 7510 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP); 7511 } 7512