1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * driver for Microchip PQI-based storage controllers 4 * Copyright (c) 2019-2021 Microchip Technology Inc. and its subsidiaries 5 * Copyright (c) 2016-2018 Microsemi Corporation 6 * Copyright (c) 2016 PMC-Sierra, Inc. 7 * 8 * Questions/Comments/Bugfixes to storagedev@microchip.com 9 * 10 */ 11 12 #include <linux/module.h> 13 #include <linux/kernel.h> 14 #include <linux/pci.h> 15 #include <linux/delay.h> 16 #include <linux/interrupt.h> 17 #include <linux/sched.h> 18 #include <linux/rtc.h> 19 #include <linux/bcd.h> 20 #include <linux/reboot.h> 21 #include <linux/cciss_ioctl.h> 22 #include <linux/blk-mq-pci.h> 23 #include <scsi/scsi_host.h> 24 #include <scsi/scsi_cmnd.h> 25 #include <scsi/scsi_device.h> 26 #include <scsi/scsi_eh.h> 27 #include <scsi/scsi_transport_sas.h> 28 #include <asm/unaligned.h> 29 #include "smartpqi.h" 30 #include "smartpqi_sis.h" 31 32 #if !defined(BUILD_TIMESTAMP) 33 #define BUILD_TIMESTAMP 34 #endif 35 36 #define DRIVER_VERSION "2.1.12-055" 37 #define DRIVER_MAJOR 2 38 #define DRIVER_MINOR 1 39 #define DRIVER_RELEASE 12 40 #define DRIVER_REVISION 55 41 42 #define DRIVER_NAME "Microchip SmartPQI Driver (v" \ 43 DRIVER_VERSION BUILD_TIMESTAMP ")" 44 #define DRIVER_NAME_SHORT "smartpqi" 45 46 #define PQI_EXTRA_SGL_MEMORY (12 * sizeof(struct pqi_sg_descriptor)) 47 48 #define PQI_POST_RESET_DELAY_SECS 5 49 #define PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS 10 50 51 MODULE_AUTHOR("Microchip"); 52 MODULE_DESCRIPTION("Driver for Microchip Smart Family Controller version " 53 DRIVER_VERSION); 54 MODULE_VERSION(DRIVER_VERSION); 55 MODULE_LICENSE("GPL"); 56 57 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info, 58 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason); 59 static void pqi_ctrl_offline_worker(struct work_struct *work); 60 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info); 61 static void pqi_scan_start(struct Scsi_Host *shost); 62 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 63 struct pqi_queue_group *queue_group, enum pqi_io_path path, 64 struct pqi_io_request *io_request); 65 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 66 struct pqi_iu_header *request, unsigned int flags, 67 struct pqi_raid_error_info *error_info); 68 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 69 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 70 unsigned int cdb_length, struct pqi_queue_group *queue_group, 71 struct pqi_encryption_info *encryption_info, bool raid_bypass); 72 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info, 73 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 74 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 75 struct pqi_scsi_dev_raid_map_data *rmd); 76 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info, 77 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 78 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 79 struct pqi_scsi_dev_raid_map_data *rmd); 80 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info); 81 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info); 82 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs); 83 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info); 84 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info); 85 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info); 86 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 87 struct pqi_scsi_dev *device, unsigned long timeout_msecs); 88 89 /* for flags argument to pqi_submit_raid_request_synchronous() */ 90 #define PQI_SYNC_FLAGS_INTERRUPTABLE 0x1 91 92 static struct scsi_transport_template *pqi_sas_transport_template; 93 94 static atomic_t pqi_controller_count = ATOMIC_INIT(0); 95 96 enum pqi_lockup_action { 97 NONE, 98 REBOOT, 99 PANIC 100 }; 101 102 static enum pqi_lockup_action pqi_lockup_action = NONE; 103 104 static struct { 105 enum pqi_lockup_action action; 106 char *name; 107 } pqi_lockup_actions[] = { 108 { 109 .action = NONE, 110 .name = "none", 111 }, 112 { 113 .action = REBOOT, 114 .name = "reboot", 115 }, 116 { 117 .action = PANIC, 118 .name = "panic", 119 }, 120 }; 121 122 static unsigned int pqi_supported_event_types[] = { 123 PQI_EVENT_TYPE_HOTPLUG, 124 PQI_EVENT_TYPE_HARDWARE, 125 PQI_EVENT_TYPE_PHYSICAL_DEVICE, 126 PQI_EVENT_TYPE_LOGICAL_DEVICE, 127 PQI_EVENT_TYPE_OFA, 128 PQI_EVENT_TYPE_AIO_STATE_CHANGE, 129 PQI_EVENT_TYPE_AIO_CONFIG_CHANGE, 130 }; 131 132 static int pqi_disable_device_id_wildcards; 133 module_param_named(disable_device_id_wildcards, 134 pqi_disable_device_id_wildcards, int, 0644); 135 MODULE_PARM_DESC(disable_device_id_wildcards, 136 "Disable device ID wildcards."); 137 138 static int pqi_disable_heartbeat; 139 module_param_named(disable_heartbeat, 140 pqi_disable_heartbeat, int, 0644); 141 MODULE_PARM_DESC(disable_heartbeat, 142 "Disable heartbeat."); 143 144 static int pqi_disable_ctrl_shutdown; 145 module_param_named(disable_ctrl_shutdown, 146 pqi_disable_ctrl_shutdown, int, 0644); 147 MODULE_PARM_DESC(disable_ctrl_shutdown, 148 "Disable controller shutdown when controller locked up."); 149 150 static char *pqi_lockup_action_param; 151 module_param_named(lockup_action, 152 pqi_lockup_action_param, charp, 0644); 153 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n" 154 "\t\tSupported: none, reboot, panic\n" 155 "\t\tDefault: none"); 156 157 static int pqi_expose_ld_first; 158 module_param_named(expose_ld_first, 159 pqi_expose_ld_first, int, 0644); 160 MODULE_PARM_DESC(expose_ld_first, "Expose logical drives before physical drives."); 161 162 static int pqi_hide_vsep; 163 module_param_named(hide_vsep, 164 pqi_hide_vsep, int, 0644); 165 MODULE_PARM_DESC(hide_vsep, "Hide the virtual SEP for direct attached drives."); 166 167 static char *raid_levels[] = { 168 "RAID-0", 169 "RAID-4", 170 "RAID-1(1+0)", 171 "RAID-5", 172 "RAID-5+1", 173 "RAID-6", 174 "RAID-1(Triple)", 175 }; 176 177 static char *pqi_raid_level_to_string(u8 raid_level) 178 { 179 if (raid_level < ARRAY_SIZE(raid_levels)) 180 return raid_levels[raid_level]; 181 182 return "RAID UNKNOWN"; 183 } 184 185 #define SA_RAID_0 0 186 #define SA_RAID_4 1 187 #define SA_RAID_1 2 /* also used for RAID 10 */ 188 #define SA_RAID_5 3 /* also used for RAID 50 */ 189 #define SA_RAID_51 4 190 #define SA_RAID_6 5 /* also used for RAID 60 */ 191 #define SA_RAID_TRIPLE 6 /* also used for RAID 1+0 Triple */ 192 #define SA_RAID_MAX SA_RAID_TRIPLE 193 #define SA_RAID_UNKNOWN 0xff 194 195 static inline void pqi_scsi_done(struct scsi_cmnd *scmd) 196 { 197 pqi_prep_for_scsi_done(scmd); 198 scsi_done(scmd); 199 } 200 201 static inline void pqi_disable_write_same(struct scsi_device *sdev) 202 { 203 sdev->no_write_same = 1; 204 } 205 206 static inline bool pqi_scsi3addr_equal(u8 *scsi3addr1, u8 *scsi3addr2) 207 { 208 return memcmp(scsi3addr1, scsi3addr2, 8) == 0; 209 } 210 211 static inline bool pqi_is_logical_device(struct pqi_scsi_dev *device) 212 { 213 return !device->is_physical_device; 214 } 215 216 static inline bool pqi_is_external_raid_addr(u8 *scsi3addr) 217 { 218 return scsi3addr[2] != 0; 219 } 220 221 static inline bool pqi_ctrl_offline(struct pqi_ctrl_info *ctrl_info) 222 { 223 return !ctrl_info->controller_online; 224 } 225 226 static inline void pqi_check_ctrl_health(struct pqi_ctrl_info *ctrl_info) 227 { 228 if (ctrl_info->controller_online) 229 if (!sis_is_firmware_running(ctrl_info)) 230 pqi_take_ctrl_offline(ctrl_info, PQI_FIRMWARE_KERNEL_NOT_UP); 231 } 232 233 static inline bool pqi_is_hba_lunid(u8 *scsi3addr) 234 { 235 return pqi_scsi3addr_equal(scsi3addr, RAID_CTLR_LUNID); 236 } 237 238 #define PQI_DRIVER_SCRATCH_PQI_MODE 0x1 239 #define PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED 0x2 240 241 static inline enum pqi_ctrl_mode pqi_get_ctrl_mode(struct pqi_ctrl_info *ctrl_info) 242 { 243 return sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_PQI_MODE ? PQI_MODE : SIS_MODE; 244 } 245 246 static inline void pqi_save_ctrl_mode(struct pqi_ctrl_info *ctrl_info, 247 enum pqi_ctrl_mode mode) 248 { 249 u32 driver_scratch; 250 251 driver_scratch = sis_read_driver_scratch(ctrl_info); 252 253 if (mode == PQI_MODE) 254 driver_scratch |= PQI_DRIVER_SCRATCH_PQI_MODE; 255 else 256 driver_scratch &= ~PQI_DRIVER_SCRATCH_PQI_MODE; 257 258 sis_write_driver_scratch(ctrl_info, driver_scratch); 259 } 260 261 static inline bool pqi_is_fw_triage_supported(struct pqi_ctrl_info *ctrl_info) 262 { 263 return (sis_read_driver_scratch(ctrl_info) & PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED) != 0; 264 } 265 266 static inline void pqi_save_fw_triage_setting(struct pqi_ctrl_info *ctrl_info, bool is_supported) 267 { 268 u32 driver_scratch; 269 270 driver_scratch = sis_read_driver_scratch(ctrl_info); 271 272 if (is_supported) 273 driver_scratch |= PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED; 274 else 275 driver_scratch &= ~PQI_DRIVER_SCRATCH_FW_TRIAGE_SUPPORTED; 276 277 sis_write_driver_scratch(ctrl_info, driver_scratch); 278 } 279 280 static inline void pqi_ctrl_block_scan(struct pqi_ctrl_info *ctrl_info) 281 { 282 ctrl_info->scan_blocked = true; 283 mutex_lock(&ctrl_info->scan_mutex); 284 } 285 286 static inline void pqi_ctrl_unblock_scan(struct pqi_ctrl_info *ctrl_info) 287 { 288 ctrl_info->scan_blocked = false; 289 mutex_unlock(&ctrl_info->scan_mutex); 290 } 291 292 static inline bool pqi_ctrl_scan_blocked(struct pqi_ctrl_info *ctrl_info) 293 { 294 return ctrl_info->scan_blocked; 295 } 296 297 static inline void pqi_ctrl_block_device_reset(struct pqi_ctrl_info *ctrl_info) 298 { 299 mutex_lock(&ctrl_info->lun_reset_mutex); 300 } 301 302 static inline void pqi_ctrl_unblock_device_reset(struct pqi_ctrl_info *ctrl_info) 303 { 304 mutex_unlock(&ctrl_info->lun_reset_mutex); 305 } 306 307 static inline void pqi_scsi_block_requests(struct pqi_ctrl_info *ctrl_info) 308 { 309 struct Scsi_Host *shost; 310 unsigned int num_loops; 311 int msecs_sleep; 312 313 shost = ctrl_info->scsi_host; 314 315 scsi_block_requests(shost); 316 317 num_loops = 0; 318 msecs_sleep = 20; 319 while (scsi_host_busy(shost)) { 320 num_loops++; 321 if (num_loops == 10) 322 msecs_sleep = 500; 323 msleep(msecs_sleep); 324 } 325 } 326 327 static inline void pqi_scsi_unblock_requests(struct pqi_ctrl_info *ctrl_info) 328 { 329 scsi_unblock_requests(ctrl_info->scsi_host); 330 } 331 332 static inline void pqi_ctrl_busy(struct pqi_ctrl_info *ctrl_info) 333 { 334 atomic_inc(&ctrl_info->num_busy_threads); 335 } 336 337 static inline void pqi_ctrl_unbusy(struct pqi_ctrl_info *ctrl_info) 338 { 339 atomic_dec(&ctrl_info->num_busy_threads); 340 } 341 342 static inline bool pqi_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 343 { 344 return ctrl_info->block_requests; 345 } 346 347 static inline void pqi_ctrl_block_requests(struct pqi_ctrl_info *ctrl_info) 348 { 349 ctrl_info->block_requests = true; 350 } 351 352 static inline void pqi_ctrl_unblock_requests(struct pqi_ctrl_info *ctrl_info) 353 { 354 ctrl_info->block_requests = false; 355 wake_up_all(&ctrl_info->block_requests_wait); 356 } 357 358 static void pqi_wait_if_ctrl_blocked(struct pqi_ctrl_info *ctrl_info) 359 { 360 if (!pqi_ctrl_blocked(ctrl_info)) 361 return; 362 363 atomic_inc(&ctrl_info->num_blocked_threads); 364 wait_event(ctrl_info->block_requests_wait, 365 !pqi_ctrl_blocked(ctrl_info)); 366 atomic_dec(&ctrl_info->num_blocked_threads); 367 } 368 369 #define PQI_QUIESCE_WARNING_TIMEOUT_SECS 10 370 371 static inline void pqi_ctrl_wait_until_quiesced(struct pqi_ctrl_info *ctrl_info) 372 { 373 unsigned long start_jiffies; 374 unsigned long warning_timeout; 375 bool displayed_warning; 376 377 displayed_warning = false; 378 start_jiffies = jiffies; 379 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * PQI_HZ) + start_jiffies; 380 381 while (atomic_read(&ctrl_info->num_busy_threads) > 382 atomic_read(&ctrl_info->num_blocked_threads)) { 383 if (time_after(jiffies, warning_timeout)) { 384 dev_warn(&ctrl_info->pci_dev->dev, 385 "waiting %u seconds for driver activity to quiesce\n", 386 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 387 displayed_warning = true; 388 warning_timeout = (PQI_QUIESCE_WARNING_TIMEOUT_SECS * PQI_HZ) + jiffies; 389 } 390 usleep_range(1000, 2000); 391 } 392 393 if (displayed_warning) 394 dev_warn(&ctrl_info->pci_dev->dev, 395 "driver activity quiesced after waiting for %u seconds\n", 396 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 397 } 398 399 static inline bool pqi_device_offline(struct pqi_scsi_dev *device) 400 { 401 return device->device_offline; 402 } 403 404 static inline void pqi_ctrl_ofa_start(struct pqi_ctrl_info *ctrl_info) 405 { 406 mutex_lock(&ctrl_info->ofa_mutex); 407 } 408 409 static inline void pqi_ctrl_ofa_done(struct pqi_ctrl_info *ctrl_info) 410 { 411 mutex_unlock(&ctrl_info->ofa_mutex); 412 } 413 414 static inline void pqi_wait_until_ofa_finished(struct pqi_ctrl_info *ctrl_info) 415 { 416 mutex_lock(&ctrl_info->ofa_mutex); 417 mutex_unlock(&ctrl_info->ofa_mutex); 418 } 419 420 static inline bool pqi_ofa_in_progress(struct pqi_ctrl_info *ctrl_info) 421 { 422 return mutex_is_locked(&ctrl_info->ofa_mutex); 423 } 424 425 static inline void pqi_device_remove_start(struct pqi_scsi_dev *device) 426 { 427 device->in_remove = true; 428 } 429 430 static inline bool pqi_device_in_remove(struct pqi_scsi_dev *device) 431 { 432 return device->in_remove; 433 } 434 435 static inline int pqi_event_type_to_event_index(unsigned int event_type) 436 { 437 int index; 438 439 for (index = 0; index < ARRAY_SIZE(pqi_supported_event_types); index++) 440 if (event_type == pqi_supported_event_types[index]) 441 return index; 442 443 return -1; 444 } 445 446 static inline bool pqi_is_supported_event(unsigned int event_type) 447 { 448 return pqi_event_type_to_event_index(event_type) != -1; 449 } 450 451 static inline void pqi_schedule_rescan_worker_with_delay(struct pqi_ctrl_info *ctrl_info, 452 unsigned long delay) 453 { 454 if (pqi_ctrl_offline(ctrl_info)) 455 return; 456 457 schedule_delayed_work(&ctrl_info->rescan_work, delay); 458 } 459 460 static inline void pqi_schedule_rescan_worker(struct pqi_ctrl_info *ctrl_info) 461 { 462 pqi_schedule_rescan_worker_with_delay(ctrl_info, 0); 463 } 464 465 #define PQI_RESCAN_WORK_DELAY (10 * PQI_HZ) 466 467 static inline void pqi_schedule_rescan_worker_delayed(struct pqi_ctrl_info *ctrl_info) 468 { 469 pqi_schedule_rescan_worker_with_delay(ctrl_info, PQI_RESCAN_WORK_DELAY); 470 } 471 472 static inline void pqi_cancel_rescan_worker(struct pqi_ctrl_info *ctrl_info) 473 { 474 cancel_delayed_work_sync(&ctrl_info->rescan_work); 475 } 476 477 static inline u32 pqi_read_heartbeat_counter(struct pqi_ctrl_info *ctrl_info) 478 { 479 if (!ctrl_info->heartbeat_counter) 480 return 0; 481 482 return readl(ctrl_info->heartbeat_counter); 483 } 484 485 static inline u8 pqi_read_soft_reset_status(struct pqi_ctrl_info *ctrl_info) 486 { 487 return readb(ctrl_info->soft_reset_status); 488 } 489 490 static inline void pqi_clear_soft_reset_status(struct pqi_ctrl_info *ctrl_info) 491 { 492 u8 status; 493 494 status = pqi_read_soft_reset_status(ctrl_info); 495 status &= ~PQI_SOFT_RESET_ABORT; 496 writeb(status, ctrl_info->soft_reset_status); 497 } 498 499 static int pqi_map_single(struct pci_dev *pci_dev, 500 struct pqi_sg_descriptor *sg_descriptor, void *buffer, 501 size_t buffer_length, enum dma_data_direction data_direction) 502 { 503 dma_addr_t bus_address; 504 505 if (!buffer || buffer_length == 0 || data_direction == DMA_NONE) 506 return 0; 507 508 bus_address = dma_map_single(&pci_dev->dev, buffer, buffer_length, 509 data_direction); 510 if (dma_mapping_error(&pci_dev->dev, bus_address)) 511 return -ENOMEM; 512 513 put_unaligned_le64((u64)bus_address, &sg_descriptor->address); 514 put_unaligned_le32(buffer_length, &sg_descriptor->length); 515 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 516 517 return 0; 518 } 519 520 static void pqi_pci_unmap(struct pci_dev *pci_dev, 521 struct pqi_sg_descriptor *descriptors, int num_descriptors, 522 enum dma_data_direction data_direction) 523 { 524 int i; 525 526 if (data_direction == DMA_NONE) 527 return; 528 529 for (i = 0; i < num_descriptors; i++) 530 dma_unmap_single(&pci_dev->dev, 531 (dma_addr_t)get_unaligned_le64(&descriptors[i].address), 532 get_unaligned_le32(&descriptors[i].length), 533 data_direction); 534 } 535 536 static int pqi_build_raid_path_request(struct pqi_ctrl_info *ctrl_info, 537 struct pqi_raid_path_request *request, u8 cmd, 538 u8 *scsi3addr, void *buffer, size_t buffer_length, 539 u16 vpd_page, enum dma_data_direction *dir) 540 { 541 u8 *cdb; 542 size_t cdb_length = buffer_length; 543 544 memset(request, 0, sizeof(*request)); 545 546 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 547 put_unaligned_le16(offsetof(struct pqi_raid_path_request, 548 sg_descriptors[1]) - PQI_REQUEST_HEADER_LENGTH, 549 &request->header.iu_length); 550 put_unaligned_le32(buffer_length, &request->buffer_length); 551 memcpy(request->lun_number, scsi3addr, sizeof(request->lun_number)); 552 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 553 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 554 555 cdb = request->cdb; 556 557 switch (cmd) { 558 case TEST_UNIT_READY: 559 request->data_direction = SOP_READ_FLAG; 560 cdb[0] = TEST_UNIT_READY; 561 break; 562 case INQUIRY: 563 request->data_direction = SOP_READ_FLAG; 564 cdb[0] = INQUIRY; 565 if (vpd_page & VPD_PAGE) { 566 cdb[1] = 0x1; 567 cdb[2] = (u8)vpd_page; 568 } 569 cdb[4] = (u8)cdb_length; 570 break; 571 case CISS_REPORT_LOG: 572 case CISS_REPORT_PHYS: 573 request->data_direction = SOP_READ_FLAG; 574 cdb[0] = cmd; 575 if (cmd == CISS_REPORT_PHYS) { 576 if (ctrl_info->rpl_extended_format_4_5_supported) 577 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4; 578 else 579 cdb[1] = CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2; 580 } else { 581 cdb[1] = ctrl_info->ciss_report_log_flags; 582 } 583 put_unaligned_be32(cdb_length, &cdb[6]); 584 break; 585 case CISS_GET_RAID_MAP: 586 request->data_direction = SOP_READ_FLAG; 587 cdb[0] = CISS_READ; 588 cdb[1] = CISS_GET_RAID_MAP; 589 put_unaligned_be32(cdb_length, &cdb[6]); 590 break; 591 case SA_FLUSH_CACHE: 592 request->header.driver_flags = PQI_DRIVER_NONBLOCKABLE_REQUEST; 593 request->data_direction = SOP_WRITE_FLAG; 594 cdb[0] = BMIC_WRITE; 595 cdb[6] = BMIC_FLUSH_CACHE; 596 put_unaligned_be16(cdb_length, &cdb[7]); 597 break; 598 case BMIC_SENSE_DIAG_OPTIONS: 599 cdb_length = 0; 600 fallthrough; 601 case BMIC_IDENTIFY_CONTROLLER: 602 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 603 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 604 case BMIC_SENSE_FEATURE: 605 request->data_direction = SOP_READ_FLAG; 606 cdb[0] = BMIC_READ; 607 cdb[6] = cmd; 608 put_unaligned_be16(cdb_length, &cdb[7]); 609 break; 610 case BMIC_SET_DIAG_OPTIONS: 611 cdb_length = 0; 612 fallthrough; 613 case BMIC_WRITE_HOST_WELLNESS: 614 request->data_direction = SOP_WRITE_FLAG; 615 cdb[0] = BMIC_WRITE; 616 cdb[6] = cmd; 617 put_unaligned_be16(cdb_length, &cdb[7]); 618 break; 619 case BMIC_CSMI_PASSTHRU: 620 request->data_direction = SOP_BIDIRECTIONAL; 621 cdb[0] = BMIC_WRITE; 622 cdb[5] = CSMI_CC_SAS_SMP_PASSTHRU; 623 cdb[6] = cmd; 624 put_unaligned_be16(cdb_length, &cdb[7]); 625 break; 626 default: 627 dev_err(&ctrl_info->pci_dev->dev, "unknown command 0x%c\n", cmd); 628 break; 629 } 630 631 switch (request->data_direction) { 632 case SOP_READ_FLAG: 633 *dir = DMA_FROM_DEVICE; 634 break; 635 case SOP_WRITE_FLAG: 636 *dir = DMA_TO_DEVICE; 637 break; 638 case SOP_NO_DIRECTION_FLAG: 639 *dir = DMA_NONE; 640 break; 641 default: 642 *dir = DMA_BIDIRECTIONAL; 643 break; 644 } 645 646 return pqi_map_single(ctrl_info->pci_dev, &request->sg_descriptors[0], 647 buffer, buffer_length, *dir); 648 } 649 650 static inline void pqi_reinit_io_request(struct pqi_io_request *io_request) 651 { 652 io_request->scmd = NULL; 653 io_request->status = 0; 654 io_request->error_info = NULL; 655 io_request->raid_bypass = false; 656 } 657 658 static struct pqi_io_request *pqi_alloc_io_request( 659 struct pqi_ctrl_info *ctrl_info) 660 { 661 struct pqi_io_request *io_request; 662 u16 i = ctrl_info->next_io_request_slot; /* benignly racy */ 663 664 while (1) { 665 io_request = &ctrl_info->io_request_pool[i]; 666 if (atomic_inc_return(&io_request->refcount) == 1) 667 break; 668 atomic_dec(&io_request->refcount); 669 i = (i + 1) % ctrl_info->max_io_slots; 670 } 671 672 /* benignly racy */ 673 ctrl_info->next_io_request_slot = (i + 1) % ctrl_info->max_io_slots; 674 675 pqi_reinit_io_request(io_request); 676 677 return io_request; 678 } 679 680 static void pqi_free_io_request(struct pqi_io_request *io_request) 681 { 682 atomic_dec(&io_request->refcount); 683 } 684 685 static int pqi_send_scsi_raid_request(struct pqi_ctrl_info *ctrl_info, u8 cmd, 686 u8 *scsi3addr, void *buffer, size_t buffer_length, u16 vpd_page, 687 struct pqi_raid_error_info *error_info) 688 { 689 int rc; 690 struct pqi_raid_path_request request; 691 enum dma_data_direction dir; 692 693 rc = pqi_build_raid_path_request(ctrl_info, &request, cmd, scsi3addr, 694 buffer, buffer_length, vpd_page, &dir); 695 if (rc) 696 return rc; 697 698 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, error_info); 699 700 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 701 702 return rc; 703 } 704 705 /* helper functions for pqi_send_scsi_raid_request */ 706 707 static inline int pqi_send_ctrl_raid_request(struct pqi_ctrl_info *ctrl_info, 708 u8 cmd, void *buffer, size_t buffer_length) 709 { 710 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 711 buffer, buffer_length, 0, NULL); 712 } 713 714 static inline int pqi_send_ctrl_raid_with_error(struct pqi_ctrl_info *ctrl_info, 715 u8 cmd, void *buffer, size_t buffer_length, 716 struct pqi_raid_error_info *error_info) 717 { 718 return pqi_send_scsi_raid_request(ctrl_info, cmd, RAID_CTLR_LUNID, 719 buffer, buffer_length, 0, error_info); 720 } 721 722 static inline int pqi_identify_controller(struct pqi_ctrl_info *ctrl_info, 723 struct bmic_identify_controller *buffer) 724 { 725 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER, 726 buffer, sizeof(*buffer)); 727 } 728 729 static inline int pqi_sense_subsystem_info(struct pqi_ctrl_info *ctrl_info, 730 struct bmic_sense_subsystem_info *sense_info) 731 { 732 return pqi_send_ctrl_raid_request(ctrl_info, 733 BMIC_SENSE_SUBSYSTEM_INFORMATION, sense_info, 734 sizeof(*sense_info)); 735 } 736 737 static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info, 738 u8 *scsi3addr, u16 vpd_page, void *buffer, size_t buffer_length) 739 { 740 return pqi_send_scsi_raid_request(ctrl_info, INQUIRY, scsi3addr, 741 buffer, buffer_length, vpd_page, NULL); 742 } 743 744 static int pqi_identify_physical_device(struct pqi_ctrl_info *ctrl_info, 745 struct pqi_scsi_dev *device, 746 struct bmic_identify_physical_device *buffer, size_t buffer_length) 747 { 748 int rc; 749 enum dma_data_direction dir; 750 u16 bmic_device_index; 751 struct pqi_raid_path_request request; 752 753 rc = pqi_build_raid_path_request(ctrl_info, &request, 754 BMIC_IDENTIFY_PHYSICAL_DEVICE, RAID_CTLR_LUNID, buffer, 755 buffer_length, 0, &dir); 756 if (rc) 757 return rc; 758 759 bmic_device_index = CISS_GET_DRIVE_NUMBER(device->scsi3addr); 760 request.cdb[2] = (u8)bmic_device_index; 761 request.cdb[9] = (u8)(bmic_device_index >> 8); 762 763 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 764 765 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 766 767 return rc; 768 } 769 770 static inline u32 pqi_aio_limit_to_bytes(__le16 *limit) 771 { 772 u32 bytes; 773 774 bytes = get_unaligned_le16(limit); 775 if (bytes == 0) 776 bytes = ~0; 777 else 778 bytes *= 1024; 779 780 return bytes; 781 } 782 783 #pragma pack(1) 784 785 struct bmic_sense_feature_buffer { 786 struct bmic_sense_feature_buffer_header header; 787 struct bmic_sense_feature_io_page_aio_subpage aio_subpage; 788 }; 789 790 #pragma pack() 791 792 #define MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH \ 793 offsetofend(struct bmic_sense_feature_buffer, \ 794 aio_subpage.max_write_raid_1_10_3drive) 795 796 #define MINIMUM_AIO_SUBPAGE_LENGTH \ 797 (offsetofend(struct bmic_sense_feature_io_page_aio_subpage, \ 798 max_write_raid_1_10_3drive) - \ 799 sizeof_field(struct bmic_sense_feature_io_page_aio_subpage, header)) 800 801 static int pqi_get_advanced_raid_bypass_config(struct pqi_ctrl_info *ctrl_info) 802 { 803 int rc; 804 enum dma_data_direction dir; 805 struct pqi_raid_path_request request; 806 struct bmic_sense_feature_buffer *buffer; 807 808 buffer = kmalloc(sizeof(*buffer), GFP_KERNEL); 809 if (!buffer) 810 return -ENOMEM; 811 812 rc = pqi_build_raid_path_request(ctrl_info, &request, BMIC_SENSE_FEATURE, RAID_CTLR_LUNID, 813 buffer, sizeof(*buffer), 0, &dir); 814 if (rc) 815 goto error; 816 817 request.cdb[2] = BMIC_SENSE_FEATURE_IO_PAGE; 818 request.cdb[3] = BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE; 819 820 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 821 822 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, dir); 823 824 if (rc) 825 goto error; 826 827 if (buffer->header.page_code != BMIC_SENSE_FEATURE_IO_PAGE || 828 buffer->header.subpage_code != 829 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE || 830 get_unaligned_le16(&buffer->header.buffer_length) < 831 MINIMUM_AIO_SUBPAGE_BUFFER_LENGTH || 832 buffer->aio_subpage.header.page_code != 833 BMIC_SENSE_FEATURE_IO_PAGE || 834 buffer->aio_subpage.header.subpage_code != 835 BMIC_SENSE_FEATURE_IO_PAGE_AIO_SUBPAGE || 836 get_unaligned_le16(&buffer->aio_subpage.header.page_length) < 837 MINIMUM_AIO_SUBPAGE_LENGTH) { 838 goto error; 839 } 840 841 ctrl_info->max_transfer_encrypted_sas_sata = 842 pqi_aio_limit_to_bytes( 843 &buffer->aio_subpage.max_transfer_encrypted_sas_sata); 844 845 ctrl_info->max_transfer_encrypted_nvme = 846 pqi_aio_limit_to_bytes( 847 &buffer->aio_subpage.max_transfer_encrypted_nvme); 848 849 ctrl_info->max_write_raid_5_6 = 850 pqi_aio_limit_to_bytes( 851 &buffer->aio_subpage.max_write_raid_5_6); 852 853 ctrl_info->max_write_raid_1_10_2drive = 854 pqi_aio_limit_to_bytes( 855 &buffer->aio_subpage.max_write_raid_1_10_2drive); 856 857 ctrl_info->max_write_raid_1_10_3drive = 858 pqi_aio_limit_to_bytes( 859 &buffer->aio_subpage.max_write_raid_1_10_3drive); 860 861 error: 862 kfree(buffer); 863 864 return rc; 865 } 866 867 static int pqi_flush_cache(struct pqi_ctrl_info *ctrl_info, 868 enum bmic_flush_cache_shutdown_event shutdown_event) 869 { 870 int rc; 871 struct bmic_flush_cache *flush_cache; 872 873 flush_cache = kzalloc(sizeof(*flush_cache), GFP_KERNEL); 874 if (!flush_cache) 875 return -ENOMEM; 876 877 flush_cache->shutdown_event = shutdown_event; 878 879 rc = pqi_send_ctrl_raid_request(ctrl_info, SA_FLUSH_CACHE, flush_cache, 880 sizeof(*flush_cache)); 881 882 kfree(flush_cache); 883 884 return rc; 885 } 886 887 int pqi_csmi_smp_passthru(struct pqi_ctrl_info *ctrl_info, 888 struct bmic_csmi_smp_passthru_buffer *buffer, size_t buffer_length, 889 struct pqi_raid_error_info *error_info) 890 { 891 return pqi_send_ctrl_raid_with_error(ctrl_info, BMIC_CSMI_PASSTHRU, 892 buffer, buffer_length, error_info); 893 } 894 895 #define PQI_FETCH_PTRAID_DATA (1 << 31) 896 897 static int pqi_set_diag_rescan(struct pqi_ctrl_info *ctrl_info) 898 { 899 int rc; 900 struct bmic_diag_options *diag; 901 902 diag = kzalloc(sizeof(*diag), GFP_KERNEL); 903 if (!diag) 904 return -ENOMEM; 905 906 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SENSE_DIAG_OPTIONS, 907 diag, sizeof(*diag)); 908 if (rc) 909 goto out; 910 911 diag->options |= cpu_to_le32(PQI_FETCH_PTRAID_DATA); 912 913 rc = pqi_send_ctrl_raid_request(ctrl_info, BMIC_SET_DIAG_OPTIONS, diag, 914 sizeof(*diag)); 915 916 out: 917 kfree(diag); 918 919 return rc; 920 } 921 922 static inline int pqi_write_host_wellness(struct pqi_ctrl_info *ctrl_info, 923 void *buffer, size_t buffer_length) 924 { 925 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_WRITE_HOST_WELLNESS, 926 buffer, buffer_length); 927 } 928 929 #pragma pack(1) 930 931 struct bmic_host_wellness_driver_version { 932 u8 start_tag[4]; 933 u8 driver_version_tag[2]; 934 __le16 driver_version_length; 935 char driver_version[32]; 936 u8 dont_write_tag[2]; 937 u8 end_tag[2]; 938 }; 939 940 #pragma pack() 941 942 static int pqi_write_driver_version_to_host_wellness( 943 struct pqi_ctrl_info *ctrl_info) 944 { 945 int rc; 946 struct bmic_host_wellness_driver_version *buffer; 947 size_t buffer_length; 948 949 buffer_length = sizeof(*buffer); 950 951 buffer = kmalloc(buffer_length, GFP_KERNEL); 952 if (!buffer) 953 return -ENOMEM; 954 955 buffer->start_tag[0] = '<'; 956 buffer->start_tag[1] = 'H'; 957 buffer->start_tag[2] = 'W'; 958 buffer->start_tag[3] = '>'; 959 buffer->driver_version_tag[0] = 'D'; 960 buffer->driver_version_tag[1] = 'V'; 961 put_unaligned_le16(sizeof(buffer->driver_version), 962 &buffer->driver_version_length); 963 strncpy(buffer->driver_version, "Linux " DRIVER_VERSION, 964 sizeof(buffer->driver_version) - 1); 965 buffer->driver_version[sizeof(buffer->driver_version) - 1] = '\0'; 966 buffer->dont_write_tag[0] = 'D'; 967 buffer->dont_write_tag[1] = 'W'; 968 buffer->end_tag[0] = 'Z'; 969 buffer->end_tag[1] = 'Z'; 970 971 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 972 973 kfree(buffer); 974 975 return rc; 976 } 977 978 #pragma pack(1) 979 980 struct bmic_host_wellness_time { 981 u8 start_tag[4]; 982 u8 time_tag[2]; 983 __le16 time_length; 984 u8 time[8]; 985 u8 dont_write_tag[2]; 986 u8 end_tag[2]; 987 }; 988 989 #pragma pack() 990 991 static int pqi_write_current_time_to_host_wellness( 992 struct pqi_ctrl_info *ctrl_info) 993 { 994 int rc; 995 struct bmic_host_wellness_time *buffer; 996 size_t buffer_length; 997 time64_t local_time; 998 unsigned int year; 999 struct tm tm; 1000 1001 buffer_length = sizeof(*buffer); 1002 1003 buffer = kmalloc(buffer_length, GFP_KERNEL); 1004 if (!buffer) 1005 return -ENOMEM; 1006 1007 buffer->start_tag[0] = '<'; 1008 buffer->start_tag[1] = 'H'; 1009 buffer->start_tag[2] = 'W'; 1010 buffer->start_tag[3] = '>'; 1011 buffer->time_tag[0] = 'T'; 1012 buffer->time_tag[1] = 'D'; 1013 put_unaligned_le16(sizeof(buffer->time), 1014 &buffer->time_length); 1015 1016 local_time = ktime_get_real_seconds(); 1017 time64_to_tm(local_time, -sys_tz.tz_minuteswest * 60, &tm); 1018 year = tm.tm_year + 1900; 1019 1020 buffer->time[0] = bin2bcd(tm.tm_hour); 1021 buffer->time[1] = bin2bcd(tm.tm_min); 1022 buffer->time[2] = bin2bcd(tm.tm_sec); 1023 buffer->time[3] = 0; 1024 buffer->time[4] = bin2bcd(tm.tm_mon + 1); 1025 buffer->time[5] = bin2bcd(tm.tm_mday); 1026 buffer->time[6] = bin2bcd(year / 100); 1027 buffer->time[7] = bin2bcd(year % 100); 1028 1029 buffer->dont_write_tag[0] = 'D'; 1030 buffer->dont_write_tag[1] = 'W'; 1031 buffer->end_tag[0] = 'Z'; 1032 buffer->end_tag[1] = 'Z'; 1033 1034 rc = pqi_write_host_wellness(ctrl_info, buffer, buffer_length); 1035 1036 kfree(buffer); 1037 1038 return rc; 1039 } 1040 1041 #define PQI_UPDATE_TIME_WORK_INTERVAL (24UL * 60 * 60 * PQI_HZ) 1042 1043 static void pqi_update_time_worker(struct work_struct *work) 1044 { 1045 int rc; 1046 struct pqi_ctrl_info *ctrl_info; 1047 1048 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1049 update_time_work); 1050 1051 rc = pqi_write_current_time_to_host_wellness(ctrl_info); 1052 if (rc) 1053 dev_warn(&ctrl_info->pci_dev->dev, 1054 "error updating time on controller\n"); 1055 1056 schedule_delayed_work(&ctrl_info->update_time_work, 1057 PQI_UPDATE_TIME_WORK_INTERVAL); 1058 } 1059 1060 static inline void pqi_schedule_update_time_worker(struct pqi_ctrl_info *ctrl_info) 1061 { 1062 schedule_delayed_work(&ctrl_info->update_time_work, 0); 1063 } 1064 1065 static inline void pqi_cancel_update_time_worker(struct pqi_ctrl_info *ctrl_info) 1066 { 1067 cancel_delayed_work_sync(&ctrl_info->update_time_work); 1068 } 1069 1070 static inline int pqi_report_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void *buffer, 1071 size_t buffer_length) 1072 { 1073 return pqi_send_ctrl_raid_request(ctrl_info, cmd, buffer, buffer_length); 1074 } 1075 1076 static int pqi_report_phys_logical_luns(struct pqi_ctrl_info *ctrl_info, u8 cmd, void **buffer) 1077 { 1078 int rc; 1079 size_t lun_list_length; 1080 size_t lun_data_length; 1081 size_t new_lun_list_length; 1082 void *lun_data = NULL; 1083 struct report_lun_header *report_lun_header; 1084 1085 report_lun_header = kmalloc(sizeof(*report_lun_header), GFP_KERNEL); 1086 if (!report_lun_header) { 1087 rc = -ENOMEM; 1088 goto out; 1089 } 1090 1091 rc = pqi_report_luns(ctrl_info, cmd, report_lun_header, sizeof(*report_lun_header)); 1092 if (rc) 1093 goto out; 1094 1095 lun_list_length = get_unaligned_be32(&report_lun_header->list_length); 1096 1097 again: 1098 lun_data_length = sizeof(struct report_lun_header) + lun_list_length; 1099 1100 lun_data = kmalloc(lun_data_length, GFP_KERNEL); 1101 if (!lun_data) { 1102 rc = -ENOMEM; 1103 goto out; 1104 } 1105 1106 if (lun_list_length == 0) { 1107 memcpy(lun_data, report_lun_header, sizeof(*report_lun_header)); 1108 goto out; 1109 } 1110 1111 rc = pqi_report_luns(ctrl_info, cmd, lun_data, lun_data_length); 1112 if (rc) 1113 goto out; 1114 1115 new_lun_list_length = 1116 get_unaligned_be32(&((struct report_lun_header *)lun_data)->list_length); 1117 1118 if (new_lun_list_length > lun_list_length) { 1119 lun_list_length = new_lun_list_length; 1120 kfree(lun_data); 1121 goto again; 1122 } 1123 1124 out: 1125 kfree(report_lun_header); 1126 1127 if (rc) { 1128 kfree(lun_data); 1129 lun_data = NULL; 1130 } 1131 1132 *buffer = lun_data; 1133 1134 return rc; 1135 } 1136 1137 static inline int pqi_report_phys_luns(struct pqi_ctrl_info *ctrl_info, void **buffer) 1138 { 1139 int rc; 1140 unsigned int i; 1141 u8 rpl_response_format; 1142 u32 num_physicals; 1143 size_t rpl_16byte_wwid_list_length; 1144 void *rpl_list; 1145 struct report_lun_header *rpl_header; 1146 struct report_phys_lun_8byte_wwid_list *rpl_8byte_wwid_list; 1147 struct report_phys_lun_16byte_wwid_list *rpl_16byte_wwid_list; 1148 1149 rc = pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_PHYS, &rpl_list); 1150 if (rc) 1151 return rc; 1152 1153 if (ctrl_info->rpl_extended_format_4_5_supported) { 1154 rpl_header = rpl_list; 1155 rpl_response_format = rpl_header->flags & CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_MASK; 1156 if (rpl_response_format == CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_4) { 1157 *buffer = rpl_list; 1158 return 0; 1159 } else if (rpl_response_format != CISS_REPORT_PHYS_FLAG_EXTENDED_FORMAT_2) { 1160 dev_err(&ctrl_info->pci_dev->dev, 1161 "RPL returned unsupported data format %u\n", 1162 rpl_response_format); 1163 return -EINVAL; 1164 } else { 1165 dev_warn(&ctrl_info->pci_dev->dev, 1166 "RPL returned extended format 2 instead of 4\n"); 1167 } 1168 } 1169 1170 rpl_8byte_wwid_list = rpl_list; 1171 num_physicals = get_unaligned_be32(&rpl_8byte_wwid_list->header.list_length) / sizeof(rpl_8byte_wwid_list->lun_entries[0]); 1172 rpl_16byte_wwid_list_length = sizeof(struct report_lun_header) + (num_physicals * sizeof(struct report_phys_lun_16byte_wwid)); 1173 1174 rpl_16byte_wwid_list = kmalloc(rpl_16byte_wwid_list_length, GFP_KERNEL); 1175 if (!rpl_16byte_wwid_list) 1176 return -ENOMEM; 1177 1178 put_unaligned_be32(num_physicals * sizeof(struct report_phys_lun_16byte_wwid), 1179 &rpl_16byte_wwid_list->header.list_length); 1180 rpl_16byte_wwid_list->header.flags = rpl_8byte_wwid_list->header.flags; 1181 1182 for (i = 0; i < num_physicals; i++) { 1183 memcpy(&rpl_16byte_wwid_list->lun_entries[i].lunid, &rpl_8byte_wwid_list->lun_entries[i].lunid, sizeof(rpl_8byte_wwid_list->lun_entries[i].lunid)); 1184 memset(&rpl_16byte_wwid_list->lun_entries[i].wwid, 0, 8); 1185 memcpy(&rpl_16byte_wwid_list->lun_entries[i].wwid[8], &rpl_8byte_wwid_list->lun_entries[i].wwid, sizeof(rpl_8byte_wwid_list->lun_entries[i].wwid)); 1186 rpl_16byte_wwid_list->lun_entries[i].device_type = rpl_8byte_wwid_list->lun_entries[i].device_type; 1187 rpl_16byte_wwid_list->lun_entries[i].device_flags = rpl_8byte_wwid_list->lun_entries[i].device_flags; 1188 rpl_16byte_wwid_list->lun_entries[i].lun_count = rpl_8byte_wwid_list->lun_entries[i].lun_count; 1189 rpl_16byte_wwid_list->lun_entries[i].redundant_paths = rpl_8byte_wwid_list->lun_entries[i].redundant_paths; 1190 rpl_16byte_wwid_list->lun_entries[i].aio_handle = rpl_8byte_wwid_list->lun_entries[i].aio_handle; 1191 } 1192 1193 kfree(rpl_8byte_wwid_list); 1194 *buffer = rpl_16byte_wwid_list; 1195 1196 return 0; 1197 } 1198 1199 static inline int pqi_report_logical_luns(struct pqi_ctrl_info *ctrl_info, void **buffer) 1200 { 1201 return pqi_report_phys_logical_luns(ctrl_info, CISS_REPORT_LOG, buffer); 1202 } 1203 1204 static int pqi_get_device_lists(struct pqi_ctrl_info *ctrl_info, 1205 struct report_phys_lun_16byte_wwid_list **physdev_list, 1206 struct report_log_lun_list **logdev_list) 1207 { 1208 int rc; 1209 size_t logdev_list_length; 1210 size_t logdev_data_length; 1211 struct report_log_lun_list *internal_logdev_list; 1212 struct report_log_lun_list *logdev_data; 1213 struct report_lun_header report_lun_header; 1214 1215 rc = pqi_report_phys_luns(ctrl_info, (void **)physdev_list); 1216 if (rc) 1217 dev_err(&ctrl_info->pci_dev->dev, 1218 "report physical LUNs failed\n"); 1219 1220 rc = pqi_report_logical_luns(ctrl_info, (void **)logdev_list); 1221 if (rc) 1222 dev_err(&ctrl_info->pci_dev->dev, 1223 "report logical LUNs failed\n"); 1224 1225 /* 1226 * Tack the controller itself onto the end of the logical device list. 1227 */ 1228 1229 logdev_data = *logdev_list; 1230 1231 if (logdev_data) { 1232 logdev_list_length = 1233 get_unaligned_be32(&logdev_data->header.list_length); 1234 } else { 1235 memset(&report_lun_header, 0, sizeof(report_lun_header)); 1236 logdev_data = 1237 (struct report_log_lun_list *)&report_lun_header; 1238 logdev_list_length = 0; 1239 } 1240 1241 logdev_data_length = sizeof(struct report_lun_header) + 1242 logdev_list_length; 1243 1244 internal_logdev_list = kmalloc(logdev_data_length + 1245 sizeof(struct report_log_lun), GFP_KERNEL); 1246 if (!internal_logdev_list) { 1247 kfree(*logdev_list); 1248 *logdev_list = NULL; 1249 return -ENOMEM; 1250 } 1251 1252 memcpy(internal_logdev_list, logdev_data, logdev_data_length); 1253 memset((u8 *)internal_logdev_list + logdev_data_length, 0, 1254 sizeof(struct report_log_lun)); 1255 put_unaligned_be32(logdev_list_length + 1256 sizeof(struct report_log_lun), 1257 &internal_logdev_list->header.list_length); 1258 1259 kfree(*logdev_list); 1260 *logdev_list = internal_logdev_list; 1261 1262 return 0; 1263 } 1264 1265 static inline void pqi_set_bus_target_lun(struct pqi_scsi_dev *device, 1266 int bus, int target, int lun) 1267 { 1268 device->bus = bus; 1269 device->target = target; 1270 device->lun = lun; 1271 } 1272 1273 static void pqi_assign_bus_target_lun(struct pqi_scsi_dev *device) 1274 { 1275 u8 *scsi3addr; 1276 u32 lunid; 1277 int bus; 1278 int target; 1279 int lun; 1280 1281 scsi3addr = device->scsi3addr; 1282 lunid = get_unaligned_le32(scsi3addr); 1283 1284 if (pqi_is_hba_lunid(scsi3addr)) { 1285 /* The specified device is the controller. */ 1286 pqi_set_bus_target_lun(device, PQI_HBA_BUS, 0, lunid & 0x3fff); 1287 device->target_lun_valid = true; 1288 return; 1289 } 1290 1291 if (pqi_is_logical_device(device)) { 1292 if (device->is_external_raid_device) { 1293 bus = PQI_EXTERNAL_RAID_VOLUME_BUS; 1294 target = (lunid >> 16) & 0x3fff; 1295 lun = lunid & 0xff; 1296 } else { 1297 bus = PQI_RAID_VOLUME_BUS; 1298 target = 0; 1299 lun = lunid & 0x3fff; 1300 } 1301 pqi_set_bus_target_lun(device, bus, target, lun); 1302 device->target_lun_valid = true; 1303 return; 1304 } 1305 1306 /* 1307 * Defer target and LUN assignment for non-controller physical devices 1308 * because the SAS transport layer will make these assignments later. 1309 */ 1310 pqi_set_bus_target_lun(device, PQI_PHYSICAL_DEVICE_BUS, 0, 0); 1311 } 1312 1313 static void pqi_get_raid_level(struct pqi_ctrl_info *ctrl_info, 1314 struct pqi_scsi_dev *device) 1315 { 1316 int rc; 1317 u8 raid_level; 1318 u8 *buffer; 1319 1320 raid_level = SA_RAID_UNKNOWN; 1321 1322 buffer = kmalloc(64, GFP_KERNEL); 1323 if (buffer) { 1324 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1325 VPD_PAGE | CISS_VPD_LV_DEVICE_GEOMETRY, buffer, 64); 1326 if (rc == 0) { 1327 raid_level = buffer[8]; 1328 if (raid_level > SA_RAID_MAX) 1329 raid_level = SA_RAID_UNKNOWN; 1330 } 1331 kfree(buffer); 1332 } 1333 1334 device->raid_level = raid_level; 1335 } 1336 1337 static int pqi_validate_raid_map(struct pqi_ctrl_info *ctrl_info, 1338 struct pqi_scsi_dev *device, struct raid_map *raid_map) 1339 { 1340 char *err_msg; 1341 u32 raid_map_size; 1342 u32 r5or6_blocks_per_row; 1343 1344 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1345 1346 if (raid_map_size < offsetof(struct raid_map, disk_data)) { 1347 err_msg = "RAID map too small"; 1348 goto bad_raid_map; 1349 } 1350 1351 if (device->raid_level == SA_RAID_1) { 1352 if (get_unaligned_le16(&raid_map->layout_map_count) != 2) { 1353 err_msg = "invalid RAID-1 map"; 1354 goto bad_raid_map; 1355 } 1356 } else if (device->raid_level == SA_RAID_TRIPLE) { 1357 if (get_unaligned_le16(&raid_map->layout_map_count) != 3) { 1358 err_msg = "invalid RAID-1(Triple) map"; 1359 goto bad_raid_map; 1360 } 1361 } else if ((device->raid_level == SA_RAID_5 || 1362 device->raid_level == SA_RAID_6) && 1363 get_unaligned_le16(&raid_map->layout_map_count) > 1) { 1364 /* RAID 50/60 */ 1365 r5or6_blocks_per_row = 1366 get_unaligned_le16(&raid_map->strip_size) * 1367 get_unaligned_le16(&raid_map->data_disks_per_row); 1368 if (r5or6_blocks_per_row == 0) { 1369 err_msg = "invalid RAID-5 or RAID-6 map"; 1370 goto bad_raid_map; 1371 } 1372 } 1373 1374 return 0; 1375 1376 bad_raid_map: 1377 dev_warn(&ctrl_info->pci_dev->dev, 1378 "logical device %08x%08x %s\n", 1379 *((u32 *)&device->scsi3addr), 1380 *((u32 *)&device->scsi3addr[4]), err_msg); 1381 1382 return -EINVAL; 1383 } 1384 1385 static int pqi_get_raid_map(struct pqi_ctrl_info *ctrl_info, 1386 struct pqi_scsi_dev *device) 1387 { 1388 int rc; 1389 u32 raid_map_size; 1390 struct raid_map *raid_map; 1391 1392 raid_map = kmalloc(sizeof(*raid_map), GFP_KERNEL); 1393 if (!raid_map) 1394 return -ENOMEM; 1395 1396 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1397 device->scsi3addr, raid_map, sizeof(*raid_map), 0, NULL); 1398 if (rc) 1399 goto error; 1400 1401 raid_map_size = get_unaligned_le32(&raid_map->structure_size); 1402 1403 if (raid_map_size > sizeof(*raid_map)) { 1404 1405 kfree(raid_map); 1406 1407 raid_map = kmalloc(raid_map_size, GFP_KERNEL); 1408 if (!raid_map) 1409 return -ENOMEM; 1410 1411 rc = pqi_send_scsi_raid_request(ctrl_info, CISS_GET_RAID_MAP, 1412 device->scsi3addr, raid_map, raid_map_size, 0, NULL); 1413 if (rc) 1414 goto error; 1415 1416 if (get_unaligned_le32(&raid_map->structure_size) 1417 != raid_map_size) { 1418 dev_warn(&ctrl_info->pci_dev->dev, 1419 "requested %u bytes, received %u bytes\n", 1420 raid_map_size, 1421 get_unaligned_le32(&raid_map->structure_size)); 1422 rc = -EINVAL; 1423 goto error; 1424 } 1425 } 1426 1427 rc = pqi_validate_raid_map(ctrl_info, device, raid_map); 1428 if (rc) 1429 goto error; 1430 1431 device->raid_map = raid_map; 1432 1433 return 0; 1434 1435 error: 1436 kfree(raid_map); 1437 1438 return rc; 1439 } 1440 1441 static void pqi_set_max_transfer_encrypted(struct pqi_ctrl_info *ctrl_info, 1442 struct pqi_scsi_dev *device) 1443 { 1444 if (!ctrl_info->lv_drive_type_mix_valid) { 1445 device->max_transfer_encrypted = ~0; 1446 return; 1447 } 1448 1449 switch (LV_GET_DRIVE_TYPE_MIX(device->scsi3addr)) { 1450 case LV_DRIVE_TYPE_MIX_SAS_HDD_ONLY: 1451 case LV_DRIVE_TYPE_MIX_SATA_HDD_ONLY: 1452 case LV_DRIVE_TYPE_MIX_SAS_OR_SATA_SSD_ONLY: 1453 case LV_DRIVE_TYPE_MIX_SAS_SSD_ONLY: 1454 case LV_DRIVE_TYPE_MIX_SATA_SSD_ONLY: 1455 case LV_DRIVE_TYPE_MIX_SAS_ONLY: 1456 case LV_DRIVE_TYPE_MIX_SATA_ONLY: 1457 device->max_transfer_encrypted = 1458 ctrl_info->max_transfer_encrypted_sas_sata; 1459 break; 1460 case LV_DRIVE_TYPE_MIX_NVME_ONLY: 1461 device->max_transfer_encrypted = 1462 ctrl_info->max_transfer_encrypted_nvme; 1463 break; 1464 case LV_DRIVE_TYPE_MIX_UNKNOWN: 1465 case LV_DRIVE_TYPE_MIX_NO_RESTRICTION: 1466 default: 1467 device->max_transfer_encrypted = 1468 min(ctrl_info->max_transfer_encrypted_sas_sata, 1469 ctrl_info->max_transfer_encrypted_nvme); 1470 break; 1471 } 1472 } 1473 1474 static void pqi_get_raid_bypass_status(struct pqi_ctrl_info *ctrl_info, 1475 struct pqi_scsi_dev *device) 1476 { 1477 int rc; 1478 u8 *buffer; 1479 u8 bypass_status; 1480 1481 buffer = kmalloc(64, GFP_KERNEL); 1482 if (!buffer) 1483 return; 1484 1485 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1486 VPD_PAGE | CISS_VPD_LV_BYPASS_STATUS, buffer, 64); 1487 if (rc) 1488 goto out; 1489 1490 #define RAID_BYPASS_STATUS 4 1491 #define RAID_BYPASS_CONFIGURED 0x1 1492 #define RAID_BYPASS_ENABLED 0x2 1493 1494 bypass_status = buffer[RAID_BYPASS_STATUS]; 1495 device->raid_bypass_configured = 1496 (bypass_status & RAID_BYPASS_CONFIGURED) != 0; 1497 if (device->raid_bypass_configured && 1498 (bypass_status & RAID_BYPASS_ENABLED) && 1499 pqi_get_raid_map(ctrl_info, device) == 0) { 1500 device->raid_bypass_enabled = true; 1501 if (get_unaligned_le16(&device->raid_map->flags) & 1502 RAID_MAP_ENCRYPTION_ENABLED) 1503 pqi_set_max_transfer_encrypted(ctrl_info, device); 1504 } 1505 1506 out: 1507 kfree(buffer); 1508 } 1509 1510 /* 1511 * Use vendor-specific VPD to determine online/offline status of a volume. 1512 */ 1513 1514 static void pqi_get_volume_status(struct pqi_ctrl_info *ctrl_info, 1515 struct pqi_scsi_dev *device) 1516 { 1517 int rc; 1518 size_t page_length; 1519 u8 volume_status = CISS_LV_STATUS_UNAVAILABLE; 1520 bool volume_offline = true; 1521 u32 volume_flags; 1522 struct ciss_vpd_logical_volume_status *vpd; 1523 1524 vpd = kmalloc(sizeof(*vpd), GFP_KERNEL); 1525 if (!vpd) 1526 goto no_buffer; 1527 1528 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 1529 VPD_PAGE | CISS_VPD_LV_STATUS, vpd, sizeof(*vpd)); 1530 if (rc) 1531 goto out; 1532 1533 if (vpd->page_code != CISS_VPD_LV_STATUS) 1534 goto out; 1535 1536 page_length = offsetof(struct ciss_vpd_logical_volume_status, 1537 volume_status) + vpd->page_length; 1538 if (page_length < sizeof(*vpd)) 1539 goto out; 1540 1541 volume_status = vpd->volume_status; 1542 volume_flags = get_unaligned_be32(&vpd->flags); 1543 volume_offline = (volume_flags & CISS_LV_FLAGS_NO_HOST_IO) != 0; 1544 1545 out: 1546 kfree(vpd); 1547 no_buffer: 1548 device->volume_status = volume_status; 1549 device->volume_offline = volume_offline; 1550 } 1551 1552 #define PQI_DEVICE_PHY_MAP_SUPPORTED 0x10 1553 1554 static int pqi_get_physical_device_info(struct pqi_ctrl_info *ctrl_info, 1555 struct pqi_scsi_dev *device, 1556 struct bmic_identify_physical_device *id_phys) 1557 { 1558 int rc; 1559 1560 memset(id_phys, 0, sizeof(*id_phys)); 1561 1562 rc = pqi_identify_physical_device(ctrl_info, device, 1563 id_phys, sizeof(*id_phys)); 1564 if (rc) { 1565 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH; 1566 return rc; 1567 } 1568 1569 scsi_sanitize_inquiry_string(&id_phys->model[0], 8); 1570 scsi_sanitize_inquiry_string(&id_phys->model[8], 16); 1571 1572 memcpy(device->vendor, &id_phys->model[0], sizeof(device->vendor)); 1573 memcpy(device->model, &id_phys->model[8], sizeof(device->model)); 1574 1575 device->box_index = id_phys->box_index; 1576 device->phys_box_on_bus = id_phys->phys_box_on_bus; 1577 device->phy_connected_dev_type = id_phys->phy_connected_dev_type[0]; 1578 device->queue_depth = 1579 get_unaligned_le16(&id_phys->current_queue_depth_limit); 1580 device->active_path_index = id_phys->active_path_number; 1581 device->path_map = id_phys->redundant_path_present_map; 1582 memcpy(&device->box, 1583 &id_phys->alternate_paths_phys_box_on_port, 1584 sizeof(device->box)); 1585 memcpy(&device->phys_connector, 1586 &id_phys->alternate_paths_phys_connector, 1587 sizeof(device->phys_connector)); 1588 device->bay = id_phys->phys_bay_in_box; 1589 1590 memcpy(&device->page_83_identifier, &id_phys->page_83_identifier, 1591 sizeof(device->page_83_identifier)); 1592 1593 if ((id_phys->even_more_flags & PQI_DEVICE_PHY_MAP_SUPPORTED) && 1594 id_phys->phy_count) 1595 device->phy_id = 1596 id_phys->phy_to_phy_map[device->active_path_index]; 1597 else 1598 device->phy_id = 0xFF; 1599 1600 return 0; 1601 } 1602 1603 static int pqi_get_logical_device_info(struct pqi_ctrl_info *ctrl_info, 1604 struct pqi_scsi_dev *device) 1605 { 1606 int rc; 1607 u8 *buffer; 1608 1609 buffer = kmalloc(64, GFP_KERNEL); 1610 if (!buffer) 1611 return -ENOMEM; 1612 1613 /* Send an inquiry to the device to see what it is. */ 1614 rc = pqi_scsi_inquiry(ctrl_info, device->scsi3addr, 0, buffer, 64); 1615 if (rc) 1616 goto out; 1617 1618 scsi_sanitize_inquiry_string(&buffer[8], 8); 1619 scsi_sanitize_inquiry_string(&buffer[16], 16); 1620 1621 device->devtype = buffer[0] & 0x1f; 1622 memcpy(device->vendor, &buffer[8], sizeof(device->vendor)); 1623 memcpy(device->model, &buffer[16], sizeof(device->model)); 1624 1625 if (device->devtype == TYPE_DISK) { 1626 if (device->is_external_raid_device) { 1627 device->raid_level = SA_RAID_UNKNOWN; 1628 device->volume_status = CISS_LV_OK; 1629 device->volume_offline = false; 1630 } else { 1631 pqi_get_raid_level(ctrl_info, device); 1632 pqi_get_raid_bypass_status(ctrl_info, device); 1633 pqi_get_volume_status(ctrl_info, device); 1634 } 1635 } 1636 1637 out: 1638 kfree(buffer); 1639 1640 return rc; 1641 } 1642 1643 /* 1644 * Prevent adding drive to OS for some corner cases such as a drive 1645 * undergoing a sanitize operation. Some OSes will continue to poll 1646 * the drive until the sanitize completes, which can take hours, 1647 * resulting in long bootup delays. Commands such as TUR, READ_CAP 1648 * are allowed, but READ/WRITE cause check condition. So the OS 1649 * cannot check/read the partition table. 1650 * Note: devices that have completed sanitize must be re-enabled 1651 * using the management utility. 1652 */ 1653 static bool pqi_keep_device_offline(struct pqi_ctrl_info *ctrl_info, 1654 struct pqi_scsi_dev *device) 1655 { 1656 u8 scsi_status; 1657 int rc; 1658 enum dma_data_direction dir; 1659 char *buffer; 1660 int buffer_length = 64; 1661 size_t sense_data_length; 1662 struct scsi_sense_hdr sshdr; 1663 struct pqi_raid_path_request request; 1664 struct pqi_raid_error_info error_info; 1665 bool offline = false; /* Assume keep online */ 1666 1667 /* Do not check controllers. */ 1668 if (pqi_is_hba_lunid(device->scsi3addr)) 1669 return false; 1670 1671 /* Do not check LVs. */ 1672 if (pqi_is_logical_device(device)) 1673 return false; 1674 1675 buffer = kmalloc(buffer_length, GFP_KERNEL); 1676 if (!buffer) 1677 return false; /* Assume not offline */ 1678 1679 /* Check for SANITIZE in progress using TUR */ 1680 rc = pqi_build_raid_path_request(ctrl_info, &request, 1681 TEST_UNIT_READY, RAID_CTLR_LUNID, buffer, 1682 buffer_length, 0, &dir); 1683 if (rc) 1684 goto out; /* Assume not offline */ 1685 1686 memcpy(request.lun_number, device->scsi3addr, sizeof(request.lun_number)); 1687 1688 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, &error_info); 1689 1690 if (rc) 1691 goto out; /* Assume not offline */ 1692 1693 scsi_status = error_info.status; 1694 sense_data_length = get_unaligned_le16(&error_info.sense_data_length); 1695 if (sense_data_length == 0) 1696 sense_data_length = 1697 get_unaligned_le16(&error_info.response_data_length); 1698 if (sense_data_length) { 1699 if (sense_data_length > sizeof(error_info.data)) 1700 sense_data_length = sizeof(error_info.data); 1701 1702 /* 1703 * Check for sanitize in progress: asc:0x04, ascq: 0x1b 1704 */ 1705 if (scsi_status == SAM_STAT_CHECK_CONDITION && 1706 scsi_normalize_sense(error_info.data, 1707 sense_data_length, &sshdr) && 1708 sshdr.sense_key == NOT_READY && 1709 sshdr.asc == 0x04 && 1710 sshdr.ascq == 0x1b) { 1711 device->device_offline = true; 1712 offline = true; 1713 goto out; /* Keep device offline */ 1714 } 1715 } 1716 1717 out: 1718 kfree(buffer); 1719 return offline; 1720 } 1721 1722 static int pqi_get_device_info(struct pqi_ctrl_info *ctrl_info, 1723 struct pqi_scsi_dev *device, 1724 struct bmic_identify_physical_device *id_phys) 1725 { 1726 int rc; 1727 1728 if (device->is_expander_smp_device) 1729 return 0; 1730 1731 if (pqi_is_logical_device(device)) 1732 rc = pqi_get_logical_device_info(ctrl_info, device); 1733 else 1734 rc = pqi_get_physical_device_info(ctrl_info, device, id_phys); 1735 1736 return rc; 1737 } 1738 1739 static void pqi_show_volume_status(struct pqi_ctrl_info *ctrl_info, 1740 struct pqi_scsi_dev *device) 1741 { 1742 char *status; 1743 static const char unknown_state_str[] = 1744 "Volume is in an unknown state (%u)"; 1745 char unknown_state_buffer[sizeof(unknown_state_str) + 10]; 1746 1747 switch (device->volume_status) { 1748 case CISS_LV_OK: 1749 status = "Volume online"; 1750 break; 1751 case CISS_LV_FAILED: 1752 status = "Volume failed"; 1753 break; 1754 case CISS_LV_NOT_CONFIGURED: 1755 status = "Volume not configured"; 1756 break; 1757 case CISS_LV_DEGRADED: 1758 status = "Volume degraded"; 1759 break; 1760 case CISS_LV_READY_FOR_RECOVERY: 1761 status = "Volume ready for recovery operation"; 1762 break; 1763 case CISS_LV_UNDERGOING_RECOVERY: 1764 status = "Volume undergoing recovery"; 1765 break; 1766 case CISS_LV_WRONG_PHYSICAL_DRIVE_REPLACED: 1767 status = "Wrong physical drive was replaced"; 1768 break; 1769 case CISS_LV_PHYSICAL_DRIVE_CONNECTION_PROBLEM: 1770 status = "A physical drive not properly connected"; 1771 break; 1772 case CISS_LV_HARDWARE_OVERHEATING: 1773 status = "Hardware is overheating"; 1774 break; 1775 case CISS_LV_HARDWARE_HAS_OVERHEATED: 1776 status = "Hardware has overheated"; 1777 break; 1778 case CISS_LV_UNDERGOING_EXPANSION: 1779 status = "Volume undergoing expansion"; 1780 break; 1781 case CISS_LV_NOT_AVAILABLE: 1782 status = "Volume waiting for transforming volume"; 1783 break; 1784 case CISS_LV_QUEUED_FOR_EXPANSION: 1785 status = "Volume queued for expansion"; 1786 break; 1787 case CISS_LV_DISABLED_SCSI_ID_CONFLICT: 1788 status = "Volume disabled due to SCSI ID conflict"; 1789 break; 1790 case CISS_LV_EJECTED: 1791 status = "Volume has been ejected"; 1792 break; 1793 case CISS_LV_UNDERGOING_ERASE: 1794 status = "Volume undergoing background erase"; 1795 break; 1796 case CISS_LV_READY_FOR_PREDICTIVE_SPARE_REBUILD: 1797 status = "Volume ready for predictive spare rebuild"; 1798 break; 1799 case CISS_LV_UNDERGOING_RPI: 1800 status = "Volume undergoing rapid parity initialization"; 1801 break; 1802 case CISS_LV_PENDING_RPI: 1803 status = "Volume queued for rapid parity initialization"; 1804 break; 1805 case CISS_LV_ENCRYPTED_NO_KEY: 1806 status = "Encrypted volume inaccessible - key not present"; 1807 break; 1808 case CISS_LV_UNDERGOING_ENCRYPTION: 1809 status = "Volume undergoing encryption process"; 1810 break; 1811 case CISS_LV_UNDERGOING_ENCRYPTION_REKEYING: 1812 status = "Volume undergoing encryption re-keying process"; 1813 break; 1814 case CISS_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1815 status = "Volume encrypted but encryption is disabled"; 1816 break; 1817 case CISS_LV_PENDING_ENCRYPTION: 1818 status = "Volume pending migration to encrypted state"; 1819 break; 1820 case CISS_LV_PENDING_ENCRYPTION_REKEYING: 1821 status = "Volume pending encryption rekeying"; 1822 break; 1823 case CISS_LV_NOT_SUPPORTED: 1824 status = "Volume not supported on this controller"; 1825 break; 1826 case CISS_LV_STATUS_UNAVAILABLE: 1827 status = "Volume status not available"; 1828 break; 1829 default: 1830 snprintf(unknown_state_buffer, sizeof(unknown_state_buffer), 1831 unknown_state_str, device->volume_status); 1832 status = unknown_state_buffer; 1833 break; 1834 } 1835 1836 dev_info(&ctrl_info->pci_dev->dev, 1837 "scsi %d:%d:%d:%d %s\n", 1838 ctrl_info->scsi_host->host_no, 1839 device->bus, device->target, device->lun, status); 1840 } 1841 1842 static void pqi_rescan_worker(struct work_struct *work) 1843 { 1844 struct pqi_ctrl_info *ctrl_info; 1845 1846 ctrl_info = container_of(to_delayed_work(work), struct pqi_ctrl_info, 1847 rescan_work); 1848 1849 pqi_scan_scsi_devices(ctrl_info); 1850 } 1851 1852 static int pqi_add_device(struct pqi_ctrl_info *ctrl_info, 1853 struct pqi_scsi_dev *device) 1854 { 1855 int rc; 1856 1857 if (pqi_is_logical_device(device)) 1858 rc = scsi_add_device(ctrl_info->scsi_host, device->bus, 1859 device->target, device->lun); 1860 else 1861 rc = pqi_add_sas_device(ctrl_info->sas_host, device); 1862 1863 return rc; 1864 } 1865 1866 #define PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS (20 * 1000) 1867 1868 static inline void pqi_remove_device(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device) 1869 { 1870 int rc; 1871 1872 rc = pqi_device_wait_for_pending_io(ctrl_info, device, 1873 PQI_REMOVE_DEVICE_PENDING_IO_TIMEOUT_MSECS); 1874 if (rc) 1875 dev_err(&ctrl_info->pci_dev->dev, 1876 "scsi %d:%d:%d:%d removing device with %d outstanding command(s)\n", 1877 ctrl_info->scsi_host->host_no, device->bus, 1878 device->target, device->lun, 1879 atomic_read(&device->scsi_cmds_outstanding)); 1880 1881 if (pqi_is_logical_device(device)) 1882 scsi_remove_device(device->sdev); 1883 else 1884 pqi_remove_sas_device(device); 1885 1886 pqi_device_remove_start(device); 1887 } 1888 1889 /* Assumes the SCSI device list lock is held. */ 1890 1891 static struct pqi_scsi_dev *pqi_find_scsi_dev(struct pqi_ctrl_info *ctrl_info, 1892 int bus, int target, int lun) 1893 { 1894 struct pqi_scsi_dev *device; 1895 1896 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 1897 if (device->bus == bus && device->target == target && device->lun == lun) 1898 return device; 1899 1900 return NULL; 1901 } 1902 1903 static inline bool pqi_device_equal(struct pqi_scsi_dev *dev1, struct pqi_scsi_dev *dev2) 1904 { 1905 if (dev1->is_physical_device != dev2->is_physical_device) 1906 return false; 1907 1908 if (dev1->is_physical_device) 1909 return memcmp(dev1->wwid, dev2->wwid, sizeof(dev1->wwid)) == 0; 1910 1911 return memcmp(dev1->volume_id, dev2->volume_id, sizeof(dev1->volume_id)) == 0; 1912 } 1913 1914 enum pqi_find_result { 1915 DEVICE_NOT_FOUND, 1916 DEVICE_CHANGED, 1917 DEVICE_SAME, 1918 }; 1919 1920 static enum pqi_find_result pqi_scsi_find_entry(struct pqi_ctrl_info *ctrl_info, 1921 struct pqi_scsi_dev *device_to_find, struct pqi_scsi_dev **matching_device) 1922 { 1923 struct pqi_scsi_dev *device; 1924 1925 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 1926 if (pqi_scsi3addr_equal(device_to_find->scsi3addr, device->scsi3addr)) { 1927 *matching_device = device; 1928 if (pqi_device_equal(device_to_find, device)) { 1929 if (device_to_find->volume_offline) 1930 return DEVICE_CHANGED; 1931 return DEVICE_SAME; 1932 } 1933 return DEVICE_CHANGED; 1934 } 1935 } 1936 1937 return DEVICE_NOT_FOUND; 1938 } 1939 1940 static inline const char *pqi_device_type(struct pqi_scsi_dev *device) 1941 { 1942 if (device->is_expander_smp_device) 1943 return "Enclosure SMP "; 1944 1945 return scsi_device_type(device->devtype); 1946 } 1947 1948 #define PQI_DEV_INFO_BUFFER_LENGTH 128 1949 1950 static void pqi_dev_info(struct pqi_ctrl_info *ctrl_info, 1951 char *action, struct pqi_scsi_dev *device) 1952 { 1953 ssize_t count; 1954 char buffer[PQI_DEV_INFO_BUFFER_LENGTH]; 1955 1956 count = scnprintf(buffer, PQI_DEV_INFO_BUFFER_LENGTH, 1957 "%d:%d:", ctrl_info->scsi_host->host_no, device->bus); 1958 1959 if (device->target_lun_valid) 1960 count += scnprintf(buffer + count, 1961 PQI_DEV_INFO_BUFFER_LENGTH - count, 1962 "%d:%d", 1963 device->target, 1964 device->lun); 1965 else 1966 count += scnprintf(buffer + count, 1967 PQI_DEV_INFO_BUFFER_LENGTH - count, 1968 "-:-"); 1969 1970 if (pqi_is_logical_device(device)) 1971 count += scnprintf(buffer + count, 1972 PQI_DEV_INFO_BUFFER_LENGTH - count, 1973 " %08x%08x", 1974 *((u32 *)&device->scsi3addr), 1975 *((u32 *)&device->scsi3addr[4])); 1976 else 1977 count += scnprintf(buffer + count, 1978 PQI_DEV_INFO_BUFFER_LENGTH - count, 1979 " %016llx%016llx", 1980 get_unaligned_be64(&device->wwid[0]), 1981 get_unaligned_be64(&device->wwid[8])); 1982 1983 count += scnprintf(buffer + count, PQI_DEV_INFO_BUFFER_LENGTH - count, 1984 " %s %.8s %.16s ", 1985 pqi_device_type(device), 1986 device->vendor, 1987 device->model); 1988 1989 if (pqi_is_logical_device(device)) { 1990 if (device->devtype == TYPE_DISK) 1991 count += scnprintf(buffer + count, 1992 PQI_DEV_INFO_BUFFER_LENGTH - count, 1993 "SSDSmartPathCap%c En%c %-12s", 1994 device->raid_bypass_configured ? '+' : '-', 1995 device->raid_bypass_enabled ? '+' : '-', 1996 pqi_raid_level_to_string(device->raid_level)); 1997 } else { 1998 count += scnprintf(buffer + count, 1999 PQI_DEV_INFO_BUFFER_LENGTH - count, 2000 "AIO%c", device->aio_enabled ? '+' : '-'); 2001 if (device->devtype == TYPE_DISK || 2002 device->devtype == TYPE_ZBC) 2003 count += scnprintf(buffer + count, 2004 PQI_DEV_INFO_BUFFER_LENGTH - count, 2005 " qd=%-6d", device->queue_depth); 2006 } 2007 2008 dev_info(&ctrl_info->pci_dev->dev, "%s %s\n", action, buffer); 2009 } 2010 2011 /* Assumes the SCSI device list lock is held. */ 2012 2013 static void pqi_scsi_update_device(struct pqi_scsi_dev *existing_device, 2014 struct pqi_scsi_dev *new_device) 2015 { 2016 existing_device->device_type = new_device->device_type; 2017 existing_device->bus = new_device->bus; 2018 if (new_device->target_lun_valid) { 2019 existing_device->target = new_device->target; 2020 existing_device->lun = new_device->lun; 2021 existing_device->target_lun_valid = true; 2022 } 2023 2024 if ((existing_device->volume_status == CISS_LV_QUEUED_FOR_EXPANSION || 2025 existing_device->volume_status == CISS_LV_UNDERGOING_EXPANSION) && 2026 new_device->volume_status == CISS_LV_OK) 2027 existing_device->rescan = true; 2028 2029 /* By definition, the scsi3addr and wwid fields are already the same. */ 2030 2031 existing_device->is_physical_device = new_device->is_physical_device; 2032 existing_device->is_external_raid_device = 2033 new_device->is_external_raid_device; 2034 existing_device->is_expander_smp_device = 2035 new_device->is_expander_smp_device; 2036 existing_device->aio_enabled = new_device->aio_enabled; 2037 memcpy(existing_device->vendor, new_device->vendor, 2038 sizeof(existing_device->vendor)); 2039 memcpy(existing_device->model, new_device->model, 2040 sizeof(existing_device->model)); 2041 existing_device->sas_address = new_device->sas_address; 2042 existing_device->raid_level = new_device->raid_level; 2043 existing_device->queue_depth = new_device->queue_depth; 2044 existing_device->aio_handle = new_device->aio_handle; 2045 existing_device->volume_status = new_device->volume_status; 2046 existing_device->active_path_index = new_device->active_path_index; 2047 existing_device->phy_id = new_device->phy_id; 2048 existing_device->path_map = new_device->path_map; 2049 existing_device->bay = new_device->bay; 2050 existing_device->box_index = new_device->box_index; 2051 existing_device->phys_box_on_bus = new_device->phys_box_on_bus; 2052 existing_device->phy_connected_dev_type = new_device->phy_connected_dev_type; 2053 memcpy(existing_device->box, new_device->box, 2054 sizeof(existing_device->box)); 2055 memcpy(existing_device->phys_connector, new_device->phys_connector, 2056 sizeof(existing_device->phys_connector)); 2057 existing_device->next_bypass_group = 0; 2058 kfree(existing_device->raid_map); 2059 existing_device->raid_map = new_device->raid_map; 2060 existing_device->raid_bypass_configured = 2061 new_device->raid_bypass_configured; 2062 existing_device->raid_bypass_enabled = 2063 new_device->raid_bypass_enabled; 2064 existing_device->device_offline = false; 2065 2066 /* To prevent this from being freed later. */ 2067 new_device->raid_map = NULL; 2068 } 2069 2070 static inline void pqi_free_device(struct pqi_scsi_dev *device) 2071 { 2072 if (device) { 2073 kfree(device->raid_map); 2074 kfree(device); 2075 } 2076 } 2077 2078 /* 2079 * Called when exposing a new device to the OS fails in order to re-adjust 2080 * our internal SCSI device list to match the SCSI ML's view. 2081 */ 2082 2083 static inline void pqi_fixup_botched_add(struct pqi_ctrl_info *ctrl_info, 2084 struct pqi_scsi_dev *device) 2085 { 2086 unsigned long flags; 2087 2088 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2089 list_del(&device->scsi_device_list_entry); 2090 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2091 2092 /* Allow the device structure to be freed later. */ 2093 device->keep_device = false; 2094 } 2095 2096 static inline bool pqi_is_device_added(struct pqi_scsi_dev *device) 2097 { 2098 if (device->is_expander_smp_device) 2099 return device->sas_port != NULL; 2100 2101 return device->sdev != NULL; 2102 } 2103 2104 static void pqi_update_device_list(struct pqi_ctrl_info *ctrl_info, 2105 struct pqi_scsi_dev *new_device_list[], unsigned int num_new_devices) 2106 { 2107 int rc; 2108 unsigned int i; 2109 unsigned long flags; 2110 enum pqi_find_result find_result; 2111 struct pqi_scsi_dev *device; 2112 struct pqi_scsi_dev *next; 2113 struct pqi_scsi_dev *matching_device; 2114 LIST_HEAD(add_list); 2115 LIST_HEAD(delete_list); 2116 2117 /* 2118 * The idea here is to do as little work as possible while holding the 2119 * spinlock. That's why we go to great pains to defer anything other 2120 * than updating the internal device list until after we release the 2121 * spinlock. 2122 */ 2123 2124 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2125 2126 /* Assume that all devices in the existing list have gone away. */ 2127 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) 2128 device->device_gone = true; 2129 2130 for (i = 0; i < num_new_devices; i++) { 2131 device = new_device_list[i]; 2132 2133 find_result = pqi_scsi_find_entry(ctrl_info, device, 2134 &matching_device); 2135 2136 switch (find_result) { 2137 case DEVICE_SAME: 2138 /* 2139 * The newly found device is already in the existing 2140 * device list. 2141 */ 2142 device->new_device = false; 2143 matching_device->device_gone = false; 2144 pqi_scsi_update_device(matching_device, device); 2145 break; 2146 case DEVICE_NOT_FOUND: 2147 /* 2148 * The newly found device is NOT in the existing device 2149 * list. 2150 */ 2151 device->new_device = true; 2152 break; 2153 case DEVICE_CHANGED: 2154 /* 2155 * The original device has gone away and we need to add 2156 * the new device. 2157 */ 2158 device->new_device = true; 2159 break; 2160 } 2161 } 2162 2163 /* Process all devices that have gone away. */ 2164 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list, 2165 scsi_device_list_entry) { 2166 if (device->device_gone) { 2167 list_del(&device->scsi_device_list_entry); 2168 list_add_tail(&device->delete_list_entry, &delete_list); 2169 } 2170 } 2171 2172 /* Process all new devices. */ 2173 for (i = 0; i < num_new_devices; i++) { 2174 device = new_device_list[i]; 2175 if (!device->new_device) 2176 continue; 2177 if (device->volume_offline) 2178 continue; 2179 list_add_tail(&device->scsi_device_list_entry, 2180 &ctrl_info->scsi_device_list); 2181 list_add_tail(&device->add_list_entry, &add_list); 2182 /* To prevent this device structure from being freed later. */ 2183 device->keep_device = true; 2184 } 2185 2186 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2187 2188 /* 2189 * If OFA is in progress and there are devices that need to be deleted, 2190 * allow any pending reset operations to continue and unblock any SCSI 2191 * requests before removal. 2192 */ 2193 if (pqi_ofa_in_progress(ctrl_info)) { 2194 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) 2195 if (pqi_is_device_added(device)) 2196 pqi_device_remove_start(device); 2197 pqi_ctrl_unblock_device_reset(ctrl_info); 2198 pqi_scsi_unblock_requests(ctrl_info); 2199 } 2200 2201 /* Remove all devices that have gone away. */ 2202 list_for_each_entry_safe(device, next, &delete_list, delete_list_entry) { 2203 if (device->volume_offline) { 2204 pqi_dev_info(ctrl_info, "offline", device); 2205 pqi_show_volume_status(ctrl_info, device); 2206 } else { 2207 pqi_dev_info(ctrl_info, "removed", device); 2208 } 2209 if (pqi_is_device_added(device)) 2210 pqi_remove_device(ctrl_info, device); 2211 list_del(&device->delete_list_entry); 2212 pqi_free_device(device); 2213 } 2214 2215 /* 2216 * Notify the SCSI ML if the queue depth of any existing device has 2217 * changed. 2218 */ 2219 list_for_each_entry(device, &ctrl_info->scsi_device_list, scsi_device_list_entry) { 2220 if (device->sdev && device->queue_depth != device->advertised_queue_depth) { 2221 device->advertised_queue_depth = device->queue_depth; 2222 scsi_change_queue_depth(device->sdev, device->advertised_queue_depth); 2223 if (device->rescan) { 2224 scsi_rescan_device(&device->sdev->sdev_gendev); 2225 device->rescan = false; 2226 } 2227 } 2228 } 2229 2230 /* Expose any new devices. */ 2231 list_for_each_entry_safe(device, next, &add_list, add_list_entry) { 2232 if (!pqi_is_device_added(device)) { 2233 rc = pqi_add_device(ctrl_info, device); 2234 if (rc == 0) { 2235 pqi_dev_info(ctrl_info, "added", device); 2236 } else { 2237 dev_warn(&ctrl_info->pci_dev->dev, 2238 "scsi %d:%d:%d:%d addition failed, device not added\n", 2239 ctrl_info->scsi_host->host_no, 2240 device->bus, device->target, 2241 device->lun); 2242 pqi_fixup_botched_add(ctrl_info, device); 2243 } 2244 } 2245 } 2246 } 2247 2248 static inline bool pqi_is_supported_device(struct pqi_scsi_dev *device) 2249 { 2250 /* 2251 * Only support the HBA controller itself as a RAID 2252 * controller. If it's a RAID controller other than 2253 * the HBA itself (an external RAID controller, for 2254 * example), we don't support it. 2255 */ 2256 if (device->device_type == SA_DEVICE_TYPE_CONTROLLER && 2257 !pqi_is_hba_lunid(device->scsi3addr)) 2258 return false; 2259 2260 return true; 2261 } 2262 2263 static inline bool pqi_skip_device(u8 *scsi3addr) 2264 { 2265 /* Ignore all masked devices. */ 2266 if (MASKED_DEVICE(scsi3addr)) 2267 return true; 2268 2269 return false; 2270 } 2271 2272 static inline void pqi_mask_device(u8 *scsi3addr) 2273 { 2274 scsi3addr[3] |= 0xc0; 2275 } 2276 2277 static inline bool pqi_is_device_with_sas_address(struct pqi_scsi_dev *device) 2278 { 2279 switch (device->device_type) { 2280 case SA_DEVICE_TYPE_SAS: 2281 case SA_DEVICE_TYPE_EXPANDER_SMP: 2282 case SA_DEVICE_TYPE_SES: 2283 return true; 2284 } 2285 2286 return false; 2287 } 2288 2289 static inline bool pqi_expose_device(struct pqi_scsi_dev *device) 2290 { 2291 return !device->is_physical_device || !pqi_skip_device(device->scsi3addr); 2292 } 2293 2294 static inline void pqi_set_physical_device_wwid(struct pqi_ctrl_info *ctrl_info, 2295 struct pqi_scsi_dev *device, struct report_phys_lun_16byte_wwid *phys_lun) 2296 { 2297 if (ctrl_info->unique_wwid_in_report_phys_lun_supported || 2298 ctrl_info->rpl_extended_format_4_5_supported || 2299 pqi_is_device_with_sas_address(device)) 2300 memcpy(device->wwid, phys_lun->wwid, sizeof(device->wwid)); 2301 else 2302 memcpy(&device->wwid[8], device->page_83_identifier, 8); 2303 } 2304 2305 static int pqi_update_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2306 { 2307 int i; 2308 int rc; 2309 LIST_HEAD(new_device_list_head); 2310 struct report_phys_lun_16byte_wwid_list *physdev_list = NULL; 2311 struct report_log_lun_list *logdev_list = NULL; 2312 struct report_phys_lun_16byte_wwid *phys_lun; 2313 struct report_log_lun *log_lun; 2314 struct bmic_identify_physical_device *id_phys = NULL; 2315 u32 num_physicals; 2316 u32 num_logicals; 2317 struct pqi_scsi_dev **new_device_list = NULL; 2318 struct pqi_scsi_dev *device; 2319 struct pqi_scsi_dev *next; 2320 unsigned int num_new_devices; 2321 unsigned int num_valid_devices; 2322 bool is_physical_device; 2323 u8 *scsi3addr; 2324 unsigned int physical_index; 2325 unsigned int logical_index; 2326 static char *out_of_memory_msg = 2327 "failed to allocate memory, device discovery stopped"; 2328 2329 rc = pqi_get_device_lists(ctrl_info, &physdev_list, &logdev_list); 2330 if (rc) 2331 goto out; 2332 2333 if (physdev_list) 2334 num_physicals = 2335 get_unaligned_be32(&physdev_list->header.list_length) 2336 / sizeof(physdev_list->lun_entries[0]); 2337 else 2338 num_physicals = 0; 2339 2340 if (logdev_list) 2341 num_logicals = 2342 get_unaligned_be32(&logdev_list->header.list_length) 2343 / sizeof(logdev_list->lun_entries[0]); 2344 else 2345 num_logicals = 0; 2346 2347 if (num_physicals) { 2348 /* 2349 * We need this buffer for calls to pqi_get_physical_disk_info() 2350 * below. We allocate it here instead of inside 2351 * pqi_get_physical_disk_info() because it's a fairly large 2352 * buffer. 2353 */ 2354 id_phys = kmalloc(sizeof(*id_phys), GFP_KERNEL); 2355 if (!id_phys) { 2356 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2357 out_of_memory_msg); 2358 rc = -ENOMEM; 2359 goto out; 2360 } 2361 2362 if (pqi_hide_vsep) { 2363 for (i = num_physicals - 1; i >= 0; i--) { 2364 phys_lun = &physdev_list->lun_entries[i]; 2365 if (CISS_GET_DRIVE_NUMBER(phys_lun->lunid) == PQI_VSEP_CISS_BTL) { 2366 pqi_mask_device(phys_lun->lunid); 2367 break; 2368 } 2369 } 2370 } 2371 } 2372 2373 if (num_logicals && 2374 (logdev_list->header.flags & CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX)) 2375 ctrl_info->lv_drive_type_mix_valid = true; 2376 2377 num_new_devices = num_physicals + num_logicals; 2378 2379 new_device_list = kmalloc_array(num_new_devices, 2380 sizeof(*new_device_list), 2381 GFP_KERNEL); 2382 if (!new_device_list) { 2383 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", out_of_memory_msg); 2384 rc = -ENOMEM; 2385 goto out; 2386 } 2387 2388 for (i = 0; i < num_new_devices; i++) { 2389 device = kzalloc(sizeof(*device), GFP_KERNEL); 2390 if (!device) { 2391 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2392 out_of_memory_msg); 2393 rc = -ENOMEM; 2394 goto out; 2395 } 2396 list_add_tail(&device->new_device_list_entry, 2397 &new_device_list_head); 2398 } 2399 2400 device = NULL; 2401 num_valid_devices = 0; 2402 physical_index = 0; 2403 logical_index = 0; 2404 2405 for (i = 0; i < num_new_devices; i++) { 2406 2407 if ((!pqi_expose_ld_first && i < num_physicals) || 2408 (pqi_expose_ld_first && i >= num_logicals)) { 2409 is_physical_device = true; 2410 phys_lun = &physdev_list->lun_entries[physical_index++]; 2411 log_lun = NULL; 2412 scsi3addr = phys_lun->lunid; 2413 } else { 2414 is_physical_device = false; 2415 phys_lun = NULL; 2416 log_lun = &logdev_list->lun_entries[logical_index++]; 2417 scsi3addr = log_lun->lunid; 2418 } 2419 2420 if (is_physical_device && pqi_skip_device(scsi3addr)) 2421 continue; 2422 2423 if (device) 2424 device = list_next_entry(device, new_device_list_entry); 2425 else 2426 device = list_first_entry(&new_device_list_head, 2427 struct pqi_scsi_dev, new_device_list_entry); 2428 2429 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 2430 device->is_physical_device = is_physical_device; 2431 if (is_physical_device) { 2432 device->device_type = phys_lun->device_type; 2433 if (device->device_type == SA_DEVICE_TYPE_EXPANDER_SMP) 2434 device->is_expander_smp_device = true; 2435 } else { 2436 device->is_external_raid_device = 2437 pqi_is_external_raid_addr(scsi3addr); 2438 } 2439 2440 if (!pqi_is_supported_device(device)) 2441 continue; 2442 2443 /* Do not present disks that the OS cannot fully probe */ 2444 if (pqi_keep_device_offline(ctrl_info, device)) 2445 continue; 2446 2447 /* Gather information about the device. */ 2448 rc = pqi_get_device_info(ctrl_info, device, id_phys); 2449 if (rc == -ENOMEM) { 2450 dev_warn(&ctrl_info->pci_dev->dev, "%s\n", 2451 out_of_memory_msg); 2452 goto out; 2453 } 2454 if (rc) { 2455 if (device->is_physical_device) 2456 dev_warn(&ctrl_info->pci_dev->dev, 2457 "obtaining device info failed, skipping physical device %016llx%016llx\n", 2458 get_unaligned_be64(&phys_lun->wwid[0]), 2459 get_unaligned_be64(&phys_lun->wwid[8])); 2460 else 2461 dev_warn(&ctrl_info->pci_dev->dev, 2462 "obtaining device info failed, skipping logical device %08x%08x\n", 2463 *((u32 *)&device->scsi3addr), 2464 *((u32 *)&device->scsi3addr[4])); 2465 rc = 0; 2466 continue; 2467 } 2468 2469 pqi_assign_bus_target_lun(device); 2470 2471 if (device->is_physical_device) { 2472 pqi_set_physical_device_wwid(ctrl_info, device, phys_lun); 2473 if ((phys_lun->device_flags & 2474 CISS_REPORT_PHYS_DEV_FLAG_AIO_ENABLED) && 2475 phys_lun->aio_handle) { 2476 device->aio_enabled = true; 2477 device->aio_handle = 2478 phys_lun->aio_handle; 2479 } 2480 } else { 2481 memcpy(device->volume_id, log_lun->volume_id, 2482 sizeof(device->volume_id)); 2483 } 2484 2485 if (pqi_is_device_with_sas_address(device)) 2486 device->sas_address = get_unaligned_be64(&device->wwid[8]); 2487 2488 new_device_list[num_valid_devices++] = device; 2489 } 2490 2491 pqi_update_device_list(ctrl_info, new_device_list, num_valid_devices); 2492 2493 out: 2494 list_for_each_entry_safe(device, next, &new_device_list_head, 2495 new_device_list_entry) { 2496 if (device->keep_device) 2497 continue; 2498 list_del(&device->new_device_list_entry); 2499 pqi_free_device(device); 2500 } 2501 2502 kfree(new_device_list); 2503 kfree(physdev_list); 2504 kfree(logdev_list); 2505 kfree(id_phys); 2506 2507 return rc; 2508 } 2509 2510 static void pqi_remove_all_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2511 { 2512 unsigned long flags; 2513 struct pqi_scsi_dev *device; 2514 struct pqi_scsi_dev *next; 2515 2516 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 2517 2518 list_for_each_entry_safe(device, next, &ctrl_info->scsi_device_list, 2519 scsi_device_list_entry) { 2520 if (pqi_is_device_added(device)) 2521 pqi_remove_device(ctrl_info, device); 2522 list_del(&device->scsi_device_list_entry); 2523 pqi_free_device(device); 2524 } 2525 2526 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 2527 } 2528 2529 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2530 { 2531 int rc; 2532 int mutex_acquired; 2533 2534 if (pqi_ctrl_offline(ctrl_info)) 2535 return -ENXIO; 2536 2537 mutex_acquired = mutex_trylock(&ctrl_info->scan_mutex); 2538 2539 if (!mutex_acquired) { 2540 if (pqi_ctrl_scan_blocked(ctrl_info)) 2541 return -EBUSY; 2542 pqi_schedule_rescan_worker_delayed(ctrl_info); 2543 return -EINPROGRESS; 2544 } 2545 2546 rc = pqi_update_scsi_devices(ctrl_info); 2547 if (rc && !pqi_ctrl_scan_blocked(ctrl_info)) 2548 pqi_schedule_rescan_worker_delayed(ctrl_info); 2549 2550 mutex_unlock(&ctrl_info->scan_mutex); 2551 2552 return rc; 2553 } 2554 2555 static void pqi_scan_start(struct Scsi_Host *shost) 2556 { 2557 struct pqi_ctrl_info *ctrl_info; 2558 2559 ctrl_info = shost_to_hba(shost); 2560 2561 pqi_scan_scsi_devices(ctrl_info); 2562 } 2563 2564 /* Returns TRUE if scan is finished. */ 2565 2566 static int pqi_scan_finished(struct Scsi_Host *shost, 2567 unsigned long elapsed_time) 2568 { 2569 struct pqi_ctrl_info *ctrl_info; 2570 2571 ctrl_info = shost_priv(shost); 2572 2573 return !mutex_is_locked(&ctrl_info->scan_mutex); 2574 } 2575 2576 static inline void pqi_set_encryption_info(struct pqi_encryption_info *encryption_info, 2577 struct raid_map *raid_map, u64 first_block) 2578 { 2579 u32 volume_blk_size; 2580 2581 /* 2582 * Set the encryption tweak values based on logical block address. 2583 * If the block size is 512, the tweak value is equal to the LBA. 2584 * For other block sizes, tweak value is (LBA * block size) / 512. 2585 */ 2586 volume_blk_size = get_unaligned_le32(&raid_map->volume_blk_size); 2587 if (volume_blk_size != 512) 2588 first_block = (first_block * volume_blk_size) / 512; 2589 2590 encryption_info->data_encryption_key_index = 2591 get_unaligned_le16(&raid_map->data_encryption_key_index); 2592 encryption_info->encrypt_tweak_lower = lower_32_bits(first_block); 2593 encryption_info->encrypt_tweak_upper = upper_32_bits(first_block); 2594 } 2595 2596 /* 2597 * Attempt to perform RAID bypass mapping for a logical volume I/O. 2598 */ 2599 2600 static bool pqi_aio_raid_level_supported(struct pqi_ctrl_info *ctrl_info, 2601 struct pqi_scsi_dev_raid_map_data *rmd) 2602 { 2603 bool is_supported = true; 2604 2605 switch (rmd->raid_level) { 2606 case SA_RAID_0: 2607 break; 2608 case SA_RAID_1: 2609 if (rmd->is_write && (!ctrl_info->enable_r1_writes || 2610 rmd->data_length > ctrl_info->max_write_raid_1_10_2drive)) 2611 is_supported = false; 2612 break; 2613 case SA_RAID_TRIPLE: 2614 if (rmd->is_write && (!ctrl_info->enable_r1_writes || 2615 rmd->data_length > ctrl_info->max_write_raid_1_10_3drive)) 2616 is_supported = false; 2617 break; 2618 case SA_RAID_5: 2619 if (rmd->is_write && (!ctrl_info->enable_r5_writes || 2620 rmd->data_length > ctrl_info->max_write_raid_5_6)) 2621 is_supported = false; 2622 break; 2623 case SA_RAID_6: 2624 if (rmd->is_write && (!ctrl_info->enable_r6_writes || 2625 rmd->data_length > ctrl_info->max_write_raid_5_6)) 2626 is_supported = false; 2627 break; 2628 default: 2629 is_supported = false; 2630 break; 2631 } 2632 2633 return is_supported; 2634 } 2635 2636 #define PQI_RAID_BYPASS_INELIGIBLE 1 2637 2638 static int pqi_get_aio_lba_and_block_count(struct scsi_cmnd *scmd, 2639 struct pqi_scsi_dev_raid_map_data *rmd) 2640 { 2641 /* Check for valid opcode, get LBA and block count. */ 2642 switch (scmd->cmnd[0]) { 2643 case WRITE_6: 2644 rmd->is_write = true; 2645 fallthrough; 2646 case READ_6: 2647 rmd->first_block = (u64)(((scmd->cmnd[1] & 0x1f) << 16) | 2648 (scmd->cmnd[2] << 8) | scmd->cmnd[3]); 2649 rmd->block_cnt = (u32)scmd->cmnd[4]; 2650 if (rmd->block_cnt == 0) 2651 rmd->block_cnt = 256; 2652 break; 2653 case WRITE_10: 2654 rmd->is_write = true; 2655 fallthrough; 2656 case READ_10: 2657 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2658 rmd->block_cnt = (u32)get_unaligned_be16(&scmd->cmnd[7]); 2659 break; 2660 case WRITE_12: 2661 rmd->is_write = true; 2662 fallthrough; 2663 case READ_12: 2664 rmd->first_block = (u64)get_unaligned_be32(&scmd->cmnd[2]); 2665 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[6]); 2666 break; 2667 case WRITE_16: 2668 rmd->is_write = true; 2669 fallthrough; 2670 case READ_16: 2671 rmd->first_block = get_unaligned_be64(&scmd->cmnd[2]); 2672 rmd->block_cnt = get_unaligned_be32(&scmd->cmnd[10]); 2673 break; 2674 default: 2675 /* Process via normal I/O path. */ 2676 return PQI_RAID_BYPASS_INELIGIBLE; 2677 } 2678 2679 put_unaligned_le32(scsi_bufflen(scmd), &rmd->data_length); 2680 2681 return 0; 2682 } 2683 2684 static int pci_get_aio_common_raid_map_values(struct pqi_ctrl_info *ctrl_info, 2685 struct pqi_scsi_dev_raid_map_data *rmd, struct raid_map *raid_map) 2686 { 2687 #if BITS_PER_LONG == 32 2688 u64 tmpdiv; 2689 #endif 2690 2691 rmd->last_block = rmd->first_block + rmd->block_cnt - 1; 2692 2693 /* Check for invalid block or wraparound. */ 2694 if (rmd->last_block >= 2695 get_unaligned_le64(&raid_map->volume_blk_cnt) || 2696 rmd->last_block < rmd->first_block) 2697 return PQI_RAID_BYPASS_INELIGIBLE; 2698 2699 rmd->data_disks_per_row = 2700 get_unaligned_le16(&raid_map->data_disks_per_row); 2701 rmd->strip_size = get_unaligned_le16(&raid_map->strip_size); 2702 rmd->layout_map_count = get_unaligned_le16(&raid_map->layout_map_count); 2703 2704 /* Calculate stripe information for the request. */ 2705 rmd->blocks_per_row = rmd->data_disks_per_row * rmd->strip_size; 2706 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */ 2707 return PQI_RAID_BYPASS_INELIGIBLE; 2708 #if BITS_PER_LONG == 32 2709 tmpdiv = rmd->first_block; 2710 do_div(tmpdiv, rmd->blocks_per_row); 2711 rmd->first_row = tmpdiv; 2712 tmpdiv = rmd->last_block; 2713 do_div(tmpdiv, rmd->blocks_per_row); 2714 rmd->last_row = tmpdiv; 2715 rmd->first_row_offset = (u32)(rmd->first_block - (rmd->first_row * rmd->blocks_per_row)); 2716 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * rmd->blocks_per_row)); 2717 tmpdiv = rmd->first_row_offset; 2718 do_div(tmpdiv, rmd->strip_size); 2719 rmd->first_column = tmpdiv; 2720 tmpdiv = rmd->last_row_offset; 2721 do_div(tmpdiv, rmd->strip_size); 2722 rmd->last_column = tmpdiv; 2723 #else 2724 rmd->first_row = rmd->first_block / rmd->blocks_per_row; 2725 rmd->last_row = rmd->last_block / rmd->blocks_per_row; 2726 rmd->first_row_offset = (u32)(rmd->first_block - 2727 (rmd->first_row * rmd->blocks_per_row)); 2728 rmd->last_row_offset = (u32)(rmd->last_block - (rmd->last_row * 2729 rmd->blocks_per_row)); 2730 rmd->first_column = rmd->first_row_offset / rmd->strip_size; 2731 rmd->last_column = rmd->last_row_offset / rmd->strip_size; 2732 #endif 2733 2734 /* If this isn't a single row/column then give to the controller. */ 2735 if (rmd->first_row != rmd->last_row || 2736 rmd->first_column != rmd->last_column) 2737 return PQI_RAID_BYPASS_INELIGIBLE; 2738 2739 /* Proceeding with driver mapping. */ 2740 rmd->total_disks_per_row = rmd->data_disks_per_row + 2741 get_unaligned_le16(&raid_map->metadata_disks_per_row); 2742 rmd->map_row = ((u32)(rmd->first_row >> 2743 raid_map->parity_rotation_shift)) % 2744 get_unaligned_le16(&raid_map->row_cnt); 2745 rmd->map_index = (rmd->map_row * rmd->total_disks_per_row) + 2746 rmd->first_column; 2747 2748 return 0; 2749 } 2750 2751 static int pqi_calc_aio_r5_or_r6(struct pqi_scsi_dev_raid_map_data *rmd, 2752 struct raid_map *raid_map) 2753 { 2754 #if BITS_PER_LONG == 32 2755 u64 tmpdiv; 2756 #endif 2757 2758 if (rmd->blocks_per_row == 0) /* Used as a divisor in many calculations */ 2759 return PQI_RAID_BYPASS_INELIGIBLE; 2760 2761 /* RAID 50/60 */ 2762 /* Verify first and last block are in same RAID group. */ 2763 rmd->stripesize = rmd->blocks_per_row * rmd->layout_map_count; 2764 #if BITS_PER_LONG == 32 2765 tmpdiv = rmd->first_block; 2766 rmd->first_group = do_div(tmpdiv, rmd->stripesize); 2767 tmpdiv = rmd->first_group; 2768 do_div(tmpdiv, rmd->blocks_per_row); 2769 rmd->first_group = tmpdiv; 2770 tmpdiv = rmd->last_block; 2771 rmd->last_group = do_div(tmpdiv, rmd->stripesize); 2772 tmpdiv = rmd->last_group; 2773 do_div(tmpdiv, rmd->blocks_per_row); 2774 rmd->last_group = tmpdiv; 2775 #else 2776 rmd->first_group = (rmd->first_block % rmd->stripesize) / rmd->blocks_per_row; 2777 rmd->last_group = (rmd->last_block % rmd->stripesize) / rmd->blocks_per_row; 2778 #endif 2779 if (rmd->first_group != rmd->last_group) 2780 return PQI_RAID_BYPASS_INELIGIBLE; 2781 2782 /* Verify request is in a single row of RAID 5/6. */ 2783 #if BITS_PER_LONG == 32 2784 tmpdiv = rmd->first_block; 2785 do_div(tmpdiv, rmd->stripesize); 2786 rmd->first_row = tmpdiv; 2787 rmd->r5or6_first_row = tmpdiv; 2788 tmpdiv = rmd->last_block; 2789 do_div(tmpdiv, rmd->stripesize); 2790 rmd->r5or6_last_row = tmpdiv; 2791 #else 2792 rmd->first_row = rmd->r5or6_first_row = 2793 rmd->first_block / rmd->stripesize; 2794 rmd->r5or6_last_row = rmd->last_block / rmd->stripesize; 2795 #endif 2796 if (rmd->r5or6_first_row != rmd->r5or6_last_row) 2797 return PQI_RAID_BYPASS_INELIGIBLE; 2798 2799 /* Verify request is in a single column. */ 2800 #if BITS_PER_LONG == 32 2801 tmpdiv = rmd->first_block; 2802 rmd->first_row_offset = do_div(tmpdiv, rmd->stripesize); 2803 tmpdiv = rmd->first_row_offset; 2804 rmd->first_row_offset = (u32)do_div(tmpdiv, rmd->blocks_per_row); 2805 rmd->r5or6_first_row_offset = rmd->first_row_offset; 2806 tmpdiv = rmd->last_block; 2807 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->stripesize); 2808 tmpdiv = rmd->r5or6_last_row_offset; 2809 rmd->r5or6_last_row_offset = do_div(tmpdiv, rmd->blocks_per_row); 2810 tmpdiv = rmd->r5or6_first_row_offset; 2811 do_div(tmpdiv, rmd->strip_size); 2812 rmd->first_column = rmd->r5or6_first_column = tmpdiv; 2813 tmpdiv = rmd->r5or6_last_row_offset; 2814 do_div(tmpdiv, rmd->strip_size); 2815 rmd->r5or6_last_column = tmpdiv; 2816 #else 2817 rmd->first_row_offset = rmd->r5or6_first_row_offset = 2818 (u32)((rmd->first_block % rmd->stripesize) % 2819 rmd->blocks_per_row); 2820 2821 rmd->r5or6_last_row_offset = 2822 (u32)((rmd->last_block % rmd->stripesize) % 2823 rmd->blocks_per_row); 2824 2825 rmd->first_column = 2826 rmd->r5or6_first_row_offset / rmd->strip_size; 2827 rmd->r5or6_first_column = rmd->first_column; 2828 rmd->r5or6_last_column = rmd->r5or6_last_row_offset / rmd->strip_size; 2829 #endif 2830 if (rmd->r5or6_first_column != rmd->r5or6_last_column) 2831 return PQI_RAID_BYPASS_INELIGIBLE; 2832 2833 /* Request is eligible. */ 2834 rmd->map_row = 2835 ((u32)(rmd->first_row >> raid_map->parity_rotation_shift)) % 2836 get_unaligned_le16(&raid_map->row_cnt); 2837 2838 rmd->map_index = (rmd->first_group * 2839 (get_unaligned_le16(&raid_map->row_cnt) * 2840 rmd->total_disks_per_row)) + 2841 (rmd->map_row * rmd->total_disks_per_row) + rmd->first_column; 2842 2843 if (rmd->is_write) { 2844 u32 index; 2845 2846 /* 2847 * p_parity_it_nexus and q_parity_it_nexus are pointers to the 2848 * parity entries inside the device's raid_map. 2849 * 2850 * A device's RAID map is bounded by: number of RAID disks squared. 2851 * 2852 * The devices RAID map size is checked during device 2853 * initialization. 2854 */ 2855 index = DIV_ROUND_UP(rmd->map_index + 1, rmd->total_disks_per_row); 2856 index *= rmd->total_disks_per_row; 2857 index -= get_unaligned_le16(&raid_map->metadata_disks_per_row); 2858 2859 rmd->p_parity_it_nexus = raid_map->disk_data[index].aio_handle; 2860 if (rmd->raid_level == SA_RAID_6) { 2861 rmd->q_parity_it_nexus = raid_map->disk_data[index + 1].aio_handle; 2862 rmd->xor_mult = raid_map->disk_data[rmd->map_index].xor_mult[1]; 2863 } 2864 #if BITS_PER_LONG == 32 2865 tmpdiv = rmd->first_block; 2866 do_div(tmpdiv, rmd->blocks_per_row); 2867 rmd->row = tmpdiv; 2868 #else 2869 rmd->row = rmd->first_block / rmd->blocks_per_row; 2870 #endif 2871 } 2872 2873 return 0; 2874 } 2875 2876 static void pqi_set_aio_cdb(struct pqi_scsi_dev_raid_map_data *rmd) 2877 { 2878 /* Build the new CDB for the physical disk I/O. */ 2879 if (rmd->disk_block > 0xffffffff) { 2880 rmd->cdb[0] = rmd->is_write ? WRITE_16 : READ_16; 2881 rmd->cdb[1] = 0; 2882 put_unaligned_be64(rmd->disk_block, &rmd->cdb[2]); 2883 put_unaligned_be32(rmd->disk_block_cnt, &rmd->cdb[10]); 2884 rmd->cdb[14] = 0; 2885 rmd->cdb[15] = 0; 2886 rmd->cdb_length = 16; 2887 } else { 2888 rmd->cdb[0] = rmd->is_write ? WRITE_10 : READ_10; 2889 rmd->cdb[1] = 0; 2890 put_unaligned_be32((u32)rmd->disk_block, &rmd->cdb[2]); 2891 rmd->cdb[6] = 0; 2892 put_unaligned_be16((u16)rmd->disk_block_cnt, &rmd->cdb[7]); 2893 rmd->cdb[9] = 0; 2894 rmd->cdb_length = 10; 2895 } 2896 } 2897 2898 static void pqi_calc_aio_r1_nexus(struct raid_map *raid_map, 2899 struct pqi_scsi_dev_raid_map_data *rmd) 2900 { 2901 u32 index; 2902 u32 group; 2903 2904 group = rmd->map_index / rmd->data_disks_per_row; 2905 2906 index = rmd->map_index - (group * rmd->data_disks_per_row); 2907 rmd->it_nexus[0] = raid_map->disk_data[index].aio_handle; 2908 index += rmd->data_disks_per_row; 2909 rmd->it_nexus[1] = raid_map->disk_data[index].aio_handle; 2910 if (rmd->layout_map_count > 2) { 2911 index += rmd->data_disks_per_row; 2912 rmd->it_nexus[2] = raid_map->disk_data[index].aio_handle; 2913 } 2914 2915 rmd->num_it_nexus_entries = rmd->layout_map_count; 2916 } 2917 2918 static int pqi_raid_bypass_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 2919 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 2920 struct pqi_queue_group *queue_group) 2921 { 2922 int rc; 2923 struct raid_map *raid_map; 2924 u32 group; 2925 u32 next_bypass_group; 2926 struct pqi_encryption_info *encryption_info_ptr; 2927 struct pqi_encryption_info encryption_info; 2928 struct pqi_scsi_dev_raid_map_data rmd = { 0 }; 2929 2930 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd); 2931 if (rc) 2932 return PQI_RAID_BYPASS_INELIGIBLE; 2933 2934 rmd.raid_level = device->raid_level; 2935 2936 if (!pqi_aio_raid_level_supported(ctrl_info, &rmd)) 2937 return PQI_RAID_BYPASS_INELIGIBLE; 2938 2939 if (unlikely(rmd.block_cnt == 0)) 2940 return PQI_RAID_BYPASS_INELIGIBLE; 2941 2942 raid_map = device->raid_map; 2943 2944 rc = pci_get_aio_common_raid_map_values(ctrl_info, &rmd, raid_map); 2945 if (rc) 2946 return PQI_RAID_BYPASS_INELIGIBLE; 2947 2948 if (device->raid_level == SA_RAID_1 || 2949 device->raid_level == SA_RAID_TRIPLE) { 2950 if (rmd.is_write) { 2951 pqi_calc_aio_r1_nexus(raid_map, &rmd); 2952 } else { 2953 group = device->next_bypass_group; 2954 next_bypass_group = group + 1; 2955 if (next_bypass_group >= rmd.layout_map_count) 2956 next_bypass_group = 0; 2957 device->next_bypass_group = next_bypass_group; 2958 rmd.map_index += group * rmd.data_disks_per_row; 2959 } 2960 } else if ((device->raid_level == SA_RAID_5 || 2961 device->raid_level == SA_RAID_6) && 2962 (rmd.layout_map_count > 1 || rmd.is_write)) { 2963 rc = pqi_calc_aio_r5_or_r6(&rmd, raid_map); 2964 if (rc) 2965 return PQI_RAID_BYPASS_INELIGIBLE; 2966 } 2967 2968 if (unlikely(rmd.map_index >= RAID_MAP_MAX_ENTRIES)) 2969 return PQI_RAID_BYPASS_INELIGIBLE; 2970 2971 rmd.aio_handle = raid_map->disk_data[rmd.map_index].aio_handle; 2972 rmd.disk_block = get_unaligned_le64(&raid_map->disk_starting_blk) + 2973 rmd.first_row * rmd.strip_size + 2974 (rmd.first_row_offset - rmd.first_column * rmd.strip_size); 2975 rmd.disk_block_cnt = rmd.block_cnt; 2976 2977 /* Handle differing logical/physical block sizes. */ 2978 if (raid_map->phys_blk_shift) { 2979 rmd.disk_block <<= raid_map->phys_blk_shift; 2980 rmd.disk_block_cnt <<= raid_map->phys_blk_shift; 2981 } 2982 2983 if (unlikely(rmd.disk_block_cnt > 0xffff)) 2984 return PQI_RAID_BYPASS_INELIGIBLE; 2985 2986 pqi_set_aio_cdb(&rmd); 2987 2988 if (get_unaligned_le16(&raid_map->flags) & RAID_MAP_ENCRYPTION_ENABLED) { 2989 if (rmd.data_length > device->max_transfer_encrypted) 2990 return PQI_RAID_BYPASS_INELIGIBLE; 2991 pqi_set_encryption_info(&encryption_info, raid_map, rmd.first_block); 2992 encryption_info_ptr = &encryption_info; 2993 } else { 2994 encryption_info_ptr = NULL; 2995 } 2996 2997 if (rmd.is_write) { 2998 switch (device->raid_level) { 2999 case SA_RAID_1: 3000 case SA_RAID_TRIPLE: 3001 return pqi_aio_submit_r1_write_io(ctrl_info, scmd, queue_group, 3002 encryption_info_ptr, device, &rmd); 3003 case SA_RAID_5: 3004 case SA_RAID_6: 3005 return pqi_aio_submit_r56_write_io(ctrl_info, scmd, queue_group, 3006 encryption_info_ptr, device, &rmd); 3007 } 3008 } 3009 3010 return pqi_aio_submit_io(ctrl_info, scmd, rmd.aio_handle, 3011 rmd.cdb, rmd.cdb_length, queue_group, 3012 encryption_info_ptr, true); 3013 } 3014 3015 #define PQI_STATUS_IDLE 0x0 3016 3017 #define PQI_CREATE_ADMIN_QUEUE_PAIR 1 3018 #define PQI_DELETE_ADMIN_QUEUE_PAIR 2 3019 3020 #define PQI_DEVICE_STATE_POWER_ON_AND_RESET 0x0 3021 #define PQI_DEVICE_STATE_STATUS_AVAILABLE 0x1 3022 #define PQI_DEVICE_STATE_ALL_REGISTERS_READY 0x2 3023 #define PQI_DEVICE_STATE_ADMIN_QUEUE_PAIR_READY 0x3 3024 #define PQI_DEVICE_STATE_ERROR 0x4 3025 3026 #define PQI_MODE_READY_TIMEOUT_SECS 30 3027 #define PQI_MODE_READY_POLL_INTERVAL_MSECS 1 3028 3029 static int pqi_wait_for_pqi_mode_ready(struct pqi_ctrl_info *ctrl_info) 3030 { 3031 struct pqi_device_registers __iomem *pqi_registers; 3032 unsigned long timeout; 3033 u64 signature; 3034 u8 status; 3035 3036 pqi_registers = ctrl_info->pqi_registers; 3037 timeout = (PQI_MODE_READY_TIMEOUT_SECS * PQI_HZ) + jiffies; 3038 3039 while (1) { 3040 signature = readq(&pqi_registers->signature); 3041 if (memcmp(&signature, PQI_DEVICE_SIGNATURE, 3042 sizeof(signature)) == 0) 3043 break; 3044 if (time_after(jiffies, timeout)) { 3045 dev_err(&ctrl_info->pci_dev->dev, 3046 "timed out waiting for PQI signature\n"); 3047 return -ETIMEDOUT; 3048 } 3049 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3050 } 3051 3052 while (1) { 3053 status = readb(&pqi_registers->function_and_status_code); 3054 if (status == PQI_STATUS_IDLE) 3055 break; 3056 if (time_after(jiffies, timeout)) { 3057 dev_err(&ctrl_info->pci_dev->dev, 3058 "timed out waiting for PQI IDLE\n"); 3059 return -ETIMEDOUT; 3060 } 3061 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3062 } 3063 3064 while (1) { 3065 if (readl(&pqi_registers->device_status) == 3066 PQI_DEVICE_STATE_ALL_REGISTERS_READY) 3067 break; 3068 if (time_after(jiffies, timeout)) { 3069 dev_err(&ctrl_info->pci_dev->dev, 3070 "timed out waiting for PQI all registers ready\n"); 3071 return -ETIMEDOUT; 3072 } 3073 msleep(PQI_MODE_READY_POLL_INTERVAL_MSECS); 3074 } 3075 3076 return 0; 3077 } 3078 3079 static inline void pqi_aio_path_disabled(struct pqi_io_request *io_request) 3080 { 3081 struct pqi_scsi_dev *device; 3082 3083 device = io_request->scmd->device->hostdata; 3084 device->raid_bypass_enabled = false; 3085 device->aio_enabled = false; 3086 } 3087 3088 static inline void pqi_take_device_offline(struct scsi_device *sdev, char *path) 3089 { 3090 struct pqi_ctrl_info *ctrl_info; 3091 struct pqi_scsi_dev *device; 3092 3093 device = sdev->hostdata; 3094 if (device->device_offline) 3095 return; 3096 3097 device->device_offline = true; 3098 ctrl_info = shost_to_hba(sdev->host); 3099 pqi_schedule_rescan_worker(ctrl_info); 3100 dev_err(&ctrl_info->pci_dev->dev, "re-scanning %s scsi %d:%d:%d:%d\n", 3101 path, ctrl_info->scsi_host->host_no, device->bus, 3102 device->target, device->lun); 3103 } 3104 3105 static void pqi_process_raid_io_error(struct pqi_io_request *io_request) 3106 { 3107 u8 scsi_status; 3108 u8 host_byte; 3109 struct scsi_cmnd *scmd; 3110 struct pqi_raid_error_info *error_info; 3111 size_t sense_data_length; 3112 int residual_count; 3113 int xfer_count; 3114 struct scsi_sense_hdr sshdr; 3115 3116 scmd = io_request->scmd; 3117 if (!scmd) 3118 return; 3119 3120 error_info = io_request->error_info; 3121 scsi_status = error_info->status; 3122 host_byte = DID_OK; 3123 3124 switch (error_info->data_out_result) { 3125 case PQI_DATA_IN_OUT_GOOD: 3126 break; 3127 case PQI_DATA_IN_OUT_UNDERFLOW: 3128 xfer_count = 3129 get_unaligned_le32(&error_info->data_out_transferred); 3130 residual_count = scsi_bufflen(scmd) - xfer_count; 3131 scsi_set_resid(scmd, residual_count); 3132 if (xfer_count < scmd->underflow) 3133 host_byte = DID_SOFT_ERROR; 3134 break; 3135 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 3136 case PQI_DATA_IN_OUT_ABORTED: 3137 host_byte = DID_ABORT; 3138 break; 3139 case PQI_DATA_IN_OUT_TIMEOUT: 3140 host_byte = DID_TIME_OUT; 3141 break; 3142 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 3143 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 3144 case PQI_DATA_IN_OUT_BUFFER_ERROR: 3145 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 3146 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 3147 case PQI_DATA_IN_OUT_ERROR: 3148 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 3149 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 3150 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 3151 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 3152 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 3153 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 3154 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 3155 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 3156 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 3157 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 3158 default: 3159 host_byte = DID_ERROR; 3160 break; 3161 } 3162 3163 sense_data_length = get_unaligned_le16(&error_info->sense_data_length); 3164 if (sense_data_length == 0) 3165 sense_data_length = 3166 get_unaligned_le16(&error_info->response_data_length); 3167 if (sense_data_length) { 3168 if (sense_data_length > sizeof(error_info->data)) 3169 sense_data_length = sizeof(error_info->data); 3170 3171 if (scsi_status == SAM_STAT_CHECK_CONDITION && 3172 scsi_normalize_sense(error_info->data, 3173 sense_data_length, &sshdr) && 3174 sshdr.sense_key == HARDWARE_ERROR && 3175 sshdr.asc == 0x3e) { 3176 struct pqi_ctrl_info *ctrl_info = shost_to_hba(scmd->device->host); 3177 struct pqi_scsi_dev *device = scmd->device->hostdata; 3178 3179 switch (sshdr.ascq) { 3180 case 0x1: /* LOGICAL UNIT FAILURE */ 3181 if (printk_ratelimit()) 3182 scmd_printk(KERN_ERR, scmd, "received 'logical unit failure' from controller for scsi %d:%d:%d:%d\n", 3183 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 3184 pqi_take_device_offline(scmd->device, "RAID"); 3185 host_byte = DID_NO_CONNECT; 3186 break; 3187 3188 default: /* See http://www.t10.org/lists/asc-num.htm#ASC_3E */ 3189 if (printk_ratelimit()) 3190 scmd_printk(KERN_ERR, scmd, "received unhandled error %d from controller for scsi %d:%d:%d:%d\n", 3191 sshdr.ascq, ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun); 3192 break; 3193 } 3194 } 3195 3196 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 3197 sense_data_length = SCSI_SENSE_BUFFERSIZE; 3198 memcpy(scmd->sense_buffer, error_info->data, 3199 sense_data_length); 3200 } 3201 3202 scmd->result = scsi_status; 3203 set_host_byte(scmd, host_byte); 3204 } 3205 3206 static void pqi_process_aio_io_error(struct pqi_io_request *io_request) 3207 { 3208 u8 scsi_status; 3209 u8 host_byte; 3210 struct scsi_cmnd *scmd; 3211 struct pqi_aio_error_info *error_info; 3212 size_t sense_data_length; 3213 int residual_count; 3214 int xfer_count; 3215 bool device_offline; 3216 3217 scmd = io_request->scmd; 3218 error_info = io_request->error_info; 3219 host_byte = DID_OK; 3220 sense_data_length = 0; 3221 device_offline = false; 3222 3223 switch (error_info->service_response) { 3224 case PQI_AIO_SERV_RESPONSE_COMPLETE: 3225 scsi_status = error_info->status; 3226 break; 3227 case PQI_AIO_SERV_RESPONSE_FAILURE: 3228 switch (error_info->status) { 3229 case PQI_AIO_STATUS_IO_ABORTED: 3230 scsi_status = SAM_STAT_TASK_ABORTED; 3231 break; 3232 case PQI_AIO_STATUS_UNDERRUN: 3233 scsi_status = SAM_STAT_GOOD; 3234 residual_count = get_unaligned_le32( 3235 &error_info->residual_count); 3236 scsi_set_resid(scmd, residual_count); 3237 xfer_count = scsi_bufflen(scmd) - residual_count; 3238 if (xfer_count < scmd->underflow) 3239 host_byte = DID_SOFT_ERROR; 3240 break; 3241 case PQI_AIO_STATUS_OVERRUN: 3242 scsi_status = SAM_STAT_GOOD; 3243 break; 3244 case PQI_AIO_STATUS_AIO_PATH_DISABLED: 3245 pqi_aio_path_disabled(io_request); 3246 scsi_status = SAM_STAT_GOOD; 3247 io_request->status = -EAGAIN; 3248 break; 3249 case PQI_AIO_STATUS_NO_PATH_TO_DEVICE: 3250 case PQI_AIO_STATUS_INVALID_DEVICE: 3251 if (!io_request->raid_bypass) { 3252 device_offline = true; 3253 pqi_take_device_offline(scmd->device, "AIO"); 3254 host_byte = DID_NO_CONNECT; 3255 } 3256 scsi_status = SAM_STAT_CHECK_CONDITION; 3257 break; 3258 case PQI_AIO_STATUS_IO_ERROR: 3259 default: 3260 scsi_status = SAM_STAT_CHECK_CONDITION; 3261 break; 3262 } 3263 break; 3264 case PQI_AIO_SERV_RESPONSE_TMF_COMPLETE: 3265 case PQI_AIO_SERV_RESPONSE_TMF_SUCCEEDED: 3266 scsi_status = SAM_STAT_GOOD; 3267 break; 3268 case PQI_AIO_SERV_RESPONSE_TMF_REJECTED: 3269 case PQI_AIO_SERV_RESPONSE_TMF_INCORRECT_LUN: 3270 default: 3271 scsi_status = SAM_STAT_CHECK_CONDITION; 3272 break; 3273 } 3274 3275 if (error_info->data_present) { 3276 sense_data_length = 3277 get_unaligned_le16(&error_info->data_length); 3278 if (sense_data_length) { 3279 if (sense_data_length > sizeof(error_info->data)) 3280 sense_data_length = sizeof(error_info->data); 3281 if (sense_data_length > SCSI_SENSE_BUFFERSIZE) 3282 sense_data_length = SCSI_SENSE_BUFFERSIZE; 3283 memcpy(scmd->sense_buffer, error_info->data, 3284 sense_data_length); 3285 } 3286 } 3287 3288 if (device_offline && sense_data_length == 0) 3289 scsi_build_sense(scmd, 0, HARDWARE_ERROR, 0x3e, 0x1); 3290 3291 scmd->result = scsi_status; 3292 set_host_byte(scmd, host_byte); 3293 } 3294 3295 static void pqi_process_io_error(unsigned int iu_type, 3296 struct pqi_io_request *io_request) 3297 { 3298 switch (iu_type) { 3299 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 3300 pqi_process_raid_io_error(io_request); 3301 break; 3302 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 3303 pqi_process_aio_io_error(io_request); 3304 break; 3305 } 3306 } 3307 3308 static int pqi_interpret_task_management_response(struct pqi_ctrl_info *ctrl_info, 3309 struct pqi_task_management_response *response) 3310 { 3311 int rc; 3312 3313 switch (response->response_code) { 3314 case SOP_TMF_COMPLETE: 3315 case SOP_TMF_FUNCTION_SUCCEEDED: 3316 rc = 0; 3317 break; 3318 case SOP_TMF_REJECTED: 3319 rc = -EAGAIN; 3320 break; 3321 default: 3322 rc = -EIO; 3323 break; 3324 } 3325 3326 if (rc) 3327 dev_err(&ctrl_info->pci_dev->dev, 3328 "Task Management Function error: %d (response code: %u)\n", rc, response->response_code); 3329 3330 return rc; 3331 } 3332 3333 static inline void pqi_invalid_response(struct pqi_ctrl_info *ctrl_info, 3334 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 3335 { 3336 pqi_take_ctrl_offline(ctrl_info, ctrl_shutdown_reason); 3337 } 3338 3339 static int pqi_process_io_intr(struct pqi_ctrl_info *ctrl_info, struct pqi_queue_group *queue_group) 3340 { 3341 int num_responses; 3342 pqi_index_t oq_pi; 3343 pqi_index_t oq_ci; 3344 struct pqi_io_request *io_request; 3345 struct pqi_io_response *response; 3346 u16 request_id; 3347 3348 num_responses = 0; 3349 oq_ci = queue_group->oq_ci_copy; 3350 3351 while (1) { 3352 oq_pi = readl(queue_group->oq_pi); 3353 if (oq_pi >= ctrl_info->num_elements_per_oq) { 3354 pqi_invalid_response(ctrl_info, PQI_IO_PI_OUT_OF_RANGE); 3355 dev_err(&ctrl_info->pci_dev->dev, 3356 "I/O interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n", 3357 oq_pi, ctrl_info->num_elements_per_oq - 1, oq_ci); 3358 return -1; 3359 } 3360 if (oq_pi == oq_ci) 3361 break; 3362 3363 num_responses++; 3364 response = queue_group->oq_element_array + 3365 (oq_ci * PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 3366 3367 request_id = get_unaligned_le16(&response->request_id); 3368 if (request_id >= ctrl_info->max_io_slots) { 3369 pqi_invalid_response(ctrl_info, PQI_INVALID_REQ_ID); 3370 dev_err(&ctrl_info->pci_dev->dev, 3371 "request ID in response (%u) out of range (0-%u): producer index: %u consumer index: %u\n", 3372 request_id, ctrl_info->max_io_slots - 1, oq_pi, oq_ci); 3373 return -1; 3374 } 3375 3376 io_request = &ctrl_info->io_request_pool[request_id]; 3377 if (atomic_read(&io_request->refcount) == 0) { 3378 pqi_invalid_response(ctrl_info, PQI_UNMATCHED_REQ_ID); 3379 dev_err(&ctrl_info->pci_dev->dev, 3380 "request ID in response (%u) does not match an outstanding I/O request: producer index: %u consumer index: %u\n", 3381 request_id, oq_pi, oq_ci); 3382 return -1; 3383 } 3384 3385 switch (response->header.iu_type) { 3386 case PQI_RESPONSE_IU_RAID_PATH_IO_SUCCESS: 3387 case PQI_RESPONSE_IU_AIO_PATH_IO_SUCCESS: 3388 if (io_request->scmd) 3389 io_request->scmd->result = 0; 3390 fallthrough; 3391 case PQI_RESPONSE_IU_GENERAL_MANAGEMENT: 3392 break; 3393 case PQI_RESPONSE_IU_VENDOR_GENERAL: 3394 io_request->status = 3395 get_unaligned_le16( 3396 &((struct pqi_vendor_general_response *)response)->status); 3397 break; 3398 case PQI_RESPONSE_IU_TASK_MANAGEMENT: 3399 io_request->status = pqi_interpret_task_management_response(ctrl_info, 3400 (void *)response); 3401 break; 3402 case PQI_RESPONSE_IU_AIO_PATH_DISABLED: 3403 pqi_aio_path_disabled(io_request); 3404 io_request->status = -EAGAIN; 3405 break; 3406 case PQI_RESPONSE_IU_RAID_PATH_IO_ERROR: 3407 case PQI_RESPONSE_IU_AIO_PATH_IO_ERROR: 3408 io_request->error_info = ctrl_info->error_buffer + 3409 (get_unaligned_le16(&response->error_index) * 3410 PQI_ERROR_BUFFER_ELEMENT_LENGTH); 3411 pqi_process_io_error(response->header.iu_type, io_request); 3412 break; 3413 default: 3414 pqi_invalid_response(ctrl_info, PQI_UNEXPECTED_IU_TYPE); 3415 dev_err(&ctrl_info->pci_dev->dev, 3416 "unexpected IU type: 0x%x: producer index: %u consumer index: %u\n", 3417 response->header.iu_type, oq_pi, oq_ci); 3418 return -1; 3419 } 3420 3421 io_request->io_complete_callback(io_request, io_request->context); 3422 3423 /* 3424 * Note that the I/O request structure CANNOT BE TOUCHED after 3425 * returning from the I/O completion callback! 3426 */ 3427 oq_ci = (oq_ci + 1) % ctrl_info->num_elements_per_oq; 3428 } 3429 3430 if (num_responses) { 3431 queue_group->oq_ci_copy = oq_ci; 3432 writel(oq_ci, queue_group->oq_ci); 3433 } 3434 3435 return num_responses; 3436 } 3437 3438 static inline unsigned int pqi_num_elements_free(unsigned int pi, 3439 unsigned int ci, unsigned int elements_in_queue) 3440 { 3441 unsigned int num_elements_used; 3442 3443 if (pi >= ci) 3444 num_elements_used = pi - ci; 3445 else 3446 num_elements_used = elements_in_queue - ci + pi; 3447 3448 return elements_in_queue - num_elements_used - 1; 3449 } 3450 3451 static void pqi_send_event_ack(struct pqi_ctrl_info *ctrl_info, 3452 struct pqi_event_acknowledge_request *iu, size_t iu_length) 3453 { 3454 pqi_index_t iq_pi; 3455 pqi_index_t iq_ci; 3456 unsigned long flags; 3457 void *next_element; 3458 struct pqi_queue_group *queue_group; 3459 3460 queue_group = &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP]; 3461 put_unaligned_le16(queue_group->oq_id, &iu->header.response_queue_id); 3462 3463 while (1) { 3464 spin_lock_irqsave(&queue_group->submit_lock[RAID_PATH], flags); 3465 3466 iq_pi = queue_group->iq_pi_copy[RAID_PATH]; 3467 iq_ci = readl(queue_group->iq_ci[RAID_PATH]); 3468 3469 if (pqi_num_elements_free(iq_pi, iq_ci, 3470 ctrl_info->num_elements_per_iq)) 3471 break; 3472 3473 spin_unlock_irqrestore( 3474 &queue_group->submit_lock[RAID_PATH], flags); 3475 3476 if (pqi_ctrl_offline(ctrl_info)) 3477 return; 3478 } 3479 3480 next_element = queue_group->iq_element_array[RAID_PATH] + 3481 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 3482 3483 memcpy(next_element, iu, iu_length); 3484 3485 iq_pi = (iq_pi + 1) % ctrl_info->num_elements_per_iq; 3486 queue_group->iq_pi_copy[RAID_PATH] = iq_pi; 3487 3488 /* 3489 * This write notifies the controller that an IU is available to be 3490 * processed. 3491 */ 3492 writel(iq_pi, queue_group->iq_pi[RAID_PATH]); 3493 3494 spin_unlock_irqrestore(&queue_group->submit_lock[RAID_PATH], flags); 3495 } 3496 3497 static void pqi_acknowledge_event(struct pqi_ctrl_info *ctrl_info, 3498 struct pqi_event *event) 3499 { 3500 struct pqi_event_acknowledge_request request; 3501 3502 memset(&request, 0, sizeof(request)); 3503 3504 request.header.iu_type = PQI_REQUEST_IU_ACKNOWLEDGE_VENDOR_EVENT; 3505 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 3506 &request.header.iu_length); 3507 request.event_type = event->event_type; 3508 put_unaligned_le16(event->event_id, &request.event_id); 3509 put_unaligned_le32(event->additional_event_id, &request.additional_event_id); 3510 3511 pqi_send_event_ack(ctrl_info, &request, sizeof(request)); 3512 } 3513 3514 #define PQI_SOFT_RESET_STATUS_TIMEOUT_SECS 30 3515 #define PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS 1 3516 3517 static enum pqi_soft_reset_status pqi_poll_for_soft_reset_status( 3518 struct pqi_ctrl_info *ctrl_info) 3519 { 3520 u8 status; 3521 unsigned long timeout; 3522 3523 timeout = (PQI_SOFT_RESET_STATUS_TIMEOUT_SECS * PQI_HZ) + jiffies; 3524 3525 while (1) { 3526 status = pqi_read_soft_reset_status(ctrl_info); 3527 if (status & PQI_SOFT_RESET_INITIATE) 3528 return RESET_INITIATE_DRIVER; 3529 3530 if (status & PQI_SOFT_RESET_ABORT) 3531 return RESET_ABORT; 3532 3533 if (!sis_is_firmware_running(ctrl_info)) 3534 return RESET_NORESPONSE; 3535 3536 if (time_after(jiffies, timeout)) { 3537 dev_warn(&ctrl_info->pci_dev->dev, 3538 "timed out waiting for soft reset status\n"); 3539 return RESET_TIMEDOUT; 3540 } 3541 3542 ssleep(PQI_SOFT_RESET_STATUS_POLL_INTERVAL_SECS); 3543 } 3544 } 3545 3546 static void pqi_process_soft_reset(struct pqi_ctrl_info *ctrl_info) 3547 { 3548 int rc; 3549 unsigned int delay_secs; 3550 enum pqi_soft_reset_status reset_status; 3551 3552 if (ctrl_info->soft_reset_handshake_supported) 3553 reset_status = pqi_poll_for_soft_reset_status(ctrl_info); 3554 else 3555 reset_status = RESET_INITIATE_FIRMWARE; 3556 3557 delay_secs = PQI_POST_RESET_DELAY_SECS; 3558 3559 switch (reset_status) { 3560 case RESET_TIMEDOUT: 3561 delay_secs = PQI_POST_OFA_RESET_DELAY_UPON_TIMEOUT_SECS; 3562 fallthrough; 3563 case RESET_INITIATE_DRIVER: 3564 dev_info(&ctrl_info->pci_dev->dev, 3565 "Online Firmware Activation: resetting controller\n"); 3566 sis_soft_reset(ctrl_info); 3567 fallthrough; 3568 case RESET_INITIATE_FIRMWARE: 3569 ctrl_info->pqi_mode_enabled = false; 3570 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 3571 rc = pqi_ofa_ctrl_restart(ctrl_info, delay_secs); 3572 pqi_ofa_free_host_buffer(ctrl_info); 3573 pqi_ctrl_ofa_done(ctrl_info); 3574 dev_info(&ctrl_info->pci_dev->dev, 3575 "Online Firmware Activation: %s\n", 3576 rc == 0 ? "SUCCESS" : "FAILED"); 3577 break; 3578 case RESET_ABORT: 3579 dev_info(&ctrl_info->pci_dev->dev, 3580 "Online Firmware Activation ABORTED\n"); 3581 if (ctrl_info->soft_reset_handshake_supported) 3582 pqi_clear_soft_reset_status(ctrl_info); 3583 pqi_ofa_free_host_buffer(ctrl_info); 3584 pqi_ctrl_ofa_done(ctrl_info); 3585 pqi_ofa_ctrl_unquiesce(ctrl_info); 3586 break; 3587 case RESET_NORESPONSE: 3588 fallthrough; 3589 default: 3590 dev_err(&ctrl_info->pci_dev->dev, 3591 "unexpected Online Firmware Activation reset status: 0x%x\n", 3592 reset_status); 3593 pqi_ofa_free_host_buffer(ctrl_info); 3594 pqi_ctrl_ofa_done(ctrl_info); 3595 pqi_ofa_ctrl_unquiesce(ctrl_info); 3596 pqi_take_ctrl_offline(ctrl_info, PQI_OFA_RESPONSE_TIMEOUT); 3597 break; 3598 } 3599 } 3600 3601 static void pqi_ofa_memory_alloc_worker(struct work_struct *work) 3602 { 3603 struct pqi_ctrl_info *ctrl_info; 3604 3605 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_memory_alloc_work); 3606 3607 pqi_ctrl_ofa_start(ctrl_info); 3608 pqi_ofa_setup_host_buffer(ctrl_info); 3609 pqi_ofa_host_memory_update(ctrl_info); 3610 } 3611 3612 static void pqi_ofa_quiesce_worker(struct work_struct *work) 3613 { 3614 struct pqi_ctrl_info *ctrl_info; 3615 struct pqi_event *event; 3616 3617 ctrl_info = container_of(work, struct pqi_ctrl_info, ofa_quiesce_work); 3618 3619 event = &ctrl_info->events[pqi_event_type_to_event_index(PQI_EVENT_TYPE_OFA)]; 3620 3621 pqi_ofa_ctrl_quiesce(ctrl_info); 3622 pqi_acknowledge_event(ctrl_info, event); 3623 pqi_process_soft_reset(ctrl_info); 3624 } 3625 3626 static bool pqi_ofa_process_event(struct pqi_ctrl_info *ctrl_info, 3627 struct pqi_event *event) 3628 { 3629 bool ack_event; 3630 3631 ack_event = true; 3632 3633 switch (event->event_id) { 3634 case PQI_EVENT_OFA_MEMORY_ALLOCATION: 3635 dev_info(&ctrl_info->pci_dev->dev, 3636 "received Online Firmware Activation memory allocation request\n"); 3637 schedule_work(&ctrl_info->ofa_memory_alloc_work); 3638 break; 3639 case PQI_EVENT_OFA_QUIESCE: 3640 dev_info(&ctrl_info->pci_dev->dev, 3641 "received Online Firmware Activation quiesce request\n"); 3642 schedule_work(&ctrl_info->ofa_quiesce_work); 3643 ack_event = false; 3644 break; 3645 case PQI_EVENT_OFA_CANCELED: 3646 dev_info(&ctrl_info->pci_dev->dev, 3647 "received Online Firmware Activation cancel request: reason: %u\n", 3648 ctrl_info->ofa_cancel_reason); 3649 pqi_ofa_free_host_buffer(ctrl_info); 3650 pqi_ctrl_ofa_done(ctrl_info); 3651 break; 3652 default: 3653 dev_err(&ctrl_info->pci_dev->dev, 3654 "received unknown Online Firmware Activation request: event ID: %u\n", 3655 event->event_id); 3656 break; 3657 } 3658 3659 return ack_event; 3660 } 3661 3662 static void pqi_event_worker(struct work_struct *work) 3663 { 3664 unsigned int i; 3665 bool rescan_needed; 3666 struct pqi_ctrl_info *ctrl_info; 3667 struct pqi_event *event; 3668 bool ack_event; 3669 3670 ctrl_info = container_of(work, struct pqi_ctrl_info, event_work); 3671 3672 pqi_ctrl_busy(ctrl_info); 3673 pqi_wait_if_ctrl_blocked(ctrl_info); 3674 if (pqi_ctrl_offline(ctrl_info)) 3675 goto out; 3676 3677 rescan_needed = false; 3678 event = ctrl_info->events; 3679 for (i = 0; i < PQI_NUM_SUPPORTED_EVENTS; i++) { 3680 if (event->pending) { 3681 event->pending = false; 3682 if (event->event_type == PQI_EVENT_TYPE_OFA) { 3683 ack_event = pqi_ofa_process_event(ctrl_info, event); 3684 } else { 3685 ack_event = true; 3686 rescan_needed = true; 3687 } 3688 if (ack_event) 3689 pqi_acknowledge_event(ctrl_info, event); 3690 } 3691 event++; 3692 } 3693 3694 if (rescan_needed) 3695 pqi_schedule_rescan_worker_delayed(ctrl_info); 3696 3697 out: 3698 pqi_ctrl_unbusy(ctrl_info); 3699 } 3700 3701 #define PQI_HEARTBEAT_TIMER_INTERVAL (10 * PQI_HZ) 3702 3703 static void pqi_heartbeat_timer_handler(struct timer_list *t) 3704 { 3705 int num_interrupts; 3706 u32 heartbeat_count; 3707 struct pqi_ctrl_info *ctrl_info = from_timer(ctrl_info, t, heartbeat_timer); 3708 3709 pqi_check_ctrl_health(ctrl_info); 3710 if (pqi_ctrl_offline(ctrl_info)) 3711 return; 3712 3713 num_interrupts = atomic_read(&ctrl_info->num_interrupts); 3714 heartbeat_count = pqi_read_heartbeat_counter(ctrl_info); 3715 3716 if (num_interrupts == ctrl_info->previous_num_interrupts) { 3717 if (heartbeat_count == ctrl_info->previous_heartbeat_count) { 3718 dev_err(&ctrl_info->pci_dev->dev, 3719 "no heartbeat detected - last heartbeat count: %u\n", 3720 heartbeat_count); 3721 pqi_take_ctrl_offline(ctrl_info, PQI_NO_HEARTBEAT); 3722 return; 3723 } 3724 } else { 3725 ctrl_info->previous_num_interrupts = num_interrupts; 3726 } 3727 3728 ctrl_info->previous_heartbeat_count = heartbeat_count; 3729 mod_timer(&ctrl_info->heartbeat_timer, 3730 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL); 3731 } 3732 3733 static void pqi_start_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3734 { 3735 if (!ctrl_info->heartbeat_counter) 3736 return; 3737 3738 ctrl_info->previous_num_interrupts = 3739 atomic_read(&ctrl_info->num_interrupts); 3740 ctrl_info->previous_heartbeat_count = 3741 pqi_read_heartbeat_counter(ctrl_info); 3742 3743 ctrl_info->heartbeat_timer.expires = 3744 jiffies + PQI_HEARTBEAT_TIMER_INTERVAL; 3745 add_timer(&ctrl_info->heartbeat_timer); 3746 } 3747 3748 static inline void pqi_stop_heartbeat_timer(struct pqi_ctrl_info *ctrl_info) 3749 { 3750 del_timer_sync(&ctrl_info->heartbeat_timer); 3751 } 3752 3753 static void pqi_ofa_capture_event_payload(struct pqi_ctrl_info *ctrl_info, 3754 struct pqi_event *event, struct pqi_event_response *response) 3755 { 3756 switch (event->event_id) { 3757 case PQI_EVENT_OFA_MEMORY_ALLOCATION: 3758 ctrl_info->ofa_bytes_requested = 3759 get_unaligned_le32(&response->data.ofa_memory_allocation.bytes_requested); 3760 break; 3761 case PQI_EVENT_OFA_CANCELED: 3762 ctrl_info->ofa_cancel_reason = 3763 get_unaligned_le16(&response->data.ofa_cancelled.reason); 3764 break; 3765 } 3766 } 3767 3768 static int pqi_process_event_intr(struct pqi_ctrl_info *ctrl_info) 3769 { 3770 int num_events; 3771 pqi_index_t oq_pi; 3772 pqi_index_t oq_ci; 3773 struct pqi_event_queue *event_queue; 3774 struct pqi_event_response *response; 3775 struct pqi_event *event; 3776 int event_index; 3777 3778 event_queue = &ctrl_info->event_queue; 3779 num_events = 0; 3780 oq_ci = event_queue->oq_ci_copy; 3781 3782 while (1) { 3783 oq_pi = readl(event_queue->oq_pi); 3784 if (oq_pi >= PQI_NUM_EVENT_QUEUE_ELEMENTS) { 3785 pqi_invalid_response(ctrl_info, PQI_EVENT_PI_OUT_OF_RANGE); 3786 dev_err(&ctrl_info->pci_dev->dev, 3787 "event interrupt: producer index (%u) out of range (0-%u): consumer index: %u\n", 3788 oq_pi, PQI_NUM_EVENT_QUEUE_ELEMENTS - 1, oq_ci); 3789 return -1; 3790 } 3791 3792 if (oq_pi == oq_ci) 3793 break; 3794 3795 num_events++; 3796 response = event_queue->oq_element_array + (oq_ci * PQI_EVENT_OQ_ELEMENT_LENGTH); 3797 3798 event_index = pqi_event_type_to_event_index(response->event_type); 3799 3800 if (event_index >= 0 && response->request_acknowledge) { 3801 event = &ctrl_info->events[event_index]; 3802 event->pending = true; 3803 event->event_type = response->event_type; 3804 event->event_id = get_unaligned_le16(&response->event_id); 3805 event->additional_event_id = 3806 get_unaligned_le32(&response->additional_event_id); 3807 if (event->event_type == PQI_EVENT_TYPE_OFA) 3808 pqi_ofa_capture_event_payload(ctrl_info, event, response); 3809 } 3810 3811 oq_ci = (oq_ci + 1) % PQI_NUM_EVENT_QUEUE_ELEMENTS; 3812 } 3813 3814 if (num_events) { 3815 event_queue->oq_ci_copy = oq_ci; 3816 writel(oq_ci, event_queue->oq_ci); 3817 schedule_work(&ctrl_info->event_work); 3818 } 3819 3820 return num_events; 3821 } 3822 3823 #define PQI_LEGACY_INTX_MASK 0x1 3824 3825 static inline void pqi_configure_legacy_intx(struct pqi_ctrl_info *ctrl_info, bool enable_intx) 3826 { 3827 u32 intx_mask; 3828 struct pqi_device_registers __iomem *pqi_registers; 3829 volatile void __iomem *register_addr; 3830 3831 pqi_registers = ctrl_info->pqi_registers; 3832 3833 if (enable_intx) 3834 register_addr = &pqi_registers->legacy_intx_mask_clear; 3835 else 3836 register_addr = &pqi_registers->legacy_intx_mask_set; 3837 3838 intx_mask = readl(register_addr); 3839 intx_mask |= PQI_LEGACY_INTX_MASK; 3840 writel(intx_mask, register_addr); 3841 } 3842 3843 static void pqi_change_irq_mode(struct pqi_ctrl_info *ctrl_info, 3844 enum pqi_irq_mode new_mode) 3845 { 3846 switch (ctrl_info->irq_mode) { 3847 case IRQ_MODE_MSIX: 3848 switch (new_mode) { 3849 case IRQ_MODE_MSIX: 3850 break; 3851 case IRQ_MODE_INTX: 3852 pqi_configure_legacy_intx(ctrl_info, true); 3853 sis_enable_intx(ctrl_info); 3854 break; 3855 case IRQ_MODE_NONE: 3856 break; 3857 } 3858 break; 3859 case IRQ_MODE_INTX: 3860 switch (new_mode) { 3861 case IRQ_MODE_MSIX: 3862 pqi_configure_legacy_intx(ctrl_info, false); 3863 sis_enable_msix(ctrl_info); 3864 break; 3865 case IRQ_MODE_INTX: 3866 break; 3867 case IRQ_MODE_NONE: 3868 pqi_configure_legacy_intx(ctrl_info, false); 3869 break; 3870 } 3871 break; 3872 case IRQ_MODE_NONE: 3873 switch (new_mode) { 3874 case IRQ_MODE_MSIX: 3875 sis_enable_msix(ctrl_info); 3876 break; 3877 case IRQ_MODE_INTX: 3878 pqi_configure_legacy_intx(ctrl_info, true); 3879 sis_enable_intx(ctrl_info); 3880 break; 3881 case IRQ_MODE_NONE: 3882 break; 3883 } 3884 break; 3885 } 3886 3887 ctrl_info->irq_mode = new_mode; 3888 } 3889 3890 #define PQI_LEGACY_INTX_PENDING 0x1 3891 3892 static inline bool pqi_is_valid_irq(struct pqi_ctrl_info *ctrl_info) 3893 { 3894 bool valid_irq; 3895 u32 intx_status; 3896 3897 switch (ctrl_info->irq_mode) { 3898 case IRQ_MODE_MSIX: 3899 valid_irq = true; 3900 break; 3901 case IRQ_MODE_INTX: 3902 intx_status = readl(&ctrl_info->pqi_registers->legacy_intx_status); 3903 if (intx_status & PQI_LEGACY_INTX_PENDING) 3904 valid_irq = true; 3905 else 3906 valid_irq = false; 3907 break; 3908 case IRQ_MODE_NONE: 3909 default: 3910 valid_irq = false; 3911 break; 3912 } 3913 3914 return valid_irq; 3915 } 3916 3917 static irqreturn_t pqi_irq_handler(int irq, void *data) 3918 { 3919 struct pqi_ctrl_info *ctrl_info; 3920 struct pqi_queue_group *queue_group; 3921 int num_io_responses_handled; 3922 int num_events_handled; 3923 3924 queue_group = data; 3925 ctrl_info = queue_group->ctrl_info; 3926 3927 if (!pqi_is_valid_irq(ctrl_info)) 3928 return IRQ_NONE; 3929 3930 num_io_responses_handled = pqi_process_io_intr(ctrl_info, queue_group); 3931 if (num_io_responses_handled < 0) 3932 goto out; 3933 3934 if (irq == ctrl_info->event_irq) { 3935 num_events_handled = pqi_process_event_intr(ctrl_info); 3936 if (num_events_handled < 0) 3937 goto out; 3938 } else { 3939 num_events_handled = 0; 3940 } 3941 3942 if (num_io_responses_handled + num_events_handled > 0) 3943 atomic_inc(&ctrl_info->num_interrupts); 3944 3945 pqi_start_io(ctrl_info, queue_group, RAID_PATH, NULL); 3946 pqi_start_io(ctrl_info, queue_group, AIO_PATH, NULL); 3947 3948 out: 3949 return IRQ_HANDLED; 3950 } 3951 3952 static int pqi_request_irqs(struct pqi_ctrl_info *ctrl_info) 3953 { 3954 struct pci_dev *pci_dev = ctrl_info->pci_dev; 3955 int i; 3956 int rc; 3957 3958 ctrl_info->event_irq = pci_irq_vector(pci_dev, 0); 3959 3960 for (i = 0; i < ctrl_info->num_msix_vectors_enabled; i++) { 3961 rc = request_irq(pci_irq_vector(pci_dev, i), pqi_irq_handler, 0, 3962 DRIVER_NAME_SHORT, &ctrl_info->queue_groups[i]); 3963 if (rc) { 3964 dev_err(&pci_dev->dev, 3965 "irq %u init failed with error %d\n", 3966 pci_irq_vector(pci_dev, i), rc); 3967 return rc; 3968 } 3969 ctrl_info->num_msix_vectors_initialized++; 3970 } 3971 3972 return 0; 3973 } 3974 3975 static void pqi_free_irqs(struct pqi_ctrl_info *ctrl_info) 3976 { 3977 int i; 3978 3979 for (i = 0; i < ctrl_info->num_msix_vectors_initialized; i++) 3980 free_irq(pci_irq_vector(ctrl_info->pci_dev, i), 3981 &ctrl_info->queue_groups[i]); 3982 3983 ctrl_info->num_msix_vectors_initialized = 0; 3984 } 3985 3986 static int pqi_enable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 3987 { 3988 int num_vectors_enabled; 3989 3990 num_vectors_enabled = pci_alloc_irq_vectors(ctrl_info->pci_dev, 3991 PQI_MIN_MSIX_VECTORS, ctrl_info->num_queue_groups, 3992 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 3993 if (num_vectors_enabled < 0) { 3994 dev_err(&ctrl_info->pci_dev->dev, 3995 "MSI-X init failed with error %d\n", 3996 num_vectors_enabled); 3997 return num_vectors_enabled; 3998 } 3999 4000 ctrl_info->num_msix_vectors_enabled = num_vectors_enabled; 4001 ctrl_info->irq_mode = IRQ_MODE_MSIX; 4002 return 0; 4003 } 4004 4005 static void pqi_disable_msix_interrupts(struct pqi_ctrl_info *ctrl_info) 4006 { 4007 if (ctrl_info->num_msix_vectors_enabled) { 4008 pci_free_irq_vectors(ctrl_info->pci_dev); 4009 ctrl_info->num_msix_vectors_enabled = 0; 4010 } 4011 } 4012 4013 static int pqi_alloc_operational_queues(struct pqi_ctrl_info *ctrl_info) 4014 { 4015 unsigned int i; 4016 size_t alloc_length; 4017 size_t element_array_length_per_iq; 4018 size_t element_array_length_per_oq; 4019 void *element_array; 4020 void __iomem *next_queue_index; 4021 void *aligned_pointer; 4022 unsigned int num_inbound_queues; 4023 unsigned int num_outbound_queues; 4024 unsigned int num_queue_indexes; 4025 struct pqi_queue_group *queue_group; 4026 4027 element_array_length_per_iq = 4028 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH * 4029 ctrl_info->num_elements_per_iq; 4030 element_array_length_per_oq = 4031 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH * 4032 ctrl_info->num_elements_per_oq; 4033 num_inbound_queues = ctrl_info->num_queue_groups * 2; 4034 num_outbound_queues = ctrl_info->num_queue_groups; 4035 num_queue_indexes = (ctrl_info->num_queue_groups * 3) + 1; 4036 4037 aligned_pointer = NULL; 4038 4039 for (i = 0; i < num_inbound_queues; i++) { 4040 aligned_pointer = PTR_ALIGN(aligned_pointer, 4041 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4042 aligned_pointer += element_array_length_per_iq; 4043 } 4044 4045 for (i = 0; i < num_outbound_queues; i++) { 4046 aligned_pointer = PTR_ALIGN(aligned_pointer, 4047 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4048 aligned_pointer += element_array_length_per_oq; 4049 } 4050 4051 aligned_pointer = PTR_ALIGN(aligned_pointer, 4052 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4053 aligned_pointer += PQI_NUM_EVENT_QUEUE_ELEMENTS * 4054 PQI_EVENT_OQ_ELEMENT_LENGTH; 4055 4056 for (i = 0; i < num_queue_indexes; i++) { 4057 aligned_pointer = PTR_ALIGN(aligned_pointer, 4058 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4059 aligned_pointer += sizeof(pqi_index_t); 4060 } 4061 4062 alloc_length = (size_t)aligned_pointer + 4063 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 4064 4065 alloc_length += PQI_EXTRA_SGL_MEMORY; 4066 4067 ctrl_info->queue_memory_base = 4068 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 4069 &ctrl_info->queue_memory_base_dma_handle, 4070 GFP_KERNEL); 4071 4072 if (!ctrl_info->queue_memory_base) 4073 return -ENOMEM; 4074 4075 ctrl_info->queue_memory_length = alloc_length; 4076 4077 element_array = PTR_ALIGN(ctrl_info->queue_memory_base, 4078 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4079 4080 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4081 queue_group = &ctrl_info->queue_groups[i]; 4082 queue_group->iq_element_array[RAID_PATH] = element_array; 4083 queue_group->iq_element_array_bus_addr[RAID_PATH] = 4084 ctrl_info->queue_memory_base_dma_handle + 4085 (element_array - ctrl_info->queue_memory_base); 4086 element_array += element_array_length_per_iq; 4087 element_array = PTR_ALIGN(element_array, 4088 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4089 queue_group->iq_element_array[AIO_PATH] = element_array; 4090 queue_group->iq_element_array_bus_addr[AIO_PATH] = 4091 ctrl_info->queue_memory_base_dma_handle + 4092 (element_array - ctrl_info->queue_memory_base); 4093 element_array += element_array_length_per_iq; 4094 element_array = PTR_ALIGN(element_array, 4095 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4096 } 4097 4098 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4099 queue_group = &ctrl_info->queue_groups[i]; 4100 queue_group->oq_element_array = element_array; 4101 queue_group->oq_element_array_bus_addr = 4102 ctrl_info->queue_memory_base_dma_handle + 4103 (element_array - ctrl_info->queue_memory_base); 4104 element_array += element_array_length_per_oq; 4105 element_array = PTR_ALIGN(element_array, 4106 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4107 } 4108 4109 ctrl_info->event_queue.oq_element_array = element_array; 4110 ctrl_info->event_queue.oq_element_array_bus_addr = 4111 ctrl_info->queue_memory_base_dma_handle + 4112 (element_array - ctrl_info->queue_memory_base); 4113 element_array += PQI_NUM_EVENT_QUEUE_ELEMENTS * 4114 PQI_EVENT_OQ_ELEMENT_LENGTH; 4115 4116 next_queue_index = (void __iomem *)PTR_ALIGN(element_array, 4117 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4118 4119 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4120 queue_group = &ctrl_info->queue_groups[i]; 4121 queue_group->iq_ci[RAID_PATH] = next_queue_index; 4122 queue_group->iq_ci_bus_addr[RAID_PATH] = 4123 ctrl_info->queue_memory_base_dma_handle + 4124 (next_queue_index - 4125 (void __iomem *)ctrl_info->queue_memory_base); 4126 next_queue_index += sizeof(pqi_index_t); 4127 next_queue_index = PTR_ALIGN(next_queue_index, 4128 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4129 queue_group->iq_ci[AIO_PATH] = next_queue_index; 4130 queue_group->iq_ci_bus_addr[AIO_PATH] = 4131 ctrl_info->queue_memory_base_dma_handle + 4132 (next_queue_index - 4133 (void __iomem *)ctrl_info->queue_memory_base); 4134 next_queue_index += sizeof(pqi_index_t); 4135 next_queue_index = PTR_ALIGN(next_queue_index, 4136 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4137 queue_group->oq_pi = next_queue_index; 4138 queue_group->oq_pi_bus_addr = 4139 ctrl_info->queue_memory_base_dma_handle + 4140 (next_queue_index - 4141 (void __iomem *)ctrl_info->queue_memory_base); 4142 next_queue_index += sizeof(pqi_index_t); 4143 next_queue_index = PTR_ALIGN(next_queue_index, 4144 PQI_OPERATIONAL_INDEX_ALIGNMENT); 4145 } 4146 4147 ctrl_info->event_queue.oq_pi = next_queue_index; 4148 ctrl_info->event_queue.oq_pi_bus_addr = 4149 ctrl_info->queue_memory_base_dma_handle + 4150 (next_queue_index - 4151 (void __iomem *)ctrl_info->queue_memory_base); 4152 4153 return 0; 4154 } 4155 4156 static void pqi_init_operational_queues(struct pqi_ctrl_info *ctrl_info) 4157 { 4158 unsigned int i; 4159 u16 next_iq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 4160 u16 next_oq_id = PQI_MIN_OPERATIONAL_QUEUE_ID; 4161 4162 /* 4163 * Initialize the backpointers to the controller structure in 4164 * each operational queue group structure. 4165 */ 4166 for (i = 0; i < ctrl_info->num_queue_groups; i++) 4167 ctrl_info->queue_groups[i].ctrl_info = ctrl_info; 4168 4169 /* 4170 * Assign IDs to all operational queues. Note that the IDs 4171 * assigned to operational IQs are independent of the IDs 4172 * assigned to operational OQs. 4173 */ 4174 ctrl_info->event_queue.oq_id = next_oq_id++; 4175 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4176 ctrl_info->queue_groups[i].iq_id[RAID_PATH] = next_iq_id++; 4177 ctrl_info->queue_groups[i].iq_id[AIO_PATH] = next_iq_id++; 4178 ctrl_info->queue_groups[i].oq_id = next_oq_id++; 4179 } 4180 4181 /* 4182 * Assign MSI-X table entry indexes to all queues. Note that the 4183 * interrupt for the event queue is shared with the first queue group. 4184 */ 4185 ctrl_info->event_queue.int_msg_num = 0; 4186 for (i = 0; i < ctrl_info->num_queue_groups; i++) 4187 ctrl_info->queue_groups[i].int_msg_num = i; 4188 4189 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4190 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[0]); 4191 spin_lock_init(&ctrl_info->queue_groups[i].submit_lock[1]); 4192 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[0]); 4193 INIT_LIST_HEAD(&ctrl_info->queue_groups[i].request_list[1]); 4194 } 4195 } 4196 4197 static int pqi_alloc_admin_queues(struct pqi_ctrl_info *ctrl_info) 4198 { 4199 size_t alloc_length; 4200 struct pqi_admin_queues_aligned *admin_queues_aligned; 4201 struct pqi_admin_queues *admin_queues; 4202 4203 alloc_length = sizeof(struct pqi_admin_queues_aligned) + 4204 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT; 4205 4206 ctrl_info->admin_queue_memory_base = 4207 dma_alloc_coherent(&ctrl_info->pci_dev->dev, alloc_length, 4208 &ctrl_info->admin_queue_memory_base_dma_handle, 4209 GFP_KERNEL); 4210 4211 if (!ctrl_info->admin_queue_memory_base) 4212 return -ENOMEM; 4213 4214 ctrl_info->admin_queue_memory_length = alloc_length; 4215 4216 admin_queues = &ctrl_info->admin_queues; 4217 admin_queues_aligned = PTR_ALIGN(ctrl_info->admin_queue_memory_base, 4218 PQI_QUEUE_ELEMENT_ARRAY_ALIGNMENT); 4219 admin_queues->iq_element_array = 4220 &admin_queues_aligned->iq_element_array; 4221 admin_queues->oq_element_array = 4222 &admin_queues_aligned->oq_element_array; 4223 admin_queues->iq_ci = 4224 (pqi_index_t __iomem *)&admin_queues_aligned->iq_ci; 4225 admin_queues->oq_pi = 4226 (pqi_index_t __iomem *)&admin_queues_aligned->oq_pi; 4227 4228 admin_queues->iq_element_array_bus_addr = 4229 ctrl_info->admin_queue_memory_base_dma_handle + 4230 (admin_queues->iq_element_array - 4231 ctrl_info->admin_queue_memory_base); 4232 admin_queues->oq_element_array_bus_addr = 4233 ctrl_info->admin_queue_memory_base_dma_handle + 4234 (admin_queues->oq_element_array - 4235 ctrl_info->admin_queue_memory_base); 4236 admin_queues->iq_ci_bus_addr = 4237 ctrl_info->admin_queue_memory_base_dma_handle + 4238 ((void __iomem *)admin_queues->iq_ci - 4239 (void __iomem *)ctrl_info->admin_queue_memory_base); 4240 admin_queues->oq_pi_bus_addr = 4241 ctrl_info->admin_queue_memory_base_dma_handle + 4242 ((void __iomem *)admin_queues->oq_pi - 4243 (void __iomem *)ctrl_info->admin_queue_memory_base); 4244 4245 return 0; 4246 } 4247 4248 #define PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES PQI_HZ 4249 #define PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS 1 4250 4251 static int pqi_create_admin_queues(struct pqi_ctrl_info *ctrl_info) 4252 { 4253 struct pqi_device_registers __iomem *pqi_registers; 4254 struct pqi_admin_queues *admin_queues; 4255 unsigned long timeout; 4256 u8 status; 4257 u32 reg; 4258 4259 pqi_registers = ctrl_info->pqi_registers; 4260 admin_queues = &ctrl_info->admin_queues; 4261 4262 writeq((u64)admin_queues->iq_element_array_bus_addr, 4263 &pqi_registers->admin_iq_element_array_addr); 4264 writeq((u64)admin_queues->oq_element_array_bus_addr, 4265 &pqi_registers->admin_oq_element_array_addr); 4266 writeq((u64)admin_queues->iq_ci_bus_addr, 4267 &pqi_registers->admin_iq_ci_addr); 4268 writeq((u64)admin_queues->oq_pi_bus_addr, 4269 &pqi_registers->admin_oq_pi_addr); 4270 4271 reg = PQI_ADMIN_IQ_NUM_ELEMENTS | 4272 (PQI_ADMIN_OQ_NUM_ELEMENTS << 8) | 4273 (admin_queues->int_msg_num << 16); 4274 writel(reg, &pqi_registers->admin_iq_num_elements); 4275 4276 writel(PQI_CREATE_ADMIN_QUEUE_PAIR, 4277 &pqi_registers->function_and_status_code); 4278 4279 timeout = PQI_ADMIN_QUEUE_CREATE_TIMEOUT_JIFFIES + jiffies; 4280 while (1) { 4281 msleep(PQI_ADMIN_QUEUE_CREATE_POLL_INTERVAL_MSECS); 4282 status = readb(&pqi_registers->function_and_status_code); 4283 if (status == PQI_STATUS_IDLE) 4284 break; 4285 if (time_after(jiffies, timeout)) 4286 return -ETIMEDOUT; 4287 } 4288 4289 /* 4290 * The offset registers are not initialized to the correct 4291 * offsets until *after* the create admin queue pair command 4292 * completes successfully. 4293 */ 4294 admin_queues->iq_pi = ctrl_info->iomem_base + 4295 PQI_DEVICE_REGISTERS_OFFSET + 4296 readq(&pqi_registers->admin_iq_pi_offset); 4297 admin_queues->oq_ci = ctrl_info->iomem_base + 4298 PQI_DEVICE_REGISTERS_OFFSET + 4299 readq(&pqi_registers->admin_oq_ci_offset); 4300 4301 return 0; 4302 } 4303 4304 static void pqi_submit_admin_request(struct pqi_ctrl_info *ctrl_info, 4305 struct pqi_general_admin_request *request) 4306 { 4307 struct pqi_admin_queues *admin_queues; 4308 void *next_element; 4309 pqi_index_t iq_pi; 4310 4311 admin_queues = &ctrl_info->admin_queues; 4312 iq_pi = admin_queues->iq_pi_copy; 4313 4314 next_element = admin_queues->iq_element_array + 4315 (iq_pi * PQI_ADMIN_IQ_ELEMENT_LENGTH); 4316 4317 memcpy(next_element, request, sizeof(*request)); 4318 4319 iq_pi = (iq_pi + 1) % PQI_ADMIN_IQ_NUM_ELEMENTS; 4320 admin_queues->iq_pi_copy = iq_pi; 4321 4322 /* 4323 * This write notifies the controller that an IU is available to be 4324 * processed. 4325 */ 4326 writel(iq_pi, admin_queues->iq_pi); 4327 } 4328 4329 #define PQI_ADMIN_REQUEST_TIMEOUT_SECS 60 4330 4331 static int pqi_poll_for_admin_response(struct pqi_ctrl_info *ctrl_info, 4332 struct pqi_general_admin_response *response) 4333 { 4334 struct pqi_admin_queues *admin_queues; 4335 pqi_index_t oq_pi; 4336 pqi_index_t oq_ci; 4337 unsigned long timeout; 4338 4339 admin_queues = &ctrl_info->admin_queues; 4340 oq_ci = admin_queues->oq_ci_copy; 4341 4342 timeout = (PQI_ADMIN_REQUEST_TIMEOUT_SECS * PQI_HZ) + jiffies; 4343 4344 while (1) { 4345 oq_pi = readl(admin_queues->oq_pi); 4346 if (oq_pi != oq_ci) 4347 break; 4348 if (time_after(jiffies, timeout)) { 4349 dev_err(&ctrl_info->pci_dev->dev, 4350 "timed out waiting for admin response\n"); 4351 return -ETIMEDOUT; 4352 } 4353 if (!sis_is_firmware_running(ctrl_info)) 4354 return -ENXIO; 4355 usleep_range(1000, 2000); 4356 } 4357 4358 memcpy(response, admin_queues->oq_element_array + 4359 (oq_ci * PQI_ADMIN_OQ_ELEMENT_LENGTH), sizeof(*response)); 4360 4361 oq_ci = (oq_ci + 1) % PQI_ADMIN_OQ_NUM_ELEMENTS; 4362 admin_queues->oq_ci_copy = oq_ci; 4363 writel(oq_ci, admin_queues->oq_ci); 4364 4365 return 0; 4366 } 4367 4368 static void pqi_start_io(struct pqi_ctrl_info *ctrl_info, 4369 struct pqi_queue_group *queue_group, enum pqi_io_path path, 4370 struct pqi_io_request *io_request) 4371 { 4372 struct pqi_io_request *next; 4373 void *next_element; 4374 pqi_index_t iq_pi; 4375 pqi_index_t iq_ci; 4376 size_t iu_length; 4377 unsigned long flags; 4378 unsigned int num_elements_needed; 4379 unsigned int num_elements_to_end_of_queue; 4380 size_t copy_count; 4381 struct pqi_iu_header *request; 4382 4383 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 4384 4385 if (io_request) { 4386 io_request->queue_group = queue_group; 4387 list_add_tail(&io_request->request_list_entry, 4388 &queue_group->request_list[path]); 4389 } 4390 4391 iq_pi = queue_group->iq_pi_copy[path]; 4392 4393 list_for_each_entry_safe(io_request, next, 4394 &queue_group->request_list[path], request_list_entry) { 4395 4396 request = io_request->iu; 4397 4398 iu_length = get_unaligned_le16(&request->iu_length) + 4399 PQI_REQUEST_HEADER_LENGTH; 4400 num_elements_needed = 4401 DIV_ROUND_UP(iu_length, 4402 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4403 4404 iq_ci = readl(queue_group->iq_ci[path]); 4405 4406 if (num_elements_needed > pqi_num_elements_free(iq_pi, iq_ci, 4407 ctrl_info->num_elements_per_iq)) 4408 break; 4409 4410 put_unaligned_le16(queue_group->oq_id, 4411 &request->response_queue_id); 4412 4413 next_element = queue_group->iq_element_array[path] + 4414 (iq_pi * PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4415 4416 num_elements_to_end_of_queue = 4417 ctrl_info->num_elements_per_iq - iq_pi; 4418 4419 if (num_elements_needed <= num_elements_to_end_of_queue) { 4420 memcpy(next_element, request, iu_length); 4421 } else { 4422 copy_count = num_elements_to_end_of_queue * 4423 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 4424 memcpy(next_element, request, copy_count); 4425 memcpy(queue_group->iq_element_array[path], 4426 (u8 *)request + copy_count, 4427 iu_length - copy_count); 4428 } 4429 4430 iq_pi = (iq_pi + num_elements_needed) % 4431 ctrl_info->num_elements_per_iq; 4432 4433 list_del(&io_request->request_list_entry); 4434 } 4435 4436 if (iq_pi != queue_group->iq_pi_copy[path]) { 4437 queue_group->iq_pi_copy[path] = iq_pi; 4438 /* 4439 * This write notifies the controller that one or more IUs are 4440 * available to be processed. 4441 */ 4442 writel(iq_pi, queue_group->iq_pi[path]); 4443 } 4444 4445 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 4446 } 4447 4448 #define PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS 10 4449 4450 static int pqi_wait_for_completion_io(struct pqi_ctrl_info *ctrl_info, 4451 struct completion *wait) 4452 { 4453 int rc; 4454 4455 while (1) { 4456 if (wait_for_completion_io_timeout(wait, 4457 PQI_WAIT_FOR_COMPLETION_IO_TIMEOUT_SECS * PQI_HZ)) { 4458 rc = 0; 4459 break; 4460 } 4461 4462 pqi_check_ctrl_health(ctrl_info); 4463 if (pqi_ctrl_offline(ctrl_info)) { 4464 rc = -ENXIO; 4465 break; 4466 } 4467 } 4468 4469 return rc; 4470 } 4471 4472 static void pqi_raid_synchronous_complete(struct pqi_io_request *io_request, 4473 void *context) 4474 { 4475 struct completion *waiting = context; 4476 4477 complete(waiting); 4478 } 4479 4480 static int pqi_process_raid_io_error_synchronous( 4481 struct pqi_raid_error_info *error_info) 4482 { 4483 int rc = -EIO; 4484 4485 switch (error_info->data_out_result) { 4486 case PQI_DATA_IN_OUT_GOOD: 4487 if (error_info->status == SAM_STAT_GOOD) 4488 rc = 0; 4489 break; 4490 case PQI_DATA_IN_OUT_UNDERFLOW: 4491 if (error_info->status == SAM_STAT_GOOD || 4492 error_info->status == SAM_STAT_CHECK_CONDITION) 4493 rc = 0; 4494 break; 4495 case PQI_DATA_IN_OUT_ABORTED: 4496 rc = PQI_CMD_STATUS_ABORTED; 4497 break; 4498 } 4499 4500 return rc; 4501 } 4502 4503 static inline bool pqi_is_blockable_request(struct pqi_iu_header *request) 4504 { 4505 return (request->driver_flags & PQI_DRIVER_NONBLOCKABLE_REQUEST) == 0; 4506 } 4507 4508 static int pqi_submit_raid_request_synchronous(struct pqi_ctrl_info *ctrl_info, 4509 struct pqi_iu_header *request, unsigned int flags, 4510 struct pqi_raid_error_info *error_info) 4511 { 4512 int rc = 0; 4513 struct pqi_io_request *io_request; 4514 size_t iu_length; 4515 DECLARE_COMPLETION_ONSTACK(wait); 4516 4517 if (flags & PQI_SYNC_FLAGS_INTERRUPTABLE) { 4518 if (down_interruptible(&ctrl_info->sync_request_sem)) 4519 return -ERESTARTSYS; 4520 } else { 4521 down(&ctrl_info->sync_request_sem); 4522 } 4523 4524 pqi_ctrl_busy(ctrl_info); 4525 /* 4526 * Wait for other admin queue updates such as; 4527 * config table changes, OFA memory updates, ... 4528 */ 4529 if (pqi_is_blockable_request(request)) 4530 pqi_wait_if_ctrl_blocked(ctrl_info); 4531 4532 if (pqi_ctrl_offline(ctrl_info)) { 4533 rc = -ENXIO; 4534 goto out; 4535 } 4536 4537 io_request = pqi_alloc_io_request(ctrl_info); 4538 4539 put_unaligned_le16(io_request->index, 4540 &(((struct pqi_raid_path_request *)request)->request_id)); 4541 4542 if (request->iu_type == PQI_REQUEST_IU_RAID_PATH_IO) 4543 ((struct pqi_raid_path_request *)request)->error_index = 4544 ((struct pqi_raid_path_request *)request)->request_id; 4545 4546 iu_length = get_unaligned_le16(&request->iu_length) + 4547 PQI_REQUEST_HEADER_LENGTH; 4548 memcpy(io_request->iu, request, iu_length); 4549 4550 io_request->io_complete_callback = pqi_raid_synchronous_complete; 4551 io_request->context = &wait; 4552 4553 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 4554 io_request); 4555 4556 pqi_wait_for_completion_io(ctrl_info, &wait); 4557 4558 if (error_info) { 4559 if (io_request->error_info) 4560 memcpy(error_info, io_request->error_info, sizeof(*error_info)); 4561 else 4562 memset(error_info, 0, sizeof(*error_info)); 4563 } else if (rc == 0 && io_request->error_info) { 4564 rc = pqi_process_raid_io_error_synchronous(io_request->error_info); 4565 } 4566 4567 pqi_free_io_request(io_request); 4568 4569 out: 4570 pqi_ctrl_unbusy(ctrl_info); 4571 up(&ctrl_info->sync_request_sem); 4572 4573 return rc; 4574 } 4575 4576 static int pqi_validate_admin_response( 4577 struct pqi_general_admin_response *response, u8 expected_function_code) 4578 { 4579 if (response->header.iu_type != PQI_RESPONSE_IU_GENERAL_ADMIN) 4580 return -EINVAL; 4581 4582 if (get_unaligned_le16(&response->header.iu_length) != 4583 PQI_GENERAL_ADMIN_IU_LENGTH) 4584 return -EINVAL; 4585 4586 if (response->function_code != expected_function_code) 4587 return -EINVAL; 4588 4589 if (response->status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) 4590 return -EINVAL; 4591 4592 return 0; 4593 } 4594 4595 static int pqi_submit_admin_request_synchronous( 4596 struct pqi_ctrl_info *ctrl_info, 4597 struct pqi_general_admin_request *request, 4598 struct pqi_general_admin_response *response) 4599 { 4600 int rc; 4601 4602 pqi_submit_admin_request(ctrl_info, request); 4603 4604 rc = pqi_poll_for_admin_response(ctrl_info, response); 4605 4606 if (rc == 0) 4607 rc = pqi_validate_admin_response(response, request->function_code); 4608 4609 return rc; 4610 } 4611 4612 static int pqi_report_device_capability(struct pqi_ctrl_info *ctrl_info) 4613 { 4614 int rc; 4615 struct pqi_general_admin_request request; 4616 struct pqi_general_admin_response response; 4617 struct pqi_device_capability *capability; 4618 struct pqi_iu_layer_descriptor *sop_iu_layer_descriptor; 4619 4620 capability = kmalloc(sizeof(*capability), GFP_KERNEL); 4621 if (!capability) 4622 return -ENOMEM; 4623 4624 memset(&request, 0, sizeof(request)); 4625 4626 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4627 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4628 &request.header.iu_length); 4629 request.function_code = 4630 PQI_GENERAL_ADMIN_FUNCTION_REPORT_DEVICE_CAPABILITY; 4631 put_unaligned_le32(sizeof(*capability), 4632 &request.data.report_device_capability.buffer_length); 4633 4634 rc = pqi_map_single(ctrl_info->pci_dev, 4635 &request.data.report_device_capability.sg_descriptor, 4636 capability, sizeof(*capability), 4637 DMA_FROM_DEVICE); 4638 if (rc) 4639 goto out; 4640 4641 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, &response); 4642 4643 pqi_pci_unmap(ctrl_info->pci_dev, 4644 &request.data.report_device_capability.sg_descriptor, 1, 4645 DMA_FROM_DEVICE); 4646 4647 if (rc) 4648 goto out; 4649 4650 if (response.status != PQI_GENERAL_ADMIN_STATUS_SUCCESS) { 4651 rc = -EIO; 4652 goto out; 4653 } 4654 4655 ctrl_info->max_inbound_queues = 4656 get_unaligned_le16(&capability->max_inbound_queues); 4657 ctrl_info->max_elements_per_iq = 4658 get_unaligned_le16(&capability->max_elements_per_iq); 4659 ctrl_info->max_iq_element_length = 4660 get_unaligned_le16(&capability->max_iq_element_length) 4661 * 16; 4662 ctrl_info->max_outbound_queues = 4663 get_unaligned_le16(&capability->max_outbound_queues); 4664 ctrl_info->max_elements_per_oq = 4665 get_unaligned_le16(&capability->max_elements_per_oq); 4666 ctrl_info->max_oq_element_length = 4667 get_unaligned_le16(&capability->max_oq_element_length) 4668 * 16; 4669 4670 sop_iu_layer_descriptor = 4671 &capability->iu_layer_descriptors[PQI_PROTOCOL_SOP]; 4672 4673 ctrl_info->max_inbound_iu_length_per_firmware = 4674 get_unaligned_le16( 4675 &sop_iu_layer_descriptor->max_inbound_iu_length); 4676 ctrl_info->inbound_spanning_supported = 4677 sop_iu_layer_descriptor->inbound_spanning_supported; 4678 ctrl_info->outbound_spanning_supported = 4679 sop_iu_layer_descriptor->outbound_spanning_supported; 4680 4681 out: 4682 kfree(capability); 4683 4684 return rc; 4685 } 4686 4687 static int pqi_validate_device_capability(struct pqi_ctrl_info *ctrl_info) 4688 { 4689 if (ctrl_info->max_iq_element_length < 4690 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4691 dev_err(&ctrl_info->pci_dev->dev, 4692 "max. inbound queue element length of %d is less than the required length of %d\n", 4693 ctrl_info->max_iq_element_length, 4694 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4695 return -EINVAL; 4696 } 4697 4698 if (ctrl_info->max_oq_element_length < 4699 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH) { 4700 dev_err(&ctrl_info->pci_dev->dev, 4701 "max. outbound queue element length of %d is less than the required length of %d\n", 4702 ctrl_info->max_oq_element_length, 4703 PQI_OPERATIONAL_OQ_ELEMENT_LENGTH); 4704 return -EINVAL; 4705 } 4706 4707 if (ctrl_info->max_inbound_iu_length_per_firmware < 4708 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) { 4709 dev_err(&ctrl_info->pci_dev->dev, 4710 "max. inbound IU length of %u is less than the min. required length of %d\n", 4711 ctrl_info->max_inbound_iu_length_per_firmware, 4712 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 4713 return -EINVAL; 4714 } 4715 4716 if (!ctrl_info->inbound_spanning_supported) { 4717 dev_err(&ctrl_info->pci_dev->dev, 4718 "the controller does not support inbound spanning\n"); 4719 return -EINVAL; 4720 } 4721 4722 if (ctrl_info->outbound_spanning_supported) { 4723 dev_err(&ctrl_info->pci_dev->dev, 4724 "the controller supports outbound spanning but this driver does not\n"); 4725 return -EINVAL; 4726 } 4727 4728 return 0; 4729 } 4730 4731 static int pqi_create_event_queue(struct pqi_ctrl_info *ctrl_info) 4732 { 4733 int rc; 4734 struct pqi_event_queue *event_queue; 4735 struct pqi_general_admin_request request; 4736 struct pqi_general_admin_response response; 4737 4738 event_queue = &ctrl_info->event_queue; 4739 4740 /* 4741 * Create OQ (Outbound Queue - device to host queue) to dedicate 4742 * to events. 4743 */ 4744 memset(&request, 0, sizeof(request)); 4745 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4746 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4747 &request.header.iu_length); 4748 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4749 put_unaligned_le16(event_queue->oq_id, 4750 &request.data.create_operational_oq.queue_id); 4751 put_unaligned_le64((u64)event_queue->oq_element_array_bus_addr, 4752 &request.data.create_operational_oq.element_array_addr); 4753 put_unaligned_le64((u64)event_queue->oq_pi_bus_addr, 4754 &request.data.create_operational_oq.pi_addr); 4755 put_unaligned_le16(PQI_NUM_EVENT_QUEUE_ELEMENTS, 4756 &request.data.create_operational_oq.num_elements); 4757 put_unaligned_le16(PQI_EVENT_OQ_ELEMENT_LENGTH / 16, 4758 &request.data.create_operational_oq.element_length); 4759 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4760 put_unaligned_le16(event_queue->int_msg_num, 4761 &request.data.create_operational_oq.int_msg_num); 4762 4763 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4764 &response); 4765 if (rc) 4766 return rc; 4767 4768 event_queue->oq_ci = ctrl_info->iomem_base + 4769 PQI_DEVICE_REGISTERS_OFFSET + 4770 get_unaligned_le64( 4771 &response.data.create_operational_oq.oq_ci_offset); 4772 4773 return 0; 4774 } 4775 4776 static int pqi_create_queue_group(struct pqi_ctrl_info *ctrl_info, 4777 unsigned int group_number) 4778 { 4779 int rc; 4780 struct pqi_queue_group *queue_group; 4781 struct pqi_general_admin_request request; 4782 struct pqi_general_admin_response response; 4783 4784 queue_group = &ctrl_info->queue_groups[group_number]; 4785 4786 /* 4787 * Create IQ (Inbound Queue - host to device queue) for 4788 * RAID path. 4789 */ 4790 memset(&request, 0, sizeof(request)); 4791 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4792 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4793 &request.header.iu_length); 4794 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4795 put_unaligned_le16(queue_group->iq_id[RAID_PATH], 4796 &request.data.create_operational_iq.queue_id); 4797 put_unaligned_le64( 4798 (u64)queue_group->iq_element_array_bus_addr[RAID_PATH], 4799 &request.data.create_operational_iq.element_array_addr); 4800 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[RAID_PATH], 4801 &request.data.create_operational_iq.ci_addr); 4802 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4803 &request.data.create_operational_iq.num_elements); 4804 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4805 &request.data.create_operational_iq.element_length); 4806 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4807 4808 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4809 &response); 4810 if (rc) { 4811 dev_err(&ctrl_info->pci_dev->dev, 4812 "error creating inbound RAID queue\n"); 4813 return rc; 4814 } 4815 4816 queue_group->iq_pi[RAID_PATH] = ctrl_info->iomem_base + 4817 PQI_DEVICE_REGISTERS_OFFSET + 4818 get_unaligned_le64( 4819 &response.data.create_operational_iq.iq_pi_offset); 4820 4821 /* 4822 * Create IQ (Inbound Queue - host to device queue) for 4823 * Advanced I/O (AIO) path. 4824 */ 4825 memset(&request, 0, sizeof(request)); 4826 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4827 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4828 &request.header.iu_length); 4829 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_IQ; 4830 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4831 &request.data.create_operational_iq.queue_id); 4832 put_unaligned_le64((u64)queue_group-> 4833 iq_element_array_bus_addr[AIO_PATH], 4834 &request.data.create_operational_iq.element_array_addr); 4835 put_unaligned_le64((u64)queue_group->iq_ci_bus_addr[AIO_PATH], 4836 &request.data.create_operational_iq.ci_addr); 4837 put_unaligned_le16(ctrl_info->num_elements_per_iq, 4838 &request.data.create_operational_iq.num_elements); 4839 put_unaligned_le16(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH / 16, 4840 &request.data.create_operational_iq.element_length); 4841 request.data.create_operational_iq.queue_protocol = PQI_PROTOCOL_SOP; 4842 4843 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4844 &response); 4845 if (rc) { 4846 dev_err(&ctrl_info->pci_dev->dev, 4847 "error creating inbound AIO queue\n"); 4848 return rc; 4849 } 4850 4851 queue_group->iq_pi[AIO_PATH] = ctrl_info->iomem_base + 4852 PQI_DEVICE_REGISTERS_OFFSET + 4853 get_unaligned_le64( 4854 &response.data.create_operational_iq.iq_pi_offset); 4855 4856 /* 4857 * Designate the 2nd IQ as the AIO path. By default, all IQs are 4858 * assumed to be for RAID path I/O unless we change the queue's 4859 * property. 4860 */ 4861 memset(&request, 0, sizeof(request)); 4862 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4863 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4864 &request.header.iu_length); 4865 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CHANGE_IQ_PROPERTY; 4866 put_unaligned_le16(queue_group->iq_id[AIO_PATH], 4867 &request.data.change_operational_iq_properties.queue_id); 4868 put_unaligned_le32(PQI_IQ_PROPERTY_IS_AIO_QUEUE, 4869 &request.data.change_operational_iq_properties.vendor_specific); 4870 4871 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4872 &response); 4873 if (rc) { 4874 dev_err(&ctrl_info->pci_dev->dev, 4875 "error changing queue property\n"); 4876 return rc; 4877 } 4878 4879 /* 4880 * Create OQ (Outbound Queue - device to host queue). 4881 */ 4882 memset(&request, 0, sizeof(request)); 4883 request.header.iu_type = PQI_REQUEST_IU_GENERAL_ADMIN; 4884 put_unaligned_le16(PQI_GENERAL_ADMIN_IU_LENGTH, 4885 &request.header.iu_length); 4886 request.function_code = PQI_GENERAL_ADMIN_FUNCTION_CREATE_OQ; 4887 put_unaligned_le16(queue_group->oq_id, 4888 &request.data.create_operational_oq.queue_id); 4889 put_unaligned_le64((u64)queue_group->oq_element_array_bus_addr, 4890 &request.data.create_operational_oq.element_array_addr); 4891 put_unaligned_le64((u64)queue_group->oq_pi_bus_addr, 4892 &request.data.create_operational_oq.pi_addr); 4893 put_unaligned_le16(ctrl_info->num_elements_per_oq, 4894 &request.data.create_operational_oq.num_elements); 4895 put_unaligned_le16(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH / 16, 4896 &request.data.create_operational_oq.element_length); 4897 request.data.create_operational_oq.queue_protocol = PQI_PROTOCOL_SOP; 4898 put_unaligned_le16(queue_group->int_msg_num, 4899 &request.data.create_operational_oq.int_msg_num); 4900 4901 rc = pqi_submit_admin_request_synchronous(ctrl_info, &request, 4902 &response); 4903 if (rc) { 4904 dev_err(&ctrl_info->pci_dev->dev, 4905 "error creating outbound queue\n"); 4906 return rc; 4907 } 4908 4909 queue_group->oq_ci = ctrl_info->iomem_base + 4910 PQI_DEVICE_REGISTERS_OFFSET + 4911 get_unaligned_le64( 4912 &response.data.create_operational_oq.oq_ci_offset); 4913 4914 return 0; 4915 } 4916 4917 static int pqi_create_queues(struct pqi_ctrl_info *ctrl_info) 4918 { 4919 int rc; 4920 unsigned int i; 4921 4922 rc = pqi_create_event_queue(ctrl_info); 4923 if (rc) { 4924 dev_err(&ctrl_info->pci_dev->dev, 4925 "error creating event queue\n"); 4926 return rc; 4927 } 4928 4929 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 4930 rc = pqi_create_queue_group(ctrl_info, i); 4931 if (rc) { 4932 dev_err(&ctrl_info->pci_dev->dev, 4933 "error creating queue group number %u/%u\n", 4934 i, ctrl_info->num_queue_groups); 4935 return rc; 4936 } 4937 } 4938 4939 return 0; 4940 } 4941 4942 #define PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH \ 4943 struct_size((struct pqi_event_config *)0, descriptors, PQI_MAX_EVENT_DESCRIPTORS) 4944 4945 static int pqi_configure_events(struct pqi_ctrl_info *ctrl_info, 4946 bool enable_events) 4947 { 4948 int rc; 4949 unsigned int i; 4950 struct pqi_event_config *event_config; 4951 struct pqi_event_descriptor *event_descriptor; 4952 struct pqi_general_management_request request; 4953 4954 event_config = kmalloc(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4955 GFP_KERNEL); 4956 if (!event_config) 4957 return -ENOMEM; 4958 4959 memset(&request, 0, sizeof(request)); 4960 4961 request.header.iu_type = PQI_REQUEST_IU_REPORT_VENDOR_EVENT_CONFIG; 4962 put_unaligned_le16(offsetof(struct pqi_general_management_request, 4963 data.report_event_configuration.sg_descriptors[1]) - 4964 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 4965 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4966 &request.data.report_event_configuration.buffer_length); 4967 4968 rc = pqi_map_single(ctrl_info->pci_dev, 4969 request.data.report_event_configuration.sg_descriptors, 4970 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 4971 DMA_FROM_DEVICE); 4972 if (rc) 4973 goto out; 4974 4975 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 4976 4977 pqi_pci_unmap(ctrl_info->pci_dev, 4978 request.data.report_event_configuration.sg_descriptors, 1, 4979 DMA_FROM_DEVICE); 4980 4981 if (rc) 4982 goto out; 4983 4984 for (i = 0; i < event_config->num_event_descriptors; i++) { 4985 event_descriptor = &event_config->descriptors[i]; 4986 if (enable_events && 4987 pqi_is_supported_event(event_descriptor->event_type)) 4988 put_unaligned_le16(ctrl_info->event_queue.oq_id, 4989 &event_descriptor->oq_id); 4990 else 4991 put_unaligned_le16(0, &event_descriptor->oq_id); 4992 } 4993 4994 memset(&request, 0, sizeof(request)); 4995 4996 request.header.iu_type = PQI_REQUEST_IU_SET_VENDOR_EVENT_CONFIG; 4997 put_unaligned_le16(offsetof(struct pqi_general_management_request, 4998 data.report_event_configuration.sg_descriptors[1]) - 4999 PQI_REQUEST_HEADER_LENGTH, &request.header.iu_length); 5000 put_unaligned_le32(PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5001 &request.data.report_event_configuration.buffer_length); 5002 5003 rc = pqi_map_single(ctrl_info->pci_dev, 5004 request.data.report_event_configuration.sg_descriptors, 5005 event_config, PQI_REPORT_EVENT_CONFIG_BUFFER_LENGTH, 5006 DMA_TO_DEVICE); 5007 if (rc) 5008 goto out; 5009 5010 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 5011 5012 pqi_pci_unmap(ctrl_info->pci_dev, 5013 request.data.report_event_configuration.sg_descriptors, 1, 5014 DMA_TO_DEVICE); 5015 5016 out: 5017 kfree(event_config); 5018 5019 return rc; 5020 } 5021 5022 static inline int pqi_enable_events(struct pqi_ctrl_info *ctrl_info) 5023 { 5024 return pqi_configure_events(ctrl_info, true); 5025 } 5026 5027 static void pqi_free_all_io_requests(struct pqi_ctrl_info *ctrl_info) 5028 { 5029 unsigned int i; 5030 struct device *dev; 5031 size_t sg_chain_buffer_length; 5032 struct pqi_io_request *io_request; 5033 5034 if (!ctrl_info->io_request_pool) 5035 return; 5036 5037 dev = &ctrl_info->pci_dev->dev; 5038 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 5039 io_request = ctrl_info->io_request_pool; 5040 5041 for (i = 0; i < ctrl_info->max_io_slots; i++) { 5042 kfree(io_request->iu); 5043 if (!io_request->sg_chain_buffer) 5044 break; 5045 dma_free_coherent(dev, sg_chain_buffer_length, 5046 io_request->sg_chain_buffer, 5047 io_request->sg_chain_buffer_dma_handle); 5048 io_request++; 5049 } 5050 5051 kfree(ctrl_info->io_request_pool); 5052 ctrl_info->io_request_pool = NULL; 5053 } 5054 5055 static inline int pqi_alloc_error_buffer(struct pqi_ctrl_info *ctrl_info) 5056 { 5057 ctrl_info->error_buffer = dma_alloc_coherent(&ctrl_info->pci_dev->dev, 5058 ctrl_info->error_buffer_length, 5059 &ctrl_info->error_buffer_dma_handle, 5060 GFP_KERNEL); 5061 if (!ctrl_info->error_buffer) 5062 return -ENOMEM; 5063 5064 return 0; 5065 } 5066 5067 static int pqi_alloc_io_resources(struct pqi_ctrl_info *ctrl_info) 5068 { 5069 unsigned int i; 5070 void *sg_chain_buffer; 5071 size_t sg_chain_buffer_length; 5072 dma_addr_t sg_chain_buffer_dma_handle; 5073 struct device *dev; 5074 struct pqi_io_request *io_request; 5075 5076 ctrl_info->io_request_pool = kcalloc(ctrl_info->max_io_slots, 5077 sizeof(ctrl_info->io_request_pool[0]), GFP_KERNEL); 5078 5079 if (!ctrl_info->io_request_pool) { 5080 dev_err(&ctrl_info->pci_dev->dev, 5081 "failed to allocate I/O request pool\n"); 5082 goto error; 5083 } 5084 5085 dev = &ctrl_info->pci_dev->dev; 5086 sg_chain_buffer_length = ctrl_info->sg_chain_buffer_length; 5087 io_request = ctrl_info->io_request_pool; 5088 5089 for (i = 0; i < ctrl_info->max_io_slots; i++) { 5090 io_request->iu = kmalloc(ctrl_info->max_inbound_iu_length, GFP_KERNEL); 5091 5092 if (!io_request->iu) { 5093 dev_err(&ctrl_info->pci_dev->dev, 5094 "failed to allocate IU buffers\n"); 5095 goto error; 5096 } 5097 5098 sg_chain_buffer = dma_alloc_coherent(dev, 5099 sg_chain_buffer_length, &sg_chain_buffer_dma_handle, 5100 GFP_KERNEL); 5101 5102 if (!sg_chain_buffer) { 5103 dev_err(&ctrl_info->pci_dev->dev, 5104 "failed to allocate PQI scatter-gather chain buffers\n"); 5105 goto error; 5106 } 5107 5108 io_request->index = i; 5109 io_request->sg_chain_buffer = sg_chain_buffer; 5110 io_request->sg_chain_buffer_dma_handle = sg_chain_buffer_dma_handle; 5111 io_request++; 5112 } 5113 5114 return 0; 5115 5116 error: 5117 pqi_free_all_io_requests(ctrl_info); 5118 5119 return -ENOMEM; 5120 } 5121 5122 /* 5123 * Calculate required resources that are sized based on max. outstanding 5124 * requests and max. transfer size. 5125 */ 5126 5127 static void pqi_calculate_io_resources(struct pqi_ctrl_info *ctrl_info) 5128 { 5129 u32 max_transfer_size; 5130 u32 max_sg_entries; 5131 5132 ctrl_info->scsi_ml_can_queue = 5133 ctrl_info->max_outstanding_requests - PQI_RESERVED_IO_SLOTS; 5134 ctrl_info->max_io_slots = ctrl_info->max_outstanding_requests; 5135 5136 ctrl_info->error_buffer_length = 5137 ctrl_info->max_io_slots * PQI_ERROR_BUFFER_ELEMENT_LENGTH; 5138 5139 if (reset_devices) 5140 max_transfer_size = min(ctrl_info->max_transfer_size, 5141 PQI_MAX_TRANSFER_SIZE_KDUMP); 5142 else 5143 max_transfer_size = min(ctrl_info->max_transfer_size, 5144 PQI_MAX_TRANSFER_SIZE); 5145 5146 max_sg_entries = max_transfer_size / PAGE_SIZE; 5147 5148 /* +1 to cover when the buffer is not page-aligned. */ 5149 max_sg_entries++; 5150 5151 max_sg_entries = min(ctrl_info->max_sg_entries, max_sg_entries); 5152 5153 max_transfer_size = (max_sg_entries - 1) * PAGE_SIZE; 5154 5155 ctrl_info->sg_chain_buffer_length = 5156 (max_sg_entries * sizeof(struct pqi_sg_descriptor)) + 5157 PQI_EXTRA_SGL_MEMORY; 5158 ctrl_info->sg_tablesize = max_sg_entries; 5159 ctrl_info->max_sectors = max_transfer_size / 512; 5160 } 5161 5162 static void pqi_calculate_queue_resources(struct pqi_ctrl_info *ctrl_info) 5163 { 5164 int num_queue_groups; 5165 u16 num_elements_per_iq; 5166 u16 num_elements_per_oq; 5167 5168 if (reset_devices) { 5169 num_queue_groups = 1; 5170 } else { 5171 int num_cpus; 5172 int max_queue_groups; 5173 5174 max_queue_groups = min(ctrl_info->max_inbound_queues / 2, 5175 ctrl_info->max_outbound_queues - 1); 5176 max_queue_groups = min(max_queue_groups, PQI_MAX_QUEUE_GROUPS); 5177 5178 num_cpus = num_online_cpus(); 5179 num_queue_groups = min(num_cpus, ctrl_info->max_msix_vectors); 5180 num_queue_groups = min(num_queue_groups, max_queue_groups); 5181 } 5182 5183 ctrl_info->num_queue_groups = num_queue_groups; 5184 ctrl_info->max_hw_queue_index = num_queue_groups - 1; 5185 5186 /* 5187 * Make sure that the max. inbound IU length is an even multiple 5188 * of our inbound element length. 5189 */ 5190 ctrl_info->max_inbound_iu_length = 5191 (ctrl_info->max_inbound_iu_length_per_firmware / 5192 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) * 5193 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH; 5194 5195 num_elements_per_iq = 5196 (ctrl_info->max_inbound_iu_length / 5197 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 5198 5199 /* Add one because one element in each queue is unusable. */ 5200 num_elements_per_iq++; 5201 5202 num_elements_per_iq = min(num_elements_per_iq, 5203 ctrl_info->max_elements_per_iq); 5204 5205 num_elements_per_oq = ((num_elements_per_iq - 1) * 2) + 1; 5206 num_elements_per_oq = min(num_elements_per_oq, 5207 ctrl_info->max_elements_per_oq); 5208 5209 ctrl_info->num_elements_per_iq = num_elements_per_iq; 5210 ctrl_info->num_elements_per_oq = num_elements_per_oq; 5211 5212 ctrl_info->max_sg_per_iu = 5213 ((ctrl_info->max_inbound_iu_length - 5214 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 5215 sizeof(struct pqi_sg_descriptor)) + 5216 PQI_MAX_EMBEDDED_SG_DESCRIPTORS; 5217 5218 ctrl_info->max_sg_per_r56_iu = 5219 ((ctrl_info->max_inbound_iu_length - 5220 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH) / 5221 sizeof(struct pqi_sg_descriptor)) + 5222 PQI_MAX_EMBEDDED_R56_SG_DESCRIPTORS; 5223 } 5224 5225 static inline void pqi_set_sg_descriptor(struct pqi_sg_descriptor *sg_descriptor, 5226 struct scatterlist *sg) 5227 { 5228 u64 address = (u64)sg_dma_address(sg); 5229 unsigned int length = sg_dma_len(sg); 5230 5231 put_unaligned_le64(address, &sg_descriptor->address); 5232 put_unaligned_le32(length, &sg_descriptor->length); 5233 put_unaligned_le32(0, &sg_descriptor->flags); 5234 } 5235 5236 static unsigned int pqi_build_sg_list(struct pqi_sg_descriptor *sg_descriptor, 5237 struct scatterlist *sg, int sg_count, struct pqi_io_request *io_request, 5238 int max_sg_per_iu, bool *chained) 5239 { 5240 int i; 5241 unsigned int num_sg_in_iu; 5242 5243 *chained = false; 5244 i = 0; 5245 num_sg_in_iu = 0; 5246 max_sg_per_iu--; /* Subtract 1 to leave room for chain marker. */ 5247 5248 while (1) { 5249 pqi_set_sg_descriptor(sg_descriptor, sg); 5250 if (!*chained) 5251 num_sg_in_iu++; 5252 i++; 5253 if (i == sg_count) 5254 break; 5255 sg_descriptor++; 5256 if (i == max_sg_per_iu) { 5257 put_unaligned_le64((u64)io_request->sg_chain_buffer_dma_handle, 5258 &sg_descriptor->address); 5259 put_unaligned_le32((sg_count - num_sg_in_iu) * sizeof(*sg_descriptor), 5260 &sg_descriptor->length); 5261 put_unaligned_le32(CISS_SG_CHAIN, &sg_descriptor->flags); 5262 *chained = true; 5263 num_sg_in_iu++; 5264 sg_descriptor = io_request->sg_chain_buffer; 5265 } 5266 sg = sg_next(sg); 5267 } 5268 5269 put_unaligned_le32(CISS_SG_LAST, &sg_descriptor->flags); 5270 5271 return num_sg_in_iu; 5272 } 5273 5274 static int pqi_build_raid_sg_list(struct pqi_ctrl_info *ctrl_info, 5275 struct pqi_raid_path_request *request, struct scsi_cmnd *scmd, 5276 struct pqi_io_request *io_request) 5277 { 5278 u16 iu_length; 5279 int sg_count; 5280 bool chained; 5281 unsigned int num_sg_in_iu; 5282 struct scatterlist *sg; 5283 struct pqi_sg_descriptor *sg_descriptor; 5284 5285 sg_count = scsi_dma_map(scmd); 5286 if (sg_count < 0) 5287 return sg_count; 5288 5289 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 5290 PQI_REQUEST_HEADER_LENGTH; 5291 5292 if (sg_count == 0) 5293 goto out; 5294 5295 sg = scsi_sglist(scmd); 5296 sg_descriptor = request->sg_descriptors; 5297 5298 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5299 ctrl_info->max_sg_per_iu, &chained); 5300 5301 request->partial = chained; 5302 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5303 5304 out: 5305 put_unaligned_le16(iu_length, &request->header.iu_length); 5306 5307 return 0; 5308 } 5309 5310 static int pqi_build_aio_r1_sg_list(struct pqi_ctrl_info *ctrl_info, 5311 struct pqi_aio_r1_path_request *request, struct scsi_cmnd *scmd, 5312 struct pqi_io_request *io_request) 5313 { 5314 u16 iu_length; 5315 int sg_count; 5316 bool chained; 5317 unsigned int num_sg_in_iu; 5318 struct scatterlist *sg; 5319 struct pqi_sg_descriptor *sg_descriptor; 5320 5321 sg_count = scsi_dma_map(scmd); 5322 if (sg_count < 0) 5323 return sg_count; 5324 5325 iu_length = offsetof(struct pqi_aio_r1_path_request, sg_descriptors) - 5326 PQI_REQUEST_HEADER_LENGTH; 5327 num_sg_in_iu = 0; 5328 5329 if (sg_count == 0) 5330 goto out; 5331 5332 sg = scsi_sglist(scmd); 5333 sg_descriptor = request->sg_descriptors; 5334 5335 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5336 ctrl_info->max_sg_per_iu, &chained); 5337 5338 request->partial = chained; 5339 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5340 5341 out: 5342 put_unaligned_le16(iu_length, &request->header.iu_length); 5343 request->num_sg_descriptors = num_sg_in_iu; 5344 5345 return 0; 5346 } 5347 5348 static int pqi_build_aio_r56_sg_list(struct pqi_ctrl_info *ctrl_info, 5349 struct pqi_aio_r56_path_request *request, struct scsi_cmnd *scmd, 5350 struct pqi_io_request *io_request) 5351 { 5352 u16 iu_length; 5353 int sg_count; 5354 bool chained; 5355 unsigned int num_sg_in_iu; 5356 struct scatterlist *sg; 5357 struct pqi_sg_descriptor *sg_descriptor; 5358 5359 sg_count = scsi_dma_map(scmd); 5360 if (sg_count < 0) 5361 return sg_count; 5362 5363 iu_length = offsetof(struct pqi_aio_r56_path_request, sg_descriptors) - 5364 PQI_REQUEST_HEADER_LENGTH; 5365 num_sg_in_iu = 0; 5366 5367 if (sg_count != 0) { 5368 sg = scsi_sglist(scmd); 5369 sg_descriptor = request->sg_descriptors; 5370 5371 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5372 ctrl_info->max_sg_per_r56_iu, &chained); 5373 5374 request->partial = chained; 5375 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5376 } 5377 5378 put_unaligned_le16(iu_length, &request->header.iu_length); 5379 request->num_sg_descriptors = num_sg_in_iu; 5380 5381 return 0; 5382 } 5383 5384 static int pqi_build_aio_sg_list(struct pqi_ctrl_info *ctrl_info, 5385 struct pqi_aio_path_request *request, struct scsi_cmnd *scmd, 5386 struct pqi_io_request *io_request) 5387 { 5388 u16 iu_length; 5389 int sg_count; 5390 bool chained; 5391 unsigned int num_sg_in_iu; 5392 struct scatterlist *sg; 5393 struct pqi_sg_descriptor *sg_descriptor; 5394 5395 sg_count = scsi_dma_map(scmd); 5396 if (sg_count < 0) 5397 return sg_count; 5398 5399 iu_length = offsetof(struct pqi_aio_path_request, sg_descriptors) - 5400 PQI_REQUEST_HEADER_LENGTH; 5401 num_sg_in_iu = 0; 5402 5403 if (sg_count == 0) 5404 goto out; 5405 5406 sg = scsi_sglist(scmd); 5407 sg_descriptor = request->sg_descriptors; 5408 5409 num_sg_in_iu = pqi_build_sg_list(sg_descriptor, sg, sg_count, io_request, 5410 ctrl_info->max_sg_per_iu, &chained); 5411 5412 request->partial = chained; 5413 iu_length += num_sg_in_iu * sizeof(*sg_descriptor); 5414 5415 out: 5416 put_unaligned_le16(iu_length, &request->header.iu_length); 5417 request->num_sg_descriptors = num_sg_in_iu; 5418 5419 return 0; 5420 } 5421 5422 static void pqi_raid_io_complete(struct pqi_io_request *io_request, 5423 void *context) 5424 { 5425 struct scsi_cmnd *scmd; 5426 5427 scmd = io_request->scmd; 5428 pqi_free_io_request(io_request); 5429 scsi_dma_unmap(scmd); 5430 pqi_scsi_done(scmd); 5431 } 5432 5433 static int pqi_raid_submit_scsi_cmd_with_io_request( 5434 struct pqi_ctrl_info *ctrl_info, struct pqi_io_request *io_request, 5435 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5436 struct pqi_queue_group *queue_group) 5437 { 5438 int rc; 5439 size_t cdb_length; 5440 struct pqi_raid_path_request *request; 5441 5442 io_request->io_complete_callback = pqi_raid_io_complete; 5443 io_request->scmd = scmd; 5444 5445 request = io_request->iu; 5446 memset(request, 0, offsetof(struct pqi_raid_path_request, sg_descriptors)); 5447 5448 request->header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 5449 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 5450 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5451 put_unaligned_le16(io_request->index, &request->request_id); 5452 request->error_index = request->request_id; 5453 memcpy(request->lun_number, device->scsi3addr, sizeof(request->lun_number)); 5454 5455 cdb_length = min_t(size_t, scmd->cmd_len, sizeof(request->cdb)); 5456 memcpy(request->cdb, scmd->cmnd, cdb_length); 5457 5458 switch (cdb_length) { 5459 case 6: 5460 case 10: 5461 case 12: 5462 case 16: 5463 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 5464 break; 5465 case 20: 5466 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_4; 5467 break; 5468 case 24: 5469 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_8; 5470 break; 5471 case 28: 5472 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_12; 5473 break; 5474 case 32: 5475 default: 5476 request->additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_16; 5477 break; 5478 } 5479 5480 switch (scmd->sc_data_direction) { 5481 case DMA_TO_DEVICE: 5482 request->data_direction = SOP_READ_FLAG; 5483 break; 5484 case DMA_FROM_DEVICE: 5485 request->data_direction = SOP_WRITE_FLAG; 5486 break; 5487 case DMA_NONE: 5488 request->data_direction = SOP_NO_DIRECTION_FLAG; 5489 break; 5490 case DMA_BIDIRECTIONAL: 5491 request->data_direction = SOP_BIDIRECTIONAL; 5492 break; 5493 default: 5494 dev_err(&ctrl_info->pci_dev->dev, 5495 "unknown data direction: %d\n", 5496 scmd->sc_data_direction); 5497 break; 5498 } 5499 5500 rc = pqi_build_raid_sg_list(ctrl_info, request, scmd, io_request); 5501 if (rc) { 5502 pqi_free_io_request(io_request); 5503 return SCSI_MLQUEUE_HOST_BUSY; 5504 } 5505 5506 pqi_start_io(ctrl_info, queue_group, RAID_PATH, io_request); 5507 5508 return 0; 5509 } 5510 5511 static inline int pqi_raid_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5512 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5513 struct pqi_queue_group *queue_group) 5514 { 5515 struct pqi_io_request *io_request; 5516 5517 io_request = pqi_alloc_io_request(ctrl_info); 5518 5519 return pqi_raid_submit_scsi_cmd_with_io_request(ctrl_info, io_request, 5520 device, scmd, queue_group); 5521 } 5522 5523 static bool pqi_raid_bypass_retry_needed(struct pqi_io_request *io_request) 5524 { 5525 struct scsi_cmnd *scmd; 5526 struct pqi_scsi_dev *device; 5527 struct pqi_ctrl_info *ctrl_info; 5528 5529 if (!io_request->raid_bypass) 5530 return false; 5531 5532 scmd = io_request->scmd; 5533 if ((scmd->result & 0xff) == SAM_STAT_GOOD) 5534 return false; 5535 if (host_byte(scmd->result) == DID_NO_CONNECT) 5536 return false; 5537 5538 device = scmd->device->hostdata; 5539 if (pqi_device_offline(device) || pqi_device_in_remove(device)) 5540 return false; 5541 5542 ctrl_info = shost_to_hba(scmd->device->host); 5543 if (pqi_ctrl_offline(ctrl_info)) 5544 return false; 5545 5546 return true; 5547 } 5548 5549 static void pqi_aio_io_complete(struct pqi_io_request *io_request, 5550 void *context) 5551 { 5552 struct scsi_cmnd *scmd; 5553 5554 scmd = io_request->scmd; 5555 scsi_dma_unmap(scmd); 5556 if (io_request->status == -EAGAIN || pqi_raid_bypass_retry_needed(io_request)) { 5557 set_host_byte(scmd, DID_IMM_RETRY); 5558 scmd->SCp.this_residual++; 5559 } 5560 5561 pqi_free_io_request(io_request); 5562 pqi_scsi_done(scmd); 5563 } 5564 5565 static inline int pqi_aio_submit_scsi_cmd(struct pqi_ctrl_info *ctrl_info, 5566 struct pqi_scsi_dev *device, struct scsi_cmnd *scmd, 5567 struct pqi_queue_group *queue_group) 5568 { 5569 return pqi_aio_submit_io(ctrl_info, scmd, device->aio_handle, 5570 scmd->cmnd, scmd->cmd_len, queue_group, NULL, false); 5571 } 5572 5573 static int pqi_aio_submit_io(struct pqi_ctrl_info *ctrl_info, 5574 struct scsi_cmnd *scmd, u32 aio_handle, u8 *cdb, 5575 unsigned int cdb_length, struct pqi_queue_group *queue_group, 5576 struct pqi_encryption_info *encryption_info, bool raid_bypass) 5577 { 5578 int rc; 5579 struct pqi_io_request *io_request; 5580 struct pqi_aio_path_request *request; 5581 5582 io_request = pqi_alloc_io_request(ctrl_info); 5583 io_request->io_complete_callback = pqi_aio_io_complete; 5584 io_request->scmd = scmd; 5585 io_request->raid_bypass = raid_bypass; 5586 5587 request = io_request->iu; 5588 memset(request, 0, offsetof(struct pqi_raid_path_request, sg_descriptors)); 5589 5590 request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_IO; 5591 put_unaligned_le32(aio_handle, &request->nexus_id); 5592 put_unaligned_le32(scsi_bufflen(scmd), &request->buffer_length); 5593 request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5594 put_unaligned_le16(io_request->index, &request->request_id); 5595 request->error_index = request->request_id; 5596 if (cdb_length > sizeof(request->cdb)) 5597 cdb_length = sizeof(request->cdb); 5598 request->cdb_length = cdb_length; 5599 memcpy(request->cdb, cdb, cdb_length); 5600 5601 switch (scmd->sc_data_direction) { 5602 case DMA_TO_DEVICE: 5603 request->data_direction = SOP_READ_FLAG; 5604 break; 5605 case DMA_FROM_DEVICE: 5606 request->data_direction = SOP_WRITE_FLAG; 5607 break; 5608 case DMA_NONE: 5609 request->data_direction = SOP_NO_DIRECTION_FLAG; 5610 break; 5611 case DMA_BIDIRECTIONAL: 5612 request->data_direction = SOP_BIDIRECTIONAL; 5613 break; 5614 default: 5615 dev_err(&ctrl_info->pci_dev->dev, 5616 "unknown data direction: %d\n", 5617 scmd->sc_data_direction); 5618 break; 5619 } 5620 5621 if (encryption_info) { 5622 request->encryption_enable = true; 5623 put_unaligned_le16(encryption_info->data_encryption_key_index, 5624 &request->data_encryption_key_index); 5625 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5626 &request->encrypt_tweak_lower); 5627 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5628 &request->encrypt_tweak_upper); 5629 } 5630 5631 rc = pqi_build_aio_sg_list(ctrl_info, request, scmd, io_request); 5632 if (rc) { 5633 pqi_free_io_request(io_request); 5634 return SCSI_MLQUEUE_HOST_BUSY; 5635 } 5636 5637 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5638 5639 return 0; 5640 } 5641 5642 static int pqi_aio_submit_r1_write_io(struct pqi_ctrl_info *ctrl_info, 5643 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 5644 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 5645 struct pqi_scsi_dev_raid_map_data *rmd) 5646 { 5647 int rc; 5648 struct pqi_io_request *io_request; 5649 struct pqi_aio_r1_path_request *r1_request; 5650 5651 io_request = pqi_alloc_io_request(ctrl_info); 5652 io_request->io_complete_callback = pqi_aio_io_complete; 5653 io_request->scmd = scmd; 5654 io_request->raid_bypass = true; 5655 5656 r1_request = io_request->iu; 5657 memset(r1_request, 0, offsetof(struct pqi_aio_r1_path_request, sg_descriptors)); 5658 5659 r1_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID1_IO; 5660 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r1_request->volume_id); 5661 r1_request->num_drives = rmd->num_it_nexus_entries; 5662 put_unaligned_le32(rmd->it_nexus[0], &r1_request->it_nexus_1); 5663 put_unaligned_le32(rmd->it_nexus[1], &r1_request->it_nexus_2); 5664 if (rmd->num_it_nexus_entries == 3) 5665 put_unaligned_le32(rmd->it_nexus[2], &r1_request->it_nexus_3); 5666 5667 put_unaligned_le32(scsi_bufflen(scmd), &r1_request->data_length); 5668 r1_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5669 put_unaligned_le16(io_request->index, &r1_request->request_id); 5670 r1_request->error_index = r1_request->request_id; 5671 if (rmd->cdb_length > sizeof(r1_request->cdb)) 5672 rmd->cdb_length = sizeof(r1_request->cdb); 5673 r1_request->cdb_length = rmd->cdb_length; 5674 memcpy(r1_request->cdb, rmd->cdb, rmd->cdb_length); 5675 5676 /* The direction is always write. */ 5677 r1_request->data_direction = SOP_READ_FLAG; 5678 5679 if (encryption_info) { 5680 r1_request->encryption_enable = true; 5681 put_unaligned_le16(encryption_info->data_encryption_key_index, 5682 &r1_request->data_encryption_key_index); 5683 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5684 &r1_request->encrypt_tweak_lower); 5685 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5686 &r1_request->encrypt_tweak_upper); 5687 } 5688 5689 rc = pqi_build_aio_r1_sg_list(ctrl_info, r1_request, scmd, io_request); 5690 if (rc) { 5691 pqi_free_io_request(io_request); 5692 return SCSI_MLQUEUE_HOST_BUSY; 5693 } 5694 5695 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5696 5697 return 0; 5698 } 5699 5700 static int pqi_aio_submit_r56_write_io(struct pqi_ctrl_info *ctrl_info, 5701 struct scsi_cmnd *scmd, struct pqi_queue_group *queue_group, 5702 struct pqi_encryption_info *encryption_info, struct pqi_scsi_dev *device, 5703 struct pqi_scsi_dev_raid_map_data *rmd) 5704 { 5705 int rc; 5706 struct pqi_io_request *io_request; 5707 struct pqi_aio_r56_path_request *r56_request; 5708 5709 io_request = pqi_alloc_io_request(ctrl_info); 5710 io_request->io_complete_callback = pqi_aio_io_complete; 5711 io_request->scmd = scmd; 5712 io_request->raid_bypass = true; 5713 5714 r56_request = io_request->iu; 5715 memset(r56_request, 0, offsetof(struct pqi_aio_r56_path_request, sg_descriptors)); 5716 5717 if (device->raid_level == SA_RAID_5 || device->raid_level == SA_RAID_51) 5718 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID5_IO; 5719 else 5720 r56_request->header.iu_type = PQI_REQUEST_IU_AIO_PATH_RAID6_IO; 5721 5722 put_unaligned_le16(*(u16 *)device->scsi3addr & 0x3fff, &r56_request->volume_id); 5723 put_unaligned_le32(rmd->aio_handle, &r56_request->data_it_nexus); 5724 put_unaligned_le32(rmd->p_parity_it_nexus, &r56_request->p_parity_it_nexus); 5725 if (rmd->raid_level == SA_RAID_6) { 5726 put_unaligned_le32(rmd->q_parity_it_nexus, &r56_request->q_parity_it_nexus); 5727 r56_request->xor_multiplier = rmd->xor_mult; 5728 } 5729 put_unaligned_le32(scsi_bufflen(scmd), &r56_request->data_length); 5730 r56_request->task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 5731 put_unaligned_le64(rmd->row, &r56_request->row); 5732 5733 put_unaligned_le16(io_request->index, &r56_request->request_id); 5734 r56_request->error_index = r56_request->request_id; 5735 5736 if (rmd->cdb_length > sizeof(r56_request->cdb)) 5737 rmd->cdb_length = sizeof(r56_request->cdb); 5738 r56_request->cdb_length = rmd->cdb_length; 5739 memcpy(r56_request->cdb, rmd->cdb, rmd->cdb_length); 5740 5741 /* The direction is always write. */ 5742 r56_request->data_direction = SOP_READ_FLAG; 5743 5744 if (encryption_info) { 5745 r56_request->encryption_enable = true; 5746 put_unaligned_le16(encryption_info->data_encryption_key_index, 5747 &r56_request->data_encryption_key_index); 5748 put_unaligned_le32(encryption_info->encrypt_tweak_lower, 5749 &r56_request->encrypt_tweak_lower); 5750 put_unaligned_le32(encryption_info->encrypt_tweak_upper, 5751 &r56_request->encrypt_tweak_upper); 5752 } 5753 5754 rc = pqi_build_aio_r56_sg_list(ctrl_info, r56_request, scmd, io_request); 5755 if (rc) { 5756 pqi_free_io_request(io_request); 5757 return SCSI_MLQUEUE_HOST_BUSY; 5758 } 5759 5760 pqi_start_io(ctrl_info, queue_group, AIO_PATH, io_request); 5761 5762 return 0; 5763 } 5764 5765 static inline u16 pqi_get_hw_queue(struct pqi_ctrl_info *ctrl_info, 5766 struct scsi_cmnd *scmd) 5767 { 5768 u16 hw_queue; 5769 5770 hw_queue = blk_mq_unique_tag_to_hwq(blk_mq_unique_tag(scsi_cmd_to_rq(scmd))); 5771 if (hw_queue > ctrl_info->max_hw_queue_index) 5772 hw_queue = 0; 5773 5774 return hw_queue; 5775 } 5776 5777 static inline bool pqi_is_bypass_eligible_request(struct scsi_cmnd *scmd) 5778 { 5779 if (blk_rq_is_passthrough(scsi_cmd_to_rq(scmd))) 5780 return false; 5781 5782 return scmd->SCp.this_residual == 0; 5783 } 5784 5785 /* 5786 * This function gets called just before we hand the completed SCSI request 5787 * back to the SML. 5788 */ 5789 5790 void pqi_prep_for_scsi_done(struct scsi_cmnd *scmd) 5791 { 5792 struct pqi_scsi_dev *device; 5793 5794 if (!scmd->device) { 5795 set_host_byte(scmd, DID_NO_CONNECT); 5796 return; 5797 } 5798 5799 device = scmd->device->hostdata; 5800 if (!device) { 5801 set_host_byte(scmd, DID_NO_CONNECT); 5802 return; 5803 } 5804 5805 atomic_dec(&device->scsi_cmds_outstanding); 5806 } 5807 5808 static bool pqi_is_parity_write_stream(struct pqi_ctrl_info *ctrl_info, 5809 struct scsi_cmnd *scmd) 5810 { 5811 u32 oldest_jiffies; 5812 u8 lru_index; 5813 int i; 5814 int rc; 5815 struct pqi_scsi_dev *device; 5816 struct pqi_stream_data *pqi_stream_data; 5817 struct pqi_scsi_dev_raid_map_data rmd; 5818 5819 if (!ctrl_info->enable_stream_detection) 5820 return false; 5821 5822 rc = pqi_get_aio_lba_and_block_count(scmd, &rmd); 5823 if (rc) 5824 return false; 5825 5826 /* Check writes only. */ 5827 if (!rmd.is_write) 5828 return false; 5829 5830 device = scmd->device->hostdata; 5831 5832 /* Check for RAID 5/6 streams. */ 5833 if (device->raid_level != SA_RAID_5 && device->raid_level != SA_RAID_6) 5834 return false; 5835 5836 /* 5837 * If controller does not support AIO RAID{5,6} writes, need to send 5838 * requests down non-AIO path. 5839 */ 5840 if ((device->raid_level == SA_RAID_5 && !ctrl_info->enable_r5_writes) || 5841 (device->raid_level == SA_RAID_6 && !ctrl_info->enable_r6_writes)) 5842 return true; 5843 5844 lru_index = 0; 5845 oldest_jiffies = INT_MAX; 5846 for (i = 0; i < NUM_STREAMS_PER_LUN; i++) { 5847 pqi_stream_data = &device->stream_data[i]; 5848 /* 5849 * Check for adjacent request or request is within 5850 * the previous request. 5851 */ 5852 if ((pqi_stream_data->next_lba && 5853 rmd.first_block >= pqi_stream_data->next_lba) && 5854 rmd.first_block <= pqi_stream_data->next_lba + 5855 rmd.block_cnt) { 5856 pqi_stream_data->next_lba = rmd.first_block + 5857 rmd.block_cnt; 5858 pqi_stream_data->last_accessed = jiffies; 5859 return true; 5860 } 5861 5862 /* unused entry */ 5863 if (pqi_stream_data->last_accessed == 0) { 5864 lru_index = i; 5865 break; 5866 } 5867 5868 /* Find entry with oldest last accessed time. */ 5869 if (pqi_stream_data->last_accessed <= oldest_jiffies) { 5870 oldest_jiffies = pqi_stream_data->last_accessed; 5871 lru_index = i; 5872 } 5873 } 5874 5875 /* Set LRU entry. */ 5876 pqi_stream_data = &device->stream_data[lru_index]; 5877 pqi_stream_data->last_accessed = jiffies; 5878 pqi_stream_data->next_lba = rmd.first_block + rmd.block_cnt; 5879 5880 return false; 5881 } 5882 5883 static int pqi_scsi_queue_command(struct Scsi_Host *shost, struct scsi_cmnd *scmd) 5884 { 5885 int rc; 5886 struct pqi_ctrl_info *ctrl_info; 5887 struct pqi_scsi_dev *device; 5888 u16 hw_queue; 5889 struct pqi_queue_group *queue_group; 5890 bool raid_bypassed; 5891 5892 device = scmd->device->hostdata; 5893 5894 if (!device) { 5895 set_host_byte(scmd, DID_NO_CONNECT); 5896 pqi_scsi_done(scmd); 5897 return 0; 5898 } 5899 5900 atomic_inc(&device->scsi_cmds_outstanding); 5901 5902 ctrl_info = shost_to_hba(shost); 5903 5904 if (pqi_ctrl_offline(ctrl_info) || pqi_device_in_remove(device)) { 5905 set_host_byte(scmd, DID_NO_CONNECT); 5906 pqi_scsi_done(scmd); 5907 return 0; 5908 } 5909 5910 if (pqi_ctrl_blocked(ctrl_info)) { 5911 rc = SCSI_MLQUEUE_HOST_BUSY; 5912 goto out; 5913 } 5914 5915 /* 5916 * This is necessary because the SML doesn't zero out this field during 5917 * error recovery. 5918 */ 5919 scmd->result = 0; 5920 5921 hw_queue = pqi_get_hw_queue(ctrl_info, scmd); 5922 queue_group = &ctrl_info->queue_groups[hw_queue]; 5923 5924 if (pqi_is_logical_device(device)) { 5925 raid_bypassed = false; 5926 if (device->raid_bypass_enabled && 5927 pqi_is_bypass_eligible_request(scmd) && 5928 !pqi_is_parity_write_stream(ctrl_info, scmd)) { 5929 rc = pqi_raid_bypass_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 5930 if (rc == 0 || rc == SCSI_MLQUEUE_HOST_BUSY) { 5931 raid_bypassed = true; 5932 atomic_inc(&device->raid_bypass_cnt); 5933 } 5934 } 5935 if (!raid_bypassed) 5936 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 5937 } else { 5938 if (device->aio_enabled) 5939 rc = pqi_aio_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 5940 else 5941 rc = pqi_raid_submit_scsi_cmd(ctrl_info, device, scmd, queue_group); 5942 } 5943 5944 out: 5945 if (rc) 5946 atomic_dec(&device->scsi_cmds_outstanding); 5947 5948 return rc; 5949 } 5950 5951 static unsigned int pqi_queued_io_count(struct pqi_ctrl_info *ctrl_info) 5952 { 5953 unsigned int i; 5954 unsigned int path; 5955 unsigned long flags; 5956 unsigned int queued_io_count; 5957 struct pqi_queue_group *queue_group; 5958 struct pqi_io_request *io_request; 5959 5960 queued_io_count = 0; 5961 5962 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5963 queue_group = &ctrl_info->queue_groups[i]; 5964 for (path = 0; path < 2; path++) { 5965 spin_lock_irqsave(&queue_group->submit_lock[path], flags); 5966 list_for_each_entry(io_request, &queue_group->request_list[path], request_list_entry) 5967 queued_io_count++; 5968 spin_unlock_irqrestore(&queue_group->submit_lock[path], flags); 5969 } 5970 } 5971 5972 return queued_io_count; 5973 } 5974 5975 static unsigned int pqi_nonempty_inbound_queue_count(struct pqi_ctrl_info *ctrl_info) 5976 { 5977 unsigned int i; 5978 unsigned int path; 5979 unsigned int nonempty_inbound_queue_count; 5980 struct pqi_queue_group *queue_group; 5981 pqi_index_t iq_pi; 5982 pqi_index_t iq_ci; 5983 5984 nonempty_inbound_queue_count = 0; 5985 5986 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 5987 queue_group = &ctrl_info->queue_groups[i]; 5988 for (path = 0; path < 2; path++) { 5989 iq_pi = queue_group->iq_pi_copy[path]; 5990 iq_ci = readl(queue_group->iq_ci[path]); 5991 if (iq_ci != iq_pi) 5992 nonempty_inbound_queue_count++; 5993 } 5994 } 5995 5996 return nonempty_inbound_queue_count; 5997 } 5998 5999 #define PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS 10 6000 6001 static int pqi_wait_until_inbound_queues_empty(struct pqi_ctrl_info *ctrl_info) 6002 { 6003 unsigned long start_jiffies; 6004 unsigned long warning_timeout; 6005 unsigned int queued_io_count; 6006 unsigned int nonempty_inbound_queue_count; 6007 bool displayed_warning; 6008 6009 displayed_warning = false; 6010 start_jiffies = jiffies; 6011 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * PQI_HZ) + start_jiffies; 6012 6013 while (1) { 6014 queued_io_count = pqi_queued_io_count(ctrl_info); 6015 nonempty_inbound_queue_count = pqi_nonempty_inbound_queue_count(ctrl_info); 6016 if (queued_io_count == 0 && nonempty_inbound_queue_count == 0) 6017 break; 6018 pqi_check_ctrl_health(ctrl_info); 6019 if (pqi_ctrl_offline(ctrl_info)) 6020 return -ENXIO; 6021 if (time_after(jiffies, warning_timeout)) { 6022 dev_warn(&ctrl_info->pci_dev->dev, 6023 "waiting %u seconds for queued I/O to drain (queued I/O count: %u; non-empty inbound queue count: %u)\n", 6024 jiffies_to_msecs(jiffies - start_jiffies) / 1000, queued_io_count, nonempty_inbound_queue_count); 6025 displayed_warning = true; 6026 warning_timeout = (PQI_INBOUND_QUEUES_NONEMPTY_WARNING_TIMEOUT_SECS * PQI_HZ) + jiffies; 6027 } 6028 usleep_range(1000, 2000); 6029 } 6030 6031 if (displayed_warning) 6032 dev_warn(&ctrl_info->pci_dev->dev, 6033 "queued I/O drained after waiting for %u seconds\n", 6034 jiffies_to_msecs(jiffies - start_jiffies) / 1000); 6035 6036 return 0; 6037 } 6038 6039 static void pqi_fail_io_queued_for_device(struct pqi_ctrl_info *ctrl_info, 6040 struct pqi_scsi_dev *device) 6041 { 6042 unsigned int i; 6043 unsigned int path; 6044 struct pqi_queue_group *queue_group; 6045 unsigned long flags; 6046 struct pqi_io_request *io_request; 6047 struct pqi_io_request *next; 6048 struct scsi_cmnd *scmd; 6049 struct pqi_scsi_dev *scsi_device; 6050 6051 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 6052 queue_group = &ctrl_info->queue_groups[i]; 6053 6054 for (path = 0; path < 2; path++) { 6055 spin_lock_irqsave( 6056 &queue_group->submit_lock[path], flags); 6057 6058 list_for_each_entry_safe(io_request, next, 6059 &queue_group->request_list[path], 6060 request_list_entry) { 6061 6062 scmd = io_request->scmd; 6063 if (!scmd) 6064 continue; 6065 6066 scsi_device = scmd->device->hostdata; 6067 if (scsi_device != device) 6068 continue; 6069 6070 list_del(&io_request->request_list_entry); 6071 set_host_byte(scmd, DID_RESET); 6072 pqi_free_io_request(io_request); 6073 scsi_dma_unmap(scmd); 6074 pqi_scsi_done(scmd); 6075 } 6076 6077 spin_unlock_irqrestore( 6078 &queue_group->submit_lock[path], flags); 6079 } 6080 } 6081 } 6082 6083 #define PQI_PENDING_IO_WARNING_TIMEOUT_SECS 10 6084 6085 static int pqi_device_wait_for_pending_io(struct pqi_ctrl_info *ctrl_info, 6086 struct pqi_scsi_dev *device, unsigned long timeout_msecs) 6087 { 6088 int cmds_outstanding; 6089 unsigned long start_jiffies; 6090 unsigned long warning_timeout; 6091 unsigned long msecs_waiting; 6092 6093 start_jiffies = jiffies; 6094 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * PQI_HZ) + start_jiffies; 6095 6096 while ((cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding)) > 0) { 6097 pqi_check_ctrl_health(ctrl_info); 6098 if (pqi_ctrl_offline(ctrl_info)) 6099 return -ENXIO; 6100 msecs_waiting = jiffies_to_msecs(jiffies - start_jiffies); 6101 if (msecs_waiting >= timeout_msecs) { 6102 dev_err(&ctrl_info->pci_dev->dev, 6103 "scsi %d:%d:%d:%d: timed out after %lu seconds waiting for %d outstanding command(s)\n", 6104 ctrl_info->scsi_host->host_no, device->bus, device->target, 6105 device->lun, msecs_waiting / 1000, cmds_outstanding); 6106 return -ETIMEDOUT; 6107 } 6108 if (time_after(jiffies, warning_timeout)) { 6109 dev_warn(&ctrl_info->pci_dev->dev, 6110 "scsi %d:%d:%d:%d: waiting %lu seconds for %d outstanding command(s)\n", 6111 ctrl_info->scsi_host->host_no, device->bus, device->target, 6112 device->lun, msecs_waiting / 1000, cmds_outstanding); 6113 warning_timeout = (PQI_PENDING_IO_WARNING_TIMEOUT_SECS * PQI_HZ) + jiffies; 6114 } 6115 usleep_range(1000, 2000); 6116 } 6117 6118 return 0; 6119 } 6120 6121 static void pqi_lun_reset_complete(struct pqi_io_request *io_request, 6122 void *context) 6123 { 6124 struct completion *waiting = context; 6125 6126 complete(waiting); 6127 } 6128 6129 #define PQI_LUN_RESET_POLL_COMPLETION_SECS 10 6130 6131 static int pqi_wait_for_lun_reset_completion(struct pqi_ctrl_info *ctrl_info, 6132 struct pqi_scsi_dev *device, struct completion *wait) 6133 { 6134 int rc; 6135 unsigned int wait_secs; 6136 int cmds_outstanding; 6137 6138 wait_secs = 0; 6139 6140 while (1) { 6141 if (wait_for_completion_io_timeout(wait, 6142 PQI_LUN_RESET_POLL_COMPLETION_SECS * PQI_HZ)) { 6143 rc = 0; 6144 break; 6145 } 6146 6147 pqi_check_ctrl_health(ctrl_info); 6148 if (pqi_ctrl_offline(ctrl_info)) { 6149 rc = -ENXIO; 6150 break; 6151 } 6152 6153 wait_secs += PQI_LUN_RESET_POLL_COMPLETION_SECS; 6154 cmds_outstanding = atomic_read(&device->scsi_cmds_outstanding); 6155 dev_warn(&ctrl_info->pci_dev->dev, 6156 "scsi %d:%d:%d:%d: waiting %u seconds for LUN reset to complete (%d command(s) outstanding)\n", 6157 ctrl_info->scsi_host->host_no, device->bus, device->target, device->lun, wait_secs, cmds_outstanding); 6158 } 6159 6160 return rc; 6161 } 6162 6163 #define PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS 30 6164 6165 static int pqi_lun_reset(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device) 6166 { 6167 int rc; 6168 struct pqi_io_request *io_request; 6169 DECLARE_COMPLETION_ONSTACK(wait); 6170 struct pqi_task_management_request *request; 6171 6172 io_request = pqi_alloc_io_request(ctrl_info); 6173 io_request->io_complete_callback = pqi_lun_reset_complete; 6174 io_request->context = &wait; 6175 6176 request = io_request->iu; 6177 memset(request, 0, sizeof(*request)); 6178 6179 request->header.iu_type = PQI_REQUEST_IU_TASK_MANAGEMENT; 6180 put_unaligned_le16(sizeof(*request) - PQI_REQUEST_HEADER_LENGTH, 6181 &request->header.iu_length); 6182 put_unaligned_le16(io_request->index, &request->request_id); 6183 memcpy(request->lun_number, device->scsi3addr, 6184 sizeof(request->lun_number)); 6185 request->task_management_function = SOP_TASK_MANAGEMENT_LUN_RESET; 6186 if (ctrl_info->tmf_iu_timeout_supported) 6187 put_unaligned_le16(PQI_LUN_RESET_FIRMWARE_TIMEOUT_SECS, &request->timeout); 6188 6189 pqi_start_io(ctrl_info, &ctrl_info->queue_groups[PQI_DEFAULT_QUEUE_GROUP], RAID_PATH, 6190 io_request); 6191 6192 rc = pqi_wait_for_lun_reset_completion(ctrl_info, device, &wait); 6193 if (rc == 0) 6194 rc = io_request->status; 6195 6196 pqi_free_io_request(io_request); 6197 6198 return rc; 6199 } 6200 6201 #define PQI_LUN_RESET_RETRIES 3 6202 #define PQI_LUN_RESET_RETRY_INTERVAL_MSECS (10 * 1000) 6203 #define PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS (10 * 60 * 1000) 6204 #define PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS (2 * 60 * 1000) 6205 6206 static int pqi_lun_reset_with_retries(struct pqi_ctrl_info *ctrl_info, struct pqi_scsi_dev *device) 6207 { 6208 int reset_rc; 6209 int wait_rc; 6210 unsigned int retries; 6211 unsigned long timeout_msecs; 6212 6213 for (retries = 0;;) { 6214 reset_rc = pqi_lun_reset(ctrl_info, device); 6215 if (reset_rc == 0 || ++retries > PQI_LUN_RESET_RETRIES) 6216 break; 6217 msleep(PQI_LUN_RESET_RETRY_INTERVAL_MSECS); 6218 } 6219 6220 timeout_msecs = reset_rc ? PQI_LUN_RESET_FAILED_PENDING_IO_TIMEOUT_MSECS : 6221 PQI_LUN_RESET_PENDING_IO_TIMEOUT_MSECS; 6222 6223 wait_rc = pqi_device_wait_for_pending_io(ctrl_info, device, timeout_msecs); 6224 if (wait_rc && reset_rc == 0) 6225 reset_rc = wait_rc; 6226 6227 return reset_rc == 0 ? SUCCESS : FAILED; 6228 } 6229 6230 static int pqi_device_reset(struct pqi_ctrl_info *ctrl_info, 6231 struct pqi_scsi_dev *device) 6232 { 6233 int rc; 6234 6235 pqi_ctrl_block_requests(ctrl_info); 6236 pqi_ctrl_wait_until_quiesced(ctrl_info); 6237 pqi_fail_io_queued_for_device(ctrl_info, device); 6238 rc = pqi_wait_until_inbound_queues_empty(ctrl_info); 6239 if (rc) 6240 rc = FAILED; 6241 else 6242 rc = pqi_lun_reset_with_retries(ctrl_info, device); 6243 pqi_ctrl_unblock_requests(ctrl_info); 6244 6245 return rc; 6246 } 6247 6248 static int pqi_eh_device_reset_handler(struct scsi_cmnd *scmd) 6249 { 6250 int rc; 6251 struct Scsi_Host *shost; 6252 struct pqi_ctrl_info *ctrl_info; 6253 struct pqi_scsi_dev *device; 6254 6255 shost = scmd->device->host; 6256 ctrl_info = shost_to_hba(shost); 6257 device = scmd->device->hostdata; 6258 6259 mutex_lock(&ctrl_info->lun_reset_mutex); 6260 6261 dev_err(&ctrl_info->pci_dev->dev, 6262 "resetting scsi %d:%d:%d:%d due to cmd 0x%02x\n", 6263 shost->host_no, 6264 device->bus, device->target, device->lun, 6265 scmd->cmd_len > 0 ? scmd->cmnd[0] : 0xff); 6266 6267 pqi_check_ctrl_health(ctrl_info); 6268 if (pqi_ctrl_offline(ctrl_info)) 6269 rc = FAILED; 6270 else 6271 rc = pqi_device_reset(ctrl_info, device); 6272 6273 dev_err(&ctrl_info->pci_dev->dev, 6274 "reset of scsi %d:%d:%d:%d: %s\n", 6275 shost->host_no, device->bus, device->target, device->lun, 6276 rc == SUCCESS ? "SUCCESS" : "FAILED"); 6277 6278 mutex_unlock(&ctrl_info->lun_reset_mutex); 6279 6280 return rc; 6281 } 6282 6283 static int pqi_slave_alloc(struct scsi_device *sdev) 6284 { 6285 struct pqi_scsi_dev *device; 6286 unsigned long flags; 6287 struct pqi_ctrl_info *ctrl_info; 6288 struct scsi_target *starget; 6289 struct sas_rphy *rphy; 6290 6291 ctrl_info = shost_to_hba(sdev->host); 6292 6293 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6294 6295 if (sdev_channel(sdev) == PQI_PHYSICAL_DEVICE_BUS) { 6296 starget = scsi_target(sdev); 6297 rphy = target_to_rphy(starget); 6298 device = pqi_find_device_by_sas_rphy(ctrl_info, rphy); 6299 if (device) { 6300 if (device->target_lun_valid) { 6301 device->ignore_device = true; 6302 } else { 6303 device->target = sdev_id(sdev); 6304 device->lun = sdev->lun; 6305 device->target_lun_valid = true; 6306 } 6307 } 6308 } else { 6309 device = pqi_find_scsi_dev(ctrl_info, sdev_channel(sdev), 6310 sdev_id(sdev), sdev->lun); 6311 } 6312 6313 if (device) { 6314 sdev->hostdata = device; 6315 device->sdev = sdev; 6316 if (device->queue_depth) { 6317 device->advertised_queue_depth = device->queue_depth; 6318 scsi_change_queue_depth(sdev, 6319 device->advertised_queue_depth); 6320 } 6321 if (pqi_is_logical_device(device)) { 6322 pqi_disable_write_same(sdev); 6323 } else { 6324 sdev->allow_restart = 1; 6325 if (device->device_type == SA_DEVICE_TYPE_NVME) 6326 pqi_disable_write_same(sdev); 6327 } 6328 } 6329 6330 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6331 6332 return 0; 6333 } 6334 6335 static int pqi_map_queues(struct Scsi_Host *shost) 6336 { 6337 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6338 6339 return blk_mq_pci_map_queues(&shost->tag_set.map[HCTX_TYPE_DEFAULT], 6340 ctrl_info->pci_dev, 0); 6341 } 6342 6343 static inline bool pqi_is_tape_changer_device(struct pqi_scsi_dev *device) 6344 { 6345 return device->devtype == TYPE_TAPE || device->devtype == TYPE_MEDIUM_CHANGER; 6346 } 6347 6348 static int pqi_slave_configure(struct scsi_device *sdev) 6349 { 6350 int rc = 0; 6351 struct pqi_scsi_dev *device; 6352 6353 device = sdev->hostdata; 6354 device->devtype = sdev->type; 6355 6356 if (pqi_is_tape_changer_device(device) && device->ignore_device) { 6357 rc = -ENXIO; 6358 device->ignore_device = false; 6359 } 6360 6361 return rc; 6362 } 6363 6364 static int pqi_getpciinfo_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 6365 { 6366 struct pci_dev *pci_dev; 6367 u32 subsystem_vendor; 6368 u32 subsystem_device; 6369 cciss_pci_info_struct pciinfo; 6370 6371 if (!arg) 6372 return -EINVAL; 6373 6374 pci_dev = ctrl_info->pci_dev; 6375 6376 pciinfo.domain = pci_domain_nr(pci_dev->bus); 6377 pciinfo.bus = pci_dev->bus->number; 6378 pciinfo.dev_fn = pci_dev->devfn; 6379 subsystem_vendor = pci_dev->subsystem_vendor; 6380 subsystem_device = pci_dev->subsystem_device; 6381 pciinfo.board_id = ((subsystem_device << 16) & 0xffff0000) | subsystem_vendor; 6382 6383 if (copy_to_user(arg, &pciinfo, sizeof(pciinfo))) 6384 return -EFAULT; 6385 6386 return 0; 6387 } 6388 6389 static int pqi_getdrivver_ioctl(void __user *arg) 6390 { 6391 u32 version; 6392 6393 if (!arg) 6394 return -EINVAL; 6395 6396 version = (DRIVER_MAJOR << 28) | (DRIVER_MINOR << 24) | 6397 (DRIVER_RELEASE << 16) | DRIVER_REVISION; 6398 6399 if (copy_to_user(arg, &version, sizeof(version))) 6400 return -EFAULT; 6401 6402 return 0; 6403 } 6404 6405 struct ciss_error_info { 6406 u8 scsi_status; 6407 int command_status; 6408 size_t sense_data_length; 6409 }; 6410 6411 static void pqi_error_info_to_ciss(struct pqi_raid_error_info *pqi_error_info, 6412 struct ciss_error_info *ciss_error_info) 6413 { 6414 int ciss_cmd_status; 6415 size_t sense_data_length; 6416 6417 switch (pqi_error_info->data_out_result) { 6418 case PQI_DATA_IN_OUT_GOOD: 6419 ciss_cmd_status = CISS_CMD_STATUS_SUCCESS; 6420 break; 6421 case PQI_DATA_IN_OUT_UNDERFLOW: 6422 ciss_cmd_status = CISS_CMD_STATUS_DATA_UNDERRUN; 6423 break; 6424 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW: 6425 ciss_cmd_status = CISS_CMD_STATUS_DATA_OVERRUN; 6426 break; 6427 case PQI_DATA_IN_OUT_PROTOCOL_ERROR: 6428 case PQI_DATA_IN_OUT_BUFFER_ERROR: 6429 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_DESCRIPTOR_AREA: 6430 case PQI_DATA_IN_OUT_BUFFER_OVERFLOW_BRIDGE: 6431 case PQI_DATA_IN_OUT_ERROR: 6432 ciss_cmd_status = CISS_CMD_STATUS_PROTOCOL_ERROR; 6433 break; 6434 case PQI_DATA_IN_OUT_HARDWARE_ERROR: 6435 case PQI_DATA_IN_OUT_PCIE_FABRIC_ERROR: 6436 case PQI_DATA_IN_OUT_PCIE_COMPLETION_TIMEOUT: 6437 case PQI_DATA_IN_OUT_PCIE_COMPLETER_ABORT_RECEIVED: 6438 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST_RECEIVED: 6439 case PQI_DATA_IN_OUT_PCIE_ECRC_CHECK_FAILED: 6440 case PQI_DATA_IN_OUT_PCIE_UNSUPPORTED_REQUEST: 6441 case PQI_DATA_IN_OUT_PCIE_ACS_VIOLATION: 6442 case PQI_DATA_IN_OUT_PCIE_TLP_PREFIX_BLOCKED: 6443 case PQI_DATA_IN_OUT_PCIE_POISONED_MEMORY_READ: 6444 ciss_cmd_status = CISS_CMD_STATUS_HARDWARE_ERROR; 6445 break; 6446 case PQI_DATA_IN_OUT_UNSOLICITED_ABORT: 6447 ciss_cmd_status = CISS_CMD_STATUS_UNSOLICITED_ABORT; 6448 break; 6449 case PQI_DATA_IN_OUT_ABORTED: 6450 ciss_cmd_status = CISS_CMD_STATUS_ABORTED; 6451 break; 6452 case PQI_DATA_IN_OUT_TIMEOUT: 6453 ciss_cmd_status = CISS_CMD_STATUS_TIMEOUT; 6454 break; 6455 default: 6456 ciss_cmd_status = CISS_CMD_STATUS_TARGET_STATUS; 6457 break; 6458 } 6459 6460 sense_data_length = 6461 get_unaligned_le16(&pqi_error_info->sense_data_length); 6462 if (sense_data_length == 0) 6463 sense_data_length = 6464 get_unaligned_le16(&pqi_error_info->response_data_length); 6465 if (sense_data_length) 6466 if (sense_data_length > sizeof(pqi_error_info->data)) 6467 sense_data_length = sizeof(pqi_error_info->data); 6468 6469 ciss_error_info->scsi_status = pqi_error_info->status; 6470 ciss_error_info->command_status = ciss_cmd_status; 6471 ciss_error_info->sense_data_length = sense_data_length; 6472 } 6473 6474 static int pqi_passthru_ioctl(struct pqi_ctrl_info *ctrl_info, void __user *arg) 6475 { 6476 int rc; 6477 char *kernel_buffer = NULL; 6478 u16 iu_length; 6479 size_t sense_data_length; 6480 IOCTL_Command_struct iocommand; 6481 struct pqi_raid_path_request request; 6482 struct pqi_raid_error_info pqi_error_info; 6483 struct ciss_error_info ciss_error_info; 6484 6485 if (pqi_ctrl_offline(ctrl_info)) 6486 return -ENXIO; 6487 if (pqi_ofa_in_progress(ctrl_info) && pqi_ctrl_blocked(ctrl_info)) 6488 return -EBUSY; 6489 if (!arg) 6490 return -EINVAL; 6491 if (!capable(CAP_SYS_RAWIO)) 6492 return -EPERM; 6493 if (copy_from_user(&iocommand, arg, sizeof(iocommand))) 6494 return -EFAULT; 6495 if (iocommand.buf_size < 1 && 6496 iocommand.Request.Type.Direction != XFER_NONE) 6497 return -EINVAL; 6498 if (iocommand.Request.CDBLen > sizeof(request.cdb)) 6499 return -EINVAL; 6500 if (iocommand.Request.Type.Type != TYPE_CMD) 6501 return -EINVAL; 6502 6503 switch (iocommand.Request.Type.Direction) { 6504 case XFER_NONE: 6505 case XFER_WRITE: 6506 case XFER_READ: 6507 case XFER_READ | XFER_WRITE: 6508 break; 6509 default: 6510 return -EINVAL; 6511 } 6512 6513 if (iocommand.buf_size > 0) { 6514 kernel_buffer = kmalloc(iocommand.buf_size, GFP_KERNEL); 6515 if (!kernel_buffer) 6516 return -ENOMEM; 6517 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6518 if (copy_from_user(kernel_buffer, iocommand.buf, 6519 iocommand.buf_size)) { 6520 rc = -EFAULT; 6521 goto out; 6522 } 6523 } else { 6524 memset(kernel_buffer, 0, iocommand.buf_size); 6525 } 6526 } 6527 6528 memset(&request, 0, sizeof(request)); 6529 6530 request.header.iu_type = PQI_REQUEST_IU_RAID_PATH_IO; 6531 iu_length = offsetof(struct pqi_raid_path_request, sg_descriptors) - 6532 PQI_REQUEST_HEADER_LENGTH; 6533 memcpy(request.lun_number, iocommand.LUN_info.LunAddrBytes, 6534 sizeof(request.lun_number)); 6535 memcpy(request.cdb, iocommand.Request.CDB, iocommand.Request.CDBLen); 6536 request.additional_cdb_bytes_usage = SOP_ADDITIONAL_CDB_BYTES_0; 6537 6538 switch (iocommand.Request.Type.Direction) { 6539 case XFER_NONE: 6540 request.data_direction = SOP_NO_DIRECTION_FLAG; 6541 break; 6542 case XFER_WRITE: 6543 request.data_direction = SOP_WRITE_FLAG; 6544 break; 6545 case XFER_READ: 6546 request.data_direction = SOP_READ_FLAG; 6547 break; 6548 case XFER_READ | XFER_WRITE: 6549 request.data_direction = SOP_BIDIRECTIONAL; 6550 break; 6551 } 6552 6553 request.task_attribute = SOP_TASK_ATTRIBUTE_SIMPLE; 6554 6555 if (iocommand.buf_size > 0) { 6556 put_unaligned_le32(iocommand.buf_size, &request.buffer_length); 6557 6558 rc = pqi_map_single(ctrl_info->pci_dev, 6559 &request.sg_descriptors[0], kernel_buffer, 6560 iocommand.buf_size, DMA_BIDIRECTIONAL); 6561 if (rc) 6562 goto out; 6563 6564 iu_length += sizeof(request.sg_descriptors[0]); 6565 } 6566 6567 put_unaligned_le16(iu_length, &request.header.iu_length); 6568 6569 if (ctrl_info->raid_iu_timeout_supported) 6570 put_unaligned_le32(iocommand.Request.Timeout, &request.timeout); 6571 6572 rc = pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 6573 PQI_SYNC_FLAGS_INTERRUPTABLE, &pqi_error_info); 6574 6575 if (iocommand.buf_size > 0) 6576 pqi_pci_unmap(ctrl_info->pci_dev, request.sg_descriptors, 1, 6577 DMA_BIDIRECTIONAL); 6578 6579 memset(&iocommand.error_info, 0, sizeof(iocommand.error_info)); 6580 6581 if (rc == 0) { 6582 pqi_error_info_to_ciss(&pqi_error_info, &ciss_error_info); 6583 iocommand.error_info.ScsiStatus = ciss_error_info.scsi_status; 6584 iocommand.error_info.CommandStatus = 6585 ciss_error_info.command_status; 6586 sense_data_length = ciss_error_info.sense_data_length; 6587 if (sense_data_length) { 6588 if (sense_data_length > 6589 sizeof(iocommand.error_info.SenseInfo)) 6590 sense_data_length = 6591 sizeof(iocommand.error_info.SenseInfo); 6592 memcpy(iocommand.error_info.SenseInfo, 6593 pqi_error_info.data, sense_data_length); 6594 iocommand.error_info.SenseLen = sense_data_length; 6595 } 6596 } 6597 6598 if (copy_to_user(arg, &iocommand, sizeof(iocommand))) { 6599 rc = -EFAULT; 6600 goto out; 6601 } 6602 6603 if (rc == 0 && iocommand.buf_size > 0 && 6604 (iocommand.Request.Type.Direction & XFER_READ)) { 6605 if (copy_to_user(iocommand.buf, kernel_buffer, 6606 iocommand.buf_size)) { 6607 rc = -EFAULT; 6608 } 6609 } 6610 6611 out: 6612 kfree(kernel_buffer); 6613 6614 return rc; 6615 } 6616 6617 static int pqi_ioctl(struct scsi_device *sdev, unsigned int cmd, 6618 void __user *arg) 6619 { 6620 int rc; 6621 struct pqi_ctrl_info *ctrl_info; 6622 6623 ctrl_info = shost_to_hba(sdev->host); 6624 6625 switch (cmd) { 6626 case CCISS_DEREGDISK: 6627 case CCISS_REGNEWDISK: 6628 case CCISS_REGNEWD: 6629 rc = pqi_scan_scsi_devices(ctrl_info); 6630 break; 6631 case CCISS_GETPCIINFO: 6632 rc = pqi_getpciinfo_ioctl(ctrl_info, arg); 6633 break; 6634 case CCISS_GETDRIVVER: 6635 rc = pqi_getdrivver_ioctl(arg); 6636 break; 6637 case CCISS_PASSTHRU: 6638 rc = pqi_passthru_ioctl(ctrl_info, arg); 6639 break; 6640 default: 6641 rc = -EINVAL; 6642 break; 6643 } 6644 6645 return rc; 6646 } 6647 6648 static ssize_t pqi_firmware_version_show(struct device *dev, 6649 struct device_attribute *attr, char *buffer) 6650 { 6651 struct Scsi_Host *shost; 6652 struct pqi_ctrl_info *ctrl_info; 6653 6654 shost = class_to_shost(dev); 6655 ctrl_info = shost_to_hba(shost); 6656 6657 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->firmware_version); 6658 } 6659 6660 static ssize_t pqi_driver_version_show(struct device *dev, 6661 struct device_attribute *attr, char *buffer) 6662 { 6663 return scnprintf(buffer, PAGE_SIZE, "%s\n", DRIVER_VERSION BUILD_TIMESTAMP); 6664 } 6665 6666 static ssize_t pqi_serial_number_show(struct device *dev, 6667 struct device_attribute *attr, char *buffer) 6668 { 6669 struct Scsi_Host *shost; 6670 struct pqi_ctrl_info *ctrl_info; 6671 6672 shost = class_to_shost(dev); 6673 ctrl_info = shost_to_hba(shost); 6674 6675 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->serial_number); 6676 } 6677 6678 static ssize_t pqi_model_show(struct device *dev, 6679 struct device_attribute *attr, char *buffer) 6680 { 6681 struct Scsi_Host *shost; 6682 struct pqi_ctrl_info *ctrl_info; 6683 6684 shost = class_to_shost(dev); 6685 ctrl_info = shost_to_hba(shost); 6686 6687 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->model); 6688 } 6689 6690 static ssize_t pqi_vendor_show(struct device *dev, 6691 struct device_attribute *attr, char *buffer) 6692 { 6693 struct Scsi_Host *shost; 6694 struct pqi_ctrl_info *ctrl_info; 6695 6696 shost = class_to_shost(dev); 6697 ctrl_info = shost_to_hba(shost); 6698 6699 return scnprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->vendor); 6700 } 6701 6702 static ssize_t pqi_host_rescan_store(struct device *dev, 6703 struct device_attribute *attr, const char *buffer, size_t count) 6704 { 6705 struct Scsi_Host *shost = class_to_shost(dev); 6706 6707 pqi_scan_start(shost); 6708 6709 return count; 6710 } 6711 6712 static ssize_t pqi_lockup_action_show(struct device *dev, 6713 struct device_attribute *attr, char *buffer) 6714 { 6715 int count = 0; 6716 unsigned int i; 6717 6718 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 6719 if (pqi_lockup_actions[i].action == pqi_lockup_action) 6720 count += scnprintf(buffer + count, PAGE_SIZE - count, 6721 "[%s] ", pqi_lockup_actions[i].name); 6722 else 6723 count += scnprintf(buffer + count, PAGE_SIZE - count, 6724 "%s ", pqi_lockup_actions[i].name); 6725 } 6726 6727 count += scnprintf(buffer + count, PAGE_SIZE - count, "\n"); 6728 6729 return count; 6730 } 6731 6732 static ssize_t pqi_lockup_action_store(struct device *dev, 6733 struct device_attribute *attr, const char *buffer, size_t count) 6734 { 6735 unsigned int i; 6736 char *action_name; 6737 char action_name_buffer[32]; 6738 6739 strlcpy(action_name_buffer, buffer, sizeof(action_name_buffer)); 6740 action_name = strstrip(action_name_buffer); 6741 6742 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 6743 if (strcmp(action_name, pqi_lockup_actions[i].name) == 0) { 6744 pqi_lockup_action = pqi_lockup_actions[i].action; 6745 return count; 6746 } 6747 } 6748 6749 return -EINVAL; 6750 } 6751 6752 static ssize_t pqi_host_enable_stream_detection_show(struct device *dev, 6753 struct device_attribute *attr, char *buffer) 6754 { 6755 struct Scsi_Host *shost = class_to_shost(dev); 6756 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6757 6758 return scnprintf(buffer, 10, "%x\n", 6759 ctrl_info->enable_stream_detection); 6760 } 6761 6762 static ssize_t pqi_host_enable_stream_detection_store(struct device *dev, 6763 struct device_attribute *attr, const char *buffer, size_t count) 6764 { 6765 struct Scsi_Host *shost = class_to_shost(dev); 6766 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6767 u8 set_stream_detection = 0; 6768 6769 if (kstrtou8(buffer, 0, &set_stream_detection)) 6770 return -EINVAL; 6771 6772 if (set_stream_detection > 0) 6773 set_stream_detection = 1; 6774 6775 ctrl_info->enable_stream_detection = set_stream_detection; 6776 6777 return count; 6778 } 6779 6780 static ssize_t pqi_host_enable_r5_writes_show(struct device *dev, 6781 struct device_attribute *attr, char *buffer) 6782 { 6783 struct Scsi_Host *shost = class_to_shost(dev); 6784 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6785 6786 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r5_writes); 6787 } 6788 6789 static ssize_t pqi_host_enable_r5_writes_store(struct device *dev, 6790 struct device_attribute *attr, const char *buffer, size_t count) 6791 { 6792 struct Scsi_Host *shost = class_to_shost(dev); 6793 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6794 u8 set_r5_writes = 0; 6795 6796 if (kstrtou8(buffer, 0, &set_r5_writes)) 6797 return -EINVAL; 6798 6799 if (set_r5_writes > 0) 6800 set_r5_writes = 1; 6801 6802 ctrl_info->enable_r5_writes = set_r5_writes; 6803 6804 return count; 6805 } 6806 6807 static ssize_t pqi_host_enable_r6_writes_show(struct device *dev, 6808 struct device_attribute *attr, char *buffer) 6809 { 6810 struct Scsi_Host *shost = class_to_shost(dev); 6811 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6812 6813 return scnprintf(buffer, 10, "%x\n", ctrl_info->enable_r6_writes); 6814 } 6815 6816 static ssize_t pqi_host_enable_r6_writes_store(struct device *dev, 6817 struct device_attribute *attr, const char *buffer, size_t count) 6818 { 6819 struct Scsi_Host *shost = class_to_shost(dev); 6820 struct pqi_ctrl_info *ctrl_info = shost_to_hba(shost); 6821 u8 set_r6_writes = 0; 6822 6823 if (kstrtou8(buffer, 0, &set_r6_writes)) 6824 return -EINVAL; 6825 6826 if (set_r6_writes > 0) 6827 set_r6_writes = 1; 6828 6829 ctrl_info->enable_r6_writes = set_r6_writes; 6830 6831 return count; 6832 } 6833 6834 static DEVICE_ATTR(driver_version, 0444, pqi_driver_version_show, NULL); 6835 static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL); 6836 static DEVICE_ATTR(model, 0444, pqi_model_show, NULL); 6837 static DEVICE_ATTR(serial_number, 0444, pqi_serial_number_show, NULL); 6838 static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL); 6839 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store); 6840 static DEVICE_ATTR(lockup_action, 0644, pqi_lockup_action_show, 6841 pqi_lockup_action_store); 6842 static DEVICE_ATTR(enable_stream_detection, 0644, 6843 pqi_host_enable_stream_detection_show, 6844 pqi_host_enable_stream_detection_store); 6845 static DEVICE_ATTR(enable_r5_writes, 0644, 6846 pqi_host_enable_r5_writes_show, pqi_host_enable_r5_writes_store); 6847 static DEVICE_ATTR(enable_r6_writes, 0644, 6848 pqi_host_enable_r6_writes_show, pqi_host_enable_r6_writes_store); 6849 6850 static struct attribute *pqi_shost_attrs[] = { 6851 &dev_attr_driver_version.attr, 6852 &dev_attr_firmware_version.attr, 6853 &dev_attr_model.attr, 6854 &dev_attr_serial_number.attr, 6855 &dev_attr_vendor.attr, 6856 &dev_attr_rescan.attr, 6857 &dev_attr_lockup_action.attr, 6858 &dev_attr_enable_stream_detection.attr, 6859 &dev_attr_enable_r5_writes.attr, 6860 &dev_attr_enable_r6_writes.attr, 6861 NULL 6862 }; 6863 6864 ATTRIBUTE_GROUPS(pqi_shost); 6865 6866 static ssize_t pqi_unique_id_show(struct device *dev, 6867 struct device_attribute *attr, char *buffer) 6868 { 6869 struct pqi_ctrl_info *ctrl_info; 6870 struct scsi_device *sdev; 6871 struct pqi_scsi_dev *device; 6872 unsigned long flags; 6873 u8 unique_id[16]; 6874 6875 sdev = to_scsi_device(dev); 6876 ctrl_info = shost_to_hba(sdev->host); 6877 6878 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6879 6880 device = sdev->hostdata; 6881 if (!device) { 6882 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6883 return -ENODEV; 6884 } 6885 6886 if (device->is_physical_device) 6887 memcpy(unique_id, device->wwid, sizeof(device->wwid)); 6888 else 6889 memcpy(unique_id, device->volume_id, sizeof(device->volume_id)); 6890 6891 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6892 6893 return scnprintf(buffer, PAGE_SIZE, 6894 "%02X%02X%02X%02X%02X%02X%02X%02X" 6895 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 6896 unique_id[0], unique_id[1], unique_id[2], unique_id[3], 6897 unique_id[4], unique_id[5], unique_id[6], unique_id[7], 6898 unique_id[8], unique_id[9], unique_id[10], unique_id[11], 6899 unique_id[12], unique_id[13], unique_id[14], unique_id[15]); 6900 } 6901 6902 static ssize_t pqi_lunid_show(struct device *dev, 6903 struct device_attribute *attr, char *buffer) 6904 { 6905 struct pqi_ctrl_info *ctrl_info; 6906 struct scsi_device *sdev; 6907 struct pqi_scsi_dev *device; 6908 unsigned long flags; 6909 u8 lunid[8]; 6910 6911 sdev = to_scsi_device(dev); 6912 ctrl_info = shost_to_hba(sdev->host); 6913 6914 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6915 6916 device = sdev->hostdata; 6917 if (!device) { 6918 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6919 return -ENODEV; 6920 } 6921 6922 memcpy(lunid, device->scsi3addr, sizeof(lunid)); 6923 6924 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6925 6926 return scnprintf(buffer, PAGE_SIZE, "0x%8phN\n", lunid); 6927 } 6928 6929 #define MAX_PATHS 8 6930 6931 static ssize_t pqi_path_info_show(struct device *dev, 6932 struct device_attribute *attr, char *buf) 6933 { 6934 struct pqi_ctrl_info *ctrl_info; 6935 struct scsi_device *sdev; 6936 struct pqi_scsi_dev *device; 6937 unsigned long flags; 6938 int i; 6939 int output_len = 0; 6940 u8 box; 6941 u8 bay; 6942 u8 path_map_index; 6943 char *active; 6944 u8 phys_connector[2]; 6945 6946 sdev = to_scsi_device(dev); 6947 ctrl_info = shost_to_hba(sdev->host); 6948 6949 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 6950 6951 device = sdev->hostdata; 6952 if (!device) { 6953 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 6954 return -ENODEV; 6955 } 6956 6957 bay = device->bay; 6958 for (i = 0; i < MAX_PATHS; i++) { 6959 path_map_index = 1 << i; 6960 if (i == device->active_path_index) 6961 active = "Active"; 6962 else if (device->path_map & path_map_index) 6963 active = "Inactive"; 6964 else 6965 continue; 6966 6967 output_len += scnprintf(buf + output_len, 6968 PAGE_SIZE - output_len, 6969 "[%d:%d:%d:%d] %20.20s ", 6970 ctrl_info->scsi_host->host_no, 6971 device->bus, device->target, 6972 device->lun, 6973 scsi_device_type(device->devtype)); 6974 6975 if (device->devtype == TYPE_RAID || 6976 pqi_is_logical_device(device)) 6977 goto end_buffer; 6978 6979 memcpy(&phys_connector, &device->phys_connector[i], 6980 sizeof(phys_connector)); 6981 if (phys_connector[0] < '0') 6982 phys_connector[0] = '0'; 6983 if (phys_connector[1] < '0') 6984 phys_connector[1] = '0'; 6985 6986 output_len += scnprintf(buf + output_len, 6987 PAGE_SIZE - output_len, 6988 "PORT: %.2s ", phys_connector); 6989 6990 box = device->box[i]; 6991 if (box != 0 && box != 0xFF) 6992 output_len += scnprintf(buf + output_len, 6993 PAGE_SIZE - output_len, 6994 "BOX: %hhu ", box); 6995 6996 if ((device->devtype == TYPE_DISK || 6997 device->devtype == TYPE_ZBC) && 6998 pqi_expose_device(device)) 6999 output_len += scnprintf(buf + output_len, 7000 PAGE_SIZE - output_len, 7001 "BAY: %hhu ", bay); 7002 7003 end_buffer: 7004 output_len += scnprintf(buf + output_len, 7005 PAGE_SIZE - output_len, 7006 "%s\n", active); 7007 } 7008 7009 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7010 7011 return output_len; 7012 } 7013 7014 static ssize_t pqi_sas_address_show(struct device *dev, 7015 struct device_attribute *attr, char *buffer) 7016 { 7017 struct pqi_ctrl_info *ctrl_info; 7018 struct scsi_device *sdev; 7019 struct pqi_scsi_dev *device; 7020 unsigned long flags; 7021 u64 sas_address; 7022 7023 sdev = to_scsi_device(dev); 7024 ctrl_info = shost_to_hba(sdev->host); 7025 7026 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7027 7028 device = sdev->hostdata; 7029 if (!device || !pqi_is_device_with_sas_address(device)) { 7030 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7031 return -ENODEV; 7032 } 7033 7034 sas_address = device->sas_address; 7035 7036 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7037 7038 return scnprintf(buffer, PAGE_SIZE, "0x%016llx\n", sas_address); 7039 } 7040 7041 static ssize_t pqi_ssd_smart_path_enabled_show(struct device *dev, 7042 struct device_attribute *attr, char *buffer) 7043 { 7044 struct pqi_ctrl_info *ctrl_info; 7045 struct scsi_device *sdev; 7046 struct pqi_scsi_dev *device; 7047 unsigned long flags; 7048 7049 sdev = to_scsi_device(dev); 7050 ctrl_info = shost_to_hba(sdev->host); 7051 7052 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7053 7054 device = sdev->hostdata; 7055 if (!device) { 7056 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7057 return -ENODEV; 7058 } 7059 7060 buffer[0] = device->raid_bypass_enabled ? '1' : '0'; 7061 buffer[1] = '\n'; 7062 buffer[2] = '\0'; 7063 7064 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7065 7066 return 2; 7067 } 7068 7069 static ssize_t pqi_raid_level_show(struct device *dev, 7070 struct device_attribute *attr, char *buffer) 7071 { 7072 struct pqi_ctrl_info *ctrl_info; 7073 struct scsi_device *sdev; 7074 struct pqi_scsi_dev *device; 7075 unsigned long flags; 7076 char *raid_level; 7077 7078 sdev = to_scsi_device(dev); 7079 ctrl_info = shost_to_hba(sdev->host); 7080 7081 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7082 7083 device = sdev->hostdata; 7084 if (!device) { 7085 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7086 return -ENODEV; 7087 } 7088 7089 if (pqi_is_logical_device(device)) 7090 raid_level = pqi_raid_level_to_string(device->raid_level); 7091 else 7092 raid_level = "N/A"; 7093 7094 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7095 7096 return scnprintf(buffer, PAGE_SIZE, "%s\n", raid_level); 7097 } 7098 7099 static ssize_t pqi_raid_bypass_cnt_show(struct device *dev, 7100 struct device_attribute *attr, char *buffer) 7101 { 7102 struct pqi_ctrl_info *ctrl_info; 7103 struct scsi_device *sdev; 7104 struct pqi_scsi_dev *device; 7105 unsigned long flags; 7106 int raid_bypass_cnt; 7107 7108 sdev = to_scsi_device(dev); 7109 ctrl_info = shost_to_hba(sdev->host); 7110 7111 spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 7112 7113 device = sdev->hostdata; 7114 if (!device) { 7115 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7116 return -ENODEV; 7117 } 7118 7119 raid_bypass_cnt = atomic_read(&device->raid_bypass_cnt); 7120 7121 spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 7122 7123 return scnprintf(buffer, PAGE_SIZE, "0x%x\n", raid_bypass_cnt); 7124 } 7125 7126 static DEVICE_ATTR(lunid, 0444, pqi_lunid_show, NULL); 7127 static DEVICE_ATTR(unique_id, 0444, pqi_unique_id_show, NULL); 7128 static DEVICE_ATTR(path_info, 0444, pqi_path_info_show, NULL); 7129 static DEVICE_ATTR(sas_address, 0444, pqi_sas_address_show, NULL); 7130 static DEVICE_ATTR(ssd_smart_path_enabled, 0444, pqi_ssd_smart_path_enabled_show, NULL); 7131 static DEVICE_ATTR(raid_level, 0444, pqi_raid_level_show, NULL); 7132 static DEVICE_ATTR(raid_bypass_cnt, 0444, pqi_raid_bypass_cnt_show, NULL); 7133 7134 static struct attribute *pqi_sdev_attrs[] = { 7135 &dev_attr_lunid.attr, 7136 &dev_attr_unique_id.attr, 7137 &dev_attr_path_info.attr, 7138 &dev_attr_sas_address.attr, 7139 &dev_attr_ssd_smart_path_enabled.attr, 7140 &dev_attr_raid_level.attr, 7141 &dev_attr_raid_bypass_cnt.attr, 7142 NULL 7143 }; 7144 7145 ATTRIBUTE_GROUPS(pqi_sdev); 7146 7147 static struct scsi_host_template pqi_driver_template = { 7148 .module = THIS_MODULE, 7149 .name = DRIVER_NAME_SHORT, 7150 .proc_name = DRIVER_NAME_SHORT, 7151 .queuecommand = pqi_scsi_queue_command, 7152 .scan_start = pqi_scan_start, 7153 .scan_finished = pqi_scan_finished, 7154 .this_id = -1, 7155 .eh_device_reset_handler = pqi_eh_device_reset_handler, 7156 .ioctl = pqi_ioctl, 7157 .slave_alloc = pqi_slave_alloc, 7158 .slave_configure = pqi_slave_configure, 7159 .map_queues = pqi_map_queues, 7160 .sdev_groups = pqi_sdev_groups, 7161 .shost_groups = pqi_shost_groups, 7162 }; 7163 7164 static int pqi_register_scsi(struct pqi_ctrl_info *ctrl_info) 7165 { 7166 int rc; 7167 struct Scsi_Host *shost; 7168 7169 shost = scsi_host_alloc(&pqi_driver_template, sizeof(ctrl_info)); 7170 if (!shost) { 7171 dev_err(&ctrl_info->pci_dev->dev, "scsi_host_alloc failed\n"); 7172 return -ENOMEM; 7173 } 7174 7175 shost->io_port = 0; 7176 shost->n_io_port = 0; 7177 shost->this_id = -1; 7178 shost->max_channel = PQI_MAX_BUS; 7179 shost->max_cmd_len = MAX_COMMAND_SIZE; 7180 shost->max_lun = ~0; 7181 shost->max_id = ~0; 7182 shost->max_sectors = ctrl_info->max_sectors; 7183 shost->can_queue = ctrl_info->scsi_ml_can_queue; 7184 shost->cmd_per_lun = shost->can_queue; 7185 shost->sg_tablesize = ctrl_info->sg_tablesize; 7186 shost->transportt = pqi_sas_transport_template; 7187 shost->irq = pci_irq_vector(ctrl_info->pci_dev, 0); 7188 shost->unique_id = shost->irq; 7189 shost->nr_hw_queues = ctrl_info->num_queue_groups; 7190 shost->host_tagset = 1; 7191 shost->hostdata[0] = (unsigned long)ctrl_info; 7192 7193 rc = scsi_add_host(shost, &ctrl_info->pci_dev->dev); 7194 if (rc) { 7195 dev_err(&ctrl_info->pci_dev->dev, "scsi_add_host failed\n"); 7196 goto free_host; 7197 } 7198 7199 rc = pqi_add_sas_host(shost, ctrl_info); 7200 if (rc) { 7201 dev_err(&ctrl_info->pci_dev->dev, "add SAS host failed\n"); 7202 goto remove_host; 7203 } 7204 7205 ctrl_info->scsi_host = shost; 7206 7207 return 0; 7208 7209 remove_host: 7210 scsi_remove_host(shost); 7211 free_host: 7212 scsi_host_put(shost); 7213 7214 return rc; 7215 } 7216 7217 static void pqi_unregister_scsi(struct pqi_ctrl_info *ctrl_info) 7218 { 7219 struct Scsi_Host *shost; 7220 7221 pqi_delete_sas_host(ctrl_info); 7222 7223 shost = ctrl_info->scsi_host; 7224 if (!shost) 7225 return; 7226 7227 scsi_remove_host(shost); 7228 scsi_host_put(shost); 7229 } 7230 7231 static int pqi_wait_for_pqi_reset_completion(struct pqi_ctrl_info *ctrl_info) 7232 { 7233 int rc = 0; 7234 struct pqi_device_registers __iomem *pqi_registers; 7235 unsigned long timeout; 7236 unsigned int timeout_msecs; 7237 union pqi_reset_register reset_reg; 7238 7239 pqi_registers = ctrl_info->pqi_registers; 7240 timeout_msecs = readw(&pqi_registers->max_reset_timeout) * 100; 7241 timeout = msecs_to_jiffies(timeout_msecs) + jiffies; 7242 7243 while (1) { 7244 msleep(PQI_RESET_POLL_INTERVAL_MSECS); 7245 reset_reg.all_bits = readl(&pqi_registers->device_reset); 7246 if (reset_reg.bits.reset_action == PQI_RESET_ACTION_COMPLETED) 7247 break; 7248 pqi_check_ctrl_health(ctrl_info); 7249 if (pqi_ctrl_offline(ctrl_info)) { 7250 rc = -ENXIO; 7251 break; 7252 } 7253 if (time_after(jiffies, timeout)) { 7254 rc = -ETIMEDOUT; 7255 break; 7256 } 7257 } 7258 7259 return rc; 7260 } 7261 7262 static int pqi_reset(struct pqi_ctrl_info *ctrl_info) 7263 { 7264 int rc; 7265 union pqi_reset_register reset_reg; 7266 7267 if (ctrl_info->pqi_reset_quiesce_supported) { 7268 rc = sis_pqi_reset_quiesce(ctrl_info); 7269 if (rc) { 7270 dev_err(&ctrl_info->pci_dev->dev, 7271 "PQI reset failed during quiesce with error %d\n", rc); 7272 return rc; 7273 } 7274 } 7275 7276 reset_reg.all_bits = 0; 7277 reset_reg.bits.reset_type = PQI_RESET_TYPE_HARD_RESET; 7278 reset_reg.bits.reset_action = PQI_RESET_ACTION_RESET; 7279 7280 writel(reset_reg.all_bits, &ctrl_info->pqi_registers->device_reset); 7281 7282 rc = pqi_wait_for_pqi_reset_completion(ctrl_info); 7283 if (rc) 7284 dev_err(&ctrl_info->pci_dev->dev, 7285 "PQI reset failed with error %d\n", rc); 7286 7287 return rc; 7288 } 7289 7290 static int pqi_get_ctrl_serial_number(struct pqi_ctrl_info *ctrl_info) 7291 { 7292 int rc; 7293 struct bmic_sense_subsystem_info *sense_info; 7294 7295 sense_info = kzalloc(sizeof(*sense_info), GFP_KERNEL); 7296 if (!sense_info) 7297 return -ENOMEM; 7298 7299 rc = pqi_sense_subsystem_info(ctrl_info, sense_info); 7300 if (rc) 7301 goto out; 7302 7303 memcpy(ctrl_info->serial_number, sense_info->ctrl_serial_number, 7304 sizeof(sense_info->ctrl_serial_number)); 7305 ctrl_info->serial_number[sizeof(sense_info->ctrl_serial_number)] = '\0'; 7306 7307 out: 7308 kfree(sense_info); 7309 7310 return rc; 7311 } 7312 7313 static int pqi_get_ctrl_product_details(struct pqi_ctrl_info *ctrl_info) 7314 { 7315 int rc; 7316 struct bmic_identify_controller *identify; 7317 7318 identify = kmalloc(sizeof(*identify), GFP_KERNEL); 7319 if (!identify) 7320 return -ENOMEM; 7321 7322 rc = pqi_identify_controller(ctrl_info, identify); 7323 if (rc) 7324 goto out; 7325 7326 if (get_unaligned_le32(&identify->extra_controller_flags) & 7327 BMIC_IDENTIFY_EXTRA_FLAGS_LONG_FW_VERSION_SUPPORTED) { 7328 memcpy(ctrl_info->firmware_version, 7329 identify->firmware_version_long, 7330 sizeof(identify->firmware_version_long)); 7331 } else { 7332 memcpy(ctrl_info->firmware_version, 7333 identify->firmware_version_short, 7334 sizeof(identify->firmware_version_short)); 7335 ctrl_info->firmware_version 7336 [sizeof(identify->firmware_version_short)] = '\0'; 7337 snprintf(ctrl_info->firmware_version + 7338 strlen(ctrl_info->firmware_version), 7339 sizeof(ctrl_info->firmware_version) - 7340 sizeof(identify->firmware_version_short), 7341 "-%u", 7342 get_unaligned_le16(&identify->firmware_build_number)); 7343 } 7344 7345 memcpy(ctrl_info->model, identify->product_id, 7346 sizeof(identify->product_id)); 7347 ctrl_info->model[sizeof(identify->product_id)] = '\0'; 7348 7349 memcpy(ctrl_info->vendor, identify->vendor_id, 7350 sizeof(identify->vendor_id)); 7351 ctrl_info->vendor[sizeof(identify->vendor_id)] = '\0'; 7352 7353 out: 7354 kfree(identify); 7355 7356 return rc; 7357 } 7358 7359 struct pqi_config_table_section_info { 7360 struct pqi_ctrl_info *ctrl_info; 7361 void *section; 7362 u32 section_offset; 7363 void __iomem *section_iomem_addr; 7364 }; 7365 7366 static inline bool pqi_is_firmware_feature_supported( 7367 struct pqi_config_table_firmware_features *firmware_features, 7368 unsigned int bit_position) 7369 { 7370 unsigned int byte_index; 7371 7372 byte_index = bit_position / BITS_PER_BYTE; 7373 7374 if (byte_index >= le16_to_cpu(firmware_features->num_elements)) 7375 return false; 7376 7377 return firmware_features->features_supported[byte_index] & 7378 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 7379 } 7380 7381 static inline bool pqi_is_firmware_feature_enabled( 7382 struct pqi_config_table_firmware_features *firmware_features, 7383 void __iomem *firmware_features_iomem_addr, 7384 unsigned int bit_position) 7385 { 7386 unsigned int byte_index; 7387 u8 __iomem *features_enabled_iomem_addr; 7388 7389 byte_index = (bit_position / BITS_PER_BYTE) + 7390 (le16_to_cpu(firmware_features->num_elements) * 2); 7391 7392 features_enabled_iomem_addr = firmware_features_iomem_addr + 7393 offsetof(struct pqi_config_table_firmware_features, 7394 features_supported) + byte_index; 7395 7396 return *((__force u8 *)features_enabled_iomem_addr) & 7397 (1 << (bit_position % BITS_PER_BYTE)) ? true : false; 7398 } 7399 7400 static inline void pqi_request_firmware_feature( 7401 struct pqi_config_table_firmware_features *firmware_features, 7402 unsigned int bit_position) 7403 { 7404 unsigned int byte_index; 7405 7406 byte_index = (bit_position / BITS_PER_BYTE) + 7407 le16_to_cpu(firmware_features->num_elements); 7408 7409 firmware_features->features_supported[byte_index] |= 7410 (1 << (bit_position % BITS_PER_BYTE)); 7411 } 7412 7413 static int pqi_config_table_update(struct pqi_ctrl_info *ctrl_info, 7414 u16 first_section, u16 last_section) 7415 { 7416 struct pqi_vendor_general_request request; 7417 7418 memset(&request, 0, sizeof(request)); 7419 7420 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 7421 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 7422 &request.header.iu_length); 7423 put_unaligned_le16(PQI_VENDOR_GENERAL_CONFIG_TABLE_UPDATE, 7424 &request.function_code); 7425 put_unaligned_le16(first_section, 7426 &request.data.config_table_update.first_section); 7427 put_unaligned_le16(last_section, 7428 &request.data.config_table_update.last_section); 7429 7430 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 7431 } 7432 7433 static int pqi_enable_firmware_features(struct pqi_ctrl_info *ctrl_info, 7434 struct pqi_config_table_firmware_features *firmware_features, 7435 void __iomem *firmware_features_iomem_addr) 7436 { 7437 void *features_requested; 7438 void __iomem *features_requested_iomem_addr; 7439 void __iomem *host_max_known_feature_iomem_addr; 7440 7441 features_requested = firmware_features->features_supported + 7442 le16_to_cpu(firmware_features->num_elements); 7443 7444 features_requested_iomem_addr = firmware_features_iomem_addr + 7445 (features_requested - (void *)firmware_features); 7446 7447 memcpy_toio(features_requested_iomem_addr, features_requested, 7448 le16_to_cpu(firmware_features->num_elements)); 7449 7450 if (pqi_is_firmware_feature_supported(firmware_features, 7451 PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE)) { 7452 host_max_known_feature_iomem_addr = 7453 features_requested_iomem_addr + 7454 (le16_to_cpu(firmware_features->num_elements) * 2) + 7455 sizeof(__le16); 7456 writew(PQI_FIRMWARE_FEATURE_MAXIMUM, 7457 host_max_known_feature_iomem_addr); 7458 } 7459 7460 return pqi_config_table_update(ctrl_info, 7461 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES, 7462 PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES); 7463 } 7464 7465 struct pqi_firmware_feature { 7466 char *feature_name; 7467 unsigned int feature_bit; 7468 bool supported; 7469 bool enabled; 7470 void (*feature_status)(struct pqi_ctrl_info *ctrl_info, 7471 struct pqi_firmware_feature *firmware_feature); 7472 }; 7473 7474 static void pqi_firmware_feature_status(struct pqi_ctrl_info *ctrl_info, 7475 struct pqi_firmware_feature *firmware_feature) 7476 { 7477 if (!firmware_feature->supported) { 7478 dev_info(&ctrl_info->pci_dev->dev, "%s not supported by controller\n", 7479 firmware_feature->feature_name); 7480 return; 7481 } 7482 7483 if (firmware_feature->enabled) { 7484 dev_info(&ctrl_info->pci_dev->dev, 7485 "%s enabled\n", firmware_feature->feature_name); 7486 return; 7487 } 7488 7489 dev_err(&ctrl_info->pci_dev->dev, "failed to enable %s\n", 7490 firmware_feature->feature_name); 7491 } 7492 7493 static void pqi_ctrl_update_feature_flags(struct pqi_ctrl_info *ctrl_info, 7494 struct pqi_firmware_feature *firmware_feature) 7495 { 7496 switch (firmware_feature->feature_bit) { 7497 case PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS: 7498 ctrl_info->enable_r1_writes = firmware_feature->enabled; 7499 break; 7500 case PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS: 7501 ctrl_info->enable_r5_writes = firmware_feature->enabled; 7502 break; 7503 case PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS: 7504 ctrl_info->enable_r6_writes = firmware_feature->enabled; 7505 break; 7506 case PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE: 7507 ctrl_info->soft_reset_handshake_supported = 7508 firmware_feature->enabled && 7509 pqi_read_soft_reset_status(ctrl_info); 7510 break; 7511 case PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT: 7512 ctrl_info->raid_iu_timeout_supported = firmware_feature->enabled; 7513 break; 7514 case PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT: 7515 ctrl_info->tmf_iu_timeout_supported = firmware_feature->enabled; 7516 break; 7517 case PQI_FIRMWARE_FEATURE_UNIQUE_WWID_IN_REPORT_PHYS_LUN: 7518 ctrl_info->unique_wwid_in_report_phys_lun_supported = 7519 firmware_feature->enabled; 7520 break; 7521 case PQI_FIRMWARE_FEATURE_FW_TRIAGE: 7522 ctrl_info->firmware_triage_supported = firmware_feature->enabled; 7523 pqi_save_fw_triage_setting(ctrl_info, firmware_feature->enabled); 7524 break; 7525 case PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5: 7526 ctrl_info->rpl_extended_format_4_5_supported = firmware_feature->enabled; 7527 break; 7528 } 7529 7530 pqi_firmware_feature_status(ctrl_info, firmware_feature); 7531 } 7532 7533 static inline void pqi_firmware_feature_update(struct pqi_ctrl_info *ctrl_info, 7534 struct pqi_firmware_feature *firmware_feature) 7535 { 7536 if (firmware_feature->feature_status) 7537 firmware_feature->feature_status(ctrl_info, firmware_feature); 7538 } 7539 7540 static DEFINE_MUTEX(pqi_firmware_features_mutex); 7541 7542 static struct pqi_firmware_feature pqi_firmware_features[] = { 7543 { 7544 .feature_name = "Online Firmware Activation", 7545 .feature_bit = PQI_FIRMWARE_FEATURE_OFA, 7546 .feature_status = pqi_firmware_feature_status, 7547 }, 7548 { 7549 .feature_name = "Serial Management Protocol", 7550 .feature_bit = PQI_FIRMWARE_FEATURE_SMP, 7551 .feature_status = pqi_firmware_feature_status, 7552 }, 7553 { 7554 .feature_name = "Maximum Known Feature", 7555 .feature_bit = PQI_FIRMWARE_FEATURE_MAX_KNOWN_FEATURE, 7556 .feature_status = pqi_firmware_feature_status, 7557 }, 7558 { 7559 .feature_name = "RAID 0 Read Bypass", 7560 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_READ_BYPASS, 7561 .feature_status = pqi_firmware_feature_status, 7562 }, 7563 { 7564 .feature_name = "RAID 1 Read Bypass", 7565 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_READ_BYPASS, 7566 .feature_status = pqi_firmware_feature_status, 7567 }, 7568 { 7569 .feature_name = "RAID 5 Read Bypass", 7570 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_READ_BYPASS, 7571 .feature_status = pqi_firmware_feature_status, 7572 }, 7573 { 7574 .feature_name = "RAID 6 Read Bypass", 7575 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_READ_BYPASS, 7576 .feature_status = pqi_firmware_feature_status, 7577 }, 7578 { 7579 .feature_name = "RAID 0 Write Bypass", 7580 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_0_WRITE_BYPASS, 7581 .feature_status = pqi_firmware_feature_status, 7582 }, 7583 { 7584 .feature_name = "RAID 1 Write Bypass", 7585 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_1_WRITE_BYPASS, 7586 .feature_status = pqi_ctrl_update_feature_flags, 7587 }, 7588 { 7589 .feature_name = "RAID 5 Write Bypass", 7590 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_5_WRITE_BYPASS, 7591 .feature_status = pqi_ctrl_update_feature_flags, 7592 }, 7593 { 7594 .feature_name = "RAID 6 Write Bypass", 7595 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_6_WRITE_BYPASS, 7596 .feature_status = pqi_ctrl_update_feature_flags, 7597 }, 7598 { 7599 .feature_name = "New Soft Reset Handshake", 7600 .feature_bit = PQI_FIRMWARE_FEATURE_SOFT_RESET_HANDSHAKE, 7601 .feature_status = pqi_ctrl_update_feature_flags, 7602 }, 7603 { 7604 .feature_name = "RAID IU Timeout", 7605 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_IU_TIMEOUT, 7606 .feature_status = pqi_ctrl_update_feature_flags, 7607 }, 7608 { 7609 .feature_name = "TMF IU Timeout", 7610 .feature_bit = PQI_FIRMWARE_FEATURE_TMF_IU_TIMEOUT, 7611 .feature_status = pqi_ctrl_update_feature_flags, 7612 }, 7613 { 7614 .feature_name = "RAID Bypass on encrypted logical volumes on NVMe", 7615 .feature_bit = PQI_FIRMWARE_FEATURE_RAID_BYPASS_ON_ENCRYPTED_NVME, 7616 .feature_status = pqi_firmware_feature_status, 7617 }, 7618 { 7619 .feature_name = "Unique WWID in Report Physical LUN", 7620 .feature_bit = PQI_FIRMWARE_FEATURE_UNIQUE_WWID_IN_REPORT_PHYS_LUN, 7621 .feature_status = pqi_ctrl_update_feature_flags, 7622 }, 7623 { 7624 .feature_name = "Firmware Triage", 7625 .feature_bit = PQI_FIRMWARE_FEATURE_FW_TRIAGE, 7626 .feature_status = pqi_ctrl_update_feature_flags, 7627 }, 7628 { 7629 .feature_name = "RPL Extended Formats 4 and 5", 7630 .feature_bit = PQI_FIRMWARE_FEATURE_RPL_EXTENDED_FORMAT_4_5, 7631 .feature_status = pqi_ctrl_update_feature_flags, 7632 }, 7633 }; 7634 7635 static void pqi_process_firmware_features( 7636 struct pqi_config_table_section_info *section_info) 7637 { 7638 int rc; 7639 struct pqi_ctrl_info *ctrl_info; 7640 struct pqi_config_table_firmware_features *firmware_features; 7641 void __iomem *firmware_features_iomem_addr; 7642 unsigned int i; 7643 unsigned int num_features_supported; 7644 7645 ctrl_info = section_info->ctrl_info; 7646 firmware_features = section_info->section; 7647 firmware_features_iomem_addr = section_info->section_iomem_addr; 7648 7649 for (i = 0, num_features_supported = 0; 7650 i < ARRAY_SIZE(pqi_firmware_features); i++) { 7651 if (pqi_is_firmware_feature_supported(firmware_features, 7652 pqi_firmware_features[i].feature_bit)) { 7653 pqi_firmware_features[i].supported = true; 7654 num_features_supported++; 7655 } else { 7656 pqi_firmware_feature_update(ctrl_info, 7657 &pqi_firmware_features[i]); 7658 } 7659 } 7660 7661 if (num_features_supported == 0) 7662 return; 7663 7664 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 7665 if (!pqi_firmware_features[i].supported) 7666 continue; 7667 pqi_request_firmware_feature(firmware_features, 7668 pqi_firmware_features[i].feature_bit); 7669 } 7670 7671 rc = pqi_enable_firmware_features(ctrl_info, firmware_features, 7672 firmware_features_iomem_addr); 7673 if (rc) { 7674 dev_err(&ctrl_info->pci_dev->dev, 7675 "failed to enable firmware features in PQI configuration table\n"); 7676 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 7677 if (!pqi_firmware_features[i].supported) 7678 continue; 7679 pqi_firmware_feature_update(ctrl_info, 7680 &pqi_firmware_features[i]); 7681 } 7682 return; 7683 } 7684 7685 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 7686 if (!pqi_firmware_features[i].supported) 7687 continue; 7688 if (pqi_is_firmware_feature_enabled(firmware_features, 7689 firmware_features_iomem_addr, 7690 pqi_firmware_features[i].feature_bit)) { 7691 pqi_firmware_features[i].enabled = true; 7692 } 7693 pqi_firmware_feature_update(ctrl_info, 7694 &pqi_firmware_features[i]); 7695 } 7696 } 7697 7698 static void pqi_init_firmware_features(void) 7699 { 7700 unsigned int i; 7701 7702 for (i = 0; i < ARRAY_SIZE(pqi_firmware_features); i++) { 7703 pqi_firmware_features[i].supported = false; 7704 pqi_firmware_features[i].enabled = false; 7705 } 7706 } 7707 7708 static void pqi_process_firmware_features_section( 7709 struct pqi_config_table_section_info *section_info) 7710 { 7711 mutex_lock(&pqi_firmware_features_mutex); 7712 pqi_init_firmware_features(); 7713 pqi_process_firmware_features(section_info); 7714 mutex_unlock(&pqi_firmware_features_mutex); 7715 } 7716 7717 /* 7718 * Reset all controller settings that can be initialized during the processing 7719 * of the PQI Configuration Table. 7720 */ 7721 7722 static void pqi_ctrl_reset_config(struct pqi_ctrl_info *ctrl_info) 7723 { 7724 ctrl_info->heartbeat_counter = NULL; 7725 ctrl_info->soft_reset_status = NULL; 7726 ctrl_info->soft_reset_handshake_supported = false; 7727 ctrl_info->enable_r1_writes = false; 7728 ctrl_info->enable_r5_writes = false; 7729 ctrl_info->enable_r6_writes = false; 7730 ctrl_info->raid_iu_timeout_supported = false; 7731 ctrl_info->tmf_iu_timeout_supported = false; 7732 ctrl_info->unique_wwid_in_report_phys_lun_supported = false; 7733 ctrl_info->firmware_triage_supported = false; 7734 ctrl_info->rpl_extended_format_4_5_supported = false; 7735 } 7736 7737 static int pqi_process_config_table(struct pqi_ctrl_info *ctrl_info) 7738 { 7739 u32 table_length; 7740 u32 section_offset; 7741 bool firmware_feature_section_present; 7742 void __iomem *table_iomem_addr; 7743 struct pqi_config_table *config_table; 7744 struct pqi_config_table_section_header *section; 7745 struct pqi_config_table_section_info section_info; 7746 struct pqi_config_table_section_info feature_section_info; 7747 7748 table_length = ctrl_info->config_table_length; 7749 if (table_length == 0) 7750 return 0; 7751 7752 config_table = kmalloc(table_length, GFP_KERNEL); 7753 if (!config_table) { 7754 dev_err(&ctrl_info->pci_dev->dev, 7755 "failed to allocate memory for PQI configuration table\n"); 7756 return -ENOMEM; 7757 } 7758 7759 /* 7760 * Copy the config table contents from I/O memory space into the 7761 * temporary buffer. 7762 */ 7763 table_iomem_addr = ctrl_info->iomem_base + ctrl_info->config_table_offset; 7764 memcpy_fromio(config_table, table_iomem_addr, table_length); 7765 7766 firmware_feature_section_present = false; 7767 section_info.ctrl_info = ctrl_info; 7768 section_offset = get_unaligned_le32(&config_table->first_section_offset); 7769 7770 while (section_offset) { 7771 section = (void *)config_table + section_offset; 7772 7773 section_info.section = section; 7774 section_info.section_offset = section_offset; 7775 section_info.section_iomem_addr = table_iomem_addr + section_offset; 7776 7777 switch (get_unaligned_le16(§ion->section_id)) { 7778 case PQI_CONFIG_TABLE_SECTION_FIRMWARE_FEATURES: 7779 firmware_feature_section_present = true; 7780 feature_section_info = section_info; 7781 break; 7782 case PQI_CONFIG_TABLE_SECTION_HEARTBEAT: 7783 if (pqi_disable_heartbeat) 7784 dev_warn(&ctrl_info->pci_dev->dev, 7785 "heartbeat disabled by module parameter\n"); 7786 else 7787 ctrl_info->heartbeat_counter = 7788 table_iomem_addr + 7789 section_offset + 7790 offsetof(struct pqi_config_table_heartbeat, 7791 heartbeat_counter); 7792 break; 7793 case PQI_CONFIG_TABLE_SECTION_SOFT_RESET: 7794 ctrl_info->soft_reset_status = 7795 table_iomem_addr + 7796 section_offset + 7797 offsetof(struct pqi_config_table_soft_reset, 7798 soft_reset_status); 7799 break; 7800 } 7801 7802 section_offset = get_unaligned_le16(§ion->next_section_offset); 7803 } 7804 7805 /* 7806 * We process the firmware feature section after all other sections 7807 * have been processed so that the feature bit callbacks can take 7808 * into account the settings configured by other sections. 7809 */ 7810 if (firmware_feature_section_present) 7811 pqi_process_firmware_features_section(&feature_section_info); 7812 7813 kfree(config_table); 7814 7815 return 0; 7816 } 7817 7818 /* Switches the controller from PQI mode back into SIS mode. */ 7819 7820 static int pqi_revert_to_sis_mode(struct pqi_ctrl_info *ctrl_info) 7821 { 7822 int rc; 7823 7824 pqi_change_irq_mode(ctrl_info, IRQ_MODE_NONE); 7825 rc = pqi_reset(ctrl_info); 7826 if (rc) 7827 return rc; 7828 rc = sis_reenable_sis_mode(ctrl_info); 7829 if (rc) { 7830 dev_err(&ctrl_info->pci_dev->dev, 7831 "re-enabling SIS mode failed with error %d\n", rc); 7832 return rc; 7833 } 7834 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 7835 7836 return 0; 7837 } 7838 7839 /* 7840 * If the controller isn't already in SIS mode, this function forces it into 7841 * SIS mode. 7842 */ 7843 7844 static int pqi_force_sis_mode(struct pqi_ctrl_info *ctrl_info) 7845 { 7846 if (!sis_is_firmware_running(ctrl_info)) 7847 return -ENXIO; 7848 7849 if (pqi_get_ctrl_mode(ctrl_info) == SIS_MODE) 7850 return 0; 7851 7852 if (sis_is_kernel_up(ctrl_info)) { 7853 pqi_save_ctrl_mode(ctrl_info, SIS_MODE); 7854 return 0; 7855 } 7856 7857 return pqi_revert_to_sis_mode(ctrl_info); 7858 } 7859 7860 static int pqi_ctrl_init(struct pqi_ctrl_info *ctrl_info) 7861 { 7862 int rc; 7863 u32 product_id; 7864 7865 if (reset_devices) { 7866 if (pqi_is_fw_triage_supported(ctrl_info)) { 7867 rc = sis_wait_for_fw_triage_completion(ctrl_info); 7868 if (rc) 7869 return rc; 7870 } 7871 sis_soft_reset(ctrl_info); 7872 msleep(PQI_POST_RESET_DELAY_SECS * PQI_HZ); 7873 } else { 7874 rc = pqi_force_sis_mode(ctrl_info); 7875 if (rc) 7876 return rc; 7877 } 7878 7879 /* 7880 * Wait until the controller is ready to start accepting SIS 7881 * commands. 7882 */ 7883 rc = sis_wait_for_ctrl_ready(ctrl_info); 7884 if (rc) 7885 return rc; 7886 7887 /* 7888 * Get the controller properties. This allows us to determine 7889 * whether or not it supports PQI mode. 7890 */ 7891 rc = sis_get_ctrl_properties(ctrl_info); 7892 if (rc) { 7893 dev_err(&ctrl_info->pci_dev->dev, 7894 "error obtaining controller properties\n"); 7895 return rc; 7896 } 7897 7898 rc = sis_get_pqi_capabilities(ctrl_info); 7899 if (rc) { 7900 dev_err(&ctrl_info->pci_dev->dev, 7901 "error obtaining controller capabilities\n"); 7902 return rc; 7903 } 7904 7905 product_id = sis_get_product_id(ctrl_info); 7906 ctrl_info->product_id = (u8)product_id; 7907 ctrl_info->product_revision = (u8)(product_id >> 8); 7908 7909 if (reset_devices) { 7910 if (ctrl_info->max_outstanding_requests > 7911 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP) 7912 ctrl_info->max_outstanding_requests = 7913 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP; 7914 } else { 7915 if (ctrl_info->max_outstanding_requests > 7916 PQI_MAX_OUTSTANDING_REQUESTS) 7917 ctrl_info->max_outstanding_requests = 7918 PQI_MAX_OUTSTANDING_REQUESTS; 7919 } 7920 7921 pqi_calculate_io_resources(ctrl_info); 7922 7923 rc = pqi_alloc_error_buffer(ctrl_info); 7924 if (rc) { 7925 dev_err(&ctrl_info->pci_dev->dev, 7926 "failed to allocate PQI error buffer\n"); 7927 return rc; 7928 } 7929 7930 /* 7931 * If the function we are about to call succeeds, the 7932 * controller will transition from legacy SIS mode 7933 * into PQI mode. 7934 */ 7935 rc = sis_init_base_struct_addr(ctrl_info); 7936 if (rc) { 7937 dev_err(&ctrl_info->pci_dev->dev, 7938 "error initializing PQI mode\n"); 7939 return rc; 7940 } 7941 7942 /* Wait for the controller to complete the SIS -> PQI transition. */ 7943 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 7944 if (rc) { 7945 dev_err(&ctrl_info->pci_dev->dev, 7946 "transition to PQI mode failed\n"); 7947 return rc; 7948 } 7949 7950 /* From here on, we are running in PQI mode. */ 7951 ctrl_info->pqi_mode_enabled = true; 7952 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 7953 7954 rc = pqi_alloc_admin_queues(ctrl_info); 7955 if (rc) { 7956 dev_err(&ctrl_info->pci_dev->dev, 7957 "failed to allocate admin queues\n"); 7958 return rc; 7959 } 7960 7961 rc = pqi_create_admin_queues(ctrl_info); 7962 if (rc) { 7963 dev_err(&ctrl_info->pci_dev->dev, 7964 "error creating admin queues\n"); 7965 return rc; 7966 } 7967 7968 rc = pqi_report_device_capability(ctrl_info); 7969 if (rc) { 7970 dev_err(&ctrl_info->pci_dev->dev, 7971 "obtaining device capability failed\n"); 7972 return rc; 7973 } 7974 7975 rc = pqi_validate_device_capability(ctrl_info); 7976 if (rc) 7977 return rc; 7978 7979 pqi_calculate_queue_resources(ctrl_info); 7980 7981 rc = pqi_enable_msix_interrupts(ctrl_info); 7982 if (rc) 7983 return rc; 7984 7985 if (ctrl_info->num_msix_vectors_enabled < ctrl_info->num_queue_groups) { 7986 ctrl_info->max_msix_vectors = 7987 ctrl_info->num_msix_vectors_enabled; 7988 pqi_calculate_queue_resources(ctrl_info); 7989 } 7990 7991 rc = pqi_alloc_io_resources(ctrl_info); 7992 if (rc) 7993 return rc; 7994 7995 rc = pqi_alloc_operational_queues(ctrl_info); 7996 if (rc) { 7997 dev_err(&ctrl_info->pci_dev->dev, 7998 "failed to allocate operational queues\n"); 7999 return rc; 8000 } 8001 8002 pqi_init_operational_queues(ctrl_info); 8003 8004 rc = pqi_create_queues(ctrl_info); 8005 if (rc) 8006 return rc; 8007 8008 rc = pqi_request_irqs(ctrl_info); 8009 if (rc) 8010 return rc; 8011 8012 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 8013 8014 ctrl_info->controller_online = true; 8015 8016 rc = pqi_process_config_table(ctrl_info); 8017 if (rc) 8018 return rc; 8019 8020 pqi_start_heartbeat_timer(ctrl_info); 8021 8022 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) { 8023 rc = pqi_get_advanced_raid_bypass_config(ctrl_info); 8024 if (rc) { /* Supported features not returned correctly. */ 8025 dev_err(&ctrl_info->pci_dev->dev, 8026 "error obtaining advanced RAID bypass configuration\n"); 8027 return rc; 8028 } 8029 ctrl_info->ciss_report_log_flags |= 8030 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX; 8031 } 8032 8033 rc = pqi_enable_events(ctrl_info); 8034 if (rc) { 8035 dev_err(&ctrl_info->pci_dev->dev, 8036 "error enabling events\n"); 8037 return rc; 8038 } 8039 8040 /* Register with the SCSI subsystem. */ 8041 rc = pqi_register_scsi(ctrl_info); 8042 if (rc) 8043 return rc; 8044 8045 rc = pqi_get_ctrl_product_details(ctrl_info); 8046 if (rc) { 8047 dev_err(&ctrl_info->pci_dev->dev, 8048 "error obtaining product details\n"); 8049 return rc; 8050 } 8051 8052 rc = pqi_get_ctrl_serial_number(ctrl_info); 8053 if (rc) { 8054 dev_err(&ctrl_info->pci_dev->dev, 8055 "error obtaining ctrl serial number\n"); 8056 return rc; 8057 } 8058 8059 rc = pqi_set_diag_rescan(ctrl_info); 8060 if (rc) { 8061 dev_err(&ctrl_info->pci_dev->dev, 8062 "error enabling multi-lun rescan\n"); 8063 return rc; 8064 } 8065 8066 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 8067 if (rc) { 8068 dev_err(&ctrl_info->pci_dev->dev, 8069 "error updating host wellness\n"); 8070 return rc; 8071 } 8072 8073 pqi_schedule_update_time_worker(ctrl_info); 8074 8075 pqi_scan_scsi_devices(ctrl_info); 8076 8077 return 0; 8078 } 8079 8080 static void pqi_reinit_queues(struct pqi_ctrl_info *ctrl_info) 8081 { 8082 unsigned int i; 8083 struct pqi_admin_queues *admin_queues; 8084 struct pqi_event_queue *event_queue; 8085 8086 admin_queues = &ctrl_info->admin_queues; 8087 admin_queues->iq_pi_copy = 0; 8088 admin_queues->oq_ci_copy = 0; 8089 writel(0, admin_queues->oq_pi); 8090 8091 for (i = 0; i < ctrl_info->num_queue_groups; i++) { 8092 ctrl_info->queue_groups[i].iq_pi_copy[RAID_PATH] = 0; 8093 ctrl_info->queue_groups[i].iq_pi_copy[AIO_PATH] = 0; 8094 ctrl_info->queue_groups[i].oq_ci_copy = 0; 8095 8096 writel(0, ctrl_info->queue_groups[i].iq_ci[RAID_PATH]); 8097 writel(0, ctrl_info->queue_groups[i].iq_ci[AIO_PATH]); 8098 writel(0, ctrl_info->queue_groups[i].oq_pi); 8099 } 8100 8101 event_queue = &ctrl_info->event_queue; 8102 writel(0, event_queue->oq_pi); 8103 event_queue->oq_ci_copy = 0; 8104 } 8105 8106 static int pqi_ctrl_init_resume(struct pqi_ctrl_info *ctrl_info) 8107 { 8108 int rc; 8109 8110 rc = pqi_force_sis_mode(ctrl_info); 8111 if (rc) 8112 return rc; 8113 8114 /* 8115 * Wait until the controller is ready to start accepting SIS 8116 * commands. 8117 */ 8118 rc = sis_wait_for_ctrl_ready_resume(ctrl_info); 8119 if (rc) 8120 return rc; 8121 8122 /* 8123 * Get the controller properties. This allows us to determine 8124 * whether or not it supports PQI mode. 8125 */ 8126 rc = sis_get_ctrl_properties(ctrl_info); 8127 if (rc) { 8128 dev_err(&ctrl_info->pci_dev->dev, 8129 "error obtaining controller properties\n"); 8130 return rc; 8131 } 8132 8133 rc = sis_get_pqi_capabilities(ctrl_info); 8134 if (rc) { 8135 dev_err(&ctrl_info->pci_dev->dev, 8136 "error obtaining controller capabilities\n"); 8137 return rc; 8138 } 8139 8140 /* 8141 * If the function we are about to call succeeds, the 8142 * controller will transition from legacy SIS mode 8143 * into PQI mode. 8144 */ 8145 rc = sis_init_base_struct_addr(ctrl_info); 8146 if (rc) { 8147 dev_err(&ctrl_info->pci_dev->dev, 8148 "error initializing PQI mode\n"); 8149 return rc; 8150 } 8151 8152 /* Wait for the controller to complete the SIS -> PQI transition. */ 8153 rc = pqi_wait_for_pqi_mode_ready(ctrl_info); 8154 if (rc) { 8155 dev_err(&ctrl_info->pci_dev->dev, 8156 "transition to PQI mode failed\n"); 8157 return rc; 8158 } 8159 8160 /* From here on, we are running in PQI mode. */ 8161 ctrl_info->pqi_mode_enabled = true; 8162 pqi_save_ctrl_mode(ctrl_info, PQI_MODE); 8163 8164 pqi_reinit_queues(ctrl_info); 8165 8166 rc = pqi_create_admin_queues(ctrl_info); 8167 if (rc) { 8168 dev_err(&ctrl_info->pci_dev->dev, 8169 "error creating admin queues\n"); 8170 return rc; 8171 } 8172 8173 rc = pqi_create_queues(ctrl_info); 8174 if (rc) 8175 return rc; 8176 8177 pqi_change_irq_mode(ctrl_info, IRQ_MODE_MSIX); 8178 8179 ctrl_info->controller_online = true; 8180 pqi_ctrl_unblock_requests(ctrl_info); 8181 8182 pqi_ctrl_reset_config(ctrl_info); 8183 8184 rc = pqi_process_config_table(ctrl_info); 8185 if (rc) 8186 return rc; 8187 8188 pqi_start_heartbeat_timer(ctrl_info); 8189 8190 if (ctrl_info->enable_r5_writes || ctrl_info->enable_r6_writes) { 8191 rc = pqi_get_advanced_raid_bypass_config(ctrl_info); 8192 if (rc) { 8193 dev_err(&ctrl_info->pci_dev->dev, 8194 "error obtaining advanced RAID bypass configuration\n"); 8195 return rc; 8196 } 8197 ctrl_info->ciss_report_log_flags |= 8198 CISS_REPORT_LOG_FLAG_DRIVE_TYPE_MIX; 8199 } 8200 8201 rc = pqi_enable_events(ctrl_info); 8202 if (rc) { 8203 dev_err(&ctrl_info->pci_dev->dev, 8204 "error enabling events\n"); 8205 return rc; 8206 } 8207 8208 rc = pqi_get_ctrl_product_details(ctrl_info); 8209 if (rc) { 8210 dev_err(&ctrl_info->pci_dev->dev, 8211 "error obtaining product details\n"); 8212 return rc; 8213 } 8214 8215 rc = pqi_set_diag_rescan(ctrl_info); 8216 if (rc) { 8217 dev_err(&ctrl_info->pci_dev->dev, 8218 "error enabling multi-lun rescan\n"); 8219 return rc; 8220 } 8221 8222 rc = pqi_write_driver_version_to_host_wellness(ctrl_info); 8223 if (rc) { 8224 dev_err(&ctrl_info->pci_dev->dev, 8225 "error updating host wellness\n"); 8226 return rc; 8227 } 8228 8229 if (pqi_ofa_in_progress(ctrl_info)) 8230 pqi_ctrl_unblock_scan(ctrl_info); 8231 8232 pqi_scan_scsi_devices(ctrl_info); 8233 8234 return 0; 8235 } 8236 8237 static inline int pqi_set_pcie_completion_timeout(struct pci_dev *pci_dev, u16 timeout) 8238 { 8239 int rc; 8240 8241 rc = pcie_capability_clear_and_set_word(pci_dev, PCI_EXP_DEVCTL2, 8242 PCI_EXP_DEVCTL2_COMP_TIMEOUT, timeout); 8243 8244 return pcibios_err_to_errno(rc); 8245 } 8246 8247 static int pqi_pci_init(struct pqi_ctrl_info *ctrl_info) 8248 { 8249 int rc; 8250 u64 mask; 8251 8252 rc = pci_enable_device(ctrl_info->pci_dev); 8253 if (rc) { 8254 dev_err(&ctrl_info->pci_dev->dev, 8255 "failed to enable PCI device\n"); 8256 return rc; 8257 } 8258 8259 if (sizeof(dma_addr_t) > 4) 8260 mask = DMA_BIT_MASK(64); 8261 else 8262 mask = DMA_BIT_MASK(32); 8263 8264 rc = dma_set_mask_and_coherent(&ctrl_info->pci_dev->dev, mask); 8265 if (rc) { 8266 dev_err(&ctrl_info->pci_dev->dev, "failed to set DMA mask\n"); 8267 goto disable_device; 8268 } 8269 8270 rc = pci_request_regions(ctrl_info->pci_dev, DRIVER_NAME_SHORT); 8271 if (rc) { 8272 dev_err(&ctrl_info->pci_dev->dev, 8273 "failed to obtain PCI resources\n"); 8274 goto disable_device; 8275 } 8276 8277 ctrl_info->iomem_base = ioremap(pci_resource_start( 8278 ctrl_info->pci_dev, 0), 8279 sizeof(struct pqi_ctrl_registers)); 8280 if (!ctrl_info->iomem_base) { 8281 dev_err(&ctrl_info->pci_dev->dev, 8282 "failed to map memory for controller registers\n"); 8283 rc = -ENOMEM; 8284 goto release_regions; 8285 } 8286 8287 #define PCI_EXP_COMP_TIMEOUT_65_TO_210_MS 0x6 8288 8289 /* Increase the PCIe completion timeout. */ 8290 rc = pqi_set_pcie_completion_timeout(ctrl_info->pci_dev, 8291 PCI_EXP_COMP_TIMEOUT_65_TO_210_MS); 8292 if (rc) { 8293 dev_err(&ctrl_info->pci_dev->dev, 8294 "failed to set PCIe completion timeout\n"); 8295 goto release_regions; 8296 } 8297 8298 /* Enable bus mastering. */ 8299 pci_set_master(ctrl_info->pci_dev); 8300 8301 ctrl_info->registers = ctrl_info->iomem_base; 8302 ctrl_info->pqi_registers = &ctrl_info->registers->pqi_registers; 8303 8304 pci_set_drvdata(ctrl_info->pci_dev, ctrl_info); 8305 8306 return 0; 8307 8308 release_regions: 8309 pci_release_regions(ctrl_info->pci_dev); 8310 disable_device: 8311 pci_disable_device(ctrl_info->pci_dev); 8312 8313 return rc; 8314 } 8315 8316 static void pqi_cleanup_pci_init(struct pqi_ctrl_info *ctrl_info) 8317 { 8318 iounmap(ctrl_info->iomem_base); 8319 pci_release_regions(ctrl_info->pci_dev); 8320 if (pci_is_enabled(ctrl_info->pci_dev)) 8321 pci_disable_device(ctrl_info->pci_dev); 8322 pci_set_drvdata(ctrl_info->pci_dev, NULL); 8323 } 8324 8325 static struct pqi_ctrl_info *pqi_alloc_ctrl_info(int numa_node) 8326 { 8327 struct pqi_ctrl_info *ctrl_info; 8328 8329 ctrl_info = kzalloc_node(sizeof(struct pqi_ctrl_info), 8330 GFP_KERNEL, numa_node); 8331 if (!ctrl_info) 8332 return NULL; 8333 8334 mutex_init(&ctrl_info->scan_mutex); 8335 mutex_init(&ctrl_info->lun_reset_mutex); 8336 mutex_init(&ctrl_info->ofa_mutex); 8337 8338 INIT_LIST_HEAD(&ctrl_info->scsi_device_list); 8339 spin_lock_init(&ctrl_info->scsi_device_list_lock); 8340 8341 INIT_WORK(&ctrl_info->event_work, pqi_event_worker); 8342 atomic_set(&ctrl_info->num_interrupts, 0); 8343 8344 INIT_DELAYED_WORK(&ctrl_info->rescan_work, pqi_rescan_worker); 8345 INIT_DELAYED_WORK(&ctrl_info->update_time_work, pqi_update_time_worker); 8346 8347 timer_setup(&ctrl_info->heartbeat_timer, pqi_heartbeat_timer_handler, 0); 8348 INIT_WORK(&ctrl_info->ctrl_offline_work, pqi_ctrl_offline_worker); 8349 8350 INIT_WORK(&ctrl_info->ofa_memory_alloc_work, pqi_ofa_memory_alloc_worker); 8351 INIT_WORK(&ctrl_info->ofa_quiesce_work, pqi_ofa_quiesce_worker); 8352 8353 sema_init(&ctrl_info->sync_request_sem, 8354 PQI_RESERVED_IO_SLOTS_SYNCHRONOUS_REQUESTS); 8355 init_waitqueue_head(&ctrl_info->block_requests_wait); 8356 8357 ctrl_info->ctrl_id = atomic_inc_return(&pqi_controller_count) - 1; 8358 ctrl_info->irq_mode = IRQ_MODE_NONE; 8359 ctrl_info->max_msix_vectors = PQI_MAX_MSIX_VECTORS; 8360 8361 ctrl_info->ciss_report_log_flags = CISS_REPORT_LOG_FLAG_UNIQUE_LUN_ID; 8362 ctrl_info->max_transfer_encrypted_sas_sata = 8363 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_SAS_SATA; 8364 ctrl_info->max_transfer_encrypted_nvme = 8365 PQI_DEFAULT_MAX_TRANSFER_ENCRYPTED_NVME; 8366 ctrl_info->max_write_raid_5_6 = PQI_DEFAULT_MAX_WRITE_RAID_5_6; 8367 ctrl_info->max_write_raid_1_10_2drive = ~0; 8368 ctrl_info->max_write_raid_1_10_3drive = ~0; 8369 8370 return ctrl_info; 8371 } 8372 8373 static inline void pqi_free_ctrl_info(struct pqi_ctrl_info *ctrl_info) 8374 { 8375 kfree(ctrl_info); 8376 } 8377 8378 static void pqi_free_interrupts(struct pqi_ctrl_info *ctrl_info) 8379 { 8380 pqi_free_irqs(ctrl_info); 8381 pqi_disable_msix_interrupts(ctrl_info); 8382 } 8383 8384 static void pqi_free_ctrl_resources(struct pqi_ctrl_info *ctrl_info) 8385 { 8386 pqi_stop_heartbeat_timer(ctrl_info); 8387 pqi_free_interrupts(ctrl_info); 8388 if (ctrl_info->queue_memory_base) 8389 dma_free_coherent(&ctrl_info->pci_dev->dev, 8390 ctrl_info->queue_memory_length, 8391 ctrl_info->queue_memory_base, 8392 ctrl_info->queue_memory_base_dma_handle); 8393 if (ctrl_info->admin_queue_memory_base) 8394 dma_free_coherent(&ctrl_info->pci_dev->dev, 8395 ctrl_info->admin_queue_memory_length, 8396 ctrl_info->admin_queue_memory_base, 8397 ctrl_info->admin_queue_memory_base_dma_handle); 8398 pqi_free_all_io_requests(ctrl_info); 8399 if (ctrl_info->error_buffer) 8400 dma_free_coherent(&ctrl_info->pci_dev->dev, 8401 ctrl_info->error_buffer_length, 8402 ctrl_info->error_buffer, 8403 ctrl_info->error_buffer_dma_handle); 8404 if (ctrl_info->iomem_base) 8405 pqi_cleanup_pci_init(ctrl_info); 8406 pqi_free_ctrl_info(ctrl_info); 8407 } 8408 8409 static void pqi_remove_ctrl(struct pqi_ctrl_info *ctrl_info) 8410 { 8411 pqi_cancel_rescan_worker(ctrl_info); 8412 pqi_cancel_update_time_worker(ctrl_info); 8413 pqi_remove_all_scsi_devices(ctrl_info); 8414 pqi_unregister_scsi(ctrl_info); 8415 if (ctrl_info->pqi_mode_enabled) 8416 pqi_revert_to_sis_mode(ctrl_info); 8417 pqi_free_ctrl_resources(ctrl_info); 8418 } 8419 8420 static void pqi_ofa_ctrl_quiesce(struct pqi_ctrl_info *ctrl_info) 8421 { 8422 pqi_ctrl_block_scan(ctrl_info); 8423 pqi_scsi_block_requests(ctrl_info); 8424 pqi_ctrl_block_device_reset(ctrl_info); 8425 pqi_ctrl_block_requests(ctrl_info); 8426 pqi_ctrl_wait_until_quiesced(ctrl_info); 8427 pqi_stop_heartbeat_timer(ctrl_info); 8428 } 8429 8430 static void pqi_ofa_ctrl_unquiesce(struct pqi_ctrl_info *ctrl_info) 8431 { 8432 pqi_start_heartbeat_timer(ctrl_info); 8433 pqi_ctrl_unblock_requests(ctrl_info); 8434 pqi_ctrl_unblock_device_reset(ctrl_info); 8435 pqi_scsi_unblock_requests(ctrl_info); 8436 pqi_ctrl_unblock_scan(ctrl_info); 8437 } 8438 8439 static int pqi_ofa_alloc_mem(struct pqi_ctrl_info *ctrl_info, u32 total_size, u32 chunk_size) 8440 { 8441 int i; 8442 u32 sg_count; 8443 struct device *dev; 8444 struct pqi_ofa_memory *ofap; 8445 struct pqi_sg_descriptor *mem_descriptor; 8446 dma_addr_t dma_handle; 8447 8448 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 8449 8450 sg_count = DIV_ROUND_UP(total_size, chunk_size); 8451 if (sg_count == 0 || sg_count > PQI_OFA_MAX_SG_DESCRIPTORS) 8452 goto out; 8453 8454 ctrl_info->pqi_ofa_chunk_virt_addr = kmalloc_array(sg_count, sizeof(void *), GFP_KERNEL); 8455 if (!ctrl_info->pqi_ofa_chunk_virt_addr) 8456 goto out; 8457 8458 dev = &ctrl_info->pci_dev->dev; 8459 8460 for (i = 0; i < sg_count; i++) { 8461 ctrl_info->pqi_ofa_chunk_virt_addr[i] = 8462 dma_alloc_coherent(dev, chunk_size, &dma_handle, GFP_KERNEL); 8463 if (!ctrl_info->pqi_ofa_chunk_virt_addr[i]) 8464 goto out_free_chunks; 8465 mem_descriptor = &ofap->sg_descriptor[i]; 8466 put_unaligned_le64((u64)dma_handle, &mem_descriptor->address); 8467 put_unaligned_le32(chunk_size, &mem_descriptor->length); 8468 } 8469 8470 put_unaligned_le32(CISS_SG_LAST, &mem_descriptor->flags); 8471 put_unaligned_le16(sg_count, &ofap->num_memory_descriptors); 8472 put_unaligned_le32(sg_count * chunk_size, &ofap->bytes_allocated); 8473 8474 return 0; 8475 8476 out_free_chunks: 8477 while (--i >= 0) { 8478 mem_descriptor = &ofap->sg_descriptor[i]; 8479 dma_free_coherent(dev, chunk_size, 8480 ctrl_info->pqi_ofa_chunk_virt_addr[i], 8481 get_unaligned_le64(&mem_descriptor->address)); 8482 } 8483 kfree(ctrl_info->pqi_ofa_chunk_virt_addr); 8484 8485 out: 8486 return -ENOMEM; 8487 } 8488 8489 static int pqi_ofa_alloc_host_buffer(struct pqi_ctrl_info *ctrl_info) 8490 { 8491 u32 total_size; 8492 u32 chunk_size; 8493 u32 min_chunk_size; 8494 8495 if (ctrl_info->ofa_bytes_requested == 0) 8496 return 0; 8497 8498 total_size = PAGE_ALIGN(ctrl_info->ofa_bytes_requested); 8499 min_chunk_size = DIV_ROUND_UP(total_size, PQI_OFA_MAX_SG_DESCRIPTORS); 8500 min_chunk_size = PAGE_ALIGN(min_chunk_size); 8501 8502 for (chunk_size = total_size; chunk_size >= min_chunk_size;) { 8503 if (pqi_ofa_alloc_mem(ctrl_info, total_size, chunk_size) == 0) 8504 return 0; 8505 chunk_size /= 2; 8506 chunk_size = PAGE_ALIGN(chunk_size); 8507 } 8508 8509 return -ENOMEM; 8510 } 8511 8512 static void pqi_ofa_setup_host_buffer(struct pqi_ctrl_info *ctrl_info) 8513 { 8514 struct device *dev; 8515 struct pqi_ofa_memory *ofap; 8516 8517 dev = &ctrl_info->pci_dev->dev; 8518 8519 ofap = dma_alloc_coherent(dev, sizeof(*ofap), 8520 &ctrl_info->pqi_ofa_mem_dma_handle, GFP_KERNEL); 8521 if (!ofap) 8522 return; 8523 8524 ctrl_info->pqi_ofa_mem_virt_addr = ofap; 8525 8526 if (pqi_ofa_alloc_host_buffer(ctrl_info) < 0) { 8527 dev_err(dev, 8528 "failed to allocate host buffer for Online Firmware Activation\n"); 8529 dma_free_coherent(dev, sizeof(*ofap), ofap, ctrl_info->pqi_ofa_mem_dma_handle); 8530 ctrl_info->pqi_ofa_mem_virt_addr = NULL; 8531 return; 8532 } 8533 8534 put_unaligned_le16(PQI_OFA_VERSION, &ofap->version); 8535 memcpy(&ofap->signature, PQI_OFA_SIGNATURE, sizeof(ofap->signature)); 8536 } 8537 8538 static void pqi_ofa_free_host_buffer(struct pqi_ctrl_info *ctrl_info) 8539 { 8540 unsigned int i; 8541 struct device *dev; 8542 struct pqi_ofa_memory *ofap; 8543 struct pqi_sg_descriptor *mem_descriptor; 8544 unsigned int num_memory_descriptors; 8545 8546 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 8547 if (!ofap) 8548 return; 8549 8550 dev = &ctrl_info->pci_dev->dev; 8551 8552 if (get_unaligned_le32(&ofap->bytes_allocated) == 0) 8553 goto out; 8554 8555 mem_descriptor = ofap->sg_descriptor; 8556 num_memory_descriptors = 8557 get_unaligned_le16(&ofap->num_memory_descriptors); 8558 8559 for (i = 0; i < num_memory_descriptors; i++) { 8560 dma_free_coherent(dev, 8561 get_unaligned_le32(&mem_descriptor[i].length), 8562 ctrl_info->pqi_ofa_chunk_virt_addr[i], 8563 get_unaligned_le64(&mem_descriptor[i].address)); 8564 } 8565 kfree(ctrl_info->pqi_ofa_chunk_virt_addr); 8566 8567 out: 8568 dma_free_coherent(dev, sizeof(*ofap), ofap, 8569 ctrl_info->pqi_ofa_mem_dma_handle); 8570 ctrl_info->pqi_ofa_mem_virt_addr = NULL; 8571 } 8572 8573 static int pqi_ofa_host_memory_update(struct pqi_ctrl_info *ctrl_info) 8574 { 8575 u32 buffer_length; 8576 struct pqi_vendor_general_request request; 8577 struct pqi_ofa_memory *ofap; 8578 8579 memset(&request, 0, sizeof(request)); 8580 8581 request.header.iu_type = PQI_REQUEST_IU_VENDOR_GENERAL; 8582 put_unaligned_le16(sizeof(request) - PQI_REQUEST_HEADER_LENGTH, 8583 &request.header.iu_length); 8584 put_unaligned_le16(PQI_VENDOR_GENERAL_HOST_MEMORY_UPDATE, 8585 &request.function_code); 8586 8587 ofap = ctrl_info->pqi_ofa_mem_virt_addr; 8588 8589 if (ofap) { 8590 buffer_length = offsetof(struct pqi_ofa_memory, sg_descriptor) + 8591 get_unaligned_le16(&ofap->num_memory_descriptors) * 8592 sizeof(struct pqi_sg_descriptor); 8593 8594 put_unaligned_le64((u64)ctrl_info->pqi_ofa_mem_dma_handle, 8595 &request.data.ofa_memory_allocation.buffer_address); 8596 put_unaligned_le32(buffer_length, 8597 &request.data.ofa_memory_allocation.buffer_length); 8598 } 8599 8600 return pqi_submit_raid_request_synchronous(ctrl_info, &request.header, 0, NULL); 8601 } 8602 8603 static int pqi_ofa_ctrl_restart(struct pqi_ctrl_info *ctrl_info, unsigned int delay_secs) 8604 { 8605 ssleep(delay_secs); 8606 8607 return pqi_ctrl_init_resume(ctrl_info); 8608 } 8609 8610 static void pqi_perform_lockup_action(void) 8611 { 8612 switch (pqi_lockup_action) { 8613 case PANIC: 8614 panic("FATAL: Smart Family Controller lockup detected"); 8615 break; 8616 case REBOOT: 8617 emergency_restart(); 8618 break; 8619 case NONE: 8620 default: 8621 break; 8622 } 8623 } 8624 8625 static struct pqi_raid_error_info pqi_ctrl_offline_raid_error_info = { 8626 .data_out_result = PQI_DATA_IN_OUT_HARDWARE_ERROR, 8627 .status = SAM_STAT_CHECK_CONDITION, 8628 }; 8629 8630 static void pqi_fail_all_outstanding_requests(struct pqi_ctrl_info *ctrl_info) 8631 { 8632 unsigned int i; 8633 struct pqi_io_request *io_request; 8634 struct scsi_cmnd *scmd; 8635 struct scsi_device *sdev; 8636 8637 for (i = 0; i < ctrl_info->max_io_slots; i++) { 8638 io_request = &ctrl_info->io_request_pool[i]; 8639 if (atomic_read(&io_request->refcount) == 0) 8640 continue; 8641 8642 scmd = io_request->scmd; 8643 if (scmd) { 8644 sdev = scmd->device; 8645 if (!sdev || !scsi_device_online(sdev)) { 8646 pqi_free_io_request(io_request); 8647 continue; 8648 } else { 8649 set_host_byte(scmd, DID_NO_CONNECT); 8650 } 8651 } else { 8652 io_request->status = -ENXIO; 8653 io_request->error_info = 8654 &pqi_ctrl_offline_raid_error_info; 8655 } 8656 8657 io_request->io_complete_callback(io_request, 8658 io_request->context); 8659 } 8660 } 8661 8662 static void pqi_take_ctrl_offline_deferred(struct pqi_ctrl_info *ctrl_info) 8663 { 8664 pqi_perform_lockup_action(); 8665 pqi_stop_heartbeat_timer(ctrl_info); 8666 pqi_free_interrupts(ctrl_info); 8667 pqi_cancel_rescan_worker(ctrl_info); 8668 pqi_cancel_update_time_worker(ctrl_info); 8669 pqi_ctrl_wait_until_quiesced(ctrl_info); 8670 pqi_fail_all_outstanding_requests(ctrl_info); 8671 pqi_ctrl_unblock_requests(ctrl_info); 8672 } 8673 8674 static void pqi_ctrl_offline_worker(struct work_struct *work) 8675 { 8676 struct pqi_ctrl_info *ctrl_info; 8677 8678 ctrl_info = container_of(work, struct pqi_ctrl_info, ctrl_offline_work); 8679 pqi_take_ctrl_offline_deferred(ctrl_info); 8680 } 8681 8682 static void pqi_take_ctrl_offline(struct pqi_ctrl_info *ctrl_info, 8683 enum pqi_ctrl_shutdown_reason ctrl_shutdown_reason) 8684 { 8685 if (!ctrl_info->controller_online) 8686 return; 8687 8688 ctrl_info->controller_online = false; 8689 ctrl_info->pqi_mode_enabled = false; 8690 pqi_ctrl_block_requests(ctrl_info); 8691 if (!pqi_disable_ctrl_shutdown) 8692 sis_shutdown_ctrl(ctrl_info, ctrl_shutdown_reason); 8693 pci_disable_device(ctrl_info->pci_dev); 8694 dev_err(&ctrl_info->pci_dev->dev, "controller offline\n"); 8695 schedule_work(&ctrl_info->ctrl_offline_work); 8696 } 8697 8698 static void pqi_print_ctrl_info(struct pci_dev *pci_dev, 8699 const struct pci_device_id *id) 8700 { 8701 char *ctrl_description; 8702 8703 if (id->driver_data) 8704 ctrl_description = (char *)id->driver_data; 8705 else 8706 ctrl_description = "Microchip Smart Family Controller"; 8707 8708 dev_info(&pci_dev->dev, "%s found\n", ctrl_description); 8709 } 8710 8711 static int pqi_pci_probe(struct pci_dev *pci_dev, 8712 const struct pci_device_id *id) 8713 { 8714 int rc; 8715 int node, cp_node; 8716 struct pqi_ctrl_info *ctrl_info; 8717 8718 pqi_print_ctrl_info(pci_dev, id); 8719 8720 if (pqi_disable_device_id_wildcards && 8721 id->subvendor == PCI_ANY_ID && 8722 id->subdevice == PCI_ANY_ID) { 8723 dev_warn(&pci_dev->dev, 8724 "controller not probed because device ID wildcards are disabled\n"); 8725 return -ENODEV; 8726 } 8727 8728 if (id->subvendor == PCI_ANY_ID || id->subdevice == PCI_ANY_ID) 8729 dev_warn(&pci_dev->dev, 8730 "controller device ID matched using wildcards\n"); 8731 8732 node = dev_to_node(&pci_dev->dev); 8733 if (node == NUMA_NO_NODE) { 8734 cp_node = cpu_to_node(0); 8735 if (cp_node == NUMA_NO_NODE) 8736 cp_node = 0; 8737 set_dev_node(&pci_dev->dev, cp_node); 8738 } 8739 8740 ctrl_info = pqi_alloc_ctrl_info(node); 8741 if (!ctrl_info) { 8742 dev_err(&pci_dev->dev, 8743 "failed to allocate controller info block\n"); 8744 return -ENOMEM; 8745 } 8746 8747 ctrl_info->pci_dev = pci_dev; 8748 8749 rc = pqi_pci_init(ctrl_info); 8750 if (rc) 8751 goto error; 8752 8753 rc = pqi_ctrl_init(ctrl_info); 8754 if (rc) 8755 goto error; 8756 8757 return 0; 8758 8759 error: 8760 pqi_remove_ctrl(ctrl_info); 8761 8762 return rc; 8763 } 8764 8765 static void pqi_pci_remove(struct pci_dev *pci_dev) 8766 { 8767 struct pqi_ctrl_info *ctrl_info; 8768 8769 ctrl_info = pci_get_drvdata(pci_dev); 8770 if (!ctrl_info) 8771 return; 8772 8773 pqi_remove_ctrl(ctrl_info); 8774 } 8775 8776 static void pqi_crash_if_pending_command(struct pqi_ctrl_info *ctrl_info) 8777 { 8778 unsigned int i; 8779 struct pqi_io_request *io_request; 8780 struct scsi_cmnd *scmd; 8781 8782 for (i = 0; i < ctrl_info->max_io_slots; i++) { 8783 io_request = &ctrl_info->io_request_pool[i]; 8784 if (atomic_read(&io_request->refcount) == 0) 8785 continue; 8786 scmd = io_request->scmd; 8787 WARN_ON(scmd != NULL); /* IO command from SML */ 8788 WARN_ON(scmd == NULL); /* Non-IO cmd or driver initiated*/ 8789 } 8790 } 8791 8792 static void pqi_shutdown(struct pci_dev *pci_dev) 8793 { 8794 int rc; 8795 struct pqi_ctrl_info *ctrl_info; 8796 8797 ctrl_info = pci_get_drvdata(pci_dev); 8798 if (!ctrl_info) { 8799 dev_err(&pci_dev->dev, 8800 "cache could not be flushed\n"); 8801 return; 8802 } 8803 8804 pqi_wait_until_ofa_finished(ctrl_info); 8805 8806 pqi_scsi_block_requests(ctrl_info); 8807 pqi_ctrl_block_device_reset(ctrl_info); 8808 pqi_ctrl_block_requests(ctrl_info); 8809 pqi_ctrl_wait_until_quiesced(ctrl_info); 8810 8811 /* 8812 * Write all data in the controller's battery-backed cache to 8813 * storage. 8814 */ 8815 rc = pqi_flush_cache(ctrl_info, SHUTDOWN); 8816 if (rc) 8817 dev_err(&pci_dev->dev, 8818 "unable to flush controller cache\n"); 8819 8820 pqi_crash_if_pending_command(ctrl_info); 8821 pqi_reset(ctrl_info); 8822 } 8823 8824 static void pqi_process_lockup_action_param(void) 8825 { 8826 unsigned int i; 8827 8828 if (!pqi_lockup_action_param) 8829 return; 8830 8831 for (i = 0; i < ARRAY_SIZE(pqi_lockup_actions); i++) { 8832 if (strcmp(pqi_lockup_action_param, 8833 pqi_lockup_actions[i].name) == 0) { 8834 pqi_lockup_action = pqi_lockup_actions[i].action; 8835 return; 8836 } 8837 } 8838 8839 pr_warn("%s: invalid lockup action setting \"%s\" - supported settings: none, reboot, panic\n", 8840 DRIVER_NAME_SHORT, pqi_lockup_action_param); 8841 } 8842 8843 static void pqi_process_module_params(void) 8844 { 8845 pqi_process_lockup_action_param(); 8846 } 8847 8848 static __maybe_unused int pqi_suspend(struct pci_dev *pci_dev, pm_message_t state) 8849 { 8850 struct pqi_ctrl_info *ctrl_info; 8851 8852 ctrl_info = pci_get_drvdata(pci_dev); 8853 8854 pqi_wait_until_ofa_finished(ctrl_info); 8855 8856 pqi_ctrl_block_scan(ctrl_info); 8857 pqi_scsi_block_requests(ctrl_info); 8858 pqi_ctrl_block_device_reset(ctrl_info); 8859 pqi_ctrl_block_requests(ctrl_info); 8860 pqi_ctrl_wait_until_quiesced(ctrl_info); 8861 pqi_flush_cache(ctrl_info, SUSPEND); 8862 pqi_stop_heartbeat_timer(ctrl_info); 8863 8864 pqi_crash_if_pending_command(ctrl_info); 8865 8866 if (state.event == PM_EVENT_FREEZE) 8867 return 0; 8868 8869 pci_save_state(pci_dev); 8870 pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state)); 8871 8872 ctrl_info->controller_online = false; 8873 ctrl_info->pqi_mode_enabled = false; 8874 8875 return 0; 8876 } 8877 8878 static __maybe_unused int pqi_resume(struct pci_dev *pci_dev) 8879 { 8880 int rc; 8881 struct pqi_ctrl_info *ctrl_info; 8882 8883 ctrl_info = pci_get_drvdata(pci_dev); 8884 8885 if (pci_dev->current_state != PCI_D0) { 8886 ctrl_info->max_hw_queue_index = 0; 8887 pqi_free_interrupts(ctrl_info); 8888 pqi_change_irq_mode(ctrl_info, IRQ_MODE_INTX); 8889 rc = request_irq(pci_irq_vector(pci_dev, 0), pqi_irq_handler, 8890 IRQF_SHARED, DRIVER_NAME_SHORT, 8891 &ctrl_info->queue_groups[0]); 8892 if (rc) { 8893 dev_err(&ctrl_info->pci_dev->dev, 8894 "irq %u init failed with error %d\n", 8895 pci_dev->irq, rc); 8896 return rc; 8897 } 8898 pqi_ctrl_unblock_device_reset(ctrl_info); 8899 pqi_ctrl_unblock_requests(ctrl_info); 8900 pqi_scsi_unblock_requests(ctrl_info); 8901 pqi_ctrl_unblock_scan(ctrl_info); 8902 return 0; 8903 } 8904 8905 pci_set_power_state(pci_dev, PCI_D0); 8906 pci_restore_state(pci_dev); 8907 8908 pqi_ctrl_unblock_device_reset(ctrl_info); 8909 pqi_ctrl_unblock_requests(ctrl_info); 8910 pqi_scsi_unblock_requests(ctrl_info); 8911 pqi_ctrl_unblock_scan(ctrl_info); 8912 8913 return pqi_ctrl_init_resume(ctrl_info); 8914 } 8915 8916 /* Define the PCI IDs for the controllers that we support. */ 8917 static const struct pci_device_id pqi_pci_id_table[] = { 8918 { 8919 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8920 0x105b, 0x1211) 8921 }, 8922 { 8923 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8924 0x105b, 0x1321) 8925 }, 8926 { 8927 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8928 0x152d, 0x8a22) 8929 }, 8930 { 8931 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8932 0x152d, 0x8a23) 8933 }, 8934 { 8935 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8936 0x152d, 0x8a24) 8937 }, 8938 { 8939 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8940 0x152d, 0x8a36) 8941 }, 8942 { 8943 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8944 0x152d, 0x8a37) 8945 }, 8946 { 8947 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8948 0x193d, 0x8460) 8949 }, 8950 { 8951 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8952 0x193d, 0x1104) 8953 }, 8954 { 8955 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8956 0x193d, 0x1105) 8957 }, 8958 { 8959 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8960 0x193d, 0x1106) 8961 }, 8962 { 8963 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8964 0x193d, 0x1107) 8965 }, 8966 { 8967 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8968 0x193d, 0x1108) 8969 }, 8970 { 8971 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8972 0x193d, 0x1109) 8973 }, 8974 { 8975 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8976 0x193d, 0x8460) 8977 }, 8978 { 8979 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8980 0x193d, 0x8461) 8981 }, 8982 { 8983 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8984 0x193d, 0xc460) 8985 }, 8986 { 8987 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8988 0x193d, 0xc461) 8989 }, 8990 { 8991 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8992 0x193d, 0xf460) 8993 }, 8994 { 8995 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8996 0x193d, 0xf461) 8997 }, 8998 { 8999 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9000 0x1bd4, 0x0045) 9001 }, 9002 { 9003 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9004 0x1bd4, 0x0046) 9005 }, 9006 { 9007 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9008 0x1bd4, 0x0047) 9009 }, 9010 { 9011 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9012 0x1bd4, 0x0048) 9013 }, 9014 { 9015 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9016 0x1bd4, 0x004a) 9017 }, 9018 { 9019 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9020 0x1bd4, 0x004b) 9021 }, 9022 { 9023 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9024 0x1bd4, 0x004c) 9025 }, 9026 { 9027 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9028 0x1bd4, 0x004f) 9029 }, 9030 { 9031 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9032 0x1bd4, 0x0051) 9033 }, 9034 { 9035 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9036 0x1bd4, 0x0052) 9037 }, 9038 { 9039 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9040 0x1bd4, 0x0053) 9041 }, 9042 { 9043 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9044 0x1bd4, 0x0054) 9045 }, 9046 { 9047 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9048 0x19e5, 0xd227) 9049 }, 9050 { 9051 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9052 0x19e5, 0xd228) 9053 }, 9054 { 9055 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9056 0x19e5, 0xd229) 9057 }, 9058 { 9059 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9060 0x19e5, 0xd22a) 9061 }, 9062 { 9063 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9064 0x19e5, 0xd22b) 9065 }, 9066 { 9067 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9068 0x19e5, 0xd22c) 9069 }, 9070 { 9071 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9072 PCI_VENDOR_ID_ADAPTEC2, 0x0110) 9073 }, 9074 { 9075 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9076 PCI_VENDOR_ID_ADAPTEC2, 0x0608) 9077 }, 9078 { 9079 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9080 PCI_VENDOR_ID_ADAPTEC2, 0x0800) 9081 }, 9082 { 9083 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9084 PCI_VENDOR_ID_ADAPTEC2, 0x0801) 9085 }, 9086 { 9087 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9088 PCI_VENDOR_ID_ADAPTEC2, 0x0802) 9089 }, 9090 { 9091 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9092 PCI_VENDOR_ID_ADAPTEC2, 0x0803) 9093 }, 9094 { 9095 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9096 PCI_VENDOR_ID_ADAPTEC2, 0x0804) 9097 }, 9098 { 9099 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9100 PCI_VENDOR_ID_ADAPTEC2, 0x0805) 9101 }, 9102 { 9103 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9104 PCI_VENDOR_ID_ADAPTEC2, 0x0806) 9105 }, 9106 { 9107 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9108 PCI_VENDOR_ID_ADAPTEC2, 0x0807) 9109 }, 9110 { 9111 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9112 PCI_VENDOR_ID_ADAPTEC2, 0x0808) 9113 }, 9114 { 9115 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9116 PCI_VENDOR_ID_ADAPTEC2, 0x0809) 9117 }, 9118 { 9119 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9120 PCI_VENDOR_ID_ADAPTEC2, 0x080a) 9121 }, 9122 { 9123 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9124 PCI_VENDOR_ID_ADAPTEC2, 0x0900) 9125 }, 9126 { 9127 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9128 PCI_VENDOR_ID_ADAPTEC2, 0x0901) 9129 }, 9130 { 9131 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9132 PCI_VENDOR_ID_ADAPTEC2, 0x0902) 9133 }, 9134 { 9135 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9136 PCI_VENDOR_ID_ADAPTEC2, 0x0903) 9137 }, 9138 { 9139 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9140 PCI_VENDOR_ID_ADAPTEC2, 0x0904) 9141 }, 9142 { 9143 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9144 PCI_VENDOR_ID_ADAPTEC2, 0x0905) 9145 }, 9146 { 9147 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9148 PCI_VENDOR_ID_ADAPTEC2, 0x0906) 9149 }, 9150 { 9151 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9152 PCI_VENDOR_ID_ADAPTEC2, 0x0907) 9153 }, 9154 { 9155 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9156 PCI_VENDOR_ID_ADAPTEC2, 0x0908) 9157 }, 9158 { 9159 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9160 PCI_VENDOR_ID_ADAPTEC2, 0x090a) 9161 }, 9162 { 9163 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9164 PCI_VENDOR_ID_ADAPTEC2, 0x1200) 9165 }, 9166 { 9167 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9168 PCI_VENDOR_ID_ADAPTEC2, 0x1201) 9169 }, 9170 { 9171 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9172 PCI_VENDOR_ID_ADAPTEC2, 0x1202) 9173 }, 9174 { 9175 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9176 PCI_VENDOR_ID_ADAPTEC2, 0x1280) 9177 }, 9178 { 9179 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9180 PCI_VENDOR_ID_ADAPTEC2, 0x1281) 9181 }, 9182 { 9183 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9184 PCI_VENDOR_ID_ADAPTEC2, 0x1282) 9185 }, 9186 { 9187 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9188 PCI_VENDOR_ID_ADAPTEC2, 0x1300) 9189 }, 9190 { 9191 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9192 PCI_VENDOR_ID_ADAPTEC2, 0x1301) 9193 }, 9194 { 9195 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9196 PCI_VENDOR_ID_ADAPTEC2, 0x1302) 9197 }, 9198 { 9199 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9200 PCI_VENDOR_ID_ADAPTEC2, 0x1303) 9201 }, 9202 { 9203 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9204 PCI_VENDOR_ID_ADAPTEC2, 0x1380) 9205 }, 9206 { 9207 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9208 PCI_VENDOR_ID_ADAPTEC2, 0x1400) 9209 }, 9210 { 9211 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9212 PCI_VENDOR_ID_ADAPTEC2, 0x1402) 9213 }, 9214 { 9215 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9216 PCI_VENDOR_ID_ADAPTEC2, 0x1410) 9217 }, 9218 { 9219 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9220 PCI_VENDOR_ID_ADAPTEC2, 0x1411) 9221 }, 9222 { 9223 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9224 PCI_VENDOR_ID_ADAPTEC2, 0x1412) 9225 }, 9226 { 9227 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9228 PCI_VENDOR_ID_ADAPTEC2, 0x1420) 9229 }, 9230 { 9231 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9232 PCI_VENDOR_ID_ADAPTEC2, 0x1430) 9233 }, 9234 { 9235 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9236 PCI_VENDOR_ID_ADAPTEC2, 0x1440) 9237 }, 9238 { 9239 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9240 PCI_VENDOR_ID_ADAPTEC2, 0x1441) 9241 }, 9242 { 9243 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9244 PCI_VENDOR_ID_ADAPTEC2, 0x1450) 9245 }, 9246 { 9247 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9248 PCI_VENDOR_ID_ADAPTEC2, 0x1452) 9249 }, 9250 { 9251 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9252 PCI_VENDOR_ID_ADAPTEC2, 0x1460) 9253 }, 9254 { 9255 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9256 PCI_VENDOR_ID_ADAPTEC2, 0x1461) 9257 }, 9258 { 9259 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9260 PCI_VENDOR_ID_ADAPTEC2, 0x1462) 9261 }, 9262 { 9263 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9264 PCI_VENDOR_ID_ADAPTEC2, 0x1470) 9265 }, 9266 { 9267 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9268 PCI_VENDOR_ID_ADAPTEC2, 0x1471) 9269 }, 9270 { 9271 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9272 PCI_VENDOR_ID_ADAPTEC2, 0x1472) 9273 }, 9274 { 9275 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9276 PCI_VENDOR_ID_ADAPTEC2, 0x1480) 9277 }, 9278 { 9279 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9280 PCI_VENDOR_ID_ADAPTEC2, 0x1490) 9281 }, 9282 { 9283 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9284 PCI_VENDOR_ID_ADAPTEC2, 0x1491) 9285 }, 9286 { 9287 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9288 PCI_VENDOR_ID_ADAPTEC2, 0x14a0) 9289 }, 9290 { 9291 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9292 PCI_VENDOR_ID_ADAPTEC2, 0x14a1) 9293 }, 9294 { 9295 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9296 PCI_VENDOR_ID_ADAPTEC2, 0x14a2) 9297 }, 9298 { 9299 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9300 PCI_VENDOR_ID_ADAPTEC2, 0x14b0) 9301 }, 9302 { 9303 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9304 PCI_VENDOR_ID_ADAPTEC2, 0x14b1) 9305 }, 9306 { 9307 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9308 PCI_VENDOR_ID_ADAPTEC2, 0x14c0) 9309 }, 9310 { 9311 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9312 PCI_VENDOR_ID_ADAPTEC2, 0x14c1) 9313 }, 9314 { 9315 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9316 PCI_VENDOR_ID_ADAPTEC2, 0x14d0) 9317 }, 9318 { 9319 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9320 PCI_VENDOR_ID_ADAPTEC2, 0x14e0) 9321 }, 9322 { 9323 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9324 PCI_VENDOR_ID_ADAPTEC2, 0x14f0) 9325 }, 9326 { 9327 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9328 PCI_VENDOR_ID_ADVANTECH, 0x8312) 9329 }, 9330 { 9331 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9332 PCI_VENDOR_ID_DELL, 0x1fe0) 9333 }, 9334 { 9335 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9336 PCI_VENDOR_ID_HP, 0x0600) 9337 }, 9338 { 9339 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9340 PCI_VENDOR_ID_HP, 0x0601) 9341 }, 9342 { 9343 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9344 PCI_VENDOR_ID_HP, 0x0602) 9345 }, 9346 { 9347 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9348 PCI_VENDOR_ID_HP, 0x0603) 9349 }, 9350 { 9351 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9352 PCI_VENDOR_ID_HP, 0x0609) 9353 }, 9354 { 9355 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9356 PCI_VENDOR_ID_HP, 0x0650) 9357 }, 9358 { 9359 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9360 PCI_VENDOR_ID_HP, 0x0651) 9361 }, 9362 { 9363 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9364 PCI_VENDOR_ID_HP, 0x0652) 9365 }, 9366 { 9367 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9368 PCI_VENDOR_ID_HP, 0x0653) 9369 }, 9370 { 9371 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9372 PCI_VENDOR_ID_HP, 0x0654) 9373 }, 9374 { 9375 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9376 PCI_VENDOR_ID_HP, 0x0655) 9377 }, 9378 { 9379 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9380 PCI_VENDOR_ID_HP, 0x0700) 9381 }, 9382 { 9383 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9384 PCI_VENDOR_ID_HP, 0x0701) 9385 }, 9386 { 9387 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9388 PCI_VENDOR_ID_HP, 0x1001) 9389 }, 9390 { 9391 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9392 PCI_VENDOR_ID_HP, 0x1002) 9393 }, 9394 { 9395 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9396 PCI_VENDOR_ID_HP, 0x1100) 9397 }, 9398 { 9399 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9400 PCI_VENDOR_ID_HP, 0x1101) 9401 }, 9402 { 9403 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9404 0x1590, 0x0294) 9405 }, 9406 { 9407 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9408 0x1590, 0x02db) 9409 }, 9410 { 9411 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9412 0x1590, 0x02dc) 9413 }, 9414 { 9415 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9416 0x1590, 0x032e) 9417 }, 9418 { 9419 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9420 0x1d8d, 0x0800) 9421 }, 9422 { 9423 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9424 0x1d8d, 0x0908) 9425 }, 9426 { 9427 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9428 0x1d8d, 0x0806) 9429 }, 9430 { 9431 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9432 0x1d8d, 0x0916) 9433 }, 9434 { 9435 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9436 PCI_VENDOR_ID_GIGABYTE, 0x1000) 9437 }, 9438 { 9439 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9440 0x1dfc, 0x3161) 9441 }, 9442 { 9443 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9444 0x1cf2, 0x5445) 9445 }, 9446 { 9447 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9448 0x1cf2, 0x5446) 9449 }, 9450 { 9451 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9452 0x1cf2, 0x5447) 9453 }, 9454 { 9455 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9456 0x1cf2, 0x0b27) 9457 }, 9458 { 9459 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9460 0x1cf2, 0x0b29) 9461 }, 9462 { 9463 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9464 0x1cf2, 0x0b45) 9465 }, 9466 { 9467 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 9468 PCI_ANY_ID, PCI_ANY_ID) 9469 }, 9470 { 0 } 9471 }; 9472 9473 MODULE_DEVICE_TABLE(pci, pqi_pci_id_table); 9474 9475 static struct pci_driver pqi_pci_driver = { 9476 .name = DRIVER_NAME_SHORT, 9477 .id_table = pqi_pci_id_table, 9478 .probe = pqi_pci_probe, 9479 .remove = pqi_pci_remove, 9480 .shutdown = pqi_shutdown, 9481 #if defined(CONFIG_PM) 9482 .suspend = pqi_suspend, 9483 .resume = pqi_resume, 9484 #endif 9485 }; 9486 9487 static int __init pqi_init(void) 9488 { 9489 int rc; 9490 9491 pr_info(DRIVER_NAME "\n"); 9492 9493 pqi_sas_transport_template = sas_attach_transport(&pqi_sas_transport_functions); 9494 if (!pqi_sas_transport_template) 9495 return -ENODEV; 9496 9497 pqi_process_module_params(); 9498 9499 rc = pci_register_driver(&pqi_pci_driver); 9500 if (rc) 9501 sas_release_transport(pqi_sas_transport_template); 9502 9503 return rc; 9504 } 9505 9506 static void __exit pqi_cleanup(void) 9507 { 9508 pci_unregister_driver(&pqi_pci_driver); 9509 sas_release_transport(pqi_sas_transport_template); 9510 } 9511 9512 module_init(pqi_init); 9513 module_exit(pqi_cleanup); 9514 9515 static void __attribute__((unused)) verify_structures(void) 9516 { 9517 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9518 sis_host_to_ctrl_doorbell) != 0x20); 9519 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9520 sis_interrupt_mask) != 0x34); 9521 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9522 sis_ctrl_to_host_doorbell) != 0x9c); 9523 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9524 sis_ctrl_to_host_doorbell_clear) != 0xa0); 9525 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9526 sis_driver_scratch) != 0xb0); 9527 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9528 sis_product_identifier) != 0xb4); 9529 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9530 sis_firmware_status) != 0xbc); 9531 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9532 sis_ctrl_shutdown_reason_code) != 0xcc); 9533 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9534 sis_mailbox) != 0x1000); 9535 BUILD_BUG_ON(offsetof(struct pqi_ctrl_registers, 9536 pqi_registers) != 0x4000); 9537 9538 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 9539 iu_type) != 0x0); 9540 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 9541 iu_length) != 0x2); 9542 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 9543 response_queue_id) != 0x4); 9544 BUILD_BUG_ON(offsetof(struct pqi_iu_header, 9545 driver_flags) != 0x6); 9546 BUILD_BUG_ON(sizeof(struct pqi_iu_header) != 0x8); 9547 9548 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 9549 status) != 0x0); 9550 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 9551 service_response) != 0x1); 9552 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 9553 data_present) != 0x2); 9554 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 9555 reserved) != 0x3); 9556 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 9557 residual_count) != 0x4); 9558 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 9559 data_length) != 0x8); 9560 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 9561 reserved1) != 0xa); 9562 BUILD_BUG_ON(offsetof(struct pqi_aio_error_info, 9563 data) != 0xc); 9564 BUILD_BUG_ON(sizeof(struct pqi_aio_error_info) != 0x10c); 9565 9566 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9567 data_in_result) != 0x0); 9568 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9569 data_out_result) != 0x1); 9570 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9571 reserved) != 0x2); 9572 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9573 status) != 0x5); 9574 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9575 status_qualifier) != 0x6); 9576 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9577 sense_data_length) != 0x8); 9578 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9579 response_data_length) != 0xa); 9580 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9581 data_in_transferred) != 0xc); 9582 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9583 data_out_transferred) != 0x10); 9584 BUILD_BUG_ON(offsetof(struct pqi_raid_error_info, 9585 data) != 0x14); 9586 BUILD_BUG_ON(sizeof(struct pqi_raid_error_info) != 0x114); 9587 9588 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9589 signature) != 0x0); 9590 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9591 function_and_status_code) != 0x8); 9592 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9593 max_admin_iq_elements) != 0x10); 9594 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9595 max_admin_oq_elements) != 0x11); 9596 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9597 admin_iq_element_length) != 0x12); 9598 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9599 admin_oq_element_length) != 0x13); 9600 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9601 max_reset_timeout) != 0x14); 9602 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9603 legacy_intx_status) != 0x18); 9604 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9605 legacy_intx_mask_set) != 0x1c); 9606 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9607 legacy_intx_mask_clear) != 0x20); 9608 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9609 device_status) != 0x40); 9610 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9611 admin_iq_pi_offset) != 0x48); 9612 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9613 admin_oq_ci_offset) != 0x50); 9614 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9615 admin_iq_element_array_addr) != 0x58); 9616 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9617 admin_oq_element_array_addr) != 0x60); 9618 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9619 admin_iq_ci_addr) != 0x68); 9620 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9621 admin_oq_pi_addr) != 0x70); 9622 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9623 admin_iq_num_elements) != 0x78); 9624 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9625 admin_oq_num_elements) != 0x79); 9626 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9627 admin_queue_int_msg_num) != 0x7a); 9628 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9629 device_error) != 0x80); 9630 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9631 error_details) != 0x88); 9632 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9633 device_reset) != 0x90); 9634 BUILD_BUG_ON(offsetof(struct pqi_device_registers, 9635 power_action) != 0x94); 9636 BUILD_BUG_ON(sizeof(struct pqi_device_registers) != 0x100); 9637 9638 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9639 header.iu_type) != 0); 9640 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9641 header.iu_length) != 2); 9642 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9643 header.driver_flags) != 6); 9644 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9645 request_id) != 8); 9646 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9647 function_code) != 10); 9648 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9649 data.report_device_capability.buffer_length) != 44); 9650 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9651 data.report_device_capability.sg_descriptor) != 48); 9652 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9653 data.create_operational_iq.queue_id) != 12); 9654 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9655 data.create_operational_iq.element_array_addr) != 16); 9656 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9657 data.create_operational_iq.ci_addr) != 24); 9658 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9659 data.create_operational_iq.num_elements) != 32); 9660 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9661 data.create_operational_iq.element_length) != 34); 9662 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9663 data.create_operational_iq.queue_protocol) != 36); 9664 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9665 data.create_operational_oq.queue_id) != 12); 9666 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9667 data.create_operational_oq.element_array_addr) != 16); 9668 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9669 data.create_operational_oq.pi_addr) != 24); 9670 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9671 data.create_operational_oq.num_elements) != 32); 9672 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9673 data.create_operational_oq.element_length) != 34); 9674 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9675 data.create_operational_oq.queue_protocol) != 36); 9676 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9677 data.create_operational_oq.int_msg_num) != 40); 9678 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9679 data.create_operational_oq.coalescing_count) != 42); 9680 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9681 data.create_operational_oq.min_coalescing_time) != 44); 9682 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9683 data.create_operational_oq.max_coalescing_time) != 48); 9684 BUILD_BUG_ON(offsetof(struct pqi_general_admin_request, 9685 data.delete_operational_queue.queue_id) != 12); 9686 BUILD_BUG_ON(sizeof(struct pqi_general_admin_request) != 64); 9687 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 9688 data.create_operational_iq) != 64 - 11); 9689 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 9690 data.create_operational_oq) != 64 - 11); 9691 BUILD_BUG_ON(sizeof_field(struct pqi_general_admin_request, 9692 data.delete_operational_queue) != 64 - 11); 9693 9694 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9695 header.iu_type) != 0); 9696 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9697 header.iu_length) != 2); 9698 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9699 header.driver_flags) != 6); 9700 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9701 request_id) != 8); 9702 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9703 function_code) != 10); 9704 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9705 status) != 11); 9706 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9707 data.create_operational_iq.status_descriptor) != 12); 9708 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9709 data.create_operational_iq.iq_pi_offset) != 16); 9710 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9711 data.create_operational_oq.status_descriptor) != 12); 9712 BUILD_BUG_ON(offsetof(struct pqi_general_admin_response, 9713 data.create_operational_oq.oq_ci_offset) != 16); 9714 BUILD_BUG_ON(sizeof(struct pqi_general_admin_response) != 64); 9715 9716 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9717 header.iu_type) != 0); 9718 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9719 header.iu_length) != 2); 9720 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9721 header.response_queue_id) != 4); 9722 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9723 header.driver_flags) != 6); 9724 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9725 request_id) != 8); 9726 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9727 nexus_id) != 10); 9728 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9729 buffer_length) != 12); 9730 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9731 lun_number) != 16); 9732 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9733 protocol_specific) != 24); 9734 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9735 error_index) != 27); 9736 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9737 cdb) != 32); 9738 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9739 timeout) != 60); 9740 BUILD_BUG_ON(offsetof(struct pqi_raid_path_request, 9741 sg_descriptors) != 64); 9742 BUILD_BUG_ON(sizeof(struct pqi_raid_path_request) != 9743 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 9744 9745 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9746 header.iu_type) != 0); 9747 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9748 header.iu_length) != 2); 9749 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9750 header.response_queue_id) != 4); 9751 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9752 header.driver_flags) != 6); 9753 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9754 request_id) != 8); 9755 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9756 nexus_id) != 12); 9757 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9758 buffer_length) != 16); 9759 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9760 data_encryption_key_index) != 22); 9761 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9762 encrypt_tweak_lower) != 24); 9763 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9764 encrypt_tweak_upper) != 28); 9765 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9766 cdb) != 32); 9767 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9768 error_index) != 48); 9769 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9770 num_sg_descriptors) != 50); 9771 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9772 cdb_length) != 51); 9773 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9774 lun_number) != 52); 9775 BUILD_BUG_ON(offsetof(struct pqi_aio_path_request, 9776 sg_descriptors) != 64); 9777 BUILD_BUG_ON(sizeof(struct pqi_aio_path_request) != 9778 PQI_OPERATIONAL_IQ_ELEMENT_LENGTH); 9779 9780 BUILD_BUG_ON(offsetof(struct pqi_io_response, 9781 header.iu_type) != 0); 9782 BUILD_BUG_ON(offsetof(struct pqi_io_response, 9783 header.iu_length) != 2); 9784 BUILD_BUG_ON(offsetof(struct pqi_io_response, 9785 request_id) != 8); 9786 BUILD_BUG_ON(offsetof(struct pqi_io_response, 9787 error_index) != 10); 9788 9789 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 9790 header.iu_type) != 0); 9791 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 9792 header.iu_length) != 2); 9793 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 9794 header.response_queue_id) != 4); 9795 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 9796 request_id) != 8); 9797 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 9798 data.report_event_configuration.buffer_length) != 12); 9799 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 9800 data.report_event_configuration.sg_descriptors) != 16); 9801 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 9802 data.set_event_configuration.global_event_oq_id) != 10); 9803 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 9804 data.set_event_configuration.buffer_length) != 12); 9805 BUILD_BUG_ON(offsetof(struct pqi_general_management_request, 9806 data.set_event_configuration.sg_descriptors) != 16); 9807 9808 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 9809 max_inbound_iu_length) != 6); 9810 BUILD_BUG_ON(offsetof(struct pqi_iu_layer_descriptor, 9811 max_outbound_iu_length) != 14); 9812 BUILD_BUG_ON(sizeof(struct pqi_iu_layer_descriptor) != 16); 9813 9814 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9815 data_length) != 0); 9816 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9817 iq_arbitration_priority_support_bitmask) != 8); 9818 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9819 maximum_aw_a) != 9); 9820 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9821 maximum_aw_b) != 10); 9822 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9823 maximum_aw_c) != 11); 9824 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9825 max_inbound_queues) != 16); 9826 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9827 max_elements_per_iq) != 18); 9828 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9829 max_iq_element_length) != 24); 9830 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9831 min_iq_element_length) != 26); 9832 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9833 max_outbound_queues) != 30); 9834 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9835 max_elements_per_oq) != 32); 9836 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9837 intr_coalescing_time_granularity) != 34); 9838 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9839 max_oq_element_length) != 36); 9840 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9841 min_oq_element_length) != 38); 9842 BUILD_BUG_ON(offsetof(struct pqi_device_capability, 9843 iu_layer_descriptors) != 64); 9844 BUILD_BUG_ON(sizeof(struct pqi_device_capability) != 576); 9845 9846 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 9847 event_type) != 0); 9848 BUILD_BUG_ON(offsetof(struct pqi_event_descriptor, 9849 oq_id) != 2); 9850 BUILD_BUG_ON(sizeof(struct pqi_event_descriptor) != 4); 9851 9852 BUILD_BUG_ON(offsetof(struct pqi_event_config, 9853 num_event_descriptors) != 2); 9854 BUILD_BUG_ON(offsetof(struct pqi_event_config, 9855 descriptors) != 4); 9856 9857 BUILD_BUG_ON(PQI_NUM_SUPPORTED_EVENTS != 9858 ARRAY_SIZE(pqi_supported_event_types)); 9859 9860 BUILD_BUG_ON(offsetof(struct pqi_event_response, 9861 header.iu_type) != 0); 9862 BUILD_BUG_ON(offsetof(struct pqi_event_response, 9863 header.iu_length) != 2); 9864 BUILD_BUG_ON(offsetof(struct pqi_event_response, 9865 event_type) != 8); 9866 BUILD_BUG_ON(offsetof(struct pqi_event_response, 9867 event_id) != 10); 9868 BUILD_BUG_ON(offsetof(struct pqi_event_response, 9869 additional_event_id) != 12); 9870 BUILD_BUG_ON(offsetof(struct pqi_event_response, 9871 data) != 16); 9872 BUILD_BUG_ON(sizeof(struct pqi_event_response) != 32); 9873 9874 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 9875 header.iu_type) != 0); 9876 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 9877 header.iu_length) != 2); 9878 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 9879 event_type) != 8); 9880 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 9881 event_id) != 10); 9882 BUILD_BUG_ON(offsetof(struct pqi_event_acknowledge_request, 9883 additional_event_id) != 12); 9884 BUILD_BUG_ON(sizeof(struct pqi_event_acknowledge_request) != 16); 9885 9886 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9887 header.iu_type) != 0); 9888 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9889 header.iu_length) != 2); 9890 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9891 request_id) != 8); 9892 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9893 nexus_id) != 10); 9894 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9895 timeout) != 14); 9896 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9897 lun_number) != 16); 9898 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9899 protocol_specific) != 24); 9900 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9901 outbound_queue_id_to_manage) != 26); 9902 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9903 request_id_to_manage) != 28); 9904 BUILD_BUG_ON(offsetof(struct pqi_task_management_request, 9905 task_management_function) != 30); 9906 BUILD_BUG_ON(sizeof(struct pqi_task_management_request) != 32); 9907 9908 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 9909 header.iu_type) != 0); 9910 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 9911 header.iu_length) != 2); 9912 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 9913 request_id) != 8); 9914 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 9915 nexus_id) != 10); 9916 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 9917 additional_response_info) != 12); 9918 BUILD_BUG_ON(offsetof(struct pqi_task_management_response, 9919 response_code) != 15); 9920 BUILD_BUG_ON(sizeof(struct pqi_task_management_response) != 16); 9921 9922 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9923 configured_logical_drive_count) != 0); 9924 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9925 configuration_signature) != 1); 9926 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9927 firmware_version_short) != 5); 9928 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9929 extended_logical_unit_count) != 154); 9930 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9931 firmware_build_number) != 190); 9932 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9933 vendor_id) != 200); 9934 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9935 product_id) != 208); 9936 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9937 extra_controller_flags) != 286); 9938 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9939 controller_mode) != 292); 9940 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9941 spare_part_number) != 293); 9942 BUILD_BUG_ON(offsetof(struct bmic_identify_controller, 9943 firmware_version_long) != 325); 9944 9945 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 9946 phys_bay_in_box) != 115); 9947 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 9948 device_type) != 120); 9949 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 9950 redundant_path_present_map) != 1736); 9951 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 9952 active_path_number) != 1738); 9953 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 9954 alternate_paths_phys_connector) != 1739); 9955 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 9956 alternate_paths_phys_box_on_port) != 1755); 9957 BUILD_BUG_ON(offsetof(struct bmic_identify_physical_device, 9958 current_queue_depth_limit) != 1796); 9959 BUILD_BUG_ON(sizeof(struct bmic_identify_physical_device) != 2560); 9960 9961 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_buffer_header) != 4); 9962 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 9963 page_code) != 0); 9964 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 9965 subpage_code) != 1); 9966 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_buffer_header, 9967 buffer_length) != 2); 9968 9969 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_page_header) != 4); 9970 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 9971 page_code) != 0); 9972 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 9973 subpage_code) != 1); 9974 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_page_header, 9975 page_length) != 2); 9976 9977 BUILD_BUG_ON(sizeof(struct bmic_sense_feature_io_page_aio_subpage) 9978 != 18); 9979 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9980 header) != 0); 9981 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9982 firmware_read_support) != 4); 9983 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9984 driver_read_support) != 5); 9985 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9986 firmware_write_support) != 6); 9987 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9988 driver_write_support) != 7); 9989 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9990 max_transfer_encrypted_sas_sata) != 8); 9991 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9992 max_transfer_encrypted_nvme) != 10); 9993 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9994 max_write_raid_5_6) != 12); 9995 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9996 max_write_raid_1_10_2drive) != 14); 9997 BUILD_BUG_ON(offsetof(struct bmic_sense_feature_io_page_aio_subpage, 9998 max_write_raid_1_10_3drive) != 16); 9999 10000 BUILD_BUG_ON(PQI_ADMIN_IQ_NUM_ELEMENTS > 255); 10001 BUILD_BUG_ON(PQI_ADMIN_OQ_NUM_ELEMENTS > 255); 10002 BUILD_BUG_ON(PQI_ADMIN_IQ_ELEMENT_LENGTH % 10003 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10004 BUILD_BUG_ON(PQI_ADMIN_OQ_ELEMENT_LENGTH % 10005 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10006 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH > 1048560); 10007 BUILD_BUG_ON(PQI_OPERATIONAL_IQ_ELEMENT_LENGTH % 10008 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10009 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH > 1048560); 10010 BUILD_BUG_ON(PQI_OPERATIONAL_OQ_ELEMENT_LENGTH % 10011 PQI_QUEUE_ELEMENT_LENGTH_ALIGNMENT != 0); 10012 10013 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= PQI_MAX_OUTSTANDING_REQUESTS); 10014 BUILD_BUG_ON(PQI_RESERVED_IO_SLOTS >= 10015 PQI_MAX_OUTSTANDING_REQUESTS_KDUMP); 10016 } 10017